45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
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#ifndef _SPI_SRAM_H
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#define _SPI_SRAM_H
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#include "stdint.h"
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#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
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#define SRAM_CE_H GPIOA_ResetBits(GPIO_Pin_12) //SRAM<41><4D>flash<73><68><EFBFBD><EFBFBD>PA12<31><32>Ƭѡ
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#define SRAM_CE_L GPIOA_SetBits(GPIO_Pin_12)
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#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
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#define SRAM_CE_H GPIOA_SetBits(GPIO_Pin_12)
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#define SRAM_CE_L GPIOA_ResetBits(GPIO_Pin_12)
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#endif //USE_CORE_TYPE == CORE_TYPE_C1F
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#define SRAM_CMD_Read 0x03
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#define SRAM_CMD_Fast_Read 0x0B
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#define SRAM_CMD_Fast_Read_Quad 0xEB
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#define SRAM_CMD_Write 0x02
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#define SRAM_CMD_Quad_Write 0x38
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#define SRAM_CMD_Enter_Quad_Mode 0x35
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#define SRAM_CMD_Exit_Quad_Mode 0xF5
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#define SRAM_CMD_Reset_Enable 0x66
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#define SRAM_CMD_Reset 0x99
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#define SRAM_CMD_Wrap_Boundary_Toggle 0xC0
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#define SRAM_CMD_Read_ID 0x9F
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#define SRAM_ADDRESS_MAX 0x00800000
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void SPI_SRAM_Init(void);
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void SRAM_Write_Byte(uint8_t wdate,uint32_t add);
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uint8_t SRAM_Read_Byte(uint32_t add);
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void SRAM_Write_Word(uint16_t wdate,uint32_t add);
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uint16_t SRAM_Read_Word(uint32_t add);
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void SRAM_Write_DW(uint32_t wdate,uint32_t add);
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uint32_t SRAM_Read_DW(uint32_t add);
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void SRAM_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add);
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void SRAM_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add);
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void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add);
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void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add);
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#endif
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