fix:修改UDP通讯中，取电变化上报机制
1、问题点：当RCU网络状态异常的情况下，网络还处于协商状态下，还未进入正常通讯环节时，取电变化不会进行判断。这会导致取电变化上报与实际产生取电状态时间点对不上。 2、将BLV_C1F_Module代码上传至Gitea,之前代码修改记录请查看 .\BasicCode\Readme.txt
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caocong
290
BasicCode/Drive/SPI SRAM/SPI_SRAM.c
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290
BasicCode/Drive/SPI SRAM/SPI_SRAM.c
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/*******************************************************************************
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* Function Name : APS6404L-3SQR SRAM -- 8M*8bit
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* Description : SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*******************************************************************************/
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#include "includes.h"
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/*******************************************************************************
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* Function Name : SPI_SRAM_Init
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* Description : SRAM<41><4D>ʼ<EFBFBD><CABC>
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* Input : None
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* Return : None
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*******************************************************************************/
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void SPI_SRAM_Init(void)
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{
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#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
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//<2F><><EFBFBD><EFBFBD>SPI GPIO
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GPIOA_ModeCfg(GPIO_Pin_12, GPIO_ModeOut_PP_20mA); //CS
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GPIOA_SetBits( GPIO_Pin_13 );
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GPIOA_ModeCfg(GPIO_Pin_13|GPIO_Pin_14, GPIO_ModeOut_PP_5mA);
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GPIOA_ModeCfg(GPIO_Pin_15, GPIO_ModeIN_PU); //MISO
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//SPI <20><><EFBFBD><EFBFBD>ģʽ
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SPI0_MasterDefInit( );
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SPI0_DataMode(Mode0_HighBitINFront);
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SRAM_CE_L; //SRAM<41><4D>flashʹ<68><CAB9>ͬһƬѡ<C6AC>ţ<EFBFBD>Ĭ<EFBFBD><C4AC>ѡSRAM
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#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
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//<2F><><EFBFBD><EFBFBD>SPI GPIO
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GPIOA_ModeCfg(GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14, GPIO_ModeOut_PP_5mA);
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//SPI <20><><EFBFBD><EFBFBD>ģʽ
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SPI0_MasterDefInit( );
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SPI0_DataMode(Mode0_HighBitINFront);
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SRAM_CE_H;
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#endif //USE_CORE_TYPE == CORE_TYPE_C1F
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}
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/*******************************************************************************
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* Function Name : SRAM_Write_Byte
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* Description : SRAMд<4D>ֽ<EFBFBD>
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* Input :
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wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : None
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*******************************************************************************/
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void SRAM_Write_Byte(uint8_t wdate,uint32_t add)
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{
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uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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if(add >= SRAM_ADDRESS_MAX) return ;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Write);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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SPI0_MasterSendByte(wdate);
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SRAM_CE_H;
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DelayUs(10);
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}
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/*******************************************************************************
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* Function Name : SRAM_Read_Byte
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* Description : SRAM<41><4D><EFBFBD>ֽ<EFBFBD>
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* Input :
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add <09><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֽڵĵ<DAB5>ַ
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* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
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*******************************************************************************/
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uint8_t SRAM_Read_Byte(uint32_t add)
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{
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uint8_t Hadd8=0x00,Hadd16=0x00,Ladd=0x00,rdate=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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if(add >= SRAM_ADDRESS_MAX) return 0x00;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Read);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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rdate = SPI0_MasterRecvByte();
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SRAM_CE_H;
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// if(rdate == 0xFF)
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// {
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// if(GPIOB_ReadPortPin(GPIO_Pin_3) == 0x00)
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// {
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// GPIOB_SetBits(GPIO_Pin_3);
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// }else{
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// GPIOB_ResetBits(GPIO_Pin_3);
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// }
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// }
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DelayUs(10);
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return rdate;
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}
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/*******************************************************************************
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* Function Name : SRAM_Write_Word
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* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
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*******************************************************************************/
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void SRAM_Write_Word(uint16_t wdate,uint32_t add)
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{
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SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
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SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
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}
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/*******************************************************************************
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* Function Name : SRAM_Read_Word
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* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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add <09><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֵĵ<D6B5>ַ
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* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1>
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*******************************************************************************/
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uint16_t SRAM_Read_Word(uint32_t add)
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{
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uint16_t rev = 0;
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rev = SRAM_Read_Byte(add + 1);
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rev <<= 8;
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rev |= SRAM_Read_Byte(add);
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return rev;
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}
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/*******************************************************************************
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* Function Name : SRAM_Write_DW
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* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD>˫<EFBFBD><CBAB>
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add <09><>˫<EFBFBD><CBAB>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
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*******************************************************************************/
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void SRAM_Write_DW(uint32_t wdate,uint32_t add)
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{
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SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
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SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
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SRAM_Write_Byte((uint8_t)((wdate >> 16) & 0xFF),add + 2);
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SRAM_Write_Byte((uint8_t)((wdate >> 24) & 0xFF),add + 3);
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}
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/*******************************************************************************
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* Function Name : SRAM_Read_DW
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* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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add <09><><EFBFBD><EFBFBD>ȡ˫<C8A1>ֵĵ<D6B5>ַ
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* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
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*******************************************************************************/
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uint32_t SRAM_Read_DW(uint32_t add)
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{
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uint32_t rev = 0;
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rev = SRAM_Read_Byte(add + 3);
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rev <<= 8;
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rev |= SRAM_Read_Byte(add + 2);
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rev <<= 8;
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rev |= SRAM_Read_Byte(add + 1);
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rev <<= 8;
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rev |= SRAM_Read_Byte(add);
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return rev;
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}
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/*******************************************************************************
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* Function Name : SRAM_Write_Buff
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* Description : SRAM FIFO<46><4F>ʽд<CABD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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wbuff : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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len : д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : None
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*******************************************************************************/
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void SRAM_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add)
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{
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uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ
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if(add + len >= SRAM_ADDRESS_MAX) return ;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Write);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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SPI0_MasterTrans(wbuff,len);
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SRAM_CE_H;
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DelayUs(10);
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}
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/*******************************************************************************
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* Function Name : SRAM_Read_Buff
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* Description : SRAM FIFO<46><4F>ʽ<EFBFBD><CABD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
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* Input :
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rbuff : <20><>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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len : <20><>ȡ<EFBFBD><C8A1><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : None
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*******************************************************************************/
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void SRAM_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add)
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{
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uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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if(add + len >= SRAM_ADDRESS_MAX) return ;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Read);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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SPI0_MasterRecv(rbuff,len);
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SRAM_CE_H;
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DelayUs(10);
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}
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/*******************************************************************************
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* Function Name : SRAM_DMA_Write_Buff
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* Description : SRAM DMA<4D><41>ʽд<CABD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* Input :
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wbuff : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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len : д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : None
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*******************************************************************************/
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void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add)
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{
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uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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if(add + len >= SRAM_ADDRESS_MAX) return ;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Write);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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SPI0_MasterDMATrans(wbuff,len);
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SRAM_CE_H;
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DelayUs(10);
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}
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/*******************************************************************************
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* Function Name : SRAM_DMA_Read_Buff
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* Description : SRAM DMA<4D><41>ʽ<EFBFBD><CABD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
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* Input :
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rbuff : <20><>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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len : <20><>ȡ<EFBFBD><C8A1><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
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add <09><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
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* Return : None
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*******************************************************************************/
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void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add)
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{
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uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
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Ladd=add;
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Hadd8=add>>8;
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Hadd16=add>>16;
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if(add + len >= SRAM_ADDRESS_MAX) return ;
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SRAM_CE_L;
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SPI0_MasterSendByte(SRAM_CMD_Read);
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SPI0_MasterSendByte(Hadd16);
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SPI0_MasterSendByte(Hadd8);
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SPI0_MasterSendByte(Ladd);
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SPI0_MasterDMARecv(rbuff,len);
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SRAM_CE_H;
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DelayUs(10);
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}
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