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fix:修改RS485通讯引脚

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RS485通讯引脚改为串口2，引脚：RX：PB05 TX：PB04 RS485_DR:PB03
This commit is contained in:
caocong
2026-02-25 10:29:57 +08:00
commit 2815979c8a
77 changed files with 16491 additions and 0 deletions
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287
Source/FWlib/apt32f102_bt.c Normal file
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/*
******************************************************************************
* @file apt32f102_bt.c
* @author APT AE Team
* @version V1.10
* @date 2021/08/25
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_bt.h"
/* defines -------------------------------------------------------------------*/
/* externs--------------------------------------------------------------------*/
/*************************************************************/
//Deinitializes the registers to their default reset
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_DeInit(CSP_BT_T *BTx)
{
BTx->RSSR=BT_RESET_VALUE;
BTx->CR=BT_RESET_VALUE;
BTx->PSCR=BT_RESET_VALUE;
BTx->PRDR=BT_RESET_VALUE;
BTx->CMP=BT_RESET_VALUE;
BTx->CNT=BT_RESET_VALUE;
BTx->EVTRG=BT_RESET_VALUE;
BTx->EVSWF=BT_RESET_VALUE;
BTx->RISR=BT_RESET_VALUE;
BTx->IMCR=BT_RESET_VALUE;
BTx->MISR=BT_RESET_VALUE;
BTx->ICR=BT_RESET_VALUE;
}
/*************************************************************/
//BT IO Init
//EntryParameter:LPT_OUT_PA09,LPT_OUT_PB01,LPT_IN_PA10,
//ReturnValue:NONE
/*************************************************************/
void BT_IO_Init(BT_Pin_TypeDef BT_IONAME)
{
if(BT_IONAME==BT0_PA00)
{
GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFFFF0)|0x00000006; //BT0 PA0.0
}
if(BT_IONAME==BT0_PA02)
{
GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFF0FF)|0x00000600; //BT0 PA0.2
}
if(BT_IONAME==BT0_PA05)
{
GPIOA0->CONLR=(GPIOA0->CONLR & 0XFF0FFFFF)|0x00500000; //BT0 PA0.5
}
if(BT_IONAME==BT0_PB02)
{
GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFF0FF)|0x00000500; //BT0 PB0.2
}
if(BT_IONAME==BT0_PB05)
{
GPIOB0->CONLR=(GPIOB0->CONLR & 0XFF0FFFFF)|0x00700000; //BT0 PB0.5
}
if(BT_IONAME==BT0_PA11)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00008000; //BT0 PA0.11
}
if(BT_IONAME==BT0_PA13)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFF0FFFFF)|0x00800000; //BT0 PA0.13
}
if(BT_IONAME==BT0_PA15)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0X0FFFFFFF)|0x50000000; //BT0 PA0.15
}
if(BT_IONAME==BT1_PA01)
{
GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFFF0F)|0x00000060; //BT1 PA0.1
}
if(BT_IONAME==BT1_PA06)
{
GPIOA0->CONLR=(GPIOA0->CONLR & 0XF0FFFFFF)|0x04000000; //BT1 PA0.6
}
if(BT_IONAME==BT1_PA08)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFFF0)|0x00000006; //BT1 PA0.8
}
if(BT_IONAME==BT1_PA12)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00060000; //BT1 PA0.12
}
if(BT_IONAME==BT1_PA14)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x05000000; //BT1 PA0.14
}
if(BT_IONAME==BT1_PB00)
{
GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000008; //BT1 PB0.0
}
if(BT_IONAME==BT1_PB04)
{
GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFF0FFFF)|0x00070000; //BT1 PB0.4
}
}
/*************************************************************/
// BT start
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_Start(CSP_BT_T *BTx)
{
BTx->RSSR |=0X01;
}
/*************************************************************/
// BT stop
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_Stop(CSP_BT_T *BTx)
{
BTx->RSSR &=0X0;
}
/*************************************************************/
// BT stop High
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_Stop_High(CSP_BT_T *BTx)
{
BTx->CR |=(0x01<<6);
BTx->RSSR &=0X0;
}
/*************************************************************/
// BT stop Low
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_Stop_Low(CSP_BT_T *BTx)
{
BTx->CR =BTx->CR & ~(0x01<<6);
BTx->RSSR &=0X0;
}
/*************************************************************/
// BT soft reset
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_Soft_Reset(CSP_BT_T *BTx)
{
BTx->RSSR |= (0X5<<12);
}
/*************************************************************/
//BT Configure
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
{
BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
BTx->PSCR = PSCR_DATA;
}
/*************************************************************/
//BT ControlSet
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
{
BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
}
/*************************************************************/
//BT Period / Compare set
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
{
//BTx->CR|=0X01<<2;
BTx->PRDR =BTPRDR_DATA;
BTx->CMP =BTCMP_DATA;
}
/*************************************************************/
//BT COUNTER set
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_CNT_Write(CSP_BT_T *BTx,U16_T BTCNT_DATA)
{
BTx->CNT =BTCNT_DATA;
}
/*************************************************************/
//BT read counters
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
U16_T BT_PRDR_Read(CSP_BT_T *BTx)
{
return BTx->PRDR;
}
U16_T BT_CMP_Read(CSP_BT_T *BTx)
{
return BTx->CMP;
}
U16_T BT_CNT_Read(CSP_BT_T *BTx)
{
return BTx->CNT;
}
/*************************************************************/
//BT Trigger Init
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_Trigger_Configure(CSP_BT_T *BTx,BT_TRGSRC_TypeDef BTTRG,BT_TRGOE_TypeDef BTTRGOE)
{
BTx->EVTRG|=BTTRG| BTTRGOE;
}
/*************************************************************/
//BT SOFT Trigger
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void BT_Soft_Tigger(CSP_BT_T *BTx)
{
BTx->EVSWF=0x01;
}
/*************************************************************/
//BT inturrpt Configure
//EntryParameter:BT_IMSCR_X,NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
{
if (NewState != DISABLE)
{
BTx->IMCR |= BT_IMSCR_X;
}
else
{
BTx->IMCR &= ~BT_IMSCR_X;
}
}
/*************************************************************/
//BT0 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT0_INT_ENABLE(void)
{
INTC_ISER_WRITE(BT0_INT);
}
/*************************************************************/
//BT0 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT0_INT_DISABLE(void)
{
INTC_ICER_WRITE(BT0_INT);
}
/*************************************************************/
//BT0 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT1_INT_ENABLE(void)
{
INTC_ISER_WRITE(BT1_INT);
}
/*************************************************************/
//BT0 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT1_INT_DISABLE(void)
{
INTC_ICER_WRITE(BT1_INT);
}

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Source/FWlib/apt32f102_gpio.c Normal file
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/*
******************************************************************************
* @file main.c
* @author APT AE Team
* @version V1.10
* @date 2021/08/25
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_gpio.h"
/* define --------------------------------------------------------------------*/
/* externs--------------------------------------------------------------------*/
/*************************************************************/
//IO RESET CLEAR ALL REGISTER
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void GPIO_DeInit(void)
{
GPIOA0->CONLR &= 0xFF000000;
GPIOA0->CONHR = GPIO_RESET_VALUE;
GPIOB0->CONLR = GPIO_RESET_VALUE;
GPIOB0->CONHR = GPIO_RESET_VALUE;
GPIOA0->WODR = GPIO_RESET_VALUE;
GPIOB0->WODR = GPIO_RESET_VALUE;
GPIOA0->SODR = GPIO_RESET_VALUE;
GPIOB0->SODR = GPIO_RESET_VALUE;
GPIOA0->CODR = GPIO_RESET_VALUE;
GPIOB0->CODR = GPIO_RESET_VALUE;
GPIOA0->ODSR = GPIO_RESET_VALUE;
GPIOB0->ODSR = GPIO_RESET_VALUE;
GPIOA0->PSDR = GPIO_RESET_VALUE;
GPIOB0->PSDR = GPIO_RESET_VALUE;
GPIOA0->FLTEN = 0xffff;
GPIOB0->FLTEN = 0x3f;
GPIOA0->PUDR = GPIO_RESET_VALUE;
GPIOB0->PUDR = GPIO_RESET_VALUE;
GPIOA0->DSCR = GPIO_RESET_VALUE;
GPIOB0->DSCR = GPIO_RESET_VALUE;
GPIOA0->OMCR = GPIO_RESET_VALUE;
GPIOB0->OMCR = GPIO_RESET_VALUE;
GPIOA0->IECR = GPIO_RESET_VALUE;
GPIOB0->IECR = GPIO_RESET_VALUE;
GPIOGRP->IGRPL = GPIO_RESET_VALUE;
GPIOGRP->IGRPH = GPIO_RESET_VALUE;
GPIOGRP->IGREX = GPIO_RESET_VALUE;
GPIOGRP->IO_CLKEN = 0xf;
}
/*************************************************************/
//IO OUTPUT INPUT SET 2
//EntryParameter:GPIOx,byte,val
//GPIOx:GPIOA0,GPIOB0
//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
//val:0x0000000~0xFFFFFFFF
//val=0x11111111 all IO as input
//val=0x22222222 all IO as output
//ReturnValue:NONE
/*************************************************************/
void GPIO_Init2(CSP_GPIO_T *GPIOx,GPIO_byte_TypeDef byte,uint32_t val)
{
if (byte==0)
{
(GPIOx)->CONLR=val;
}
else if(byte==1)
{
(GPIOx)->CONHR=val;
}
}
/*************************************************************/
//IO OUTPUT INPUT SET 1
//EntryParameter:GPIOx,GPIO_Pin(0~15),byte,Dir
//GPIOx:GPIOA0,GPIOB0
//GPIO_Pin:PIN_0~15
//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
//Dir:0:output 1:input
//ReturnValue:NONE
/*************************************************************/
void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
{
uint32_t data_temp;
uint8_t GPIO_Pin;
if(PinNum<8)
{
switch (PinNum)
{
case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
}
if (Dir)
{
(GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
}
else
{
(GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin;
}
}
else if (PinNum<16)
{
switch (PinNum)
{
case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
}
if (Dir)
{
(GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;
}
else
{
(GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;
}
}
}
/*************************************************************/
//IO OUTPUT INPUT Disable
//EntryParameter:GPIOx,GPIO_Pin(0~15)
//GPIOx:GPIOA0,GPIOB0
//GPIO_Pin:PIN_0~15
//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
//ReturnValue:NONE
/*************************************************************/
void GPIO_InPutOutPut_Disable(CSP_GPIO_T *GPIOx,uint8_t PinNum)
{
uint32_t data_temp;
if(PinNum<8)
{
switch (PinNum)
{
case 0:data_temp=0xfffffff0;break;
case 1:data_temp=0xffffff0f;break;
case 2:data_temp=0xfffff0ff;break;
case 3:data_temp=0xffff0fff;break;
case 4:data_temp=0xfff0ffff;break;
case 5:data_temp=0xff0fffff;break;
case 6:data_temp=0xf0ffffff;break;
case 7:data_temp=0x0fffffff;break;
}
(GPIOx)->CONLR = (GPIOx)->CONLR & data_temp;
}
else if (PinNum<16)
{
switch (PinNum)
{
case 8:data_temp=0xfffffff0;break;
case 9:data_temp=0xffffff0f;break;
case 10:data_temp=0xfffff0ff;break;
case 11:data_temp=0xffff0fff;break;
case 12:data_temp=0xfff0ffff;break;
case 13:data_temp=0xff0fffff;break;
case 14:data_temp=0xf0ffffff;break;
case 15:data_temp=0x0fffffff;break;
}
(GPIOx)->CONHR = (GPIOx)->CONHR & data_temp;
}
}
/*************************************************************/
//IO OUTPUT INPUT SET
//EntryParameter:IO_MODE,GPIOx,val
//GPIOx:GPIOA0,GPIOB0
//IO_MODE:PUDR(IO PULL HIGH/LOW)
//IO_MODE:DSCR(IO DRIVE STRENGHT)
//IO_MODE:OMCR(OUTPUT MODE SET)
//IO_MODE:IECR(IO INT ENABLE)
//ReturnValue:NONE
/*************************************************************/
void GPIO_MODE_Init(CSP_GPIO_T *GPIOx,GPIO_Mode_TypeDef IO_MODE,uint32_t val)
{
switch (IO_MODE)
{
case PUDR:(GPIOx)->PUDR = val;break;
case DSCR:(GPIOx)->DSCR = val;break;
case OMCR:(GPIOx)->OMCR = val;break;
case IECR:(GPIOx)->IECR = val;break;
}
}
/*************************************************************/
//Write GPIO pull high/low
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->PUDR = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
}
void GPIO_PullLow_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->PUDR = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x02<<(bit*2));
}
void GPIO_PullHighLow_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->PUDR = ((GPIOx)->PUDR) & ~(0x03<<(bit*2));
}
/*************************************************************/
//Write GPIO open drain init
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
void GPIO_OpenDrain_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->OMCR = ((GPIOx)->OMCR) | (0x01<<bit);
}
void GPIO_OpenDrain_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->OMCR = ((GPIOx)->OMCR) & ~(0x01<<bit);
}
/*************************************************************/
//Write GPIO open drain init
//EntryParameter:GPIOx,uint8_t bit,INPUT_MODE_SETECTED_X
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//INPUT_MODE_SETECTED_X:INPUT_MODE_TTL1,INPUT_MODE_SETECTED_TTL2,INPUT_MODE_SETECTED_CMOSS
//ReturnValue:VALUE
/*************************************************************/
//默认cmos口
void GPIO_TTL_COSM_Selecte(CSP_GPIO_T *GPIOx,uint8_t bit,INPUT_MODE_SETECTED_TypeDef INPUT_MODE_SETECTED_X)
{
if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_CMOS)
{
(GPIOx)->DSCR = ((GPIOx)->DSCR) & ~(0x01<<(bit*2+1));
}
else
{
(GPIOx)->DSCR = ((GPIOx)->DSCR) | (0x01<<(bit*2+1));
if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_TTL1)
{
(GPIOx)->OMCR = ((GPIOx)->OMCR) | (0x01<<(bit+16));
}
else if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_TTL2)
{
(GPIOx)->OMCR = ((GPIOx)->OMCR) & ~(0x01<<(bit+16));
}
}
}
/*************************************************************/
//Write GPIO Drive Strength init
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->DSCR = ((GPIOx)->DSCR) | (0x01<<(bit*2));
}
void GPIO_DriveStrength_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->DSCR = ((GPIOx)->DSCR) & ~(0x01<<(bit*2));
}
/*************************************************************/
//IO OUTPUT INPUT SET
//EntryParameter:
//IO_MODE:IGRP(IO INT GROUP)
//PinNum：0~15
//SYSCON_EXIPIN_TypeDef:EXI_PIN0~EXI_PIN19
//EXI0~EXI15:GPIOA0,GPIOB0
//EXI16~EXI17:GPIOA0.0~GPIOA0.7
//EXI18~EXI19:GPIOB0.0~GPIOB0.3
//ReturnValue:NONE
/*************************************************************/
void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef Selete_EXI_x)
{
volatile unsigned int R_data_temp;
volatile unsigned char R_GPIO_Pin;
if(Selete_EXI_x<16)
{
if((Selete_EXI_x==0)||(Selete_EXI_x==8))
{
R_data_temp=0xfffffff0;
R_GPIO_Pin=0;
}
else if((Selete_EXI_x==1)||(Selete_EXI_x==9))
{
R_data_temp=0xffffff0f;
R_GPIO_Pin=4;
}
else if((Selete_EXI_x==2)||(Selete_EXI_x==10))
{
R_data_temp=0xfffff0ff;
R_GPIO_Pin=8;
}
else if((Selete_EXI_x==3)||(Selete_EXI_x==11))
{
R_data_temp=0xffff0fff;
R_GPIO_Pin=12;
}
else if((Selete_EXI_x==4)||(Selete_EXI_x==12))
{
R_data_temp=0xfff0ffff;
R_GPIO_Pin=16;
}
else if((Selete_EXI_x==5)||(Selete_EXI_x==13))
{
R_data_temp=0xff0fffff;
R_GPIO_Pin=20;
}
else if((Selete_EXI_x==6)||(Selete_EXI_x==14))
{
R_data_temp=0xf0ffffff;
R_GPIO_Pin=24;
}
else if((Selete_EXI_x==7)||(Selete_EXI_x==15))
{
R_data_temp=0x0fffffff;
R_GPIO_Pin=28;
}
if(Selete_EXI_x<8)
{
GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
}
else if((Selete_EXI_x<16)&&(Selete_EXI_x>=8))
{
GPIOGRP->IGRPH =(GPIOGRP->IGRPH & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
}
}
else if(Selete_EXI_x<20)
{
if((IO_MODE==0)&&((Selete_EXI_x==16)||((Selete_EXI_x==17)))) //PA0.0~PA0.7
{
if(Selete_EXI_x==16)
{
GPIOGRP->IGREX =(GPIOGRP->IGREX)|PinNum;
}
else if(Selete_EXI_x==17)
{
GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<4);
}
}
else if((IO_MODE==2)&&((Selete_EXI_x==18)||(Selete_EXI_x==19))) //PB0.0~PB0.3
{
if(Selete_EXI_x==18)
{
GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
}
else if(Selete_EXI_x==19)
{
GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
}
}
}
}
/*************************************************************/
//IO EXI SET
//EntryParameter:EXI_IO(EXI0~EXI13)
//ReturnValue:NONE
/*************************************************************/
void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
{
switch (EXI_IO)
{
case 0:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0) | 0X00000001;break;
case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
case 2:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000100;break;
case 3:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF) | 0X00001000;break;
case 4:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF) | 0X00010000;break;
case 5:GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0X00100000;break;
case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
case 7:GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF) | 0X10000000;break;
case 8:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000001;break;
case 9:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F) | 0X00000010;break;
case 10:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF) | 0X00000100;break;
case 11:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF) | 0X00001000;break;
case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
}
}
void GPIOB0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
{
switch (EXI_IO)
{
case 0:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0) | 0X00000001;break;
case 1:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFF0F) | 0X00000010;break;
case 2:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF) | 0X00000100;break;
case 3:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF) | 0X00001000;break;
case 4:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF) | 0X00010000;break;
case 5:GPIOB0->CONLR = (GPIOB0->CONLR&0XFF0FFFFF) | 0X00100000;break;
default:break;
}
}
void GPIO_EXI_EN(CSP_GPIO_T *GPIOx,GPIO_EXI_TypeDef EXI_IO)
{
(GPIOx)->IECR |= 1<<EXI_IO;
}
/*************************************************************/
//Write GPIO
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->SODR = (1ul<<bit);
}
void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
{
(GPIOx)->CODR = (1ul<<bit);
}
/*************************************************************/
//Write GPIO
//EntryParameter:GPIOx,uint8_t bitposi bitval
//GPIOx:GPIOA0,GPIOB0
//bitposi:0~15 bitval:0~1 0=low 1=high
//ReturnValue:VALUE
/*************************************************************/
void GPIO_Set_Value(CSP_GPIO_T *GPIOx,uint8_t bitposi,uint8_t bitval)
{
if (bitval==1)
{
(GPIOx)->SODR = (1ul<<bitposi);
}
else if ((bitval==0))
{
(GPIOx)->CODR = (1ul<<bitposi);
}
}
/*************************************************************/
//Write GPIO reverse
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
{
uint32_t dat = 0;
dat=((GPIOx)->ODSR>>bit)&1ul;
{
if (dat==1)
{
(GPIOx)->CODR = (1ul<<bit);
return;
}
if (dat==0)
{
(GPIOx)->SODR = (1ul<<bit);
return;
}
}
}
/*************************************************************/
//READ PA IO STATUS
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
{
uint8_t value = 0;
uint32_t dat = 0;
dat=((GPIOx)->PSDR)&(1<<bit);
if (dat == (1<<bit))
{
value = 1;
}
return value;
}
/*************************************************************/
//READ PA OUTPUT STATUS
//EntryParameter:GPIOx,uint8_t bit
//GPIOx:GPIOA0,GPIOB0
//bit:0~15
//ReturnValue:VALUE
/*************************************************************/
uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
{
uint8_t value = 0;
uint32_t dat = 0;
dat=((GPIOx)->ODSR)&(1<<bit);
if (dat == (1<<bit))
{
value = 1;
}
return value;
}
/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/

89
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/*
******************************************************************************
* @file apt32f102_gpio.c
* @author APT AE Team
* @version V1.24
* @date 2018/10/15
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_hwdiv.h"
/* define --------------------------------------------------------------------*/
/* externs--------------------------------------------------------------------*/
/*************************************************************/
//HWDIV RESET CLEAR ALL REGISTER
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void HWDIV_DeInit(void)
{
HWD->DIVIDENT = HWDIV_RESET_VALUE;
HWD->DIVISOR = HWDIV_RESET_VALUE;
HWD->QUOTIENT = HWDIV_RESET_VALUE;
HWD->REMAIN = HWDIV_RESET_VALUE;
HWD->CR = HWDIV_RESET_VALUE;
}
/*************************************************************/
//HWDIV UNSIGN Configure
//EntryParameter:NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void HWDIV_UNSIGN_CMD(FunctionalStatus NewState)
{
if (NewState != DISABLE)
{
HWD->CR |= HWDIV_UNSIGN_BIT;
}
else
{
HWD->CR &= ~HWDIV_UNSIGN_BIT;
}
}
/*************************************************************/
//HWDIV Calculate
//EntryParameter:NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void HWDIV_Calc_UNSIGN(U32_T DIVIDENDx,U32_T DIVISOR_x)
{
HWD->DIVIDENT=DIVIDENDx;
HWD->DIVISOR=DIVISOR_x;
}
/*************************************************************/
//HWDIV Calculate result
//EntryParameter:NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
U32_T HWDIV_Calc_Quotient(void)
{
return HWD->QUOTIENT;
}
/*************************************************************/
//HWDIV Calculate result
//EntryParameter:NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
U32_T HWDIV_Calc_Remain(void)
{
return HWD->REMAIN;
}
/*************************************************************/
void HWDIV_Calc_SIGN(long DIVIDENDx,long DIVISOR_x)
{
HWD->DIVIDENT=DIVIDENDx;
HWD->DIVISOR=DIVISOR_x;
}

264
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/*
******************************************************************************
* @file apt32f102_ifc.c
* @author APT AE Team
* @version V1.08
* @date 2021/06/21
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_ifc.h"
volatile unsigned int R_INT_FlashAdd;
volatile unsigned char f_Drom_writing=0;
/* define --------------------------------------------------------------------*/
extern void delay_nms(unsigned int t);
/* externs--------------------------------------------------------------------*/
/*************************************************************
//ChipErase fuction
//EntryParameter:NONE
//ReturnValue:NONE
*************************************************************/
void ChipErase(void)
{
SetUserKey;
EnChipErase;
StartErase;
while(IFC->CR!=0x0); //Wait for the operation to complete
}
/*************************************************************
//PageErase fuction
//EntryParameter:XROM_PageAdd
//XROM_PageAdd:PROM_PageAdd0~PROM_PageAdd255
//DROM_PageAdd0~DROM_PageAdd31
//ReturnValue:NONE
*************************************************************/
void PageErase(IFC_ROMSELETED_TypeDef XROM_PageAdd)
{
SetUserKey;
EnPageErase;
IFC->FM_ADDR=XROM_PageAdd;
StartErase;
while(IFC->CR!=0x0);
}
/*************************************************************
//Enable or Disable IFC Interrupt when Operate FlashData
//EntryParameter:FlashAdd、DataSize、*BufArry
//ReturnValue:NONE
*************************************************************/
//PROM:Write at most 256 bytes once time
//DROM:Write at most 64 bytes at once time
//Interrupt mode requires multiple loop queries to complete
void Page_ProgramData_int(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
{
int i,DataBuffer;
if(!f_Drom_writing)
{
f_Drom_writing=1;
R_INT_FlashAdd=FlashAdd;
ifc_step=0;
//Page cache wipe 1
SetUserKey;
IFC->CMR=0x07; //Page cache wipe
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Write data to the cache 2
for(i=0;i<((DataSize+3)/4);i++) //sizeof structure
{
DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
BufArry +=4;
}
//Pre-programmed operation settings 3
SetUserKey;
IFC->CMR=0x06;
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Perform pre-programming 4
SetUserKey;
IFC->CMR=0x01;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
}
}
//Normal mode, when the call is completed once, it will delay 4.2ms in the program
void Page_ProgramData(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
{
int i,DataBuffer;
//Page cache wipe 1
SetUserKey;
IFC->CMR=0x07;
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Write data to the cache 2
for(i=0;i<((DataSize+3)/4);i++) //sizeof structure
{
DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
BufArry +=4;
}
//Pre-programmed operation settings 3
SetUserKey;
IFC->CMR=0x06;
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Perform pre-programming 4
SetUserKey;
IFC->CMR=0x01;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=PEP_END_INT); //Wait for the operation to complete
//Page erase 5
SetUserKey;
IFC->CMR=0x02;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=ERS_END_INT); //Wait for the operation to complete
//Write page cache data to flash memory 6
SetUserKey;
IFC->CMR=0x01;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=RGM_END_INT); //Wait for the operation to complete
}
void Page_ProgramData_U32(unsigned int FlashAdd,unsigned int DataSize,volatile U32_T *BufArry)
{
int i,DataBuffer;
//Page cache wipe 1
SetUserKey;
IFC->CMR=0x07;
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Write data to the cache 2
for(i=0;i<DataSize;i++) //sizeof structure
{
DataBuffer=*BufArry;
*(volatile unsigned int *)(FlashAdd)=DataBuffer;
BufArry +=1;
}
//Pre-programmed operation settings 3
SetUserKey;
IFC->CMR=0x06;
IFC->FM_ADDR=FlashAdd;
IFC->CR=0X01; //Start Program
while(IFC->CR!=0x0); //Wait for the operation to complete
//Perform pre-programming 4
SetUserKey;
IFC->CMR=0x01;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=PEP_END_INT); //Wait for the operation to complete
//Page erase 5
SetUserKey;
IFC->CMR=0x02;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=ERS_END_INT); //Wait for the operation to complete
//Write page cache data to flash memory 6
SetUserKey;
IFC->CMR=0x01;
IFC->FM_ADDR=FlashAdd; //
IFC->CR=0X01; //Start Program
while(IFC->RISR!=RGM_END_INT); //Wait for the operation to complete
}
/*************************************************************
// ReadFlashData fuction return Data arry save in Flash
// DataLength must be a multiple of 4, DataLength % 4 ==0.
//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
//ReturnValue:NONE
*************************************************************/
void ReadDataArry(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
{
unsigned int i,Buffer;
//delay_nms(1);
for(i=0;i<((DataLength+3)/4);i++)
{
Buffer=*(volatile unsigned int *)RdStartAdd;
*DataArryPoint=Buffer;
*(DataArryPoint+1)=Buffer>>8;
*(DataArryPoint+2)=Buffer>>16;
*(DataArryPoint+3)=Buffer>>24;
RdStartAdd +=4;
DataArryPoint +=4;
}
}
/*************************************************************
//ReadFlashData fuction return Data arry save in Flash
//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
//ReturnValue:NONE
*************************************************************/
void ReadDataArry_U8(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
{
unsigned int i;
for (i=0;i<DataLength;i++)
{
if((i!=0)&&(i%4==0))
{
RdStartAdd +=4;
}
*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
DataArryPoint++;
}
}
void ReadDataArry_U32(unsigned int RdStartAdd,unsigned int DataLength,volatile U32_T *DataArryPoint)
{
unsigned int i;
for (i=0;i<DataLength;i++)
{
*DataArryPoint=*(U32_T *)(RdStartAdd);
DataArryPoint++;
}
}
/*************************************************************
//Enable or Disable IFC Interrupt when Operate FlashData
//EntryParameter:IFC_INT_x
//IFC_INT_x:ERS_END_INT,RGM_END_INT,PEP_END_INT,PROT_ERR_INT,UDEF_ERR_INT,ADDR_ERR_INT,OVW_ERR_INT
//ReturnValue:NONE
*************************************************************/
void IFC_interrupt_CMD(FunctionalStatus NewState ,IFC_INT_TypeDef IFC_INT_x)
{
if(NewState != DISABLE)
{
IFC->IMCR =IFC->IMCR|IFC_INT_x;
}
else
{
IFC->IMCR =IFC->IMCR & (~IFC_INT_x);
}
}
/*************************************************************/
//IFC Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void IFC_Int_Enable(void)
{
IFC->ICR=0Xf007; //CLAER IFC INT status
INTC_ISER_WRITE(IFC_INT);
}
/*************************************************************/
//IFC Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void IFC_Int_Disable(void)
{
INTC_ICER_WRITE(IFC_INT);
}
/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/

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Source/FWlib/apt32f102_iostring.c Normal file
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/*
******************************************************************************
* @file apt32f102_iostring.c
* @author APT AE Team
* @version V1.00
* @date 2020/05/21
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/******************************************************************************
* Include Files
******************************************************************************/
#include "apt32f102.h"
#include "apt32f102_uart.h"
#include "stdarg.h"
#include "stddef.h"
#include "stdio.h"
/******************************************************************************
* Main code
******************************************************************************/
void __putchar__ (char s)
{
// UARTTxByte(UART0,s);
UARTTxByte(UART1,s);
}
char *myitoa(int value, int* string, int radix)
{
int tmp[33];
int* tp = tmp;
int i;
unsigned v;
int sign;
int* sp;
if (radix > 36 || radix <= 1)
{
return 0;
}
sign = (radix == 10 && value < 0);
if (sign)
v = -value;
else
v = (unsigned)value;
while (v || tp == tmp)
{
i = v % radix;
v = v / radix;
if (i < 10) {
*tp++ = i+'0';
} else {
*tp++ = i + 'a' - 10;
}
}
sp = string;
if (sign)
*sp++ = '-';
while (tp > tmp)
*sp++ = *--tp;
*sp = 0;
return string;
}
void my_printf(const char *fmt, ...)
{
// const char *s;
const int *s;
int d;
//char ch, *pbuf, buf[16];
char ch, *pbuf;
int buf[16];
va_list ap;
va_start(ap, fmt);
while (*fmt) {
if (*fmt != '%') {
__putchar__(*fmt++);
continue;
}
switch (*++fmt) {
case 's':
s = va_arg(ap, const char *);
for ( ; *s; s++) {
__putchar__(*s);
}
break;
case 'd':
d = va_arg(ap, int);
myitoa(d, buf, 10);
for (s = buf; *s; s++) {
__putchar__(*s);
}
break;
case 'x':
case 'X':
d = va_arg(ap, int);
myitoa(d, buf, 16);
for (s = buf; *s; s++) {
__putchar__(*s);
}
break;
// Add other specifiers here...
case 'c':
case 'C':
ch = (unsigned char)va_arg(ap, int);
pbuf = &ch;
__putchar__(*pbuf);
break;
default:
__putchar__(*fmt);
break;
}
fmt++;
}
va_end(ap);
}

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Source/FWlib/apt32f102_lpt.c Normal file
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/*
******************************************************************************
* @file apt32f102_lpt.c
* @author APT AE Team
* @version V1.08
* @date 2021/06/21
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_lpt.h"
/*************************************************************/
//LPT RESET CLEAR ALL REGISTER
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_DeInit(void)
{
LPT->CEDR = 0xBE980000;
LPT->RSSR = LPT_RESET_VALUE;
LPT->PSCR = LPT_RESET_VALUE;
LPT->CR = 0X00010010;
LPT->SYNCR = LPT_RESET_VALUE;
LPT->PRDR = LPT_RESET_VALUE;
LPT->CMP = LPT_RESET_VALUE;
LPT->CNT = LPT_RESET_VALUE;
LPT->TRGFTCR = LPT_RESET_VALUE;
LPT->TRGFTWR = LPT_RESET_VALUE;
LPT->EVTRG = LPT_RESET_VALUE;
LPT->EVPS = LPT_RESET_VALUE;
LPT->EVSWF = LPT_RESET_VALUE;
LPT->RISR = LPT_RESET_VALUE;
LPT->MISR = LPT_RESET_VALUE;
LPT->IMCR = LPT_RESET_VALUE;
LPT->ICR = LPT_RESET_VALUE;
}
/*************************************************************/
//LPT IO Init
//EntryParameter:LPT_OUT_PA09,LPT_OUT_PB01,LPT_IN_PA10,
//ReturnValue:NONE
/*************************************************************/
void LPT_IO_Init(LPT_IOSET_TypeDef IONAME)
{
if(IONAME==LPT_OUT_PA09)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000080;
}
if(IONAME==LPT_OUT_PB01)
{
GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000080;
}
if(IONAME==LPT_IN_PA10)
{
GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000800;
}
}
/*************************************************************/
//LPT Init
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_Configure(LPT_CLK_TypeDef CLKX,LPT_CSS_TypeDef CSSX,LPT_SHDWSTP_TypeDef SHDWSTPX,LPT_PSCDIV_TypeDef PSCDIVX,U8_T FLTCKPRSX,LPT_OPM_TypeDef OPMX)
{
LPT->CEDR |=CLKX| CSSX| SHDWSTPX| (FLTCKPRSX<<8);
LPT->PSCR = PSCDIVX;
LPT->CR |=OPMX;
}
/*************************************************************/
//LPT DEBUG MODE
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_Debug_Mode(FunctionalStatus NewState)
{
if (NewState != DISABLE)
{
LPT->CEDR |= LPT_DEBUG_MODE;
}
else
{
LPT->CEDR &= ~LPT_DEBUG_MODE;
}
}
/*************************************************************/
//LPT Period / Compare set
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMP_DATA)
{
LPT->PRDR =PRDR_DATA;
LPT->CMP =CMP_DATA;
}
/*************************************************************/
//LPT COUNTER set
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_CNT_Write(U16_T CNT_DATA)
{
LPT->CNT =CNT_DATA;
}
/*************************************************************/
//LPT read counters
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
U16_T LPT_PRDR_Read(void)
{
return LPT->PRDR;
}
U16_T LPT_CMP_Read(void)
{
return LPT->CMP;
}
U16_T LPT_CNT_Read(void)
{
return LPT->CNT;
}
/*************************************************************/
//LPT ControlSet Init
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_ControlSet_Configure(LPT_SWSYN_TypeDef SWSYNX,LPT_IDLEST_TypeDef IDLESTX,LPT_PRDLD_TypeDef PRDLDX,LPT_POL_TypeDef POLX,
LPT_FLTDEB_TypeDef FLTDEBX,LPT_PSCLD_TypeDef PSCLDX,LPT_CMPLD_TypeDef CMPLDX)
{
LPT->CR |= SWSYNX| IDLESTX| PRDLDX| POLX| FLTDEBX| FLTDEBX| CMPLDX;
}
/*************************************************************/
//LPT SYNC Init
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_SyncSet_Configure(LPT_TRGENX_TypeDef TRGENX,LPT_OSTMDX_TypeDef OSTMDX,LPT_AREARM_TypeDef AREARMX)
{
LPT->SYNCR |= TRGENX| OSTMDX| AREARMX;
}
/*************************************************************/
//LPT Trigger Init
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void LPT_Trigger_Configure(LPT_SRCSEL_TypeDef SRCSELX,LPT_BLKINV_TypeDef BLKINVX,LPT_CROSSMD_TypeDef CROSSMDX,LPT_TRGSRC0_TypeDef TRGSRC0X,
LPT_ESYN0OE_TypeDef ESYN0OEX,U16_T OFFSET_DATA,U16_T WINDOW_DATA,U8_T TRGEC0PRD_DATA)
{
LPT->TRGFTCR |= SRCSELX| BLKINVX| CROSSMDX;
LPT->TRGFTWR |= OFFSET_DATA |(WINDOW_DATA<<16);
LPT->EVTRG |= TRGSRC0X |ESYN0OEX;
LPT->EVPS |=TRGEC0PRD_DATA;
}
void LPT_Trigger_EVPS(U8_T TRGEC0PRD_DATA,U8_T TRGEV0CNT_DATA)
{
LPT->EVPS |= TRGEC0PRD_DATA |(TRGEV0CNT_DATA<<16);
}
void LPT_Trigger_Cnt(U8_T TRGEV0CNT_DATA)
{
LPT->EVPS |= (TRGEV0CNT_DATA<<16);
}
void LPT_Soft_Trigger(void)
{
LPT->EVSWF = 0X01;
}
/*************************************************************/
// LPT start
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_Start(void)
{
LPT->RSSR |= 0X01;
}
/*************************************************************/
// LPT stop
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_Stop(void)
{
LPT->RSSR &= 0XFFFFFFFE;
}
/*************************************************************/
// LPT soft reset
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_Soft_Reset(void)
{
LPT->RSSR |= (0X5<<12);
}
/*************************************************************/
// LPT soft reset at once sync mode
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_REARM_Write(void)
{
LPT->SYNCR |= (0X1<<16);
}
/*************************************************************/
// LPT soft read at once sync mode
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
U8_T LPT_REARM_Read(void)
{
uint8_t value = 0;
uint32_t dat = 0;
dat=(LPT->SYNCR)&(1<<16);
if (dat)
{
value = 1;
}
return value;
}
/*************************************************************/
//LPT inturrpt Configure
//EntryParameter:LPT_IMSCR_X,NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void LPT_ConfigInterrupt_CMD(FunctionalStatus NewState,LPT_IMSCR_TypeDef LPT_IMSCR_X)
{
if (NewState != DISABLE)
{
LPT->IMCR |= LPT_IMSCR_X;
}
else
{
LPT->IMCR &= ~LPT_IMSCR_X;
}
}
/*************************************************************/
//LPT Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_INT_ENABLE(void)
{
INTC_ISER_WRITE(LPT_INT);
}
/*************************************************************/
//LPT Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void LPT_INT_DISABLE(void)
{
INTC_ICER_WRITE(LPT_INT);
}

817
Source/FWlib/apt32f102_syscon.c Normal file
View File

@@ -0,0 +1,817 @@
/*
******************************************************************************
* @file main.c
* @author APT AE Team
* @version V1.09
* @date 2021/07/30
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_syscon.h"
/* define --------------------------------------------------------------------*/
/* externs--------------------------------------------------------------------*/
/*************************************************************/
//Deinitializes the syscon registers to their default reset
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_RST_VALUE(void) //reset value
{
//SYSCON->IDCCR=SYSCON_IDCCR_RST;
//SYSCON->GCER=SYSCON_GCER_RST;
//SYSCON->GCDR=SYSCON_GCDR_RST;
//SYSCON->GCSR=SYSCON_GCSR_RST;
//SYSCON->CKST=SYSCON_CKST_RST;
SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
//SYSCON->PCLKCR=SYSCON_PCLKCR_RST;
//SYSCON->PCER0=SYSCON_PCER0_RST;
//SYSCON->PCDR0=SYSCON_PCDR0_RST;
//SYSCON->PCSR0=SYSCON_PCSR0_RST;
//SYSCON->PCER1=SYSCON_PCER1_RST;
//SYSCON->PCDR1=SYSCON_PCDR1_RST;
//SYSCON->PCSR1=SYSCON_PCSR1_RST;
SYSCON->OSTR=SYSCON_OSTR_RST;
SYSCON->LVDCR=SYSCON_LVDCR_RST;
//SYSCON->CLCR=SYSCON_CLCR_RST;
//SYSCON->PWRCR=SYSCON_PWRCR_RST;
//SYSCON->IMER=SYSCON_IMER_RST;
//SYSCON->IMDR=SYSCON_IMDR_RST;
//SYSCON->IMCR=SYSCON_IMCR_RST;
//SYSCON->IAR=SYSCON_IAR_RST;
//SYSCON->ICR=SYSCON_ICR_RST;
//SYSCON->RISR=SYSCON_RISR_RST;
//SYSCON->MISR=SYSCON_MISR_RST;
SYSCON->EXIRT=SYSCON_EXIRT_RST;
SYSCON->EXIFT=SYSCON_EXIFT_RST;
//SYSCON->EXIER=SYSCON_EXIER_RST;
//SYSCON->EXIDR=SYSCON_EXIDR_RST;
//SYSCON->EXIMR=SYSCON_EXIMR_RST;
//SYSCON->EXIAR=SYSCON_EXIAR_RST;
//SYSCON->EXICR=SYSCON_EXICR_RST;
//SYSCON->EXIRS=SYSCON_EXIRS_RST;
SYSCON->IWDCR=SYSCON_IWDCR_RST;
SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
//SYSCON->PWROPT=SYSCON_PWROPT_RST;
SYSCON->EVTRG=SYSCON_EVTRG_RST;
SYSCON->EVPS=SYSCON_EVPS_RST;
SYSCON->EVSWF=SYSCON_EVSWF_RST;
// SYSCON->UREG0=SYSCON_UREG0_RST;
// SYSCON->UREG1=SYSCON_UREG1_RST;
// SYSCON->UREG2=SYSCON_UREG2_RST;
// SYSCON->UREG3=SYSCON_UREG3_RST;
}
/*************************************************************/
//EMOSC OSTR Config
//EM_CNT:0~0X3FF
//EM_GM:0~0X1F
//EM_FLEN;EM_FLEN_DIS,EM_FLEN_EN
//EM_FLSEL:EM_FLSEL_5ns,EM_FLSEL_10ns,EM_FLSEL_15ns,EM_FLSEL_20ns
/*************************************************************/
void EMOSC_OSTR_Config(U16_T EM_CNT, U8_T EM_GM,EM_LFSEL_TypeDef EM_LFSEL_X, EM_Filter_CMD_TypeDef EM_FLEN_X, EM_Filter_TypeDef EM_FLSEL_X)
{
SYSCON->OSTR=EM_CNT|(EM_GM<<11)|EM_LFSEL_X|EM_FLEN_X|EM_FLSEL_X;
}
/*************************************************************/
//SYSCON General Control
//EntryParameter:NewState:,ENDIS_X
//NewState:ENABLE,DISABLE
//ENDIS_X:ENDIS_ISOSC,ENDIS_IMOSC,ENDIS_EMOSC,ENDIS_HFOSC
//ReturnValue:NONE
/*************************************************************/
void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
{
if (NewState != DISABLE)
{
if(ENDIS_X==ENDIS_EMOSC)
GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000; //enable EMOSC PIN
SYSCON->GCER|=ENDIS_X; //enable SYSCON General Control
while(!(SYSCON->GCSR&ENDIS_X)); //check Enable?
switch(ENDIS_X)
{
case ENDIS_IMOSC:
while (!(SYSCON->CKST & ENDIS_IMOSC));
break;
case ENDIS_EMOSC:
while (!(SYSCON->CKST & ENDIS_EMOSC));
break;
case ENDIS_ISOSC:
while (!(SYSCON->CKST & ENDIS_ISOSC));
break;
case ENDIS_HFOSC:
while (!(SYSCON->CKST & ENDIS_HFOSC));
break;
case ENDIS_IDLE_PCLK:
break;
case ENDIS_SYSTICK:
break;
}
}
else
{
SYSCON->GCDR|=ENDIS_X; //disable SYSCON General Control
while(SYSCON->GCSR&ENDIS_X); //check Disable?
SYSCON->ICR|=ENDIS_X; //Clear ENDIS_X stable bit
}
}
/*************************************************************/
//Seleted system clk and seleted clk div
//EntryParameter:SYSCLK_X,HCLK_DIV_X,PCLK_DIV_X
//SYSCLK_X:SYSCLK_IMOSC,SYSCLK_EMOSC,SYSCLK_ISOSC,SYSCLK_HFOSC
//HCLK_DIV_X:HCLK_DIV_1/2/3/4/5/6/7/8/12/16/24/32/64/128/256
//PCLK_DIV_X:PCLK_DIV_1,PCLK_DIV_2,PCLK_DIV_4,PCLK_DIV_8,PCLK_DIV_16
//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
//ReturnValue:NONE
/*************************************************************/
void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
{
if(SystemClk_data_x==HFOSC_48M)
{
IFC->CEDR=0X01; //CLKEN
IFC->MR=0X04|(0X00<<16); //High speed mode
}
if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
{
IFC->CEDR=0X01; //CLKEN
IFC->MR=0X02|(0X00<<16); //Medium speed mode
}
if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
{
IFC->CEDR=0X01; //CLKEN
IFC->MR=0X01|(0X00<<16); //Low speed mode
}
if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
{
IFC->CEDR=0X01; //CLKEN
IFC->MR=0X00|(0X00<<16); //Low speed mode
}
SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
while (!(SYSCON->CKST & (1<<8))); // waiting for sysclk stable
SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X; //PCLK DIV 1 2 4 6 8 16
while(SYSCON->PCLKCR!=PCLK_DIV_X); //Wait PCLK DIV
}
/*************************************************************/
//clear system clk register
//ReturnValue:NONE
/*************************************************************/
void SystemCLK_Clear(void)
{
SYSCON->SCLKCR=0xd22d0000;
while(SYSCON->SCLKCR!=0);
}
/*************************************************************/
//SYSCON IMOSC SELECTE
//EntryParameter:IMOSC_SELECTE_X
//IMOSC_SELECTE_X:IMOSC_SELECTE_5556K,IMOSC_SELECTE_4194K;IMOSC_SELECTE_2097K;IMOSC_SELECTE_131K
//ReturnValue:NONE
/*************************************************************/
void SYSCON_IMOSC_SELECTE(IMOSC_SELECTE_TypeDef IMOSC_SELECTE_X)
{
//SYSCON_General_CMD(DISABLE,ENDIS_IMOSC); //disalbe IMOSC
SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFFC)|IMOSC_SELECTE_X; //IMOSC CLK selected
//SYSCON_General_CMD(ENABLE,ENDIS_IMOSC); //enable IMOSC
}
/*************************************************************/
//SYSCON HFOSC SELECTE
//EntryParameter:HFOSC_SELECTE_X
//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
//ReturnValue:NONE
/*************************************************************/
void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
{
SYSCON_General_CMD(DISABLE,ENDIS_HFOSC); //disable HFOSC
SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
SYSCON_General_CMD(ENABLE,ENDIS_HFOSC); //enable HFOSC
}
/*************************************************************/
//WDT enable and disable
//EntryParameter:,NewState
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_WDT_CMD(FunctionalStatus NewState)
{
if(NewState != DISABLE)
{
SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
}
else
{
SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
while(SYSCON->IWDCR&Check_IWDT_BUSY);
}
}
/*************************************************************/
//reload WDT CN
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void SYSCON_IWDCNT_Reload(void)
{
SYSCON->IWDCNT=CLR_IWDT;
}
/*************************************************************/
//IWDCNT Config
//EntryParameter:NewStateE_IWDT_SHORT,IWDT_TIME_X,IWDT_INTW_DIV_X
//NewStateE_IWDT_SHORT:ENABLE_IWDT_SHORT,DISABLE_IWDT_SHORT
//IWDT_TIME_X:IWDT_TIME_128MS,IWDT_TIME_256MS,IWDT_TIME_500MS,IWDT_TIME_1S,IWDT_TIME_2S,IWDT_TIME_3S,IWDT_TIME_4S,IWDT_TIME_8S
//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
//ReturnValue: NONE
/*************************************************************/
void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
{
SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
}
/*************************************************************/
//LVD Config and set LVD INT
//EntryParameter:X_LVDEN,INTDET_LVL_X,RSTDET_LVL_X,X_LVD_INT
//X_LVDEN:ENABLE_LVDEN,DISABLE_LVDEN
//INTDET_LVL_X:INTDET_LVL_1_8V,INTDET_LVL_2_1V,INTDET_LVL_2_5V,INTDET_LVL_2_9V,INTDET_LVL_3_3V,INTDET_LVL_3_7V,INTDET_LVL_4_1V,INTDET_LVL_4_5V
//RSTDET_LVL_X:RSTDET_LVL_1_6V,RSTDET_LVL_2_0V,RSTDET_LVL_2_4V,RSTDET_LVL_2_8V,RSTDET_LVL_3_2V,RSTDET_LVL_3_6V,RSTDET_LVL_4_0V,RSTDET_LVL_4_4V
//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
//ReturnValue: NONE
/*************************************************************/
void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
{
//SYSCON->LVDCR=LVD_KEY;
SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
}
/*************************************************************/
//LVD INT ENABLE.
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void LVD_Int_Enable(void)
{
SYSCON->ICR = LVD_INT_ST; //clear LVD INT status
SYSCON->IMER |= LVD_INT_ST;
}
/*************************************************************/
//LVD INT DISABLE.
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void LVD_Int_Disable(void)
{
SYSCON->IMDR |= LVD_INT_ST;
}
/*************************************************************/
//WDT INT ENABLE.
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void IWDT_Int_Enable(void)
{
SYSCON->ICR = IWDT_INT_ST; //clear LVD INT status
SYSCON->IMER |= IWDT_INT_ST;
}
/*************************************************************/
//WDT INT DISABLE.
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void IWDT_Int_Disable(void)
{
SYSCON->IMDR |= IWDT_INT_ST;
}
/*************************************************************/
//Reset status.
//EntryParameter:NONE
//ReturnValue: rsr_dat
//rsr_dat=0x01 power on reset
//rsr_dat=0x02 low voltage reset
//rsr_dat=0x04 ex-pin reset
//rsr_dat=0x10 wdt reset
//rsr_dat=0x40 ex clock invalid reset
//rsr_dat=0x80 cpu request reset
//rsr_dat=0x100 software reset
/*************************************************************/
U32_T Read_Reset_Status(void)
{
return (SYSCON->RSR & 0x1ff);
}
/*************************************************************/
//external trigger Mode Selection Functions
//EntryParameter:NewState,EXIPIN,EXI_tringer_mode
//NewState:ENABLE,DISABLE
//EXIPIN:EXI_PIN0/1/2/3/4/5/6/7/8/9/10/11/12/13
//EXI_tringer_mode:_EXIRT,_EXIFT
//ReturnValue: LVD detection flag
/*************************************************************/
void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
{
switch(EXI_tringer_mode)
{
case _EXIRT:
if(NewState != DISABLE)
{
SYSCON->EXIRT |=EXIPIN;
}
else
{
SYSCON->EXIRT &=~EXIPIN;
}
break;
case _EXIFT:
if(NewState != DISABLE)
{
SYSCON->EXIFT |=EXIPIN;
}
else
{
SYSCON->EXIFT &=~EXIPIN;
}
break;
}
}
/*************************************************************/
//external interrupt enable and disable
//EntryParameter:NewState,EXIPIN,* GPIOX
//* GPIOX:GPIOA,GPIOB
//EXIPIN:EXI_PIN0/1/2/3/4/5/6/7/8/9/10/11/12/13
//NewState:ENABLE,DISABLE
//ReturnValue:NONE
/*************************************************************/
void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef EXIPIN)
{
SYSCON->EXICR = 0X3FFF; //Claer EXI INT status
if(NewState != DISABLE)
{
SYSCON->EXIER|=EXIPIN; //EXI4 interrupt enable
while(!(SYSCON->EXIMR&EXIPIN)); //Check EXI is enabled or not
SYSCON->EXICR |=EXIPIN; // Clear EXI status bit
}
else
{
SYSCON->EXIDR|=EXIPIN;
}
}
/*************************************************************/
//GPIO EXTI interrupt
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE)
{
GPIOX->IECR=GPIO_IECR_VALUE;
}
/*************************************************************/
//PLCK goto SLEEP mode
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void PCLK_goto_idle_mode(void)
{
asm ("doze"); // Enter sleep mode
}
/*************************************************************/
//PLCK goto SLEEP mode
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void PCLK_goto_deepsleep_mode(void)
{
SYSCON->WKCR=0X3F<<8;
asm ("stop");
}
/*************************************************************/
//EXI0 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI0_Int_Enable(void)
{
INTC_ISER_WRITE(EXI0_INT);
}
/*************************************************************/
//EXI0 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI0_Int_Disable(void)
{
INTC_ICER_WRITE(EXI0_INT);
}
/*************************************************************/
//EXI1 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI1_Int_Enable(void)
{
INTC_ISER_WRITE(EXI1_INT);
}
/*************************************************************/
//EXI1 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI1_Int_Disable(void)
{
INTC_ICER_WRITE(EXI1_INT);
}
/*************************************************************/
//EXI2 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI2_Int_Enable(void)
{
INTC_ISER_WRITE(EXI2_INT);
}
/*************************************************************/
//EXI2 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI2_Int_Disable(void)
{
INTC_ICER_WRITE(EXI2_INT);
}
/*************************************************************/
//EXI3 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI3_Int_Enable(void)
{
INTC_ISER_WRITE(EXI3_INT);
}
/*************************************************************/
//EXI3 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI3_Int_Disable(void)
{
INTC_ICER_WRITE(EXI3_INT);
}
/*************************************************************/
//EXI4 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI4_Int_Enable(void)
{
INTC_ISER_WRITE(EXI4_INT);
}
/*************************************************************/
//EXI4 Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI4_Int_Disable(void)
{
INTC_ICER_WRITE(EXI4_INT);
}
/*************************************************************/
//EXI0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI0_WakeUp_Enable(void)
{
INTC_IWER_WRITE(EXI0_INT);
}
/*************************************************************/
//EXI0 Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI0_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(EXI0_INT);
}
/*************************************************************/
//EXI1 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI1_WakeUp_Enable(void)
{
INTC_IWER_WRITE(EXI1_INT);
}
/*************************************************************/
//EXI1 Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI1_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(EXI1_INT);
}
/*************************************************************/
//EXI2 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI2_WakeUp_Enable(void)
{
INTC_IWER_WRITE(EXI2_INT);
}
/*************************************************************/
//EXI2 Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI2_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(EXI2_INT);
}
/*************************************************************/
//EXI3 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI3_WakeUp_Enable(void)
{
INTC_IWER_WRITE(EXI3_INT);
}
/*************************************************************/
//EXI3 Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI3_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(EXI3_INT);
}
/*************************************************************/
//EXI4 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI4_WakeUp_Enable(void)
{
INTC_IWER_WRITE(EXI4_INT);
}
/*************************************************************/
//EXI4 Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void EXI4_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(EXI4_INT);
}
/*************************************************************/
//SYSCON Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_Int_Enable(void)
{
INTC_ISER_WRITE(SYSCON_INT);
}
/*************************************************************/
//SYSCON Interrupt disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_Int_Disable(void)
{
INTC_ICER_WRITE(SYSCON_INT);
}
/*************************************************************/
//SYSCON Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_WakeUp_Enable(void)
{
INTC_IWER_WRITE(SYSCON_INT);
}
/*************************************************************/
//set PA0.0/PA0.8 as CLO output
//EntryParameter:CLO_PA02/CLO_PA08
//ReturnValue:NONE
/*************************************************************/
void SYSCON_CLO_CONFIG(CLO_IO_TypeDef clo_io)
{
if (clo_io==CLO_PA02)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000700;
}
if (clo_io==CLO_PA08)
{
GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000007;
}
}
/*************************************************************/
//set CLO clk and div
//EntryParameter:clomxr/clodivr
//ReturnValue:NONE
/*************************************************************/
void SYSCON_CLO_SRC_SET(SystemClk_CLOMX_TypeDef clomxr,SystemClk_CLODIV_TypeDef clodivr)
{
SYSCON->OPT1=(SYSCON->OPT1 & 0XFFFF00FF)|(clomxr<<8)|(clodivr<<12);
}
/*************************************************************/
//SYSCON Wake up disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(SYSCON_INT);
}
/*************************************************************/
//READ CIF0 data
//EntryParameter:None
//ReturnValue:VALUE
/*************************************************************/
U32_T SYSCON_Read_CINF0(void)
{
U32_T value = 0;
value=SYSCON->CINF0;
return value;
}
/*************************************************************/
//READ CIF1 data
//EntryParameter:None
//ReturnValue:VALUE
/*************************************************************/
U32_T SYSCON_Read_CINF1(void)
{
U32_T value = 0;
value=SYSCON->CINF1;
return value;
}
/*************************************************************/
//Software_Reset
//EntryParameter:None
//ReturnValue:MCU reset
/*************************************************************/
void SYSCON_Software_Reset(void)
{
SYSCON->IDCCR=IDCCR_KEY|SWRST;
}
/*************************************************************/
//Interrupt Priority initial
//EntryParameter:00/40/80/C0
//----------------------
//CORET_INT IRQ0
//SYSCON_INT IRQ1
//IFC_INT IRQ2
//ADC_INT IRQ3
//----------------------
//EPT0_INT IRQ4
//****DUMMY IRQ5
//WWDT_INT IRQ6
//EXI0_INT IRQ7
//----------------------
//EXI1_INT IRQ8
//GPT0_INT IRQ9
//****DUMMY IRQ10
//****DUMMY IRQ11
//----------------------
//RTC_INT IRQ12
//UART0_INT IRQ13
//UART1_INT IRQ14
//UART2_INT IRQ15
//----------------------
//****DUMMY IRQ16
//I2C_INT IRQ17
//****DUMMY IRQ18
//SPI_INT IRQ19
//----------------------
//SIO_INT IRQ20
//EXI2_INT IRQ21
//EXI3_INT IRQ22
//EXI4_INT IRQ23
//----------------------
//CA_INT IRQ24
//TKEY_INT IRQ25
//LPT_INT IRQ26
//****DUMMY IRQ27
//----------------------
//BT0_INT IRQ28
//BT1_INT IRQ29
//----------------------
//ReturnValue:None
//00:Priority 0 highest
//40:Priority 1
//80:Priority 2
//C0:Priority 3 lowest
/*************************************************************/
void SYSCON_INT_Priority(void)
{
INTC_IPR0_WRITE(0XC0C0C0C0); //IQR0-3 low bit-->high bit
INTC_IPR1_WRITE(0XC0C0C0C0); //IQR4-7
INTC_IPR2_WRITE(0XC0C0C0C0); //IQR8-11
INTC_IPR3_WRITE(0XC0C0C0C0); //IQR12-15
INTC_IPR4_WRITE(0XC0C0C0C0); //IQR16-19
INTC_IPR5_WRITE(0XC0C0C0C0); //IQR20-23
INTC_IPR6_WRITE(0XC0C000C0); //IQR24-27
INTC_IPR7_WRITE(0XC0C0C0C0); //IQR28-31
}
/*************************************************************/
//Set Interrupt Priority
//EntryParameter:
//int_name:CORET_IRQ~BT1_IRQ
//int_level:0~3 0=highest 3=lowest
//ReturnValue:None
/*************************************************************/
void Set_INT_Priority(U8_T int_name,U8_T int_level)
{
U8_T i_temp,j_temp;
U32_T k_temp;
i_temp=(int_name%4)*8;
j_temp=int_name/4;
k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
}
/*************************************************************/
//IO REMAP
//EntryParameter:GPIOA0(0,1,2,3,4,5,6,7) GPIOB0(2,3),GPIOA0(8,9,10,11,12,13)
//0x00=I2C_SCL 0X01=I2C_SDA 0X02=GPT_CHA 0X03=GPT_CHB
//0X04=SPI_MOSI 0X05=SPI_MISO 0X06=SPI_SCK 0X07=SPI_NSS
//0x00=UART0_RX 0X01=UART0_TX 0X02=EPT_CHAX 0X03=PT_CHBX
//0X04=PT_CHCX 0X05=PT_CHAY 0X06=PT_CHBY 0X07=PT_CHCY
//ReturnValue:NONE
/*************************************************************/
void GPIO_Remap(CSP_GPIO_T *GPIOx,uint8_t bit,IOMAP_DIR_TypeDef iomap_data)
{
U8_T i;
if(iomap_data&0x10)
{
iomap_data=iomap_data&0X0F;
if(iomap_data==0)
{
for(i=0;i<28;i+=4)
{
if((SYSCON->IOMAP1&(0xf<<i))==0)
{
SYSCON->IOMAP1=SYSCON->IOMAP1|(0xf<<i);
}
}
}
if(bit==2){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfffffff0)|iomap_data;(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFF0FF) | 0x00000A00;}
if(bit==3){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xffffff0f)|(iomap_data<<4);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFF0FFF) | 0x0000A000;}
if(bit==8){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfffff0ff)|(iomap_data<<8);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFFFF0) | 0x0000000A;}
if(bit==9){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xffff0fff)|(iomap_data<<12);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFFF0F) | 0x000000A0;}
if(bit==10){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfff0ffff)|(iomap_data<<16);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFF0FF) | 0x00000A00;}
if(bit==11){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xff0fffff)|(iomap_data<<20);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFF0FFF) | 0x0000A000;}
if(bit==12){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xf0ffffff)|(iomap_data<<24);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFF0FFFF) | 0x000A0000;}
if(bit==13){SYSCON->IOMAP1=(SYSCON->IOMAP1&0x0fffffff)|(iomap_data<<28);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFF0FFFFF) | 0x00A00000;}
}
else
{
if(iomap_data==0)
{
for(i=0;i<28;i+=4)
{
if((SYSCON->IOMAP0&(0xf<<i))==0)
{
SYSCON->IOMAP0=SYSCON->IOMAP0|(0xf<<i);
}
}
}
if(bit==0){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfffffff0)|iomap_data;(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFFFF0) | 0x0000000A;}
if(bit==1){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xffffff0f)|(iomap_data<<4);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFFF0F) | 0x000000A0;}
if(bit==2){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfffff0ff)|(iomap_data<<8);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFF0FF) | 0x00000A00;}
if(bit==3){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xffff0fff)|(iomap_data<<12);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFF0FFF) | 0x0000A000;}
if(bit==4){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfff0ffff)|(iomap_data<<16);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFF0FFFF) | 0x000A0000;}
if(bit==5){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xff0fffff)|(iomap_data<<20);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFF0FFFFF) | 0x00A00000;}
if(bit==6){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xf0ffffff)|(iomap_data<<24);(GPIOx)->CONLR =((GPIOx)->CONLR&0XF0FFFFFF) | 0x0A000000;}
if(bit==7){SYSCON->IOMAP0=(SYSCON->IOMAP0&0x0fffffff)|(iomap_data<<28);(GPIOx)->CONLR =((GPIOx)->CONLR&0X0FFFFFFF) | 0x0A0000000;}
}
}
/******************* (C) COPYRIGHT 2018 APT Chip *****END OF FILE****/

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Source/FWlib/apt32f102_uart.c Normal file
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@@ -0,0 +1,403 @@
/*
******************************************************************************
* @file apt32f102_uart.c
* @author APT AE Team
* @version V1.15
* @date 2022/09/05
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_uart.h"
#include "apt32f102_syscon.h"
/* define --------------------------------------------------------------------*/
volatile U8_T RxDataFlag=0;
volatile U8_T TxDataFlag=0;
volatile U8_T f_Uart_send_Complete;
volatile U16_T Uart_send_Length_temp;
volatile U8_T Uart_send_Length;
volatile U8_T Uart_buffer[UART_BUFSIZE];
/* externs--------------------------------------------------------------------*/
/*************************************************************/
//UART RESET,CLEAR ALL REGISTER
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_DeInit(void)
{
UART0->DATA = UART_RESET_VALUE;
UART0->SR = UART_RESET_VALUE;
UART0->CTRL = UART_RESET_VALUE;
UART0->ISR = UART_RESET_VALUE;
UART0->BRDIV =UART_RESET_VALUE;
}
void UART1_DeInit(void)
{
UART1->DATA = UART_RESET_VALUE;
UART1->SR = UART_RESET_VALUE;
UART1->CTRL = UART_RESET_VALUE;
UART1->ISR = UART_RESET_VALUE;
UART1->BRDIV =UART_RESET_VALUE;
}
void UART2_DeInit(void)
{
UART2->DATA = UART_RESET_VALUE;
UART2->SR = UART_RESET_VALUE;
UART2->CTRL = UART_RESET_VALUE;
UART2->ISR = UART_RESET_VALUE;
UART2->BRDIV =UART_RESET_VALUE;
}
/*************************************************************/
//UART0 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_Int_Enable(void)
{
UART0->ISR=0x0F; //clear UART0 INT status
INTC_ISER_WRITE(UART0_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART0 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_Int_Disable(void)
{
INTC_ICER_WRITE(UART0_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART1 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART1_Int_Enable(void)
{
UART1->ISR=0x0F; //clear UART1 INT status
INTC_ISER_WRITE(UART1_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART1 Interrupt Disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART1_Int_Disable(void)
{
INTC_ICER_WRITE(UART1_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART1 Interrupt enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART2_Int_Enable(void)
{
UART2->ISR=0x0F; //clear UART1 INT status
INTC_ISER_WRITE(UART2_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART1 Interrupt Disable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART2_Int_Disable(void)
{
INTC_ICER_WRITE(UART2_INT); //INT Vector Enable UART0/1 Interrupt in CK802
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_WakeUp_Enable(void)
{
INTC_IWER_WRITE(UART0_INT);
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(UART0_INT);
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART1_WakeUp_Enable(void)
{
INTC_IWER_WRITE(UART1_INT);
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART1_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(UART1_INT);
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART2_WakeUp_Enable(void)
{
INTC_IWER_WRITE(UART2_INT);
}
/*************************************************************/
//UART0 Wake up enable
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART2_WakeUp_Disable(void)
{
INTC_IWDR_WRITE(UART2_INT);
}
/*************************************************************/
//UART IO Init
//EntryParameter:IO_UARTX,UART_IO_G
//IO_UARTX:IO_UART0,IO_UART1
//UART_IO_G:0 1
//ReturnValue:NONE
/*************************************************************/
void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
{
if (IO_UART_NUM==IO_UART0)
{
if(UART_IO_G==0)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00) | 0x00000044; //PA0.1->RXD0, PA0.0->TXD0
}
else if(UART_IO_G==1)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0x00700000; //PA0.5->RXD0, PA0.12->TXD0
GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0x00070000;
}
}
if (IO_UART_NUM==IO_UART1)
{
if(UART_IO_G==0)
{
GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0) | 0x00000007; //PA0.13->RXD1, PB0.0->TXD1
GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0x00700000;
}
else if(UART_IO_G==1)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000; //PA0.4->RXD1, PA0.3->TXD1
}
else if(UART_IO_G==2)
{
GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000; //PA0.15->RXD1, PA0.14->TXD1
}
}
if (IO_UART_NUM==IO_UART2)
{
if(UART_IO_G==0)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00) | 0x00000077; //PA0.0->RXD2, PA0.1->TXD2
}
else if(UART_IO_G==1)
{
GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000; //PA0.7->RXD2, PA0.6->TXD2
}
else if(UART_IO_G==2)
{
GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000; //PB0.5->RXD2, PB0.4->TXD2
}
}
}
/*************************************************************/
//UART Init
//EntryParameter:UART0,UART1,UART2 ,baudrate_u16
//e.g:
//sys_clk@24MHz, 24/4(div)=6MHz, 6000000/115200bps=52,baudrate_u16=52
//sys_clk@24MHz, 24/2(div)=12MHz, 12000000/115200bps=104,baudrate_u16=104
//ReturnValue:NONE
/*************************************************************/
void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
{
// Set Transmitter Enable
CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
// Set Baudrate
CSP_UART_SET_BRDIV(uart, baudrate_u16);
}
/*************************************************************/
//UART init and enable RX,TX interrupt
//EntryParameter:UART0,UART1,UART2 ,baudrate_u16
//ReturnValue:NONE
/*************************************************************/
void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
{
// Set Transmitter Enable
CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
// Set Baudrate
CSP_UART_SET_BRDIV(uart, baudrate_u16);
}
/*************************************************************/
//UART init and enable RX interrupt
//EntryParameter:UART0,UART1,UART2 ,baudrate_u16
//ReturnValue:NONE
/*************************************************************/
void UARTInitRxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
{
// Set Transmitter Enable
CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT |PAR_DAT);
// Set Baudrate
CSP_UART_SET_BRDIV(uart, baudrate_u16);
}
/*************************************************************/
//UART Close
//EntryParameter:UART0,UART1,UART2
//ReturnValue:NONE
/*************************************************************/
void UARTClose(CSP_UART_T *uart)
{
// Set Transmitter Disable
CSP_UART_SET_CTRL(uart, 0x00);
}
/*************************************************************/
//UART TX Byte loop send
//EntryParameter:UART0,UART1,UART2,txdata_u8
//ReturnValue:NONE
/*************************************************************/
void UARTTxByte(CSP_UART_T *uart,U8_T txdata_u8)
{
unsigned int DataI;
// Write the transmit buffer
CSP_UART_SET_DATA(uart,txdata_u8);
do
{
DataI = CSP_UART_GET_SR(uart);
DataI = DataI & UART_TX_FULL;
}
while(DataI == UART_TX_FULL); //Loop when tx is full
}
/*************************************************************/
//UART Transmit
//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
//ReturnValue:NONE
/*************************************************************/
void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
{
unsigned int DataI,DataJ;
for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
{
CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
do{
DataI = CSP_UART_GET_SR(uart);
DataI = DataI & UART_TX_FULL;
SYSCON_IWDCNT_Reload();
}while(DataI == UART_TX_FULL); //Loop when tx is full
SYSCON_IWDCNT_Reload();
}
}
/*************************************************************/
//UART INT Transmit
//EntryParameter:
//ReturnValue:NONE
/*************************************************************/
void UARTTTransmit_data_set(CSP_UART_T *uart )
{
if(!f_Uart_send_Complete)
{
f_Uart_send_Complete=1;
Uart_send_Length_temp++;
CSP_UART_SET_DATA(uart,Uart_buffer[0]);
}
}
void UARTTransmit_INT_Send(CSP_UART_T *uart )
{
if(f_Uart_send_Complete)
{
if(Uart_send_Length_temp>=Uart_send_Length)
{
f_Uart_send_Complete=0;
Uart_send_Length_temp=0;
}
else
{
CSP_UART_SET_DATA(uart,Uart_buffer[Uart_send_Length_temp++]);
}
}
}
/*************************************************************/
//UART RX Byte
//EntryParameter:UART0,UART1,UART2,Rxdata_u16
//ReturnValue:NONE
/*************************************************************/
U16_T UARTRxByte(CSP_UART_T *uart,U8_T *Rxdata_u16)
{
unsigned int DataI;
DataI = CSP_UART_GET_SR(uart);
DataI = DataI & UART_RX_FULL;
if(DataI != UART_RX_FULL) //Loop when rx is not full
return FALSE;
else
{
*Rxdata_u16 = CSP_UART_GET_DATA(uart);
return TRUE;
}
}
/*************************************************************/
//UART RX Return Byte
//EntryParameter:UART0,UART1,UART2
//ReturnValue:(uart)->DATA
/*************************************************************/
U8_T UART_ReturnRxByte(CSP_UART_T *uart)
{
RxDataFlag = FALSE;
while(RxDataFlag != TRUE);
return CSP_UART_GET_DATA(uart);
}
/*************************************************************/
//UART Receive
//EntryParameter:UART0,UART1,UART2，destAddress_u16，length_u16
//ReturnValue:FALSE/TRUE
/*************************************************************/
U16_T UARTReceive(CSP_UART_T *uart,U8_T *destAddress_u16,U16_T length_u16)
{
unsigned int DataI,DataJ,LoopTime;
DataJ = 0;
LoopTime = 0;
do{
DataI = CSP_UART_GET_SR(uart);
DataI = DataI & UART_RX_FULL;
if(DataI == UART_RX_FULL) //Loop when rx is full
{
*destAddress_u16++ = CSP_UART_GET_DATA(uart);
DataJ++;
LoopTime = 0;
}
if(LoopTime ++ >= 0xfff0)
return FALSE;
}while(DataJ < length_u16);
return TRUE;
}

90
Source/FWlib/apt32f102_wwdt.c Normal file
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@@ -0,0 +1,90 @@
/*
******************************************************************************
* @file apt32f102_wwdt.c
* @author APT AE Team
* @version V1.08
* @date 2021/06/21
******************************************************************************
*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "apt32f102_wwdt.h"
/*************************************************************/
//WWDT RESET CLEAR ALL REGISTER
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void WWDT_DeInit(void)
{
WWDT->CR = 0x000000FF;
WWDT->CFGR = 0x000000FF;
WWDT->RISR = WWDT_RESET_VALUE;
WWDT->MISR = WWDT_RESET_VALUE;
WWDT->IMCR = WWDT_RESET_VALUE;
WWDT->ICR = WWDT_RESET_VALUE;
}
/*************************************************************/
//WWDT CONFIG
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void WWDT_CONFIG(WWDT_PSCDIV_TypeDef PSCDIVX,U8_T WND_DATA,WWDT_DBGEN_TypeDef DBGENX)
{
WWDT->CFGR =WND_DATA;
WWDT->CFGR |= PSCDIVX |DBGENX;
}
/*************************************************************/
//WWDT ENABLE/DISABLE
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void WWDT_CMD(FunctionalStatus NewState)
{
if (NewState != DISABLE)
{
WWDT->CR |= 0x01<<8;
}
else
{
WWDT->CR &= 0xfffffeff;
}
}
/*************************************************************/
//WWDT load data
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void WWDT_CNT_Load(U8_T cnt_data)
{
WWDT->CR |= cnt_data; //SET
}
/*************************************************************/
//WWDT INT ENABLE/DISABLE
//EntryParameter:NONE
//ReturnValue: NONE
/*************************************************************/
void WWDT_Int_Config(FunctionalStatus NewState)
{
if (NewState != DISABLE)
{
WWDT->ICR = WWDT_EVI;
WWDT->IMCR |= WWDT_EVI;
INTC_ISER_WRITE(WWDT_INT);
}
else
{
WWDT->IMCR &= ~WWDT_EVI; //CLR
INTC_ICER_WRITE(WWDT_INT);
}
}