Boonlive_RD_Embedded/BLV_MD203_Bootload
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fix:修改RS485通讯引脚

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RS485通讯引脚改为串口2，引脚：RX：PB05 TX：PB04 RS485_DR:PB03
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caocong
2026-02-25 10:29:57 +08:00
commit 2815979c8a
77 changed files with 16491 additions and 0 deletions
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241
Source/mcu_initial.c Normal file
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#include "includes.h"
/*************************************************************/
//software delay
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void delay_nms(unsigned int t)
{
volatile unsigned int i,j ,k=0;
j = 50* t;
for ( i = 0; i < j; i++ )
{
k++;
SYSCON_IWDCNT_Reload();
}
}
void delay_nus(unsigned int t)
{
volatile unsigned int i,j ,k=0;
j = 1* t;
for ( i = 0; i < j; i++ )
{
k++;
}
}
/*************************************************************/
//GPIO Initial
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void GPIO_CONFIG(void)
{
//GPIO初始化 - 将GPIO设置为输入下拉
GPIO_DeInit();
GPIO_Init(GPIOA0,0,Intput);
GPIO_Init(GPIOA0,1,Intput);
GPIO_Init(GPIOA0,2,Intput);
GPIO_Init(GPIOA0,3,Intput);
GPIO_Init(GPIOA0,4,Intput);
GPIO_Init(GPIOA0,5,Intput);
/* PA6 - SWC ,PA7 - SWD */
GPIO_Init(GPIOA0,8,Intput);
GPIO_Init(GPIOA0,9,Intput);
GPIO_Init(GPIOA0,10,Intput);
GPIO_Init(GPIOA0,11,Intput);
GPIO_Init(GPIOA0,12,Intput);
GPIO_Init(GPIOA0,13,Intput);
GPIO_Init(GPIOA0,14,Intput);
GPIO_Init(GPIOA0,15,Intput);
GPIO_Init(GPIOB0,0,Intput);
GPIO_Init(GPIOB0,1,Intput);
GPIO_Init(GPIOB0,2,Intput);
GPIO_Init(GPIOB0,3,Intput);
// GPIO_Init(GPIOB0,4,Intput); //默认为Boot 烧录串口2
// GPIO_Init(GPIOB0,5,Intput); //默认为Boot 烧录串口2
GPIO_PullLow_Init(GPIOA0,0);
GPIO_PullLow_Init(GPIOA0,1);
GPIO_PullLow_Init(GPIOA0,2);
GPIO_PullLow_Init(GPIOA0,3);
GPIO_PullLow_Init(GPIOA0,4);
GPIO_PullLow_Init(GPIOA0,5);
GPIO_PullLow_Init(GPIOA0,8);
GPIO_PullLow_Init(GPIOA0,9);
GPIO_PullLow_Init(GPIOA0,10);
GPIO_PullLow_Init(GPIOA0,11);
GPIO_PullLow_Init(GPIOA0,12);
GPIO_PullLow_Init(GPIOA0,13);
GPIO_PullLow_Init(GPIOA0,14);
GPIO_PullLow_Init(GPIOA0,15);
GPIO_PullLow_Init(GPIOB0,0);
GPIO_PullLow_Init(GPIOB0,1);
GPIO_PullLow_Init(GPIOB0,2);
GPIO_PullLow_Init(GPIOB0,3);
// GPIO_PullLow_Init(GPIOB0,4); //默认为Boot 烧录串口2
// GPIO_PullLow_Init(GPIOB0,5); //默认为Boot 烧录串口2
}
/*************************************************************/
//BT Initial
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void BT_CONFIG(void)
{
//PB 保护电流PWM_CURR_LMT
// BT_DeInit(BT0);
// BT_IO_Init(BT0_PB02);
// BT_Configure(BT0,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);//TCLK=PCLK/(0+1)
// BT_ControlSet_Configure(BT0,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
// //BT_ControlSet_Configure(BT0,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_EN,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
// //BT_Trigger_Configure(BT0,BT_TRGSRC_PEND,BT_TRGOE_EN);
// BT_Period_CMP_Write(BT0,50,1);
// BT_Start(BT0);
// BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
// BT0_INT_ENABLE();
//100us 定时器初始化
BT_DeInit(BT1);
BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
BT_Period_CMP_Write(BT1,4780,1);
BT_Start(BT1);
BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
BT1_INT_ENABLE();
}
/*************************************************************/
//UART0 CONFIG
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART0_CONFIG(void)
{
UART0_DeInit(); //clear all UART Register
UART_IO_Init(IO_UART0,0); //use PA0.1->RXD0, PA0.0->TXD0
UARTInit(UART0,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200
UARTInitRxTxIntEn(UART0,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200,tx rx int enabled
UART0_Int_Enable();
}
/*************************************************************/
//UART1 CONFIG
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART1_CONFIG(void)
{
UART1_DeInit(); //clear all UART Register
UART_IO_Init(IO_UART1,0); //use PA0.13->RXD1, PB0.0->TXD1
UARTInit(UART1,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200
UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200 tx rx int enabled
UART1_Int_Enable();
}
/*************************************************************/
//UART2 CONFIG
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void UART2_CONFIG(void)
{
UART2_DeInit(); //clear all UART Register
UART_IO_Init(IO_UART2,2); //use PA0.7->RXD2, PA0.6->TXD2
UARTInit(UART2,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200
//UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE); //baudrate=sysclock 48M/416=115200 tx rx int enabled
//UART2_Int_Enable();
}
/*************************************************************/
//syscon Functions
//EntryParameter:NONE
//ReturnValue:NONE
/*************************************************************/
void SYSCON_CONFIG(void)
{
//------SYSTEM CLK AND PCLK FUNTION---------------------------/
SYSCON_RST_VALUE(); //SYSCON all register clr
SYSCON_General_CMD(ENABLE,ENDIS_ISOSC); //SYSCON enable/disable clock source
//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns); //EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M); //HFOSC selected 48MHz
SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div set system clock=SystemCLK/Hclk div/Pclk div
//------------ WDT FUNTION --------------------------------/
SYSCON_IWDCNT_Config(IWDT_TIME_125MS,IWDT_INTW_DIV_7); //WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
SYSCON_WDT_CMD(ENABLE); //enable/disable WDT
SYSCON_IWDCNT_Reload(); //reload WDT
IWDT_Int_Enable();
//------------ WWDT FUNTION --------------------------------/
// WWDT_CNT_Load(0xFF);
// WWDT_CONFIG(PCLK_4096_DIV0,0xFF,WWDT_DBGDIS);
// WWDT_Int_Config(ENABLE);
//WWDT_CMD(ENABLE); //enable wwdt
//------------ CLO Output --------------------------------/
//SYSCON_CLO_CONFIG(CLO_PA08); //CLO output setting
//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16); //CLO output clock and div
//------------ LVD FUNTION --------------------------------/
SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall); //LVD LVR Enable/Disable
LVD_Int_Enable();
//------------ SYSCON Vector --------------------------------/
SYSCON_Int_Enable(); //SYSCON VECTOR
//SYSCON_WakeUp_Enable(); //Enable WDT wakeup INT
//------------------------------------------------------------/
//OSC CLOCK Calibration
//------------------------------------------------------------/
std_clk_calib(CLK_HFOSC_48M); //Select the same clock source as the system
}
/*********************************************************************************/
/*********************************************************************************/
//APT32F102_init /
//EntryParameter:NONE /
//ReturnValue:NONE /
/*********************************************************************************/
void APT32F102_init(void)
{
//------------------------------------------------------------/
//Peripheral clock enable and disable
//EntryParameter:NONE
//ReturnValue:NONE
//------------------------------------------------------------/
SYSCON->PCER0=0xFFFFFFF; //PCLK Enable
SYSCON->PCER1=0xFFFFFFF; //PCLK Enable
while(!(SYSCON->PCSR0&0x1)); //Wait PCLK enabled
//------------------------------------------------------------/
//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
//EntryParameter:NONE
//ReturnValue:NONE
//------------------------------------------------------------/
SYSCON_CONFIG(); //syscon initial
CK_CPU_EnAllNormalIrq(); //enable all IRQ
SYSCON_INT_Priority(); //initial all Priority=0xC0
//设置中断优先级 0最高，3最低
Set_INT_Priority(UART2_IRQ,1); //串口优先级最高
GPIO_CONFIG();
BT_CONFIG(); //BT initial
// UARTx_Init(UART_1,Boot_Comm_UpgradeProcess);
UARTx_Init(UART_2,Boot_Comm_UpgradeProcess); //通讯串口
Boot_Function_Init();
}
/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/