214 lines
3.7 KiB
ArmAsm
214 lines
3.7 KiB
ArmAsm
//start from __start,
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//(0)initialize vector table
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//(1)initialize all registers
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//(2)prepare initial reg values for user process
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//(3)initialize supervisor mode stack pointer
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//(4)construct ASID Table
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//(5)prepare PTE entry for user process start virtual address
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//(6)creat a mapping between VPN:0 and PFN:0 for kernel
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//(7)set VBR register
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//(8)enable EE and MMU
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//(9)jump to the main procedure using jsri main
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#define UserOption 0x55aa0005
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.export vector_table
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//.import VecTable
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.align 10
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vector_table: //totally 256 entries
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// .long __start
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// .rept 128
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// .long __dummy
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// .endr
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.long __start
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.long MisalignedHandler
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.long AccessErrHandler
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.long DummyHandler
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.long IllegalInstrHandler
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.long PriviledgeVioHandler
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.long DummyHandler
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.long BreakPointHandler
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.long UnrecExecpHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long Trap0Handler
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.long Trap1Handler
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.long Trap2Handler
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.long Trap3Handler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long DummyHandler
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.long PendTrapHandler
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.long CORETHandler
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.long SYSCONIntHandler
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.long IFCIntHandler
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.long ADCIntHandler
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.long EPT0IntHandler
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.long DummyHandler//EPT0EMIntHandler
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.long WWDTHandler
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.long EXI0IntHandler
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.long EXI1IntHandler
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.long GPT0IntHandler
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.long DummyHandler//GPT1IntHandler
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.long DummyHandler
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.long RTCIntHandler
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.long UART0IntHandler
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.long UART1IntHandler
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.long UART2IntHandler//USARTIntHandler
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.long DummyHandler
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.long I2CIntHandler
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.long DummyHandler
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.long SPI0IntHandler
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.long SIO0IntHandler
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.long EXI2to3IntHandler
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.long EXI4to9IntHandler
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.long EXI10to15IntHandler
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.long CNTAIntHandler
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.long TKEYIntHandler
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.long LPTIntHandler
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.long DummyHandler//LEDIntHandler
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.long BT0IntHandler
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.long BT1IntHandler
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.long DummyHandler//BT2IntHandler
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.long DummyHandler//BT3IntHandler
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.long UserOption
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.text
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.export __start
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.long 0x00000000
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.long 0x00000000
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// .long __start
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__start:
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//initialize all registers
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movi r0, 0
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movi r1, 0
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movi r2, 0
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movi r3, 0
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movi r4, 0
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movi r5, 0
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movi r6, 0
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movi r7, 0
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//movi r8, 0
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//movi r9, 0
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//movi r10, 0
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//movi r11, 0
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//movi r12, 0
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//movi r13, 0
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//movi r14, 0
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//movi r15, 0
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//set VBR
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lrw r2, vector_table
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mtcr r2, cr<1,0>
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//enable EE bit of psr
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mfcr r2, cr<0,0>
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bseti r2, r2, 8
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mtcr r2, cr<0,0>
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////set rom access delay
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// lrw r1, 0xe00000
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// lrw r2, 0x7
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// st.w r2, (r1,0x0)
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////enable cache
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// lrw r1, 0xe000f000
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// movi r2, 0x2
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// st.w r2, (r1,0x0)
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// lrw r2, 0x29
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// st.w r2, (r1,0x4)
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// movi r2, 0x1
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// st.w r2, (r1,0x0)
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//disable power peak
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lrw r1, 0xe000ef90
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movi r2, 0x0
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st.w r2, (r1, 0x0)
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//initialize kernel stack
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lrw r7, __kernel_stack
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mov r14,r7
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subi r6,r7,0x4
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//lrw r3, 0x40
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lrw r3, 0x04
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subu r4, r7, r3
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lrw r5, 0x0
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INIT_KERLE_STACK:
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addi r4, 0x4
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st.w r5, (r4)
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//cmphs r7, r4
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cmphs r6, r4
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bt INIT_KERLE_STACK
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__to_main:
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lrw r0,__main
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jsr r0
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mov r0, r0
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mov r0, r0
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lrw r15, __exit
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lrw r0,main
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jmp r0
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mov r0, r0
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mov r0, r0
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mov r0, r0
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mov r0, r0
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mov r0, r0
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.export __exit
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__exit:
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lrw r4, 0x20003000
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//lrw r5, 0x0
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mov r5, r0
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st.w r5, (r4)
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mfcr r1, cr<0,0>
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lrw r1, 0xFFFF
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mtcr r1, cr<11,0>
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lrw r1, 0xFFF
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movi r0, 0x0
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st r1, (r0)
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.export __fail
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__fail:
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lrw r1, 0xEEEE
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mtcr r1, cr<11,0>
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lrw r1, 0xEEE
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movi r0, 0x0
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st r1, (r0)
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__dummy:
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br __fail
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.export DummyHandler
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DummyHandler:
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br __fail
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.data
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.align 10
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.long __start
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