150 lines
4.5 KiB
C
150 lines
4.5 KiB
C
/*
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******************************************************************************
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* @file apt32f102_countera.h
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* @author APT AE Team
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* @version V1.08
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* @date 2021/06/21
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******************************************************************************
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*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
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*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
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*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
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*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
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*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
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*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef _apt32f102_countera_H
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#define _apt32f102_countera_H
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/* Includes ------------------------------------------------------------------*/
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#include "apt32f102.h"
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#define CA_RESET_VALUE (0x00000000)
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//--------------------------------------------------------------------------------
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//-----------------------------countA value enum define--------------------------
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//--------------------------------------------------------------------------------
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/**
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* @brief countA Period int
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*/
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typedef enum
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{
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Period_NA = 0, //Interrupt enable/disable for High/low period elapsed
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Period_H = 1,
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Period_L = 2,
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Period_H_L = 3,
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}CA_INT_TypeDef;
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/**
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* @brief countA DIV
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*/
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typedef enum
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{
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DIV1 = ((0 & 0x03ul)<<4) , //Counter A input clock frequency selection
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DIV2 = ((1 & 0x03ul)<<4) ,
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DIV4 = ((2 & 0x03ul)<<4) ,
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DIV8 = ((3 & 0x03ul)<<4) ,
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}CA_CLKDIV_TypeDef;
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/**
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* @brief countA mode
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*/
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typedef enum
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{
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ONESHOT_MODE = (0x00ul << 1), //Mode Selection:oneshotmode/repeat mode
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REPEAT_MODE = (0x01ul << 1),
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}CA_Mode_TypeDef;
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/**
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* @brief countA carrier setting
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*/
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typedef enum
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{
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CARRIER_OFF = (0x00ul << 25), //Carrier signal
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CARRIER_ON = (0x01ul << 25),
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}CA_CARRIER_TypeDef;
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/**
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* @brief Carrier Waveform Output Starting Polarity
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*/
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typedef enum
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{
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OSP_LOW = 0, //Carrier Waveform Output Starting Polarity
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OSP_HIGH = 1,
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}CA_OSP_TypeDef;
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/**
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* @brief Carrier register load
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*/
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typedef enum
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{
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HW_STROBE_0 = (0x01ul<<17), //Counter A data register Hardware/software load enable.
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HW_STROBE_1 = (0x01ul<<18),
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SW_STROBE = (0x01ul<<16),
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}CA_STROBE_TypeDef;
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/**
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* @brief Carrier rem output signal
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*/
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typedef enum
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{
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ENVELOPE_0 = (0x00ul << 24), //REM output signal selection bit
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ENVELOPE_1 = (0x01ul << 24),
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}CA_ENVELOPE_TypeDef;
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/**
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* @brief Carrier PENDREM
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*/
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typedef enum
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{
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PENDREM_OFF = ((0 & 0x03ul)<<21),
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PENDREM_1 = ((1 & 0x03ul)<<21),
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PENDREM_2 = ((2 & 0x03ul)<<21),
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}CA_PENDREM_TypeDef;
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/**
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* @brief Carrier ATCHREM
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*/
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typedef enum
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{
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MATCHREM_OFF = ((0 & 0x03ul)<<19),
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MATCHREM_1 = ((1 & 0x03ul)<<19),
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MATCHREM_2 = ((2 & 0x03ul)<<19),
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}CA_MATCHREM_TypeDef;
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/**
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* @brief Carrier REMSTAT
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*/
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typedef enum
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{
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REMSTAT_0 = ((0 & 0x01ul)<<23),
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REMSTAT_1 = ((1 & 0x01ul)<<23),
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}CA_REMSTAT_TypeDef;
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/**
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* @brief counterA IO
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*/
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typedef enum
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{
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COUNTA_PB01 = 0,
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COUNTA_PA05 = 1,
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COUNTA_PA11 = 2,
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}CA_COUNTAIO_TypeDef;
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extern void COUNTA_Init(uint32_t Data_H,uint32_t Data_L,CA_INT_TypeDef INT_Mode,
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CA_CLKDIV_TypeDef DIVx,CA_Mode_TypeDef Mode,CA_CARRIER_TypeDef Carrier,
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CA_OSP_TypeDef OSP_Mode) ;
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extern void COUNTA_Config(CA_STROBE_TypeDef STROBE,CA_PENDREM_TypeDef Pend_CON,
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CA_MATCHREM_TypeDef Match_CON,CA_REMSTAT_TypeDef Stat_CON,CA_ENVELOPE_TypeDef ENVELOPE );
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extern void COUNT_DeInit(void);
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extern void COUNTA_Start(void);
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extern void COUNTA_Stop(void);
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extern void COUNTA_Int_Disable(void);
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extern void COUNTA_Int_Enable(void);
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extern void COUNTA_Wakeup_Disable(void);
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extern void COUNTA_Wakeup_Enable(void);
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extern void COUNTA_IO_Init(CA_COUNTAIO_TypeDef COUNTA_IO_G);
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extern void COUNTA_Data_Update(uint32_t Data_H,uint32_t Data_L);
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/*************************************************************/
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#endif /**< apt32f102_countera_H */
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/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/ |