161 lines
5.6 KiB
C
161 lines
5.6 KiB
C
/*
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******************************************************************************
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* @file apt32f102_sio.c
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* @author APT AE Team
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* @version V1.11
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* @date 2021/06/21
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******************************************************************************
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*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
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*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
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*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
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*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
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*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
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*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "apt32f102_sio.h"
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/*************************************************************/
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//SIO RESET CLEAR ALL REGISTER
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_DeInit(void)
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{
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SIO0->CR = SIO_RESET_VALUE;
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SIO0->TXCR0 = SIO_RESET_VALUE;
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SIO0->TXCR1 = SIO_RESET_VALUE;
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//SIO0->TXBUF = SIO_RESET_VALUE;
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SIO0->RXCR0 = SIO_RESET_VALUE;
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SIO0->RXCR1 = SIO_RESET_VALUE;
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SIO0->RXCR1 = SIO_RESET_VALUE;
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//SIO0->RXBUF = SIO_RESET_VALUE;
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SIO0->RISR = SIO_RESET_VALUE;
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SIO0->MISR = SIO_RESET_VALUE;
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SIO0->IMCR = SIO_RESET_VALUE;
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SIO0->ICR = SIO_RESET_VALUE;
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}
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/*************************************************************/
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//SIO IO Initial
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_IO_Init(SIO_IOG_TypeDef IOGx)
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{
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if(IOGx==SIO_PA02)
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{
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GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFF0FF)|0x00000400;
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}
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if(IOGx==SIO_PA03)
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{
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GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFF0FFF)|0x00008000;
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}
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if(IOGx==SIO_PA012)
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{
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GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00080000;
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}
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if(IOGx==SIO_PB01)
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{
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GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000070;
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}
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}
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/*************************************************************/
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//SIO TX Initial
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_TX_Init(SIO_CLK_TypeDef CLKX,U8_T TCKPRSX)
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{
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SIO0->CR =CLKX | (TCKPRSX<<16) |(0X00<<8);
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}
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/*************************************************************/
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//SIO TX Configure
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_TX_Configure(SIO_IDLEST_TypeDef IDLEX,SIO_TXDIR_TypeDef TXDIRX,U8_T TXBUFLENX,U8_T TXCNTX,U8_T D0DURX,U8_T D1DURX,SIO_LENOBH_TypeDef LENOBHX,
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SIO_LENOBL_TypeDef LENOBLX,U8_T HSQX,U8_T LSQX)
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{
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SIO0->TXCR0 =IDLEX | TXDIRX | (TXBUFLENX<<4) |(TXCNTX<<8);
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SIO0->TXCR1=(D0DURX<<2)|(D1DURX<<5)|LENOBHX|LENOBLX|(HSQX<<16)|(LSQX<<24);
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}
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/*************************************************************/
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//SIO TX BUFFER SET
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_TXBUF_Set(U8_T D30,U8_T D28,U8_T D26,U8_T D24,U8_T D22,U8_T D20,U8_T D18,U8_T D16,
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U8_T D14,U8_T D12,U8_T D10,U8_T D08,U8_T D06,U8_T D04,U8_T D02,U8_T D00)
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{
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SIO0->TXBUF=(D30<<30)|(D28<<28)|(D26<<26)|(D24<<24)|(D22<<22)|(D20<<20)|(D18<<18)|(D16<<16)|
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(D14<<14)|(D12<<12)|(D10<<10)|(D08<<8)|(D06<<6)|(D04<<4)|(D02<<2)|(D00<<0);
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}
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/*************************************************************/
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//SIO RX Initial
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_RX_Init(SIO_CLK_TypeDef CLKX,SIO_RXDEB_TypeDef RXDEBX,U8_T DEBCKSX)
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{
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SIO0->CR =CLKX | RXDEBX |(0X01<<8) | (DEBCKSX<<4);
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}
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/*************************************************************/
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//SIO RX Basic Configure
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_RX_Configure0(SIO_BSTSEL_TypeDef BSTSELX,SIO_TRGMODE_TypeDef TRGMX,U8_T SPLCNTX,U8_T EXTRACTX,U8_T HITHRX,
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SIO_ALIGNEN_TypeDef ALIGNX,SIO_RXDIR_TypeDef RXDIRX,SIO_RXMODE_TypeDef RXMODEX,U8_T RXLENX,U8_T RXBUFLENX,U8_T RXKPRSX)
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{
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SIO0->RXCR0=BSTSELX|TRGMX|(SPLCNTX<<4)|(EXTRACTX<<10)|(HITHRX<<16)|(ALIGNX)|RXDIRX|RXMODEX;
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SIO0->RXCR1=(RXLENX)|(RXBUFLENX<<8)|(RXKPRSX<<16);
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}
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/*************************************************************/
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//SIO RX Configure 1
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_RX_Configure1(SIO_BREAKEN_TypeDef BREAKX,SIO_BREAKLVL_TypeDef BREAKLVLX,U8_T BREKCNTX,SIO_TORSTEN_TypeDef TORSTX,U8_T TOCNTX)
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{
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SIO0->RXCR2=BREAKX|BREAKLVLX|(BREKCNTX<<3)|TORSTX|(TOCNTX<<16);
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}
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/*************************************************************/
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//SIO inturrpt Configure
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//EntryParameter:LPT_IMSCR_X,NewState
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//NewState:ENABLE,DISABLE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_ConfigInterrupt_CMD(FunctionalStatus NewState,SIO_IMSCR_TypeDef SIO_IMSCR_X)
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{
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if (NewState != DISABLE)
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{
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SIO0->IMCR |= SIO_IMSCR_X;
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}
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else
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{
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SIO0->IMCR &= ~SIO_IMSCR_X;
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}
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}
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/*************************************************************/
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//SIO Interrupt enable
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_INT_ENABLE(void)
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{
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INTC_ISER_WRITE(SIO_INT);
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}
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/*************************************************************/
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//SIO Interrupt disable
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void SIO_INT_DISABLE(void)
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{
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INTC_ICER_WRITE(SIO_INT);
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} |