Boonlive_RD_Embedded/RCU_C12_Dimming
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发布生产文件：BLV_C12_Dimm_V19.hex
This commit is contained in:
caocong
2025-12-16 16:59:36 +08:00
parent 2dd675869a
commit 6ef7f0c503
15 changed files with 1051 additions and 1036 deletions
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738
Listings/BLV_C12_Dimm_V19.m51
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File diff suppressed because it is too large Load Diff

4
Listings/GPIO.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 GPIO 12/15/2025 20:45:03 PAGE 1 C51 COMPILER V9.01 GPIO 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE GPIO C51 COMPILER V9.01, COMPILATION OF MODULE GPIO
@@ -62,7 +62,7 @@ line level source
52 2 if(GPIOx->Mode == GPIO_HighZ) P5M1 |= GPIOx->Pin, P5M0 &= ~GPIOx->Pin; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 52 2 if(GPIOx->Mode == GPIO_HighZ) P5M1 |= GPIOx->Pin, P5M0 &= ~GPIOx->Pin; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
53 2 if(GPIOx->Mode == GPIO_OUT_OD) P5M1 |= GPIOx->Pin, P5M0 |= GPIOx->Pin; //<2F><>©<EFBFBD><C2A9><EFBFBD><EFBFBD> 53 2 if(GPIOx->Mode == GPIO_OUT_OD) P5M1 |= GPIOx->Pin, P5M0 |= GPIOx->Pin; //<2F><>©<EFBFBD><C2A9><EFBFBD><EFBFBD>
54 2 if(GPIOx->Mode == GPIO_OUT_PP) P5M1 &= ~GPIOx->Pin, P5M0 |= GPIOx->Pin; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 54 2 if(GPIOx->Mode == GPIO_OUT_PP) P5M1 &= ~GPIOx->Pin, P5M0 |= GPIOx->Pin; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
C51 COMPILER V9.01 GPIO 12/15/2025 20:45:03 PAGE 2 C51 COMPILER V9.01 GPIO 12/16/2025 16:53:47 PAGE 2
55 2 } 55 2 }
56 1 if(GPIO == GPIO_P6) 56 1 if(GPIO == GPIO_P6)

18
Listings/PWM15bit.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PWM15BIT C51 COMPILER V9.01, COMPILATION OF MODULE PWM15BIT
@@ -62,7 +62,7 @@ line level source
52 0xfc84, /* PWM44CR */ 52 0xfc84, /* PWM44CR */
53 0xfc8c, /* PWM45CR */ 53 0xfc8c, /* PWM45CR */
54 0xfc94, /* PWM46CR */ 54 0xfc94, /* PWM46CR */
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 2 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 2
55 0xfc9c, /* PWM47CR */ 55 0xfc9c, /* PWM47CR */
56 0xfcb4, /* PWM50CR */ 56 0xfcb4, /* PWM50CR */
@@ -126,7 +126,7 @@ line level source
114 0xfce8, /* PWM57T1 */ 114 0xfce8, /* PWM57T1 */
115 }; 115 };
116 116
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 3 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 3
117 u16 code PWMxT2[48] = { 117 u16 code PWMxT2[48] = {
118 0xff12, /* PWM00T2 */ 118 0xff12, /* PWM00T2 */
@@ -190,7 +190,7 @@ line level source
176 0xff4d, /* PWM07HLD */ 176 0xff4d, /* PWM07HLD */
177 0xff65, /* PWM10HLD */ 177 0xff65, /* PWM10HLD */
178 0xff6d, /* PWM11HLD */ 178 0xff6d, /* PWM11HLD */
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 4 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 4
179 0xff75, /* PWM12HLD */ 179 0xff75, /* PWM12HLD */
180 0xff7d, /* PWM13HLD */ 180 0xff7d, /* PWM13HLD */
@@ -254,7 +254,7 @@ line level source
238 1 if(pwm_eni > 1) return 2; //<2F>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD> 238 1 if(pwm_eni > 1) return 2; //<2F>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD>
239 1 if(pwm_ent2i > 1) return 2; //<2F>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD> 239 1 if(pwm_ent2i > 1) return 2; //<2F>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD>
240 1 if(pwm_ent1i > 1) return 2; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD> 240 1 if(pwm_ent1i > 1) return 2; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʹ<EFBFBD>ܿ<EFBFBD><DCBF>ƴ<EFBFBD><C6B4><EFBFBD>
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 5 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 5
241 1 241 1
242 1 EAXSFR(); /* MOVX A,@DPTR/MOVX @DPTR,Aָ<41><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>չSFR(XSFR) */ 242 1 EAXSFR(); /* MOVX A,@DPTR/MOVX @DPTR,Aָ<41><D6B8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>չSFR(XSFR) */
@@ -318,7 +318,7 @@ line level source
300 // pwm_hldh: pwmǿ<6D><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>λ, 0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 1ǿ<31><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ. 300 // pwm_hldh: pwmǿ<6D><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD>λ, 0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 1ǿ<31><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ.
301 // <20><><EFBFBD><EFBFBD>: 0:<3A><>ȷ, 2:<3A><><EFBFBD><EFBFBD>. 301 // <20><><EFBFBD><EFBFBD>: 0:<3A><>ȷ, 2:<3A><><EFBFBD><EFBFBD>.
302 // <20>汾: V1.0, 2020-09-22 302 // <20>汾: V1.0, 2020-09-22
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 6 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 6
303 //======================================================================== 303 //========================================================================
304 u8 PWMLevelSet(u8 PWM_id, u8 pwm_hldl, u8 pwm_hldh) 304 u8 PWMLevelSet(u8 PWM_id, u8 pwm_hldl, u8 pwm_hldh)
@@ -382,7 +382,7 @@ line level source
362 1 if(PWM_id == PWM3) 362 1 if(PWM_id == PWM3)
363 1 { 363 1 {
364 2 if(PWMx->PWM_Enable == ENABLE) PWM15_PWM3_Enable(); //ʹ<><CAB9>PWM3 364 2 if(PWMx->PWM_Enable == ENABLE) PWM15_PWM3_Enable(); //ʹ<><CAB9>PWM3
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 7 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 7
365 2 else PWM15_PWM3_Disable(); //<2F>ر<EFBFBD>PWM3 365 2 else PWM15_PWM3_Disable(); //<2F>ر<EFBFBD>PWM3
366 2 PWM3_PS_Set(PWMx->PWM_Clock_PS); //ϵͳʱ<CDB3>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>, 0~15 366 2 PWM3_PS_Set(PWMx->PWM_Clock_PS); //ϵͳʱ<CDB3>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD><EFBFBD>, 0~15
@@ -446,7 +446,7 @@ line level source
424 // <20><><EFBFBD><EFBFBD>: none. 424 // <20><><EFBFBD><EFBFBD>: none.
425 // <20>汾: V1.0, 2020-10-13 425 // <20>汾: V1.0, 2020-10-13
426 //======================================================================== 426 //========================================================================
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 8 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 8
427 void PWM1_Handler (void) interrupt PWM1_VECTOR 427 void PWM1_Handler (void) interrupt PWM1_VECTOR
428 { 428 {
@@ -510,7 +510,7 @@ line level source
486 2 // TODO: <20>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD> 486 2 // TODO: <20>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
487 2 } 487 2 }
488 1 if(PWM3IF) 488 1 if(PWM3IF)
C51 COMPILER V9.01 PWM15BIT 12/15/2025 20:45:04 PAGE 9 C51 COMPILER V9.01 PWM15BIT 12/16/2025 16:53:47 PAGE 9
489 1 { 489 1 {
490 2 PWM3IF = 0; 490 2 PWM3IF = 0;

4
Listings/Start_Init.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 START_INIT 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 START_INIT 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE START_INIT C51 COMPILER V9.01, COMPILATION OF MODULE START_INIT
@@ -63,7 +63,7 @@ MODULE INFORMATION: STATIC OVERLAYABLE
BIT SIZE = ---- ---- BIT SIZE = ---- ----
END OF MODULE INFORMATION. END OF MODULE INFORMATION.
C51 COMPILER V9.01 START_INIT 12/15/2025 20:45:04 PAGE 2 C51 COMPILER V9.01 START_INIT 12/16/2025 16:53:47 PAGE 2
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S) C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)

18
Listings/UART.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 1 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE UART C51 COMPILER V9.01, COMPILATION OF MODULE UART
@@ -62,7 +62,7 @@ line level source
52 2 for(i=0; i<COM_TX1_Lenth; i++) TX1_Buffer[i] = 0; 52 2 for(i=0; i<COM_TX1_Lenth; i++) TX1_Buffer[i] = 0;
53 2 for(i=0; i<COM_RX1_Lenth; i++) RX1_Buffer[i] = 0; 53 2 for(i=0; i<COM_RX1_Lenth; i++) RX1_Buffer[i] = 0;
54 2 54 2
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 2 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 2
55 2 if(COMx->UART_Priority > Priority_3) return 2; //<2F><><EFBFBD><EFBFBD> 55 2 if(COMx->UART_Priority > Priority_3) return 2; //<2F><><EFBFBD><EFBFBD>
56 2 UART1_Priority(COMx->UART_Priority); //ָ<><D6B8><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>(<28>͵<EFBFBD><CDB5><EFBFBD>) Priority_0,Priority_1,Priority_2,Priority_ 56 2 UART1_Priority(COMx->UART_Priority); //ָ<><D6B8><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>(<28>͵<EFBFBD><CDB5><EFBFBD>) Priority_0,Priority_1,Priority_2,Priority_
@@ -126,7 +126,7 @@ line level source
COM2.TX_read = 0; COM2.TX_read = 0;
COM2.TX_write = 0; COM2.TX_write = 0;
COM2.B_TX_busy = 0; COM2.B_TX_busy = 0;
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 3 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 3
COM2.RX_Cnt = 0; COM2.RX_Cnt = 0;
COM2.RX_TimeOut = 0; COM2.RX_TimeOut = 0;
@@ -190,7 +190,7 @@ line level source
173 4 TH3 = (u8)(j>>8); 173 4 TH3 = (u8)(j>>8);
174 4 TL3 = (u8)j; 174 4 TL3 = (u8)j;
175 4 T4T3M &= 0xf0; 175 4 T4T3M &= 0xf0;
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 4 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 4
176 4 T4T3M |= 0x0a; //Timer3 set As Timer, 1T mode, Start timer3 176 4 T4T3M |= 0x0a; //Timer3 set As Timer, 1T mode, Start timer3
177 4 } 177 4 }
@@ -254,7 +254,7 @@ line level source
AUXR &= ~(1<<3); //Timer2 set As Timer AUXR &= ~(1<<3); //Timer2 set As Timer
AUXR |= (1<<2); //Timer2 set as 1T mode AUXR |= (1<<2); //Timer2 set as 1T mode
TH2 = (u8)(j>>8); TH2 = (u8)(j>>8);
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 5 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 5
TL2 = (u8)j; TL2 = (u8)j;
IE2 &= ~(1<<2); //<2F><>ֹ<EFBFBD>ж<EFBFBD> IE2 &= ~(1<<2); //<2F><>ֹ<EFBFBD>ж<EFBFBD>
@@ -318,7 +318,7 @@ line level source
296 3 if(COM1.RX_Cnt >= COM_RX1_Lenth) COM1.RX_Cnt = 0; 296 3 if(COM1.RX_Cnt >= COM_RX1_Lenth) COM1.RX_Cnt = 0;
297 3 if(dat=='D') //<2F><><EFBFBD><EFBFBD>10<31><30>'D',<2C><><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3> 297 3 if(dat=='D') //<2F><><EFBFBD><EFBFBD>10<31><30>'D',<2C><><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3>
298 3 { 298 3 {
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 6 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 6
299 4 stage++; 299 4 stage++;
300 4 } 300 4 }
@@ -382,7 +382,7 @@ line level source
if(TI2) if(TI2)
{ {
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 7 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 7
CLR_TI2(); CLR_TI2();
if(COM2.TX_read != COM2.TX_write) if(COM2.TX_read != COM2.TX_write)
@@ -446,7 +446,7 @@ line level source
420 2 else COM3.B_TX_busy = 0; 420 2 else COM3.B_TX_busy = 0;
421 2 } 421 2 }
422 1 } 422 1 }
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 8 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 8
423 #endif 423 #endif
424 424
@@ -510,7 +510,7 @@ line level source
-ty_2,Priority_3 -ty_2,Priority_3
480 1 COMx_InitStructure.UART_P_SW = UART3_SW_P50_P51; //<2F>л<EFBFBD><D0BB>˿<EFBFBD>, UART3_SW_P00_P01,UART3_SW_P50_P51 480 1 COMx_InitStructure.UART_P_SW = UART3_SW_P50_P51; //<2F>л<EFBFBD><D0BB>˿<EFBFBD>, UART3_SW_P00_P01,UART3_SW_P50_P51
481 1 UART_Configuration(UART3, &COMx_InitStructure); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3 UART1,UART2,UART3,UART4 481 1 UART_Configuration(UART3, &COMx_InitStructure); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3 UART1,UART2,UART3,UART4
C51 COMPILER V9.01 UART 12/15/2025 20:45:03 PAGE 9 C51 COMPILER V9.01 UART 12/16/2025 16:53:47 PAGE 9
482 1 482 1
483 1 //PrintString3("STC8 UART3 Test Programme!\r\n"); //UART3<54><33><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD> 483 1 //PrintString3("STC8 UART3 Test Programme!\r\n"); //UART3<54><33><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>

1159
Listings/UART_Set.lst
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File diff suppressed because it is too large Load Diff

2
Listings/WDT.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 WDT 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 WDT 12/16/2025 16:53:48 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE WDT C51 COMPILER V9.01, COMPILATION OF MODULE WDT

6
Listings/key.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 KEY 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 KEY 12/16/2025 16:53:48 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE KEY C51 COMPILER V9.01, COMPILATION OF MODULE KEY
@@ -62,7 +62,7 @@ line level source
52 4 case KEY_STA_S1: 52 4 case KEY_STA_S1:
53 4 g_Key.key_time[i] ++; 53 4 g_Key.key_time[i] ++;
54 4 if ( g_Key.key_time[i] < KEY_DELAY_COUNT_LONG ) 54 4 if ( g_Key.key_time[i] < KEY_DELAY_COUNT_LONG )
C51 COMPILER V9.01 KEY 12/15/2025 20:45:04 PAGE 2 C51 COMPILER V9.01 KEY 12/16/2025 16:53:48 PAGE 2
55 4 { 55 4 {
56 5 if ( P44 == KEY_LOOSEN ) //<2F>ɿ<EFBFBD> 56 5 if ( P44 == KEY_LOOSEN ) //<2F>ɿ<EFBFBD>
@@ -126,7 +126,7 @@ line level source
114 3 break; 114 3 break;
115 3 case 6: 115 3 case 6:
116 3 s_pwm.currpwm[5] = 2000ul; 116 3 s_pwm.currpwm[5] = 2000ul;
C51 COMPILER V9.01 KEY 12/15/2025 20:45:04 PAGE 3 C51 COMPILER V9.01 KEY 12/16/2025 16:53:48 PAGE 3
117 3 s_pwm.currvalue[5]=0x5A; 117 3 s_pwm.currvalue[5]=0x5A;
118 3 break; 118 3 break;

6
Listings/main.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 MAIN 12/15/2025 20:45:03 PAGE 1 C51 COMPILER V9.01 MAIN 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE MAIN C51 COMPILER V9.01, COMPILATION OF MODULE MAIN
@@ -62,7 +62,7 @@ line level source
48 1 COMx_InitStructure.UART_P_SW = UART1_SW_P30_P31; //<2F>л<EFBFBD><D0BB>˿<EFBFBD>, UART1_SW_P30_P31,UART1_SW_P36_P37,UAR 48 1 COMx_InitStructure.UART_P_SW = UART1_SW_P30_P31; //<2F>л<EFBFBD><D0BB>˿<EFBFBD>, UART1_SW_P30_P31,UART1_SW_P36_P37,UAR
-T1_SW_P16_P17,UART1_SW_P43_P44 -T1_SW_P16_P17,UART1_SW_P43_P44
49 1 UART_Configuration(UART1, &COMx_InitStructure); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1 UART1,UART2,UART3,UART4 49 1 UART_Configuration(UART1, &COMx_InitStructure); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1 UART1,UART2,UART3,UART4
C51 COMPILER V9.01 MAIN 12/15/2025 20:45:03 PAGE 2 C51 COMPILER V9.01 MAIN 12/16/2025 16:53:47 PAGE 2
50 1 50 1
51 1 //PrintString1("STC8H8K64U UART1 Test Programme!\r\n"); //UART1<54><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD> 51 1 //PrintString1("STC8H8K64U UART1 Test Programme!\r\n"); //UART1<54><31><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>
@@ -126,7 +126,7 @@ line level source
108 2 Usart_Deal_Data(); 108 2 Usart_Deal_Data();
109 2 109 2
110 2 deal_command1(); 110 2 deal_command1();
C51 COMPILER V9.01 MAIN 12/15/2025 20:45:03 PAGE 3 C51 COMPILER V9.01 MAIN 12/16/2025 16:53:47 PAGE 3
111 2 111 2
112 2 deal_command2(); 112 2 deal_command2();

14
Listings/pwm_control.lst
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@@ -1,4 +1,4 @@
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE PWM_CONTROL C51 COMPILER V9.01, COMPILATION OF MODULE PWM_CONTROL
@@ -62,7 +62,7 @@ line level source
48 1 48 1
49 1 PWM15_Init(PWM0,&PWM15_InitStructure); //<2F><>ʼ<EFBFBD><CABC>PWM0 49 1 PWM15_Init(PWM0,&PWM15_InitStructure); //<2F><>ʼ<EFBFBD><CABC>PWM0
50 1 PWM15_Init(PWM2,&PWM15_InitStructure); //<2F><>ʼ<EFBFBD><CABC>PWM2 50 1 PWM15_Init(PWM2,&PWM15_InitStructure); //<2F><>ʼ<EFBFBD><CABC>PWM2
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 2 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 2
51 1 51 1
52 1 PWM15Duty(PWM00,initial_Val); //PWM_ID, <20><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽλ<C6BD><CEBB>, <20><><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽλ<C6BD><CEBB> 52 1 PWM15Duty(PWM00,initial_Val); //PWM_ID, <20><><EFBFBD><EFBFBD><EFBFBD>͵<EFBFBD>ƽλ<C6BD><CEBB>, <20><><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽλ<C6BD><CEBB>
@@ -126,7 +126,7 @@ line level source
98 2 { 98 2 {
99 3 if (s_recv.flag1[i]) 99 3 if (s_recv.flag1[i])
100 3 { 100 3 {
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 3 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 3
101 4 if (s_pwm.wanttopwm[i] > s_pwm.currpwm[i]) 101 4 if (s_pwm.wanttopwm[i] > s_pwm.currpwm[i])
102 4 { 102 4 {
@@ -190,7 +190,7 @@ line level source
158 { 158 {
159 1 int i=0; 159 1 int i=0;
160 1 static u32 systick_command2 = 0; 160 1 static u32 systick_command2 = 0;
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 4 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 4
161 1 if (systick_1ms - systick_command2 >= 10) 161 1 if (systick_1ms - systick_command2 >= 10)
162 1 { 162 1 {
@@ -254,7 +254,7 @@ line level source
216 5 216 5
217 5 //˫<><CBAB>ѭ<EFBFBD><D1AD>ģʽ 217 5 //˫<><CBAB>ѭ<EFBFBD><D1AD>ģʽ
218 5 case 0x01: 218 5 case 0x01:
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 5 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 5
219 5 //<2F>ݼ<EFBFBD> 219 5 //<2F>ݼ<EFBFBD>
220 5 if (s_recv.forward[i] == 0x00) 220 5 if (s_recv.forward[i] == 0x00)
@@ -318,7 +318,7 @@ line level source
274 //ֱ<>ӹص<D3B9><D8B5><EFBFBD>,<2C><><EFBFBD><EFBFBD>¼״̬ 274 //ֱ<>ӹص<D3B9><D8B5><EFBFBD>,<2C><><EFBFBD><EFBFBD>¼״̬
275 void Close_Light(u8 i) 275 void Close_Light(u8 i)
276 { 276 {
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 6 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 6
277 1 s_pwm.currpwm[i]=20001ul; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>dz<EFBFBD><C7B3><EFBFBD><EFBFBD>⣬<EFBFBD><E2A3AC><EFBFBD><EFBFBD> 277 1 s_pwm.currpwm[i]=20001ul; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD>dz<EFBFBD><C7B3><EFBFBD><EFBFBD>⣬<EFBFBD><E2A3AC><EFBFBD><EFBFBD>
278 1 } 278 1 }
@@ -382,7 +382,7 @@ line level source
335 3 Close_Light(i); 335 3 Close_Light(i);
336 3 } 336 3 }
337 2 else 337 2 else
C51 COMPILER V9.01 PWM_CONTROL 12/15/2025 20:45:04 PAGE 7 C51 COMPILER V9.01 PWM_CONTROL 12/16/2025 16:53:47 PAGE 7
338 2 { 338 2 {
339 3 PWM_write(i, s_pwm.currpwm[i]); 339 3 PWM_write(i, s_pwm.currpwm[i]);

6
Listings/timer.lst
View File

@@ -1,4 +1,4 @@
C51 COMPILER V9.01 TIMER 12/15/2025 20:45:04 PAGE 1 C51 COMPILER V9.01 TIMER 12/16/2025 16:53:47 PAGE 1
C51 COMPILER V9.01, COMPILATION OF MODULE TIMER C51 COMPILER V9.01, COMPILATION OF MODULE TIMER
@@ -62,7 +62,7 @@ line level source
52 //======================================================================== 52 //========================================================================
53 // <20><><EFBFBD><EFBFBD>: u8 Timer_Inilize(u8 TIM, TIM_InitTypeDef *TIMx) 53 // <20><><EFBFBD><EFBFBD>: u8 Timer_Inilize(u8 TIM, TIM_InitTypeDef *TIMx)
54 // <20><><EFBFBD><EFBFBD>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>. 54 // <20><><EFBFBD><EFBFBD>: <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
C51 COMPILER V9.01 TIMER 12/15/2025 20:45:04 PAGE 2 C51 COMPILER V9.01 TIMER 12/16/2025 16:53:47 PAGE 2
55 // <20><><EFBFBD><EFBFBD>: TIMx: <20>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD>,<2C><><EFBFBD>ο<EFBFBD>timer.h<><68><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>. 55 // <20><><EFBFBD><EFBFBD>: TIMx: <20>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD>,<2C><><EFBFBD>ο<EFBFBD>timer.h<><68><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD>.
56 // <20><><EFBFBD><EFBFBD>: <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>0, <20>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1,<2C><><EFBFBD>󷵻<EFBFBD>2. 56 // <20><><EFBFBD><EFBFBD>: <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>0, <20>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1,<2C><><EFBFBD>󷵻<EFBFBD>2.
@@ -126,7 +126,7 @@ line level source
112 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_12T) Timer2_12T(); //12T 112 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_12T) Timer2_12T(); //12T
113 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_1T) Timer2_1T(); //1T 113 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_1T) Timer2_1T(); //1T
114 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_Ext) Timer2_AsCounter(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ 114 2 if(TIMx->TIM_ClkSource == TIM_CLOCK_Ext) Timer2_AsCounter(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ
C51 COMPILER V9.01 TIMER 12/15/2025 20:45:04 PAGE 3 C51 COMPILER V9.01 TIMER 12/16/2025 16:53:47 PAGE 3
115 2 else Timer2_AsTimer(); //<2F><>ʱ 115 2 else Timer2_AsTimer(); //<2F><>ʱ
116 2 if(TIMx->TIM_ClkOut == ENABLE) Timer2_CLKO_Enable(); //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> 116 2 if(TIMx->TIM_ClkOut == ENABLE) Timer2_CLKO_Enable(); //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>

BIN
Objects/BLV_C12_Dimm_V19
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Binary file not shown.

35
Readme.md
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@@ -10,6 +10,41 @@
#### 2025-12-16 修改人：曹聪 类型：发布文件
经测试，暂未发现问题；2025-12-15的问题已解决
发布文件：BLV_C12_Dimm_V19.hex
```C
/*
常用串口测试命令 如下：
00 01 03 01 07 D3 20 //查询当前状态
00 02 03 01 07 D2 20 //查询当前状态
00 01 03 01 16 DE 21 FF 0F 47 50 00 00 50 00 50 00 50 00 50 00 00 //设置调光百分比
00 07 03 01 16 88 21 FF 0F 47 50 00 00 50 00 50 00 50 00 50 00 50 //设置调光百分比
00 02 03 01 0C BA 22 FF 0F 01 00 02 //循环调光 递减 步进值为2
00 03 03 01 0C B8 22 FF 0F 01 01 02 //循环调光 递减 步进值为2
00 04 03 01 0C B6 22 FF 0F 01 02 02 //循环调光 递减 步进值为2
00 05 03 01 0C B6 22 FF 0F 02 00 02 //停止调光
00 06 03 01 0C B8 22 FF 0F 00 00 01 //循环调光到顶端 递减 步进值为1
00 07 03 01 0C B6 22 FF 0F 00 01 01 //循环调光到顶端 递增 步进值为1
00 08 03 01 0C B2 22 FF 0F 00 02 03 //循环调光到顶端 取反 步进值为3
00 03 03 01 15 99 24 FF 0F 02 02 02 02 02 02 02 02 02 02 02 02 //设置开关状态为 翻转
00 04 03 01 15 A4 24 FF 0F 01 01 01 01 01 01 01 01 01 01 01 01 //设置开关状态为开
00 05 03 01 15 AF 24 FF 0F 00 00 00 00 00 00 00 00 00 00 00 00 //设置开关状态为关
00 02 03 01 07 CC 26 //查询软件版本号
*/
```
#### 2025-12-15 修改人：曹聪 类型：解决BUG #### 2025-12-15 修改人：曹聪 类型：解决BUG
​ 问题描述：调光时间一样的情况下，调光亮与调光灭的实际调光时间不一致 ​ 问题描述：调光时间一样的情况下，调光亮与调光灭的实际调光时间不一致

1
UART_Set.c
View File

@@ -13,7 +13,6 @@ S_recv s_recv;
u8 debug = 0x00; u8 debug = 0x00;
/* /*
<EFBFBD>жϽ<EFBFBD><EFBFBD>յ<EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD>Ϸ<EFBFBD> <EFBFBD>жϽ<EFBFBD><EFBFBD>յ<EFBFBD>ָ<EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD>Ϸ<EFBFBD>
*/ */

76
light_V19.uvgui.cc
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