新增：串口通讯避障功能
1、Launcher中的串口只使用串口0(调试串口)、串口2(主动RS485端口)；串口1与串口3不使用，且不初始化。将串口通讯缓冲区修改为1100Byte。 目的：CH564由于将Launcher代码搬运到RAM中运行，因此可使用的变量大小只有32Kbyte。不使用的串口将不初始化，同时使用的通讯缓冲区将节约出来，否则RAM空间不够使用。 2、串口2 - 增加RS485使能，同时通讯增加避障功能。
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|
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|
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|
||||||
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x14000_202601141626.bin
Normal file
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x14000_202601141626.bin
Normal file
Binary file not shown.
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x14000_202601141932.bin
Normal file
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x14000_202601141932.bin
Normal file
Binary file not shown.
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x28000_202601141728.bin
Normal file
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x28000_202601141728.bin
Normal file
Binary file not shown.
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x68000_202601141626.bin
Normal file
BIN
BLV_Launcher启动文件/合并后的文件/WCH_Test0x68000_202601141626.bin
Normal file
Binary file not shown.
899
BLV_Launcher启动文件/合并后的文件/WCH_Test_0x28000_202601121454.hex
Normal file
899
BLV_Launcher启动文件/合并后的文件/WCH_Test_0x28000_202601121454.hex
Normal file
@@ -0,0 +1,899 @@
|
|||||||
|
:020000040000FA
|
||||||
|
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|
||||||
|
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||||||
|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||||
|
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|
||||||
|
:10AE9000EEFEFFFFFFFFFFFFFFFFFFFFFF7FBFDFB4
|
||||||
|
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|
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|
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|
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|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
:04AF00000403090439
|
||||||
|
:00000001FF
|
||||||
901
BLV_Launcher启动文件/合并后的文件/WCH_Test_202601121454.hex
Normal file
901
BLV_Launcher启动文件/合并后的文件/WCH_Test_202601121454.hex
Normal file
@@ -0,0 +1,901 @@
|
|||||||
|
:020000040000FA
|
||||||
|
:100000006F00300B00000000010001000100010042
|
||||||
|
:1000100001000100010001000100010001000100D8
|
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|
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|
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|
:10003000B003B70740404111238D070037B90300D3
|
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|
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|
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|
:100050006376F900054541016F005004230D34011A
|
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|
:100060006537230C44014D371C2C793F1C2C93F42D
|
||||||
|
:10007000F70F593F93F71400230D040089C7B247C7
|
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|
:1000800085073EC6E9B70145F9B7EF02E07D2A844E
|
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|
:10009000AE84713F85472A896305F50413DA0401AC
|
||||||
|
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|
||||||
|
:1000B000F90F93F4F40F6306F400930780046315BB
|
||||||
|
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|
||||||
|
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|
||||||
|
:1000E00025374A856F00807B370440400D4B230D38
|
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|
:1000F0006401193F99471CAC013F230D04002937C7
|
||||||
|
:10010000230D6401D9B7EF02C0770547AA87638D35
|
||||||
|
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|
||||||
|
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|
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|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
:100200004DB7EF026066AE84AA852D453284B709EA
|
||||||
|
:100210004040A53D83C789012A89FD3383C78901F1
|
||||||
|
:10022000A294DD33631594004A856F00206783C76D
|
||||||
|
:1002300089010504A30FF4FEC13BEDB7EF02C062D4
|
||||||
|
:10024000AE84AA85130580043284B7094040353D49
|
||||||
|
:1002500083C789012A894D3B83C78901A2946D33E5
|
||||||
|
:1002600083C789010504A30FF4FE793BE31A94FECA
|
||||||
|
:100270004A852DA5EF02605E4111856713141500B4
|
||||||
|
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|
||||||
|
:100290001A003EC6540001493306AA409C42335717
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
:10036000F5B7B70700201307A0052380E7008280B8
|
||||||
|
:10037000B7070020238007008280EF0280504111E0
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
:10044000B70600209CA0A380E600D536418D41016F
|
||||||
|
:1004500099A9B707002003C707009307A0056316F3
|
||||||
|
:10046000F706EF02604041118564700091451385E5
|
||||||
|
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|
||||||
|
:1004800098866310F7041C87639DE7029887631AB8
|
||||||
|
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|
||||||
|
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|
||||||
|
:1004B0007C00A6979C238504238CF900B136E39930
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
:1004F00040408D473CAC093E9307B0FA1CAC29360E
|
||||||
|
:10050000230D04004DA6EF02C037370900208347B2
|
||||||
|
:100510001900AE8401112A84B2859DCB834719004E
|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
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|
||||||
|
:1006B0009307A0051145631FF7002285653E2A8434
|
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:10A930000001B3B7F600B307F040E19BE10733D85D
|
||||||
|
:10A94000F600170700001307274642971823130E37
|
||||||
|
:10A9500000023E973308EE406317EE1663E4B6003C
|
||||||
|
:10A96000636AC500B308C540B386D54033331501CB
|
||||||
|
:10A970003383664046859A85828059CAC167637E63
|
||||||
|
:10A98000F62413370610134717000E07B356E600D8
|
||||||
|
:10A990009707000093874741B6979C231303000253
|
||||||
|
:10A9A000BA97B306F3406314F3083387C5401353D3
|
||||||
|
:10A9B000060142064182B355670293D708013377F7
|
||||||
|
:10A9C0006702B385C5024207D98F63F8B700C29703
|
||||||
|
:10A9D00063E5070163F3B700C2978D8F33D7670232
|
||||||
|
:10A9E000C20893D80801B3F767023307C70213956B
|
||||||
|
:10A9F000070133E5A800E36BE5F0198D3355D50069
|
||||||
|
:10AA0000814582809337061093C717008E0751B592
|
||||||
|
:10AA100081469707000093872739B6979C23014703
|
||||||
|
:10AA200013030002BA97B306F340E300F3F83318B8
|
||||||
|
:10AA3000D60033DEF50013530801B35E6E02131621
|
||||||
|
:10AA40000801B395D5003357F50041824D8F9357D8
|
||||||
|
:10AA50000701B318D500337E6E02B385CE02420ED5
|
||||||
|
:10AA6000B3E7C70163F8B700C29763E5070163F373
|
||||||
|
:10AA7000B700C2978D8FB3D5670242074183B3F702
|
||||||
|
:10AA80006702B385C502C2075D8F6378B70042973E
|
||||||
|
:10AA9000636507016373B70042970D8F29BF93B7B2
|
||||||
|
:10AAA000061093C717008E0733D8F600170700006B
|
||||||
|
:10AAB0001307872F42971823130E00023E9733087F
|
||||||
|
:10AAC000EE40E30DEEE8B3960601B358E600B3E8B6
|
||||||
|
:10AAD000D80033DEE50013DF0801B357EE03939E81
|
||||||
|
:10AAE000080193DE0E01B356E50033130501B3955B
|
||||||
|
:10AAF0000501D58D93D6050133160601337EEE038D
|
||||||
|
:10AB00003385FE02420EB3E6C60163FBA600C6967D
|
||||||
|
:10AB1000138EF7FF63ED160D63FBA60CF917C696AF
|
||||||
|
:10AB2000898E33D5E603C205C181B3F6E603B38E41
|
||||||
|
:10AB3000AE02C206D58D63FBD501C6959306F5FF1F
|
||||||
|
:10AB400063E5150B63F3D50B7915C695939607014D
|
||||||
|
:10AB5000C162C98E1385F2FF33FEA600935F060122
|
||||||
|
:10AB6000C182718D330FAE02B385D5413385A60204
|
||||||
|
:10AB700093570F01330EFE032A9EF297B386F60316
|
||||||
|
:10AB800063F3A7009696C16EFD1E33F5D70113DE61
|
||||||
|
:10AB900007014205337FDF01B307DE007A9563E5E5
|
||||||
|
:10ABA000F5026381F5023305A3403333A3009D8D85
|
||||||
|
:10ABB000B38565403397E50033550501598DB3D50D
|
||||||
|
:10ABC00005018280E371A3FE3306C5403335C5001D
|
||||||
|
:10ABD000AA98B38717413285F9B7B7070001637C9C
|
||||||
|
:10ABE000F60093560601414765B3368585B7F2876F
|
||||||
|
:10ABF00005BFC297F5B993568601614751BB000066
|
||||||
|
:10AC0000626F6F74206D6570633A25780A000000EA
|
||||||
|
:10AC1000626F6F74206D63617573653A25780A0001
|
||||||
|
:10AC2000626F6F74206D7476616C3A25780A00004B
|
||||||
|
:10AC30005C100020500E0020AE0E00200A0F0020F5
|
||||||
|
:10AC4000AE0E0020180E00203A0C0020AE0E0020A0
|
||||||
|
:10AC5000260E00203C0E002056100020E60C00209E
|
||||||
|
:10AC60005C0C00206C0C0020480D0020700D0020B2
|
||||||
|
:10AC7000700D0020960D0020A00D00204A756D700B
|
||||||
|
:10AC8000204150500D00000053797374656D436C82
|
||||||
|
:10AC90006B3A25640D0A00004368697049443A25FF
|
||||||
|
:10ACA0003038780D0A0000004941500D00000000C6
|
||||||
|
:10ACB0000A060002FFFFFF400100000016033000FB
|
||||||
|
:10ACC00031003200330034003500360037003800E0
|
||||||
|
:10ACD00039000000260357004300480020005500BB
|
||||||
|
:10ACE0005300420032002E00300020004400450096
|
||||||
|
:10ACF0005600490043004500200000000E03770085
|
||||||
|
:10AD0000630068002E0063006E000000090220004E
|
||||||
|
:10AD100001010080320904000002FF805500070590
|
||||||
|
:10AD200082024000000705020240000009022000E4
|
||||||
|
:10AD300001010080320904000002FF805500070570
|
||||||
|
:10AD400082024000000705020240000012011001CB
|
||||||
|
:10AD5000FF8055404843E05500010000000100001D
|
||||||
|
:10AD600086190020AA190020CE190020FA19002007
|
||||||
|
:10AD7000E41900203A1A00205E1A0020821A0020EE
|
||||||
|
:10AD8000AE1A0020981A0020EE1A0020121B002094
|
||||||
|
:10AD9000361B0020621B00204C1B0020286E756CA7
|
||||||
|
:10ADA0006C290000000102020303030304040404ED
|
||||||
|
:10ADB0000404040405050505050505050505050547
|
||||||
|
:10ADC0000505050506060606060606060606060627
|
||||||
|
:10ADD0000606060606060606060606060606060613
|
||||||
|
:10ADE00006060606070707070707070707070707F7
|
||||||
|
:10ADF00007070707070707070707070707070707E3
|
||||||
|
:10AE000007070707070707070707070707070707D2
|
||||||
|
:10AE100007070707070707070707070707070707C2
|
||||||
|
:10AE200007070707080808080808080808080808A6
|
||||||
|
:10AE30000808080808080808080808080808080892
|
||||||
|
:10AE40000808080808080808080808080808080882
|
||||||
|
:10AE50000808080808080808080808080808080872
|
||||||
|
:10AE60000808080808080808080808080808080862
|
||||||
|
:10AE70000808080808080808080808080808080852
|
||||||
|
:10AE80000808080808080808080808080808080842
|
||||||
|
:10AE90000808080808080808080808080808080832
|
||||||
|
:10AEA00008080808000000000000000000AAAAAA84
|
||||||
|
:10AEB000AAAAAAAAAAEEEEEEEEEEEEEEEEFEFFFFD4
|
||||||
|
:10AEC000FFFFFFFFFFFFFFFFFF7FBFDFEFF7FBFD90
|
||||||
|
:10AED000FC7EBFDFEFF7FBFD7E00000009070000EE
|
||||||
|
:10AEE0000000000000000000000000000000000062
|
||||||
|
:10AEF0000000000000000000000000000907000042
|
||||||
|
:10AF00000000000000000000000000000000000041
|
||||||
|
:10AF10000000000000000000000000000010000021
|
||||||
|
:10AF200000100000000E27070000000004030904C1
|
||||||
|
:00000001FF
|
||||||
BIN
BLV_Launcher启动文件/测试APP文件/RCU_C1P_Module.bin
Normal file
BIN
BLV_Launcher启动文件/测试APP文件/RCU_C1P_Module.bin
Normal file
Binary file not shown.
BIN
BLV_Launcher启动文件/测试APP文件/RCU_C1P_Module_2.bin
Normal file
BIN
BLV_Launcher启动文件/测试APP文件/RCU_C1P_Module_2.bin
Normal file
Binary file not shown.
BIN
BLV_Launcher启动文件/测试Launcher文件/BLV_C1P_0x68000_202601191039.bin
Normal file
BIN
BLV_Launcher启动文件/测试Launcher文件/BLV_C1P_0x68000_202601191039.bin
Normal file
Binary file not shown.
@@ -38,9 +38,9 @@ MEMORY
|
|||||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
||||||
*/
|
*/
|
||||||
|
|
||||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 80K
|
FLASH (rx) : ORIGIN = 0x20000000 , LENGTH = 32K
|
||||||
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 448K - 80K
|
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 448K - 80K
|
||||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
RAM (xrw) : ORIGIN = 0x20008000 , LENGTH = 32K
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -57,7 +57,7 @@ SECTIONS
|
|||||||
|
|
||||||
.vector :
|
.vector :
|
||||||
{
|
{
|
||||||
*(.vector);
|
KEEP(*(.vector));
|
||||||
_endof_Vector = .;
|
_endof_Vector = .;
|
||||||
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
|
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
@@ -80,6 +80,7 @@ SECTIONS
|
|||||||
*(.rodata)
|
*(.rodata)
|
||||||
*(.rodata*)
|
*(.rodata*)
|
||||||
*(.gnu.linkonce.t.*)
|
*(.gnu.linkonce.t.*)
|
||||||
|
*(.project_info)
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
} >FLASH AT>FLASH
|
} >FLASH AT>FLASH
|
||||||
|
|
||||||
|
|||||||
@@ -1,9 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* launcher_fun.c
|
* launcher_fun.c
|
||||||
* Code Flash<73>ܿռ<DCBF> 0x00000000 ~ 0x00070000 448KB
|
|
||||||
* Launcher<65><72><EFBFBD><EFBFBD> 0x00000000 ~ 0x00003FFF 16KB
|
|
||||||
* APP<50><50><EFBFBD><EFBFBD> 0x00004000 ~ 0x0006FFFF 432KB
|
|
||||||
* Data Flash<73>ܿռ<DCBF> 0x00070000 ~ 0x00077FFF 32KB
|
|
||||||
*
|
*
|
||||||
* Created on: Jul 28, 2025
|
* Created on: Jul 28, 2025
|
||||||
* Author: cc
|
* Author: cc
|
||||||
@@ -11,13 +7,15 @@
|
|||||||
#include "includes.h"
|
#include "includes.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
G_SYS_FEATURE_T g_app_feature;
|
G_SYS_FEATURE_T g_app_feature; //SPI Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
G_SYS_FEATURE_T g_mcu_app_feature;
|
G_SYS_FEATURE_T g_mcu_app_feature; //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
UPDATE_RECORD_T g_update_recode; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
|
||||||
|
|
||||||
uint8_t g_jump_flag = 0; //<2F><>ת<EFBFBD><EFBFBD>־λ
|
G_SYS_FEATURE_T g_update_flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
UPDATE_RECORD_T g_update_recode; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||||
|
|
||||||
|
uint8_t g_jump_flag = 0; //<2F><>ת<EFBFBD><D7AA>־λ
|
||||||
uint32_t g_Boot_Tick = 0; //Bootʱ<74><CAB1><EFBFBD><EFBFBD> <20><>λ<EFBFBD><CEBB>ms
|
uint32_t g_Boot_Tick = 0; //Bootʱ<74><CAB1><EFBFBD><EFBFBD> <20><>λ<EFBFBD><CEBB>ms
|
||||||
uint32_t g_Boot_Time= 0; //Bootʱ<74><CAB1> <20><>λ<EFBFBD><CEBB>ms
|
uint32_t g_Boot_Time= 30000; //Bootʱ<74><CAB1> <20><>λ<EFBFBD><CEBB>ms
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Boot_Time_Refresh
|
* Function Name : Boot_Time_Refresh
|
||||||
@@ -40,21 +38,6 @@ void Boot_Timeout_Task(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*********************************************************************
|
|
||||||
* @fn Jump_APP
|
|
||||||
* @brief <20><>ת<EFBFBD><D7AA>APP<50><50><EFBFBD><EFBFBD>
|
|
||||||
* @param addr - APP<50><50>ʼ<EFBFBD><CABC>ַ
|
|
||||||
* @return none
|
|
||||||
*/
|
|
||||||
void Jump_APP(uint32_t addr)
|
|
||||||
{
|
|
||||||
// __asm volatile("jr %0": :"r"(addr));
|
|
||||||
__asm("li a6, 0x0E000");
|
|
||||||
__asm("jr a6");
|
|
||||||
|
|
||||||
while(1);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : SPI_FLASH_APP_Data_Erase
|
* Function Name : SPI_FLASH_APP_Data_Erase
|
||||||
* Description : <20>ⲿFlash APP<50>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD>
|
* Description : <20>ⲿFlash APP<50>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -64,6 +47,8 @@ void SPI_FLASH_APP_Data_Erase(void)
|
|||||||
{
|
{
|
||||||
for(uint8_t i = 0;i < 7;i++)
|
for(uint8_t i = 0;i < 7;i++)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
Flash_Erase_Block(i);
|
Flash_Erase_Block(i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -77,6 +62,8 @@ void SPI_FLASH_Logic_File_Erase(void)
|
|||||||
{
|
{
|
||||||
for(uint8_t i = 7;i < 16;i++)
|
for(uint8_t i = 7;i < 16;i++)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
Flash_Erase_Block(i);
|
Flash_Erase_Block(i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -130,10 +117,9 @@ void Boot_Comm_FillReplyPack(UART_t *g_rev)
|
|||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"ACKBuff ",g_rev->ackBuffer,data_len);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"ACKBuff ",g_rev->ackBuffer,data_len);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
g_rev->send_data_cf(g_rev->ackBuffer,data_len);
|
|
||||||
|
|
||||||
// memset(g_rev->ackBuffer,0,USART_BUFFER_SIZE);
|
Uartx_Add_Data_To_SendBuff(g_rev,g_rev->ackBuffer,data_len,0x01,500,50);
|
||||||
// g_rev->ackLen = 0x00;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
||||||
@@ -266,9 +252,9 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
|||||||
|
|
||||||
if(g_rev->deal_buff[BCOMM_FMT_PARAM] == 0x02){
|
if(g_rev->deal_buff[BCOMM_FMT_PARAM] == 0x02){
|
||||||
/*<2A><>ת<EFBFBD><D7AA>APP<50><50><EFBFBD><EFBFBD>*/
|
/*<2A><>ת<EFBFBD><D7AA>APP<50><50><EFBFBD><EFBFBD>*/
|
||||||
g_Boot_Time = 200; //<2F><>Boot<6F><74>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ת
|
g_Boot_Time = 200;
|
||||||
g_Boot_Tick = SysTick_1ms;
|
g_Boot_Tick = SysTick_1ms;
|
||||||
|
g_jump_flag = 0x01; //ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ - ȫ<>ָ<EFBFBD>λ
|
||||||
g_rev->ackBuffer[BCOMM_FMT_PARAM] = BCOMM_CMD_ReplySUCC;
|
g_rev->ackBuffer[BCOMM_FMT_PARAM] = BCOMM_CMD_ReplySUCC;
|
||||||
}else {
|
}else {
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
@@ -649,6 +635,8 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
|||||||
|
|
||||||
for(uint32_t crc_addr = g_app_feature.app_start_addr; crc_addr < g_app_feature.app_end_addr;crc_addr += g_app_feature.app_crc_size)
|
for(uint32_t crc_addr = g_app_feature.app_start_addr; crc_addr < g_app_feature.app_end_addr;crc_addr += g_app_feature.app_crc_size)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if( g_app_feature.app_end_addr - crc_addr >= g_app_feature.app_crc_size) {
|
if( g_app_feature.app_end_addr - crc_addr >= g_app_feature.app_crc_size) {
|
||||||
crc_data_len = g_app_feature.app_crc_size;
|
crc_data_len = g_app_feature.app_crc_size;
|
||||||
}else {
|
}else {
|
||||||
@@ -682,6 +670,7 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
|||||||
g_rev->ackBuffer[BCOMM_FMT_PARAM + 3 + crcResultFlag*4] = ((crc_addr >> 8) & 0xFF);
|
g_rev->ackBuffer[BCOMM_FMT_PARAM + 3 + crcResultFlag*4] = ((crc_addr >> 8) & 0xFF);
|
||||||
g_rev->ackBuffer[BCOMM_FMT_PARAM + 2 + crcResultFlag*4] = (crc_addr & 0xFF);
|
g_rev->ackBuffer[BCOMM_FMT_PARAM + 2 + crcResultFlag*4] = (crc_addr & 0xFF);
|
||||||
|
|
||||||
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"Flash Data:",g_read_buff,crc_data_len);
|
||||||
DBG_SYS_Printf("App CRC Fail ADDR:%X %X-%X",crc_addr,temp_val,temp_val_2);
|
DBG_SYS_Printf("App CRC Fail ADDR:%X %X-%X",crc_addr,temp_val,temp_val_2);
|
||||||
|
|
||||||
crcResultFlag++;
|
crcResultFlag++;
|
||||||
@@ -717,7 +706,6 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
|
|||||||
g_rev->ackLen = 1;
|
g_rev->ackLen = 1;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*<2A>ظ<EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>*/
|
/*<2A>ظ<EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>*/
|
||||||
@@ -745,6 +733,7 @@ uint8_t Read_APP_Feature(void)
|
|||||||
uint16_t crcVal = 0;
|
uint16_t crcVal = 0;
|
||||||
uint8_t crcValH = 0, crcValL = 0;
|
uint8_t crcValH = 0, crcValL = 0;
|
||||||
uint32_t crc_data_len = 0;
|
uint32_t crc_data_len = 0;
|
||||||
|
uint8_t update_flag = 0;
|
||||||
|
|
||||||
memset(&g_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
memset(&g_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
||||||
memset(&g_mcu_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
memset(&g_mcu_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
||||||
@@ -824,7 +813,69 @@ uint8_t Read_APP_Feature(void)
|
|||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*<2A>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡMCU Flash<EFBFBD><EFBFBD>APP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>ͬʱ<EFBFBD><EFBFBD>֤APP<EFBFBD>ĺϷ<EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>д<EFBFBD><EFBFBD>Flash <EFBFBD><EFBFBD>APP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ա<EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>¹̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
rev = SPIFLASH_Read_APP_Update_Flag_Info(&g_update_flag);
|
||||||
|
if(rev == 0x00)
|
||||||
|
{
|
||||||
|
/*<2A><>ȡ<EFBFBD><C8A1><EFBFBD>±<EFBFBD>־λ<D6BE>ɹ<EFBFBD>*/
|
||||||
|
if( (g_update_flag.app_start_addr != g_app_feature.app_start_addr)
|
||||||
|
|| (g_update_flag.app_end_addr != g_app_feature.app_end_addr)
|
||||||
|
|| (g_update_flag.app_crc_size != g_app_feature.app_crc_size)
|
||||||
|
|| (g_update_flag.app_crc_len != g_app_feature.app_crc_len)
|
||||||
|
)
|
||||||
|
{
|
||||||
|
update_flag = 0x01;
|
||||||
|
}
|
||||||
|
for(uint32_t i = 0;i < APP_Feature_CRC_Size; i++)
|
||||||
|
{
|
||||||
|
if( g_update_flag.app_crc[i] != g_app_feature.app_crc[i] )
|
||||||
|
{
|
||||||
|
update_flag = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if( update_flag == 0x01 )
|
||||||
|
{
|
||||||
|
/*˵<><CBB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ǹ<EFBFBD><C7B8>µ<EFBFBD>APP<50><50>
|
||||||
|
* <20><>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD>Ϊ0x05<30><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>ΪAPP <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* ÿд<C3BF><D0B4>һ<EFBFBD>Σ<EFBFBD>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>1<EFBFBD><31>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD>Ϊ0<CEAA><30><EFBFBD>㲻<EFBFBD><E3B2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* */
|
||||||
|
g_update_flag.app_flag = 0x05;
|
||||||
|
}else {
|
||||||
|
/**/
|
||||||
|
if( (g_update_flag.app_flag != 0x00) && (g_update_flag.app_flag <= 0x05) )
|
||||||
|
{
|
||||||
|
g_update_flag.app_flag--;
|
||||||
|
update_flag = 0x02;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}else {
|
||||||
|
/*<2A><>ȡ<EFBFBD><C8A1><EFBFBD>±<EFBFBD>־λʧ<CEBB><CAA7> - Ҳ<><D2B2>Ϊ<EFBFBD><CEAA><EFBFBD>µĹ̼<C4B9>*/
|
||||||
|
update_flag = 0x01;
|
||||||
|
g_update_flag.app_flag = 0x05;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( update_flag == 0x01 )
|
||||||
|
{
|
||||||
|
g_update_flag.app_start_addr = g_app_feature.app_start_addr;
|
||||||
|
g_update_flag.app_end_addr = g_app_feature.app_end_addr;
|
||||||
|
g_update_flag.app_crc_size = g_app_feature.app_crc_size;
|
||||||
|
g_update_flag.app_crc_len = g_app_feature.app_crc_len;
|
||||||
|
for(uint32_t i = 0;i < APP_Feature_CRC_Size; i++)
|
||||||
|
{
|
||||||
|
g_update_flag.app_crc[i] = g_app_feature.app_crc[i];
|
||||||
|
}
|
||||||
|
|
||||||
|
DBG_SYS_Printf("--<2D><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>APP<50>̼<EFBFBD>--");
|
||||||
|
}else if( update_flag == 0x02 ){
|
||||||
|
DBG_SYS_Printf("--APP<50>̼<EFBFBD><CCBC><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d --",g_update_flag.app_flag);
|
||||||
|
}else{
|
||||||
|
DBG_SYS_Printf("--APP<50>̼<EFBFBD><CCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%x--",g_update_flag.app_flag);
|
||||||
|
}
|
||||||
|
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡMCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>ͬʱ<CDAC><CAB1>֤APP<50>ĺϷ<C4BA><CFB7><EFBFBD>*/
|
||||||
rev = Read_APP_Feature_Info(0x01,&g_mcu_app_feature);
|
rev = Read_APP_Feature_Info(0x01,&g_mcu_app_feature);
|
||||||
if(rev == 0x00)
|
if(rev == 0x00)
|
||||||
{
|
{
|
||||||
@@ -878,35 +929,71 @@ uint8_t Read_APP_Feature(void)
|
|||||||
DBG_SYS_Printf("APP ERROR! \r\n");
|
DBG_SYS_Printf("APP ERROR! \r\n");
|
||||||
|
|
||||||
LOG_Launcher_APP_Check_Record(0x07);
|
LOG_Launcher_APP_Check_Record(0x07);
|
||||||
return 2; //У<><D0A3>ʧ<EFBFBD><CAA7>
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}else{
|
}else{
|
||||||
LOG_Launcher_APP_Check_Record(0x08);
|
LOG_Launcher_APP_Check_Record(0x08);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
DBG_SYS_Printf("MCU Feature ERROR! \r\n");
|
DBG_SYS_Printf("MCU Feature ERROR! \r\n");
|
||||||
LOG_Launcher_APP_Check_Record(0x09);
|
LOG_Launcher_APP_Check_Record(0x09);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*<2A>ж<EFBFBD>MCU Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>ⲿSPI Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>һ<EFBFBD><D2BB>*/
|
/*<2A>ж<EFBFBD>MCU Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>ⲿSPI Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>һ<EFBFBD><D2BB>*/
|
||||||
if(g_app_feature.app_crc_len != g_mcu_app_feature.app_crc_len) {
|
if(g_app_feature.app_crc_len != g_mcu_app_feature.app_crc_len) {
|
||||||
DBG_SYS_Printf("app_crc_len different!\r\n");
|
DBG_SYS_Printf("app_crc_len different!\r\n");
|
||||||
LOG_Launcher_APP_Check_Record(0x02);
|
LOG_Launcher_APP_Check_Record(0x02);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if(g_app_feature.app_start_addr != g_mcu_app_feature.app_start_addr) {
|
if(g_app_feature.app_start_addr != g_mcu_app_feature.app_start_addr) {
|
||||||
DBG_SYS_Printf("app_start_addr different!\r\n");
|
DBG_SYS_Printf("app_start_addr different!\r\n");
|
||||||
LOG_Launcher_APP_Check_Record(0x02);
|
LOG_Launcher_APP_Check_Record(0x02);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if(g_app_feature.app_end_addr != g_mcu_app_feature.app_end_addr) {
|
if(g_app_feature.app_end_addr != g_mcu_app_feature.app_end_addr) {
|
||||||
DBG_SYS_Printf("app_end_addr different!\r\n");
|
DBG_SYS_Printf("app_end_addr different!\r\n");
|
||||||
LOG_Launcher_APP_Check_Record(0x02);
|
LOG_Launcher_APP_Check_Record(0x02);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for(uint16_t j = 0;j<g_app_feature.app_crc_len;j++)
|
for(uint16_t j = 0;j<g_app_feature.app_crc_len;j++)
|
||||||
@@ -914,10 +1001,26 @@ uint8_t Read_APP_Feature(void)
|
|||||||
if(g_mcu_app_feature.app_crc[j] != g_app_feature.app_crc[j])
|
if(g_mcu_app_feature.app_crc[j] != g_app_feature.app_crc[j])
|
||||||
{
|
{
|
||||||
LOG_Launcher_APP_Check_Record(0x02);
|
LOG_Launcher_APP_Check_Record(0x02);
|
||||||
return 2;
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
return 2; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
return 3; //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if(update_flag != 0x00)
|
||||||
|
{
|
||||||
|
/*<2A>ⲿ<EFBFBD>洢<EFBFBD><E6B4A2>APP <20><><EFBFBD>µı<C2B5>־λ<D6BE><CEBB><EFBFBD><EFBFBD>
|
||||||
|
* <20><>ʵMCU Flash<73><68><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* */
|
||||||
|
DBG_SYS_Printf("<EFBFBD>ⲿ<EFBFBD>洢<EFBFBD><EFBFBD>APP <20><><EFBFBD>µı<C2B5>־λ<D6BE><CEBB><EFBFBD><EFBFBD>!!!");
|
||||||
|
g_update_flag.app_flag = App_Procedure_Ready;
|
||||||
|
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
|
||||||
|
}
|
||||||
|
|
||||||
/*û<><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <><D7BC> <20><>תAPP*/
|
/*û<><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <><D7BC> <20><>תAPP*/
|
||||||
LOG_Launcher_APP_Check_Record(0x00);
|
LOG_Launcher_APP_Check_Record(0x00);
|
||||||
return 0x00;
|
return 0x00;
|
||||||
@@ -935,7 +1038,11 @@ uint8_t MCU_APP_Write(void)
|
|||||||
uint16_t crcVal = 0,crcNumIndex = 0;
|
uint16_t crcVal = 0,crcNumIndex = 0;
|
||||||
uint32_t crc_data_len = 0;
|
uint32_t crc_data_len = 0;
|
||||||
|
|
||||||
|
SPIFLASH_Read_Update_Recode(&g_update_recode); //<2F><>ȡAPPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
g_update_recode.mcuflash_fw_count++;
|
||||||
|
|
||||||
DBG_SYS_Printf("MCU Flash <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>");
|
DBG_SYS_Printf("MCU Flash <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>");
|
||||||
|
|
||||||
rev = MCU_APP_Flash_ALLErase(); //<2F>Ȳ<EFBFBD><C8B2><EFBFBD> ȫ<><C8AB>APP<50><50><EFBFBD><EFBFBD>
|
rev = MCU_APP_Flash_ALLErase(); //<2F>Ȳ<EFBFBD><C8B2><EFBFBD> ȫ<><C8AB>APP<50><50><EFBFBD><EFBFBD>
|
||||||
if(rev != 0) {
|
if(rev != 0) {
|
||||||
DBG_SYS_Printf("MCU Flash <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD> ʧ<><CAA7>");
|
DBG_SYS_Printf("MCU Flash <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD> ʧ<><CAA7>");
|
||||||
@@ -1021,7 +1128,7 @@ uint8_t MCU_APP_Write(void)
|
|||||||
memset(g_read_buff,0,sizeof(g_read_buff));
|
memset(g_read_buff,0,sizeof(g_read_buff));
|
||||||
|
|
||||||
rev = MCU_APP_Flash_Read(g_read_buff,crc_data_len,i);
|
rev = MCU_APP_Flash_Read(g_read_buff,crc_data_len,i);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "MCU Flash:", g_read_buff, crc_data_len);
|
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "MCU Flash:", g_read_buff, crc_data_len);
|
||||||
|
|
||||||
crcVal = CRC16_Check(g_read_buff, crc_data_len);
|
crcVal = CRC16_Check(g_read_buff, crc_data_len);
|
||||||
crcValH = crcVal >> 8;
|
crcValH = crcVal >> 8;
|
||||||
@@ -1032,7 +1139,7 @@ uint8_t MCU_APP_Write(void)
|
|||||||
if( ( g_mcu_app_feature.app_crc[crcNumIndex + 1] != crcValH ) || ( g_mcu_app_feature.app_crc[crcNumIndex] != crcValL ) )
|
if( ( g_mcu_app_feature.app_crc[crcNumIndex + 1] != crcValH ) || ( g_mcu_app_feature.app_crc[crcNumIndex] != crcValL ) )
|
||||||
{
|
{
|
||||||
DBG_SYS_Printf("Addr:%x app_crc:%x%x crcVal:%x ",i,g_mcu_app_feature.app_crc[crcNumIndex],g_mcu_app_feature.app_crc[1 + crcNumIndex],crcVal);
|
DBG_SYS_Printf("Addr:%x app_crc:%x%x crcVal:%x ",i,g_mcu_app_feature.app_crc[crcNumIndex],g_mcu_app_feature.app_crc[1 + crcNumIndex],crcVal);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "MCU Flash:", g_read_buff, crc_data_len);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "MCU Flash CRC Error:", g_read_buff, crc_data_len);
|
||||||
|
|
||||||
if(crc_data_len > 2048)
|
if(crc_data_len > 2048)
|
||||||
{
|
{
|
||||||
@@ -1051,12 +1158,23 @@ uint8_t MCU_APP_Write(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*д<><D0B4>ʧ<EFBFBD><CAA7> - ʧ<>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD>һ*/
|
||||||
|
g_update_recode.mcuflash_fw_fail++;
|
||||||
|
SPIFLASH_Write_Update_Recode(&g_update_recode);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
crcNumIndex += 2;
|
crcNumIndex += 2;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*д<><D0B4><EFBFBD>ɹ<EFBFBD> - <20>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ*/
|
||||||
|
g_update_recode.mcuflash_fw_succ++;
|
||||||
|
SPIFLASH_Write_Update_Recode(&g_update_recode);
|
||||||
|
|
||||||
|
/*APP<50><50><EFBFBD>±<EFBFBD>־λ - ״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
g_update_flag.app_flag = App_Procedure_Ready;
|
||||||
|
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
|
||||||
|
|
||||||
/*4<><34>У<EFBFBD><D0A3><EFBFBD>ɹ<EFBFBD>*/
|
/*4<><34>У<EFBFBD><D0A3><EFBFBD>ɹ<EFBFBD>*/
|
||||||
DBG_SYS_Printf("MCU APP Update Succ!!");
|
DBG_SYS_Printf("MCU APP Update Succ!!");
|
||||||
LOG_Launcher_Read_App_Record(0x00);
|
LOG_Launcher_Read_App_Record(0x00);
|
||||||
@@ -1090,12 +1208,10 @@ uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info)
|
|||||||
|
|
||||||
memcpy((uint8_t *)info,&g_flash_buff[EEPROM_Offset_Data],read_len);
|
memcpy((uint8_t *)info,&g_flash_buff[EEPROM_Offset_Data],read_len);
|
||||||
|
|
||||||
DBG_SYS_Printf("spiflash_fw_count:%d",g_mcu_dev.dev_addr);
|
DBG_SYS_Printf("mcu flash_fw_count:%d",info->mcuflash_fw_count);
|
||||||
DBG_SYS_Printf("spiflash_fw_succ:%d",g_mcu_dev.dev_type);
|
DBG_SYS_Printf("mcu flash_fw_succ:%d",info->mcuflash_fw_succ);
|
||||||
DBG_SYS_Printf("spiflash_fw_fail:%d",g_mcu_dev.dev_boot_ver);
|
DBG_SYS_Printf("mcu flash_fw_fail:%d",info->mcuflash_fw_fail);
|
||||||
DBG_SYS_Printf("EE DevAppVer:%d",g_mcu_dev.dev_app_ver);
|
|
||||||
DBG_SYS_Printf("EE DevNameLen:%d",g_mcu_dev.dev_name_len);
|
|
||||||
DBG_SYS_Printf("EE DevName:%s",g_mcu_dev.dev_name);
|
|
||||||
return 0x00; //<2F><>ȡ<EFBFBD>ɹ<EFBFBD>
|
return 0x00; //<2F><>ȡ<EFBFBD>ɹ<EFBFBD>
|
||||||
}else {
|
}else {
|
||||||
DBG_SYS_Printf("%s Check Error !",__func__);
|
DBG_SYS_Printf("%s Check Error !",__func__);
|
||||||
@@ -1107,9 +1223,19 @@ uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info)
|
|||||||
DBG_SYS_Printf("%s Flag Error !",__func__);
|
DBG_SYS_Printf("%s Flag Error !",__func__);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*<2A><>ȡʧ<C8A1><CAA7> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>*/
|
||||||
|
info->mcuflash_fw_count = 0x00;
|
||||||
|
info->mcuflash_fw_succ = 0x00;
|
||||||
|
info->mcuflash_fw_fail = 0x00;
|
||||||
|
|
||||||
return 0x01; //<2F><>ȡʧ<C8A1><CAA7>
|
return 0x01; //<2F><>ȡʧ<C8A1><CAA7>
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : SPIFLASH_Write_Update_Recode
|
||||||
|
* Description : SPI Flash д<><D0B4>APP<50><50><EFBFBD>¼<EFBFBD>¼
|
||||||
|
* Input :
|
||||||
|
*******************************************************************************/
|
||||||
uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info)
|
uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info)
|
||||||
{
|
{
|
||||||
uint16_t save_len = UPDATE_RECORD_INFO_Size;
|
uint16_t save_len = UPDATE_RECORD_INFO_Size;
|
||||||
@@ -1129,7 +1255,150 @@ uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info)
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Read_APP_Update_Flag_Info
|
||||||
|
* Description : <20><>ȡAPP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><E2B2BF>FLash<73><68>SRAM<41>У<EFBFBD>
|
||||||
|
* 1<><31><EFBFBD>ȶ<EFBFBD>ȡ<EFBFBD>ⲿFlash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿFlash<73>ж<EFBFBD>ȡʧ<C8A1>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ⲿSRAM<41>ж<EFBFBD>ȡ<EFBFBD><C8A1>
|
||||||
|
* 2<><32><EFBFBD>ⲿSRAMҲ<4D><D2B2>ȡʧ<C8A1><CAA7><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD>Ϊ֮ǰû<C7B0><C3BB>APP<50><50><EFBFBD>¼<EFBFBD>¼
|
||||||
|
* Para :
|
||||||
|
* flag_info - APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return <20><>
|
||||||
|
* 0x00 - <20><>ȡ<EFBFBD>ɹ<EFBFBD>
|
||||||
|
* 0x01 - <20><>ȡʧ<C8A1><CAA7>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t SPIFLASH_Read_APP_Update_Flag_Info(G_SYS_FEATURE_T *feature_info)
|
||||||
|
{
|
||||||
|
uint16_t crc_val = 0,crc_val2 = 0;
|
||||||
|
uint32_t temp_val = 0;
|
||||||
|
|
||||||
|
memset(g_read_buff,0,sizeof(g_read_buff));
|
||||||
|
|
||||||
|
Flash_Read(g_read_buff,APP_FEATURE_SIZE,SPIFLASH_UPDATE_FLAG_Addr);
|
||||||
|
|
||||||
|
crc_val = g_read_buff[1];
|
||||||
|
crc_val <<= 0x08;
|
||||||
|
crc_val |= g_read_buff[0];
|
||||||
|
|
||||||
|
crc_val2 = CRC16_Check(&g_read_buff[2],510);
|
||||||
|
DBG_SYS_Printf("%s Flash CRC: %x - %x",__func__,crc_val,crc_val2);
|
||||||
|
|
||||||
|
if(crc_val != crc_val2)
|
||||||
|
{
|
||||||
|
//У<><D0A3>ʧ<EFBFBD><CAA7><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD>Ϊ<EFBFBD><CEAA>ȡ<EFBFBD>ⲿSRAM
|
||||||
|
memset(g_read_buff,0,sizeof(g_read_buff));
|
||||||
|
SRAM_DMA_Read_Buff(g_read_buff, APP_FEATURE_SIZE, SRAM_APP_Write_Count_Addr);
|
||||||
|
|
||||||
|
crc_val = g_read_buff[1];
|
||||||
|
crc_val <<= 0x08;
|
||||||
|
crc_val |= g_read_buff[0];
|
||||||
|
|
||||||
|
crc_val2 = CRC16_Check(&g_read_buff[2],510);
|
||||||
|
DBG_SYS_Printf("%s SRAM CRC: %x - %x",__func__,crc_val,crc_val2);
|
||||||
|
|
||||||
|
if(crc_val != crc_val2)
|
||||||
|
{
|
||||||
|
return 0x01; //<2F><>ȡʧ<C8A1><CAA7>
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ͨ<EFBFBD><CDA8>*/
|
||||||
|
feature_info->app_flag = g_read_buff[Feature_AppFlag];
|
||||||
|
|
||||||
|
temp_val = g_read_buff[Feature_AppStart + 3];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppStart + 2];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppStart + 1];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppStart];
|
||||||
|
feature_info->app_start_addr = temp_val;
|
||||||
|
|
||||||
|
temp_val = g_read_buff[Feature_AppEnd + 3];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppEnd + 2];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppEnd + 1];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppEnd];
|
||||||
|
feature_info->app_end_addr = temp_val;
|
||||||
|
|
||||||
|
temp_val = g_read_buff[Feature_AppCrcSize + 1];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppCrcSize];
|
||||||
|
feature_info->app_crc_size = temp_val;
|
||||||
|
|
||||||
|
temp_val = g_read_buff[Feature_AppCrcLen + 1];
|
||||||
|
temp_val <<= 8;
|
||||||
|
temp_val |= g_read_buff[Feature_AppCrcLen];
|
||||||
|
feature_info->app_crc_len = temp_val;
|
||||||
|
|
||||||
|
memcpy(feature_info->app_crc,&g_read_buff[Feature_AppFlashCrc],APP_Feature_CRC_Size);
|
||||||
|
|
||||||
|
/*У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ*/
|
||||||
|
if( ( feature_info->app_start_addr < MCU_APP_Flash_Start_Addr ) || ( feature_info->app_start_addr > MCU_APP_Data_End_Addr ) ){
|
||||||
|
DBG_SYS_Printf("%s app_start_addr:0x%x Error",__func__, feature_info->app_start_addr);
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( ( feature_info->app_end_addr > MCU_APP_Data_End_Addr ) || ( feature_info->app_start_addr > feature_info->app_end_addr ) ){
|
||||||
|
DBG_SYS_Printf("%s app_end_addr:0x%x - 0x%x Error",__func__,feature_info->app_start_addr,feature_info->app_end_addr);
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
if( feature_info->app_crc_size != MCU_APP_Flash_PageSize ){
|
||||||
|
DBG_SYS_Printf("%s app_crc_size:%#x Error",__func__,feature_info->app_crc_size);
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0x00; //<2F><>ȡ<EFBFBD>ɹ<EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : SPIFLASH_Write_APP_Upate_Flag_Info
|
||||||
|
* Description : д<><D0B4>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ⲿ<EFBFBD><E2B2BF>FLash<73><68>SRAM<41><4D>
|
||||||
|
* Para :
|
||||||
|
* flag_info - APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return <20><>
|
||||||
|
* 0x00 - д<><D0B4><EFBFBD>ɹ<EFBFBD>
|
||||||
|
* 0x01 - д<><D0B4>ʧ<EFBFBD><CAA7>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t SPIFLASH_Write_APP_Upate_Flag_Info(G_SYS_FEATURE_T *flag_info)
|
||||||
|
{
|
||||||
|
memset(g_read_buff,0,sizeof(g_read_buff));
|
||||||
|
|
||||||
|
g_read_buff[Feature_AppFlag] = flag_info->app_flag;
|
||||||
|
|
||||||
|
g_read_buff[Feature_AppStart] = flag_info->app_start_addr & 0xFF;
|
||||||
|
g_read_buff[Feature_AppStart + 1] = ( flag_info->app_start_addr >> 8 ) & 0xFF;
|
||||||
|
g_read_buff[Feature_AppStart + 2] = ( flag_info->app_start_addr >> 16 ) & 0xFF;
|
||||||
|
g_read_buff[Feature_AppStart + 3] = ( flag_info->app_start_addr >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
g_read_buff[Feature_AppEnd] = flag_info->app_end_addr & 0xFF;
|
||||||
|
g_read_buff[Feature_AppEnd + 1] = ( flag_info->app_end_addr >> 8 ) & 0xFF;
|
||||||
|
g_read_buff[Feature_AppEnd + 2] = ( flag_info->app_end_addr >> 16 ) & 0xFF;
|
||||||
|
g_read_buff[Feature_AppEnd + 3] = ( flag_info->app_end_addr >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
g_read_buff[Feature_AppCrcSize] = flag_info->app_crc_size & 0xFF;
|
||||||
|
g_read_buff[Feature_AppCrcSize + 1] = ( flag_info->app_crc_size >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
g_read_buff[Feature_AppCrcLen] = flag_info->app_crc_len & 0xFF;
|
||||||
|
g_read_buff[Feature_AppCrcLen + 1] = ( flag_info->app_crc_len >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
memcpy(&g_read_buff[Feature_AppFlashCrc],flag_info->app_crc,APP_Feature_CRC_Size);
|
||||||
|
|
||||||
|
flag_info->crc_check = CRC16_Check(&g_read_buff[2], 510);
|
||||||
|
|
||||||
|
g_read_buff[Feature_Check] = flag_info->crc_check & 0xFF;
|
||||||
|
g_read_buff[Feature_Check + 1] = ( flag_info->crc_check >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
/* <20><>Flash<73><68>SRAM<41>ж<EFBFBD>д<EFBFBD><D0B4>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||||
|
Flash_Write(g_read_buff,APP_FEATURE_SIZE,SPIFLASH_UPDATE_FLAG_Addr);
|
||||||
|
SRAM_DMA_Write_Buff(g_read_buff, APP_FEATURE_SIZE, SRAM_APP_Write_Count_Addr);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -8,6 +8,7 @@
|
|||||||
#include <stddef.h>
|
#include <stddef.h>
|
||||||
#include <stdarg.h>
|
#include <stdarg.h>
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
volatile uint32_t SysTick_100us = 0;
|
volatile uint32_t SysTick_100us = 0;
|
||||||
volatile uint32_t SysTick_1ms = 0;
|
volatile uint32_t SysTick_1ms = 0;
|
||||||
@@ -65,6 +66,7 @@ void Delay_Us(uint32_t n)
|
|||||||
for(uint32_t i=0;i<n;i++){
|
for(uint32_t i=0;i<n;i++){
|
||||||
for(uint32_t j=0;j<30;j++){
|
for(uint32_t j=0;j<30;j++){
|
||||||
__NOP();
|
__NOP();
|
||||||
|
WDT_Feed();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -293,6 +295,8 @@ void Dbg_Println(int DbgOptBit ,const char *fmt, ...)
|
|||||||
|
|
||||||
va_start(ap, fmt);
|
va_start(ap, fmt);
|
||||||
while (*fmt) {
|
while (*fmt) {
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if (*fmt != '%') {
|
if (*fmt != '%') {
|
||||||
__putchar__(*fmt++);
|
__putchar__(*fmt++);
|
||||||
continue;
|
continue;
|
||||||
@@ -354,9 +358,10 @@ void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len)
|
|||||||
printf("%8d [%6d]: %s",SysTick_Now,SysTick_Diff,cmd);
|
printf("%8d [%6d]: %s",SysTick_Now,SysTick_Diff,cmd);
|
||||||
for(uint32_t i=0;i<len;i++)
|
for(uint32_t i=0;i<len;i++)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
printf("%02X ",buff[i]);
|
printf("%02X ",buff[i]);
|
||||||
}
|
}
|
||||||
printf("\n\r");
|
printf("\r\n");
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -48,24 +48,25 @@ typedef enum
|
|||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|
||||||
uint32_t spiflash_fw_count; //<2F>ⲿflash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ܴ<EFBFBD><EFBFBD><EFBFBD>
|
/* - Ŀǰ<C4BF><C7B0>ϸ<EFBFBD><CFB8><EFBFBD><EFBFBD>һ<EFBFBD>£<EFBFBD><C2A3>ⲿ<EFBFBD><E2B2BF>Flashд<68><D0B4><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>¼<EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϼ<EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint32_t spiflash_fw_succ; //<EFBFBD>ⲿflash <20>̼<EFBFBD>д<EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD>ܴ<EFBFBD><EFBFBD><EFBFBD>
|
* - Launcher<65>п<EFBFBD><D0BF><EFBFBD><EFBFBD><EFBFBD>MCU Flash д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>ⲿFlash<EFBFBD>а<EFBFBD><EFBFBD>˵ĵ<EFBFBD>MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><EFBFBD>Launcher<EFBFBD>н<EFBFBD><EFBFBD>в<EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint32_t spiflash_fw_fail; //<EFBFBD>ⲿflash <20>̼<EFBFBD>д<EFBFBD><D0B4>ʧ<EFBFBD><CAA7><EFBFBD>ܴ<EFBFBD><EFBFBD><EFBFBD>
|
* - <20><><EFBFBD><EFBFBD><EFBFBD>ⲿFlash<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD> APP<50><50>Ҳ<EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD>д<EFBFBD><EFBFBD><EFBFBD>ġ<EFBFBD>
|
||||||
|
* - <20>ݲ<EFBFBD><DDB2><EFBFBD>Ҫ<EFBFBD>ⲿFlash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ͳ<EFBFBD><CDB3>
|
||||||
uint32_t spiflash_logic_count; //<2F>ⲿflash <20><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
*
|
||||||
uint32_t spiflash_logic_succ; //<2F>ⲿflash <20><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ɹ<EFBFBD><C9B9>ܴ<EFBFBD><DCB4><EFBFBD>
|
*
|
||||||
uint32_t spiflash_logic_fail; //<2F>ⲿflash <20><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ʧ<EFBFBD><CAA7><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
* */
|
||||||
|
|
||||||
uint32_t mcuflash_fw_count; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
uint32_t mcuflash_fw_count; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
||||||
uint32_t mcuflash_fw_succ; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ɹ<EFBFBD><C9B9>ܴ<EFBFBD><DCB4><EFBFBD>
|
uint32_t mcuflash_fw_succ; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ɹ<EFBFBD><C9B9>ܴ<EFBFBD><DCB4><EFBFBD>
|
||||||
uint32_t mcuflash_fw_fail; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4>ʧ<EFBFBD><CAA7><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
uint32_t mcuflash_fw_fail; //MCU flash <20>̼<EFBFBD>д<EFBFBD><D0B4>ʧ<EFBFBD><CAA7><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD>
|
||||||
uint32_t mcuflash_fw_failcount; //MCU flash <20>̼<EFBFBD><CCBC><EFBFBD>ǰд<C7B0><D0B4>ʧ<EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD>θ<EFBFBD><CEB8>¹̼<C2B9><CCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>
|
|
||||||
|
|
||||||
}UPDATE_RECORD_T;
|
}UPDATE_RECORD_T;
|
||||||
|
|
||||||
extern G_SYS_FEATURE_T g_app_feature;
|
extern G_SYS_FEATURE_T g_app_feature; //SPI Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
extern G_SYS_FEATURE_T g_mcu_app_feature;
|
extern G_SYS_FEATURE_T g_mcu_app_feature; //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
extern UPDATE_RECORD_T g_update_recode; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
extern G_SYS_FEATURE_T g_update_flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
extern UPDATE_RECORD_T g_update_recode; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||||
|
|
||||||
|
|
||||||
extern uint8_t g_jump_flag; //<2F><>ת<EFBFBD><D7AA>־λ
|
extern uint8_t g_jump_flag; //<2F><>ת<EFBFBD><D7AA>־λ
|
||||||
extern uint32_t g_Boot_Tick; //Bootʱ<74><CAB1><EFBFBD><EFBFBD> <20><>λ<EFBFBD><CEBB>ms
|
extern uint32_t g_Boot_Tick; //Bootʱ<74><CAB1><EFBFBD><EFBFBD> <20><>λ<EFBFBD><CEBB>ms
|
||||||
@@ -78,7 +79,8 @@ uint8_t Read_APP_Feature(void);
|
|||||||
uint8_t MCU_APP_Write(void);
|
uint8_t MCU_APP_Write(void);
|
||||||
uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info);
|
uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info);
|
||||||
uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info);
|
uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info);
|
||||||
|
uint8_t SPIFLASH_Read_APP_Update_Flag_Info(G_SYS_FEATURE_T *feature_info);
|
||||||
|
uint8_t SPIFLASH_Write_APP_Upate_Flag_Info(G_SYS_FEATURE_T *flag_info);
|
||||||
|
|
||||||
void Jump_APP(uint32_t addr);
|
|
||||||
|
|
||||||
#endif /* MCU_DRIVER_INC_LAUNCHER_FUN_H_ */
|
#endif /* MCU_DRIVER_INC_LAUNCHER_FUN_H_ */
|
||||||
|
|||||||
@@ -9,16 +9,18 @@
|
|||||||
#ifndef _FLASH_MEM_ADDR_H_
|
#ifndef _FLASH_MEM_ADDR_H_
|
||||||
#define _FLASH_MEM_ADDR_H_
|
#define _FLASH_MEM_ADDR_H_
|
||||||
|
|
||||||
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/* - APP<EFBFBD><EFBFBD><EFBFBD>ݼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* - APP Data<74><61><EFBFBD>ݴ<EFBFBD>СΪ412KByte
|
||||||
|
* */
|
||||||
#define SPIFLASH_APP_Start_Addr 0x00000000
|
#define SPIFLASH_APP_Start_Addr 0x00000000
|
||||||
|
|
||||||
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
||||||
|
|
||||||
|
#define SPIFLASH_UPDATE_FLAG_Addr 0x00000200 //APP<50><50><EFBFBD>±<EFBFBD>־λ - 512Byte
|
||||||
|
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000400 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
|
#define SPIFLASH_APP_Data_Start_Addr 0x00001000
|
||||||
|
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF //ʵ<><CAB5><EFBFBD><EFBFBD>SPI Flash д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַΪ0x00067FFF
|
||||||
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
|
|
||||||
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
|
|
||||||
|
|
||||||
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
||||||
|
|
||||||
|
|||||||
@@ -16,16 +16,16 @@
|
|||||||
#define APP_Flash_WriteNum 0x05 //APPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
#define APP_Flash_WriteNum 0x05 //APPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
#define App_Procedure_Ready 0x66 //APP<50><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
#define App_Procedure_Ready 0x66 //APP<50><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
#define App_Procedure_Not_Ready 0x44 //Appδ<CEB4><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
|
||||||
|
|
||||||
//MCU Flash Address range(0x0 -- 0x6FFFF) Size(448K)
|
//MCU Flash Address range(0x0 -- 0x6FFFF) Size(448K)
|
||||||
#define MCU_APP_Flash_Start_Addr 0x00007000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
#define MCU_APP_Flash_Start_Addr 0x00001000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
#define MCU_APP_Data_Start_Addr 0x00007000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
#define MCU_APP_Data_Start_Addr 0x00001000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
#define MCU_APP_Data_End_Addr 0x00027DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Data_End_Addr 0x00067DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
#define MCU_APP_Feature_Addr 0x00027E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Feature_Addr 0x00067E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
#define MCU_APP_Flash_End_Addr 0x00027FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Flash_End_Addr 0x00067FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
#define MCU_APP_Feature_PageAddr 0x00027000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
|
#define MCU_APP_Feature_PageAddr 0x00067000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
|
||||||
#define MCU_APP_Feature_PageOffset 0x00000E00 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
#define MCU_APP_Feature_PageOffset 0x00000E00 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||||
#define APP_FEATURE_SIZE 0x0200 //512Byte
|
#define APP_FEATURE_SIZE 0x0200 //512Byte
|
||||||
|
|
||||||
@@ -91,7 +91,7 @@ typedef struct{
|
|||||||
uint8_t dev_app_ver; //<2F>豸APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
uint8_t dev_app_ver; //<2F>豸APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
||||||
uint8_t dev_name_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƶij<C6B5><C4B3><EFBFBD>
|
uint8_t dev_name_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƶij<C6B5><C4B3><EFBFBD>
|
||||||
uint8_t dev_name[EEPROM_DEV_NAME_Size]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t dev_name[EEPROM_DEV_NAME_Size]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
uint8_t dev_retain[24]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>24Byte
|
||||||
}E_MCU_DEV_INFO;
|
}E_MCU_DEV_INFO;
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -9,6 +9,244 @@
|
|||||||
#ifndef _SRAM_MEM_ADDR_H_
|
#ifndef _SRAM_MEM_ADDR_H_
|
||||||
#define _SRAM_MEM_ADDR_H_
|
#define _SRAM_MEM_ADDR_H_
|
||||||
|
|
||||||
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ
|
||||||
|
***********************************************************
|
||||||
|
//SRAM<41>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ -
|
||||||
|
<20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ -
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַΪ0x000100
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ洢<C8B4><E6B4A2><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_BUS_Device_List_Addr
|
||||||
|
<20>ڴ<EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>Ǵ洢<C7B4><E6B4A2><EFBFBD><EFBFBD>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_POLL_Device_List_Addr
|
||||||
|
Ȼ<><C8BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_ACTIVE_Device_List_Addr
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E>
|
||||||
|
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>豸˳<E8B1B8><CBB3><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
*****************************************************************************************
|
||||||
|
| | <20><>ʼ<EFBFBD><CABC>ַ | <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ |
|
||||||
|
| BUS<55>豸<EFBFBD><E8B1B8>Ϣ | SRAM_Device_List_Start_Addr | SRAM_BUS_Device_List_Addr |
|
||||||
|
| <20><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_BUS_Device_List_Addr | SRAM_POLL_Device_List_Addr |
|
||||||
|
| <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_POLL_Device_List_Addr | SRAM_ACTIVE_Device_List_Addr |
|
||||||
|
| <20><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_ACTIVE_Device_List_Addr| SRAM_Device_List_End_Addr |
|
||||||
|
*****************************************************************************************
|
||||||
|
* */
|
||||||
|
#define SRAM_Device_List_Size 0x00000200 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ܴ<EFBFBD>С
|
||||||
|
#define SRAM_BUS_Device_List_Addr 0x00000000 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ - 4Byte
|
||||||
|
#define SRAM_POLL_Device_List_Addr 0x00000004 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||||
|
#define SRAM_ACTIVE_Device_List_Addr 0x00000008 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||||
|
#define SRAM_NORMAL_Device_List_Addr 0x0000000C //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||||
|
|
||||||
|
#define SRAM_Device_List_Start_Addr 0x00000100 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
|
#define SRAM_Device_List_End_Addr 0x00009FFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
|
||||||
|
|
||||||
|
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - LOGȫ<47><C8AB>
|
||||||
|
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00B000 - 0x00BFFF*/
|
||||||
|
#define SRAM_LOG_Device_C5IO_Relay_Status 0x0000B000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||||
|
#define SRAM_LOG_Device_C5IO_DO_Status 0x0000B003 //DO״̬ - 1byte
|
||||||
|
#define SRAM_LOG_Device_C5IO_DI_Status 0x0000B004 //DI״̬ - 2Byte
|
||||||
|
#define SRAM_LOG_Device_C5MUSIC_Playback_Status 0x0000B006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||||
|
#define SRAM_LOG_Device_C5MUSIC_Volume_Status 0x0000B007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||||
|
#define SRAM_LOG_Device_C5MUSIC_idx_Status 0x0000B008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||||
|
#define SRAM_LOG_Device_Card_Status 0x0000B00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte 2025-09-03 <20><>ûʹ<C3BB><CAB9>
|
||||||
|
#define SRAM_LOG_Device_Temp_Status 0x0000B00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||||
|
|
||||||
|
/**/
|
||||||
|
#define SRAM_LOG_Device_Switch_Type 0x0000B00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
#define SRAM_LOG_Device_Switch_Num 0x0000B00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||||
|
#define SRAM_LOG_Device_Switch1_Status 0x0000B00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_LOG_Device_Switch2_Status 0x0000B011 //<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_LOG_Device_Switch3_Status 0x0000B013 //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_LOG_RCU_Reboot_Reason 0x0000B015 //RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> 2025-09-27
|
||||||
|
|
||||||
|
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - UDPȫ<50><C8AB>
|
||||||
|
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00C000 - 0x00CFFF*/
|
||||||
|
#define SRAM_UDP_Device_C5IO_Relay_Status 0x0000C000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||||
|
#define SRAM_UDP_Device_C5IO_DO_Status 0x0000C003 //DO״̬ - 1byte
|
||||||
|
#define SRAM_UDP_Device_C5IO_DI_Status 0x0000C004 //DI״̬ - 2Byte
|
||||||
|
#define SRAM_UDP_Device_C5MUSIC_Playback_Status 0x0000C006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||||
|
#define SRAM_UDP_Device_C5MUSIC_Volume_Status 0x0000C007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||||
|
#define SRAM_UDP_Device_C5MUSIC_idx_Status 0x0000C008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||||
|
#define SRAM_UDP_Device_Card_Status 0x0000C00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte
|
||||||
|
#define SRAM_UDP_Device_Temp_Status 0x0000C00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||||
|
/**/
|
||||||
|
#define SRAM_UDP_Device_Switch_Type 0x0000C00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
#define SRAM_UDP_Device_Switch_Num 0x0000C00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||||
|
#define SRAM_UDP_Device_Switch1_Status 0x0000C00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_UDP_ELEReport_Action 0x0000C011 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
#define SRAM_UDP_ELEReport_EleState 0x0000C012 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||||
|
#define SRAM_UDP_ELEReport_EleState_Last 0x0000C013
|
||||||
|
#define SRAM_UDP_ELEReport_CardState 0x0000C014 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||||
|
#define SRAM_UDP_ELEReport_CardState_Last 0x0000C015
|
||||||
|
#define SRAM_UDP_ELEReport_CardType 0x0000C016 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||||
|
#define SRAM_UDP_ELEReport_CardType_Last 0x0000C017
|
||||||
|
#define SRAM_UDP_ELEReport_VirtualCard 0x0000C018 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||||
|
#define SRAM_UDP_ELEReport_VirtualCard_Last 0x0000C019
|
||||||
|
#define SRAM_UDP_Report_CarbonSatet 0x0000C01A //UDP <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>̼<EFBFBD><CCBC><EFBFBD>˵<EFBFBD>״̬
|
||||||
|
|
||||||
|
/*SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>豸<EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ƻ<EFBFBD><C6BB><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00D000 - 0x00DFFF*/
|
||||||
|
#define SRAM_UDP_SendData_Writeaddr 0x0000D000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||||
|
#define SRAM_UDP_SendData_Readaddr 0x0000D004 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||||
|
#define SRAM_UDP_SendData_Tempaddr 0x0000D008 //
|
||||||
|
|
||||||
|
#define SRAM_UDP_SendData_Startaddr 0x0000D010 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
|
#define SRAM_UDP_SendData_Endaddr 0x0000D7EA //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
#define SRAM_UDP_SendData_Size 0x9C //һ<>η<EFBFBD><CEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_UDP_RecvData_Writeaddr 0x0000D800 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||||
|
#define SRAM_UDP_RecvData_Readaddr 0x0000D804 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||||
|
#define SRAM_UDP_RecvData_Tempaddr 0x0000D808 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ַ
|
||||||
|
#define SRAM_UDP_RecvData_ControlNum 0x0000D80C //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>
|
||||||
|
#define SRAM_UDP_RecvData_Startaddr 0x0000D810 //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
|
#define SRAM_UDP_RecvData_Endaddr 0x0000DFEA //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
/*<2A>ϵ<EFBFBD><CFB5>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* <20><>ַ<EFBFBD><D6B7>Χ:0x0x00E100 ~ 0x00E1FF */
|
||||||
|
#define SRAM_PowerOn_Restore_StartAddr 0x0000E100
|
||||||
|
#define SRAM_PowerOn_Restore_Flag 0x0000E100
|
||||||
|
#define SRAM_PowerOn_Restore_Len 0x0000E101
|
||||||
|
#define SRAM_PowerOn_Restore_Check 0x0000E102
|
||||||
|
#define SRAM_PowerOn_Restore_Param 0x0000E103
|
||||||
|
#define SRAM_PowerOn_Restore_EndAddr 0x0000E1FF
|
||||||
|
|
||||||
|
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼Boot<6F><74><EFBFBD><EFBFBD> дMCU Flash<73><68><EFBFBD><EFBFBD> <20><>С<EFBFBD><D0A1>0x200 2025-04-28*/
|
||||||
|
#define SRAM_APP_FEATURE_2_CHECK_Addr 0x0000E600
|
||||||
|
|
||||||
|
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
|
||||||
|
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
|
||||||
|
|
||||||
|
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3> <20><>С:0x10 2026-01-14*/
|
||||||
|
#define SRAM_APP_Write_Count_Addr 0x0000E900
|
||||||
|
|
||||||
|
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
|
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
|
||||||
|
|
||||||
|
#define SRAM_UART0_RecvBuffer_Start_Addr 0x00010000
|
||||||
|
#define SRAM_UART0_RecvBuffer_End_Addr 0x00010FFF
|
||||||
|
#define SRAM_UART0_SendBuffer_Start_Addr 0x00011000
|
||||||
|
#define SRAM_UART0_SendBuffer_End_Addr 0x00011FFF
|
||||||
|
|
||||||
|
#define SRAM_UART1_RecvBuffer_Start_Addr 0x00012000
|
||||||
|
#define SRAM_UART1_RecvBuffer_End_Addr 0x00012FFF
|
||||||
|
#define SRAM_UART1_SendBuffer_Start_Addr 0x00013000
|
||||||
|
#define SRAM_UART1_SendBuffer_End_Addr 0x00013FFF
|
||||||
|
|
||||||
|
#define SRAM_UART2_RecvBuffer_Start_Addr 0x00014000
|
||||||
|
#define SRAM_UART2_RecvBuffer_End_Addr 0x00014FFF
|
||||||
|
#define SRAM_UART2_SendBuffer_Start_Addr 0x00015000
|
||||||
|
#define SRAM_UART2_SendBuffer_End_Addr 0x00015FFF
|
||||||
|
|
||||||
|
#define SRAM_UART3_RecvBuffer_Start_Addr 0x00016000
|
||||||
|
#define SRAM_UART3_RecvBuffer_End_Addr 0x00016FFF
|
||||||
|
#define SRAM_UART3_SendBuffer_Start_Addr 0x00017000
|
||||||
|
#define SRAM_UART3_SendBuffer_End_Addr 0x00017FFF
|
||||||
|
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
|
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ŀ<DEB8>ʼ -- <20><>Ҫ<EFBFBD><EFBFBD> */
|
||||||
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>¼ 0x031400~0x031FFF 3K<33><4B>ÿ<EFBFBD><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>6<EFBFBD>ֽڣ<D6BD>һ<EFBFBD><D2BB><EFBFBD>ܹ<EFBFBD><DCB9>ܴ<EFBFBD>509<30><39><EFBFBD>豸<EFBFBD><E8B1B8>*/
|
||||||
|
#define SRAM_DEVICE_ONLINE_STATE_WRITE_ADDR 0x00031400 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬д<CCAC><D0B4><EFBFBD><EFBFBD>ַ
|
||||||
|
#define SRAM_DEVICE_ONLINE_STATE_READ_ADDR 0x00031404 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1>ַ
|
||||||
|
#define SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR 0x00031408 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>м<EFBFBD><D0BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||||
|
#define SRAM_DEVICE_ONLINE_STATE_START_ADDR 0x00031410 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʿ<EFBFBD>ʼд<CABC><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||||
|
//#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031500 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7> - <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||||
|
#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031FFE //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||||
|
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ľ<DEB8><C4BD><EFBFBD>*/
|
||||||
|
|
||||||
|
#define SRAM_CheckMap_List_Start_Addr 0x0003A800 //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>10K
|
||||||
|
#define SRAM_CheckMap_List_End_Addr 0x0003CFFF //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_VCard_PortInf_Start_Addr 0x0003D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>2K
|
||||||
|
#define SRAM_VCard_PortInf_End_Addr 0x0003D7FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_VCard_ConNToS_Start_Addr 0x0003D800 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||||
|
#define SRAM_VCard_ConNToS_End_Addr 0x0003DBFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_VCard_ConSToN_Start_Addr 0x0003DC00 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||||
|
#define SRAM_VCard_Con_End_Addr 0x0003DFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_VCard_DetectWin_Start_Addr 0x0003E000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>60K
|
||||||
|
#define SRAM_VCard_DetectWin_End_Addr 0x0004CFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||||
|
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
|
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
|
||||||
|
|
||||||
|
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
|
||||||
|
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
|
||||||
|
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
|
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
|
#define SRAM_Register_Start_ADDRESS 0x0008E900
|
||||||
|
#define SRAM_Register_End_ADDRESS 0x0008EFFF
|
||||||
|
|
||||||
|
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
|
||||||
|
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||||
|
#define Register_NetIP_OFFSET 0x0000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - DHCP<43><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>֮<EFBFBD><EFBFBD>DHCPʧ<50><CAA7>֮<EFBFBD><D6AE> ʹ<>õ<EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD><EFBFBD>MCUĬ<55><C4AC>IP
|
||||||
|
#define Register_NetPort_OFFSET 0x0004 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||||
|
#define Register_NetMask_OFFSET 0x0008 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||||
|
#define Register_NetGateway_OFFSET 0x000C //<2F><><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||||
|
#define Register_DNSServerIP_OFFSET 0x0010 //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||||
|
#define Register_NETMACKADDR_OFFSET 0x0014 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MACK<43><4B>ַ
|
||||||
|
#define Register_WebServerIP_OFFSET 0x0018 //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD>õ<EFBFBD><C3B5>ƶ<EFBFBD>IP<49><50>ַ
|
||||||
|
#define Register_WebServerPort_OFFSET 0x001C //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - 2025-10-11 <20><><EFBFBD><EFBFBD>
|
||||||
|
#define Register_MandateExpiresTime_OFFSET 0x0020 //MCU<43><55>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||||
|
#define Register_CurrentUsageTime_OFFSET 0x0024 //MCU<43><55>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define Register_MandateUTC_OFFSET 0x0028 //<2F><>Ȩʱ<C8A8><CAB1> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȩʱ<C8A8>ĵ<EFBFBD>ǰUTCʱ<43><CAB1>
|
||||||
|
#define Register_MandateLock_OFFSET 0x002C //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||||
|
#define Register_NetInfo_EN_OFFSET 0x0030 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD>DHCPʹ<50><CAB9> - 1Byte<74><65><EFBFBD><EFBFBD>ʾDHCPʹ<50><CAB9> 1Byte<74>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ΪĬ<CEAA><C4AC>IP<49><50>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||||
|
#define Register_NetOfflineTime_OFFSET 0x0034 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1> - 4Byte <20><>λ<EFBFBD><CEBB>ms
|
||||||
|
#define Register_ProjectCode_OFFSET 0x0038 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
||||||
|
#define Register_SoftwareVersion_OFFSET 0x003C //<2F><><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> - <20>̼<EFBFBD><CCBC>汾<EFBFBD><E6B1BE>
|
||||||
|
#define Register_ConfigVersion_OFFSET 0x0040 //<2F><><EFBFBD>ð汾<C3B0><E6B1BE>
|
||||||
|
#define Register_RoomNumber_OFFSET 0x0044 //<2F><><EFBFBD><EFBFBD>
|
||||||
|
#define Register_HouseType_OFFSET 0x0048 //<2F><><EFBFBD><EFBFBD>
|
||||||
|
#define Register_RoomRent_OFFSET 0x004C //<2F><>̬<EFBFBD><CCAC>Ϣ - <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
#define Register_SeasonStatus_OFFSET 0x0050 //<2F><><EFBFBD><EFBFBD>״̬
|
||||||
|
#define Register_TFTPStatus_OFFSET 0x0054 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD> 4Byte
|
||||||
|
#define Register_TFTPUploadTime_OFFSET 0x0058 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> 4Byte
|
||||||
|
#define Register_BLVServerDmLen_OFFSET 0x005C //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte
|
||||||
|
#define Register_BLVServerDmName_OFFSET 0x0060 //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 64Byte
|
||||||
|
#define Register_UDPPeriodicTime_OFFSET 0x00A0 //UDPͨѶ <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte <20><>λ:ms
|
||||||
|
|
||||||
|
#define Register_RoomNumNote_OFFSET 0x0100 //<2F><><EFBFBD>ű<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||||
|
#define Register_RoomTypeNote_OFFSET 0x0110 //<2F><><EFBFBD>ͱ<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||||
|
#define Register_RoomNote_OFFSET 0x0120 //<2F><><EFBFBD>䱸ע<E4B1B8><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 96Byte
|
||||||
|
#define Register_TFTPLOGPort_OFFSET 0x0180 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - 2Byte
|
||||||
|
#define Register_TFTPLOGTime_OFFSET 0x0182 //TFTP<54><50>־<EFBFBD>ϴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
|
||||||
|
#define Register_TFTPDmLens_OFFSET 0x0184 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
|
||||||
|
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
|
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD><EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||||
|
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||||
|
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||||
|
|
||||||
|
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
|
||||||
|
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
|
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
||||||
|
#define SRAM_DevAction_List_Num 950
|
||||||
|
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
||||||
|
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
|
||||||
|
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
|
||||||
|
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* 2025-07-29 <20><EFBFBD>SRAM<41>洢<EFBFBD><E6B4A2>ַ 0x00400000 ~ 0x007FFFFF SIZE:4MByte
|
* 2025-07-29 <20><EFBFBD>SRAM<41>洢<EFBFBD><E6B4A2>ַ 0x00400000 ~ 0x007FFFFF SIZE:4MByte
|
||||||
|
|||||||
@@ -28,7 +28,7 @@
|
|||||||
#define USART_BUFFER_SIZE 512
|
#define USART_BUFFER_SIZE 512
|
||||||
|
|
||||||
|
|
||||||
typedef void (*Uart_prt)(uint8_t * ,uint16_t );
|
typedef uint8_t (*Uart_prt)(uint8_t * ,uint16_t );
|
||||||
typedef uint8_t (*Uart_set_prt)(uint32_t );
|
typedef uint8_t (*Uart_set_prt)(uint32_t );
|
||||||
|
|
||||||
typedef enum
|
typedef enum
|
||||||
@@ -80,7 +80,8 @@ typedef struct{
|
|||||||
Uart_set_prt set_baud_cf;
|
Uart_set_prt set_baud_cf;
|
||||||
}UART_t;
|
}UART_t;
|
||||||
|
|
||||||
extern UART_t g_uart[UART_MAX];
|
extern UART_t g_uart_0;
|
||||||
|
extern UART_t g_uart_2;
|
||||||
|
|
||||||
void UARTx_Init(UART_IDX uart_id, uint32_t buad);
|
void UARTx_Init(UART_IDX uart_id, uint32_t buad);
|
||||||
void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud);
|
void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud);
|
||||||
@@ -95,6 +96,14 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate);
|
|||||||
uint8_t UART2_ChangeBaud(uint32_t baudrate);
|
uint8_t UART2_ChangeBaud(uint32_t baudrate);
|
||||||
uint8_t UART3_ChangeBaud(uint32_t baudrate);
|
uint8_t UART3_ChangeBaud(uint32_t baudrate);
|
||||||
|
|
||||||
|
uint8_t MCU485_SendString_0(uint8_t *buff, uint16_t len);
|
||||||
|
uint8_t MCU485_SendString_2(uint8_t *buff, uint16_t len);
|
||||||
|
|
||||||
|
uint8_t Uartx_Add_Data_To_SendBuff(UART_t *uart_info,uint8_t *buff,uint16_t len,uint8_t sendCount,uint32_t ValidDuration,uint32_t sendInterval);
|
||||||
|
uint8_t Uartx_Clear_SendBuff(UART_t *uart_info);
|
||||||
|
uint8_t Uartx_Avoid_Conflict_Send_Task(UART_t *uart_info);
|
||||||
|
|
||||||
void Uart0_Task(void);
|
void Uart0_Task(void);
|
||||||
|
void Uart2_Task(void);
|
||||||
|
|
||||||
#endif /* MCU_DRIVER_INC_UART_H_ */
|
#endif /* MCU_DRIVER_INC_UART_H_ */
|
||||||
|
|||||||
18
MCU_Driver/inc/watchdog.h
Normal file
18
MCU_Driver/inc/watchdog.h
Normal file
@@ -0,0 +1,18 @@
|
|||||||
|
/*
|
||||||
|
* watchdog.h
|
||||||
|
*
|
||||||
|
* Created on: Jan 9, 2026
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
|
||||||
|
#define MCU_DRIVER_INC_WATCHDOG_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "ch564.h"
|
||||||
|
|
||||||
|
void WDT_Init(void);
|
||||||
|
void WDT_Feed(void);
|
||||||
|
void WDT_Reinit(void);
|
||||||
|
|
||||||
|
#endif /* MCU_DRIVER_INC_WATCHDOG_H_ */
|
||||||
@@ -29,7 +29,6 @@ void EEPROM_Init(void)
|
|||||||
DBG_SYS_Printf("EE Use Defalut Para");
|
DBG_SYS_Printf("EE Use Defalut Para");
|
||||||
EEPROM_Default_MCUDevInfo(&g_mcu_dev);
|
EEPROM_Default_MCUDevInfo(&g_mcu_dev);
|
||||||
|
|
||||||
//DBG_SYS_Printf("EE Use Defalut Para");
|
|
||||||
DBG_SYS_Printf("EE DevBootVer:%d",g_mcu_dev.dev_boot_ver);
|
DBG_SYS_Printf("EE DevBootVer:%d",g_mcu_dev.dev_boot_ver);
|
||||||
DBG_SYS_Printf("EE DevNameLen:%d",g_mcu_dev.dev_name_len);
|
DBG_SYS_Printf("EE DevNameLen:%d",g_mcu_dev.dev_name_len);
|
||||||
DBG_SYS_Printf("EE DevName:%s",g_mcu_dev.dev_name);
|
DBG_SYS_Printf("EE DevName:%s",g_mcu_dev.dev_name);
|
||||||
@@ -60,13 +59,13 @@ uint8_t MCU_APP_Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t wr
|
|||||||
sta = FLASH_ROMA_WRITE(writeAddr, pBuffer, NumByteToWrite);
|
sta = FLASH_ROMA_WRITE(writeAddr, pBuffer, NumByteToWrite);
|
||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_SYS_Printf("Operation FLASH_ROMA_WRITE failed %#x!! Err Code %x\r\n", writeAddr, sta);
|
DBG_SYS_Printf("MCU FLASH_ROMA_WRITE failed %#x!! Err Code %x\r\n", writeAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
sta = FLASH_ROMA_VERIFY(writeAddr, pBuffer, NumByteToWrite);
|
sta = FLASH_ROMA_VERIFY(writeAddr, pBuffer, NumByteToWrite);
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_SYS_Printf("Operation FLASH_ROMA_VERIFY failed %#x!! Err Code %x\r\n", writeAddr, sta);
|
DBG_SYS_Printf("MCU FLASH_ROMA_VERIFY failed %#x!! Err Code %x\r\n", writeAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -94,7 +93,7 @@ uint8_t MCU_APP_Flash_Read(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t rea
|
|||||||
sta = FLASH_ROMA_READ(readAddr, pBuffer, NumByteToWrite);
|
sta = FLASH_ROMA_READ(readAddr, pBuffer, NumByteToWrite);
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
|
DBG_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -126,7 +125,7 @@ uint8_t MCU_APP_Flash_Erase(uint32_t readAddr,uint16_t NumByteToWrite)
|
|||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", readAddr, sta);
|
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", readAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -143,13 +142,13 @@ uint8_t MCU_APP_Flash_ALLErase(void)
|
|||||||
|
|
||||||
for(uint32_t i=MCU_APP_Flash_Start_Addr;i<MCU_APP_Flash_End_Addr;i+=MCU_APP_Flash_PageSize)
|
for(uint32_t i=MCU_APP_Flash_Start_Addr;i<MCU_APP_Flash_End_Addr;i+=MCU_APP_Flash_PageSize)
|
||||||
{
|
{
|
||||||
DBG_Printf("Operation FLASH_ROMA_ERASE - %x!! \r\n", i);
|
DBG_Printf("MCU FLASH_ROMA_ERASE - %x!! \r\n", i);
|
||||||
FLASH_Unlock();
|
FLASH_Unlock();
|
||||||
sta = FLASH_ROMA_ERASE(i, MCU_APP_Flash_PageSize);
|
sta = FLASH_ROMA_ERASE(i, MCU_APP_Flash_PageSize);
|
||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
|
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -180,7 +179,7 @@ uint8_t MCU_EEPROM_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t write
|
|||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_SYS_Printf("Operation FLASH_ROMA_WRITE failed %x!! Err Code %x\r\n", writeAddr, sta);
|
DBG_SYS_Printf("MCU FLASH_ROMA_WRITE failed %x!! Err Code %x\r\n", writeAddr, sta);
|
||||||
|
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
@@ -209,7 +208,7 @@ uint8_t MCU_EEPROM_Read(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t readAd
|
|||||||
sta = EEPROM_READ(readAddr, pBuffer, NumByteToWrite);
|
sta = EEPROM_READ(readAddr, pBuffer, NumByteToWrite);
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
|
DBG_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -238,7 +237,7 @@ uint8_t MCU_EEPROM_Erase(uint32_t eraseAddr,uint16_t length)
|
|||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation MCU_EEPROM_Erase failed %x!! Err Code %x\r\n", eraseAddr, sta);
|
DBG_Printf("MCU MCU_EEPROM_Erase failed %x!! Err Code %x\r\n", eraseAddr, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -260,7 +259,7 @@ uint8_t MCU_EEPROM_ALLErase(void)
|
|||||||
FLASH_Lock();
|
FLASH_Lock();
|
||||||
|
|
||||||
if (sta != FLASH_COMPLETE){
|
if (sta != FLASH_COMPLETE){
|
||||||
DBG_Printf("Operation FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
|
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -296,17 +295,9 @@ uint8_t EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
|
|||||||
|
|
||||||
DBG_SYS_Printf("EEPROM_READ : %x ",read_addr);
|
DBG_SYS_Printf("EEPROM_READ : %x ",read_addr);
|
||||||
|
|
||||||
DBG_Printf("EEPROM_READ 1\r\n");
|
|
||||||
|
|
||||||
FLASH_Unlock();
|
|
||||||
EEPROM_ERASE(read_addr , 0x1000);
|
|
||||||
FLASH_Lock();
|
|
||||||
|
|
||||||
DBG_Printf("EEPROM_READ 2\r\n");
|
|
||||||
|
|
||||||
EEPROM_READ(read_addr,g_read_buff,1024);
|
EEPROM_READ(read_addr,g_read_buff,1024);
|
||||||
|
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"Dev Info:",g_read_buff,4);
|
|
||||||
|
|
||||||
if(g_read_buff[0] == EEPROM_SVAE_FLAG){
|
if(g_read_buff[0] == EEPROM_SVAE_FLAG){
|
||||||
read_len = g_read_buff[2];
|
read_len = g_read_buff[2];
|
||||||
@@ -314,6 +305,7 @@ uint8_t EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
|
|||||||
read_len |= g_read_buff[1];
|
read_len |= g_read_buff[1];
|
||||||
|
|
||||||
DBG_SYS_Printf("read_len : %d ",read_len);
|
DBG_SYS_Printf("read_len : %d ",read_len);
|
||||||
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"Dev Info:",g_read_buff,4);
|
||||||
|
|
||||||
if(read_len <= EEPROM_DATA_Size_Max){
|
if(read_len <= EEPROM_DATA_Size_Max){
|
||||||
DBG_SYS_Printf("read_para %0x%x\r\n",MCU_EEPROM_MCUDevInfo_Address);
|
DBG_SYS_Printf("read_para %0x%x\r\n",MCU_EEPROM_MCUDevInfo_Address);
|
||||||
@@ -336,6 +328,8 @@ uint8_t EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}else {
|
||||||
|
DBG_SYS_Printf("read_len : %d ",read_len);
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0x01;
|
return 0x01;
|
||||||
@@ -395,7 +389,7 @@ void EEPROM_Default_MCUDevInfo(E_MCU_DEV_INFO *info)
|
|||||||
memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
|
memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
|
||||||
memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
|
memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
|
||||||
|
|
||||||
EEPROM_WriteMCUDevInfo(info);
|
//EEPROM_WriteMCUDevInfo(info);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -472,6 +466,8 @@ uint8_t Read_APP_Feature_Info(uint8_t option,G_SYS_FEATURE_T *feature_info)
|
|||||||
}else if(option == 0x02){
|
}else if(option == 0x02){
|
||||||
//<2F><>ȡ<EFBFBD>ⲿ Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
//<2F><>ȡ<EFBFBD>ⲿ Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Flash_Read(g_read_buff,APP_FEATURE_SIZE,SPIFLASH_APP_FEATURE_Addr);
|
Flash_Read(g_read_buff,APP_FEATURE_SIZE,SPIFLASH_APP_FEATURE_Addr);
|
||||||
|
}else {
|
||||||
|
return 0x02; //ֱ<><D6B1><EFBFBD>˳<EFBFBD><CBB3><EFBFBD><EFBFBD>ҷ<EFBFBD><D2B7><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||||
}
|
}
|
||||||
|
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"APP Feature :",g_read_buff,APP_FEATURE_SIZE);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"APP Feature :",g_read_buff,APP_FEATURE_SIZE);
|
||||||
@@ -626,7 +622,6 @@ void APP_Feature_Info_Printf(G_SYS_FEATURE_T *feature_info)
|
|||||||
DBG_SYS_Printf("Feature crc_check: %x \r\n",feature_info->crc_check);
|
DBG_SYS_Printf("Feature crc_check: %x \r\n",feature_info->crc_check);
|
||||||
DBG_SYS_Printf("Feature app_flag: %x \r\n",feature_info->app_flag);
|
DBG_SYS_Printf("Feature app_flag: %x \r\n",feature_info->app_flag);
|
||||||
|
|
||||||
|
|
||||||
DBG_SYS_Printf("Feature app_start_addr: %x \r\n",feature_info->app_start_addr);
|
DBG_SYS_Printf("Feature app_start_addr: %x \r\n",feature_info->app_start_addr);
|
||||||
DBG_SYS_Printf("Feature app_end_addr: %x \r\n",feature_info->app_end_addr);
|
DBG_SYS_Printf("Feature app_end_addr: %x \r\n",feature_info->app_end_addr);
|
||||||
DBG_SYS_Printf("Feature app_crc_len: %d \r\n",feature_info->app_crc_len);
|
DBG_SYS_Printf("Feature app_crc_len: %d \r\n",feature_info->app_crc_len);
|
||||||
@@ -636,3 +631,6 @@ void APP_Feature_Info_Printf(G_SYS_FEATURE_T *feature_info)
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -7,6 +7,7 @@
|
|||||||
|
|
||||||
#include "spi_flash.h"
|
#include "spi_flash.h"
|
||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
uint8_t Flash_Buffer[4150]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
|
uint8_t Flash_Buffer[4150]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
|
||||||
|
|
||||||
@@ -125,7 +126,7 @@ uint8_t Flash_Wait_Busy(void)
|
|||||||
temp = Flash_ReadSR();
|
temp = Flash_ReadSR();
|
||||||
while((temp&0x01)==0x01)
|
while((temp&0x01)==0x01)
|
||||||
{
|
{
|
||||||
FEED_DOG(); //ι<><CEB9>
|
WDT_Feed(); //ι<><CEB9>
|
||||||
Delay_Us(100);
|
Delay_Us(100);
|
||||||
temp = Flash_ReadSR();
|
temp = Flash_ReadSR();
|
||||||
i++;
|
i++;
|
||||||
@@ -350,7 +351,7 @@ void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t write
|
|||||||
if(NumByteToWrite<=pageremain) pageremain=NumByteToWrite;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>256<35><36><EFBFBD>ֽ<EFBFBD>
|
if(NumByteToWrite<=pageremain) pageremain=NumByteToWrite;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>256<35><36><EFBFBD>ֽ<EFBFBD>
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
FEED_DOG(); //ι<><CEB9>
|
WDT_Feed(); //ι<><CEB9>
|
||||||
|
|
||||||
Flash_Write_Page(pBuffer,pageremain,writeAddr);
|
Flash_Write_Page(pBuffer,pageremain,writeAddr);
|
||||||
if(pageremain == NumByteToWrite) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
if(pageremain == NumByteToWrite) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -395,7 +396,7 @@ void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr)
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
FEED_DOG(); //ι<><CEB9>
|
WDT_Feed(); //ι<><CEB9>
|
||||||
|
|
||||||
Flash_Read(Write_Buff,256,secpos*256); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
Flash_Read(Write_Buff,256,secpos*256); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
@@ -446,7 +447,7 @@ void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr)
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
FEED_DOG(); //ι<><CEB9>
|
WDT_Feed(); //ι<><CEB9>
|
||||||
|
|
||||||
Flash_Read(Write_Buff,2048,secpos*4096); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
Flash_Read(Write_Buff,2048,secpos*4096); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Flash_Read(Write_Buff+2048,2048,secpos*4096+2048); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
Flash_Read(Write_Buff+2048,2048,secpos*4096+2048); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -22,7 +22,8 @@ void TIMER0_Init(void)
|
|||||||
volatile uint32_t Time0_100us = 0;
|
volatile uint32_t Time0_100us = 0;
|
||||||
volatile uint32_t Time0_1ms = 0;
|
volatile uint32_t Time0_1ms = 0;
|
||||||
|
|
||||||
void __attribute__((interrupt("WCH-Interrupt-fast"))) TIM0_IRQHandler()
|
void TIM0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||||
|
void TIM0_IRQHandler(void)
|
||||||
{
|
{
|
||||||
static uint8_t NUM_1 = 0;
|
static uint8_t NUM_1 = 0;
|
||||||
|
|
||||||
|
|||||||
@@ -17,7 +17,14 @@
|
|||||||
|
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
UART_t g_uart[UART_MAX];
|
/* Bootload <20>й滮<D0B9><E6BBAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* 1<><31><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>0
|
||||||
|
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - <20><><EFBFBD><EFBFBD>2
|
||||||
|
* - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD>
|
||||||
|
*/
|
||||||
|
|
||||||
|
UART_t g_uart_0;
|
||||||
|
UART_t g_uart_2;
|
||||||
|
|
||||||
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||||
void UART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
void UART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||||
@@ -58,11 +65,11 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
|
|||||||
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART0_IRQn);
|
NVIC_EnableIRQ(UART0_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
memset(&g_uart_0,0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
|
Set_Uart_recvTimeout(&g_uart_0,buad);
|
||||||
|
|
||||||
g_uart[UART_0].send_data_cf = UART0_SendString;
|
g_uart_0.send_data_cf = MCU485_SendString_0;
|
||||||
g_uart[UART_0].set_baud_cf = UART0_ChangeBaud;
|
g_uart_0.set_baud_cf = UART0_ChangeBaud;
|
||||||
break;
|
break;
|
||||||
case UART_1:
|
case UART_1:
|
||||||
UART1_Reset();
|
UART1_Reset();
|
||||||
@@ -80,11 +87,6 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
|
|||||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART1_IRQn);
|
NVIC_EnableIRQ(UART1_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
|
|
||||||
|
|
||||||
g_uart[UART_1].send_data_cf = UART1_SendString;
|
|
||||||
g_uart[UART_1].set_baud_cf = UART1_ChangeBaud;
|
|
||||||
break;
|
break;
|
||||||
case UART_2:
|
case UART_2:
|
||||||
//RS485ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
|
//RS485ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
|
||||||
@@ -106,11 +108,11 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
|
|||||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART2_IRQn);
|
NVIC_EnableIRQ(UART2_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
memset(&g_uart_2,0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
|
Set_Uart_recvTimeout(&g_uart_2,buad);
|
||||||
|
|
||||||
g_uart[UART_2].send_data_cf = UART2_SendString;
|
g_uart_2.send_data_cf = MCU485_SendString_2;
|
||||||
g_uart[UART_2].set_baud_cf = UART2_ChangeBaud;
|
g_uart_2.set_baud_cf = UART2_ChangeBaud;
|
||||||
break;
|
break;
|
||||||
case UART_3:
|
case UART_3:
|
||||||
UART3_Reset();
|
UART3_Reset();
|
||||||
@@ -128,11 +130,6 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
|
|||||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART3_IRQn);
|
NVIC_EnableIRQ(UART3_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
|
|
||||||
|
|
||||||
g_uart[UART_3].send_data_cf = UART3_SendString;
|
|
||||||
g_uart[UART_3].set_baud_cf = UART3_ChangeBaud;
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -173,14 +170,14 @@ void UART0_IRQHandler(void)
|
|||||||
break;
|
break;
|
||||||
case UART_II_RECV_RDY:
|
case UART_II_RECV_RDY:
|
||||||
case UART_II_RECV_TOUT:
|
case UART_II_RECV_TOUT:
|
||||||
if( (g_uart[UART_0].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_0].RecvLen = 0x00;
|
if( (g_uart_0.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_0.RecvLen = 0x00;
|
||||||
g_uart[UART_0].RecvBuffer[g_uart[UART_0].RecvLen] = UART0_RecvByte();
|
g_uart_0.RecvBuffer[g_uart_0.RecvLen] = UART0_RecvByte();
|
||||||
g_uart[UART_0].RecvLen += 1;
|
g_uart_0.RecvLen += 1;
|
||||||
g_uart[UART_0].Receiving = 0x01;
|
g_uart_0.Receiving = 0x01;
|
||||||
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
g_uart_0.RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
//<2F><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD>æ״̬
|
//<2F><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD>æ״̬
|
||||||
g_uart[UART_0].CommBusy |= UART_COMMBUSY_RECV_Flag;
|
g_uart_0.CommBusy |= UART_COMMBUSY_RECV_Flag;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -202,11 +199,11 @@ void UART1_IRQHandler(void)
|
|||||||
break;
|
break;
|
||||||
case UART_II_RECV_RDY:
|
case UART_II_RECV_RDY:
|
||||||
case UART_II_RECV_TOUT:
|
case UART_II_RECV_TOUT:
|
||||||
if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
|
// if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
|
||||||
g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
|
// g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
|
||||||
g_uart[UART_1].RecvLen += 1;
|
// g_uart[UART_1].RecvLen += 1;
|
||||||
g_uart[UART_1].Receiving = 0x01;
|
// g_uart[UART_1].Receiving = 0x01;
|
||||||
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
// g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -227,11 +224,11 @@ void UART2_IRQHandler(void)
|
|||||||
break;
|
break;
|
||||||
case UART_II_RECV_RDY:
|
case UART_II_RECV_RDY:
|
||||||
case UART_II_RECV_TOUT:
|
case UART_II_RECV_TOUT:
|
||||||
if( (g_uart[UART_2].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_2].RecvLen = 0x00;
|
if( (g_uart_2.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_2.RecvLen = 0x00;
|
||||||
g_uart[UART_2].RecvBuffer[g_uart[UART_2].RecvLen] = UART2_RecvByte();
|
g_uart_2.RecvBuffer[g_uart_2.RecvLen] = UART2_RecvByte();
|
||||||
g_uart[UART_2].RecvLen += 1;
|
g_uart_2.RecvLen += 1;
|
||||||
g_uart[UART_2].Receiving = 0x01;
|
g_uart_2.Receiving = 0x01;
|
||||||
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
g_uart_2.RecvIdleTiming = SysTick_1ms;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -252,11 +249,11 @@ void UART3_IRQHandler(void)
|
|||||||
break;
|
break;
|
||||||
case UART_II_RECV_RDY:
|
case UART_II_RECV_RDY:
|
||||||
case UART_II_RECV_TOUT:
|
case UART_II_RECV_TOUT:
|
||||||
if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
|
// if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
|
||||||
g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
|
// g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
|
||||||
g_uart[UART_3].RecvLen += 1;
|
// g_uart[UART_3].RecvLen += 1;
|
||||||
g_uart[UART_3].Receiving = 0x01;
|
// g_uart[UART_3].Receiving = 0x01;
|
||||||
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
// g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -270,17 +267,17 @@ void UART3_IRQHandler(void)
|
|||||||
*/
|
*/
|
||||||
void UART0_RECEIVE(void)
|
void UART0_RECEIVE(void)
|
||||||
{
|
{
|
||||||
if(g_uart[UART_0].Receiving == 0x01)
|
if(g_uart_0.Receiving == 0x01)
|
||||||
{
|
{
|
||||||
if(SysTick_1ms - g_uart[UART_0].RecvIdleTiming >= g_uart[UART_0].RecvTimeout)
|
if(SysTick_1ms - g_uart_0.RecvIdleTiming >= g_uart_0.RecvTimeout)
|
||||||
{
|
{
|
||||||
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
g_uart_0.RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
DBG_SYS_Printf("--UART0_RECEIVE--\r\n");
|
DBG_SYS_Printf("UART0_RECEIVE");
|
||||||
Launcher_Uart_Upgrade_Process(&g_uart[UART_0]);
|
Launcher_Uart_Upgrade_Process(&g_uart_0);
|
||||||
|
|
||||||
g_uart[UART_0].RecvLen = 0;
|
g_uart_0.RecvLen = 0;
|
||||||
g_uart[UART_0].Receiving = 0;
|
g_uart_0.Receiving = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -294,19 +291,7 @@ void UART0_RECEIVE(void)
|
|||||||
*/
|
*/
|
||||||
void UART1_RECEIVE(void)
|
void UART1_RECEIVE(void)
|
||||||
{
|
{
|
||||||
if(g_uart[UART_1].Receiving == 0x01)
|
|
||||||
{
|
|
||||||
if(SysTick_1ms - g_uart[UART_1].RecvIdleTiming >= g_uart[UART_1].RecvTimeout)
|
|
||||||
{
|
|
||||||
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
|
||||||
|
|
||||||
DBG_SYS_Printf("--UART1_RECEIVE--\r\n");
|
|
||||||
Launcher_Uart_Upgrade_Process(&g_uart[UART_1]);
|
|
||||||
|
|
||||||
g_uart[UART_1].RecvLen = 0;
|
|
||||||
g_uart[UART_1].Receiving = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -320,17 +305,17 @@ void UART1_RECEIVE(void)
|
|||||||
*/
|
*/
|
||||||
void UART2_RECEIVE(void)
|
void UART2_RECEIVE(void)
|
||||||
{
|
{
|
||||||
if(g_uart[UART_2].Receiving == 1)
|
if(g_uart_2.Receiving == 1)
|
||||||
{
|
{
|
||||||
if(SysTick_1ms - g_uart[UART_2].RecvIdleTiming > g_uart[UART_2].RecvTimeout)
|
if(SysTick_1ms - g_uart_2.RecvIdleTiming > g_uart_2.RecvTimeout)
|
||||||
{
|
{
|
||||||
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
g_uart_2.RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
DBG_SYS_Printf("--UART2_RECEIVE--\r\n");
|
DBG_SYS_Printf("UART2_RECEIVE");
|
||||||
Launcher_Uart_Upgrade_Process(&g_uart[UART_2]);
|
Launcher_Uart_Upgrade_Process(&g_uart_2);
|
||||||
|
|
||||||
g_uart[UART_2].RecvLen = 0;
|
g_uart_2.RecvLen = 0;
|
||||||
g_uart[UART_2].Receiving = 0;
|
g_uart_2.Receiving = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -346,19 +331,7 @@ void UART2_RECEIVE(void)
|
|||||||
*/
|
*/
|
||||||
void UART3_RECEIVE(void)
|
void UART3_RECEIVE(void)
|
||||||
{
|
{
|
||||||
if(g_uart[UART_3].Receiving == 1)
|
|
||||||
{
|
|
||||||
if(SysTick_1ms - g_uart[UART_3].RecvIdleTiming > g_uart[UART_3].RecvTimeout)
|
|
||||||
{
|
|
||||||
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
|
||||||
|
|
||||||
DBG_SYS_Printf("--UART3_RECEIVE--\r\n");
|
|
||||||
Launcher_Uart_Upgrade_Process(&g_uart[UART_3]);
|
|
||||||
|
|
||||||
g_uart[UART_3].RecvLen = 0;
|
|
||||||
g_uart[UART_3].Receiving = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*********************************************************************
|
/*********************************************************************
|
||||||
@@ -397,7 +370,7 @@ uint8_t UART0_ChangeBaud(uint32_t baudrate)
|
|||||||
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART0_IRQn);
|
NVIC_EnableIRQ(UART0_IRQn);
|
||||||
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_0],baudrate);
|
Set_Uart_recvTimeout(&g_uart_0,baudrate);
|
||||||
|
|
||||||
__enable_irq();
|
__enable_irq();
|
||||||
|
|
||||||
@@ -425,7 +398,7 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART1_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -445,7 +418,7 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
|
|||||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART1_IRQn);
|
NVIC_EnableIRQ(UART1_IRQn);
|
||||||
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
|
//Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
|
||||||
|
|
||||||
__enable_irq();
|
__enable_irq();
|
||||||
|
|
||||||
@@ -473,7 +446,7 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART2_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -493,7 +466,7 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
|
|||||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART2_IRQn);
|
NVIC_EnableIRQ(UART2_IRQn);
|
||||||
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_2],baudrate);
|
Set_Uart_recvTimeout(&g_uart_2,baudrate);
|
||||||
|
|
||||||
__enable_irq();
|
__enable_irq();
|
||||||
|
|
||||||
@@ -521,7 +494,7 @@ uint8_t UART3_ChangeBaud(uint32_t baudrate)
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART3_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -541,7 +514,7 @@ uint8_t UART3_ChangeBaud(uint32_t baudrate)
|
|||||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
NVIC_EnableIRQ(UART3_IRQn);
|
NVIC_EnableIRQ(UART3_IRQn);
|
||||||
|
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_3],baudrate);
|
//Set_Uart_recvTimeout(&g_uart[UART_3],baudrate);
|
||||||
|
|
||||||
__enable_irq();
|
__enable_irq();
|
||||||
|
|
||||||
@@ -571,10 +544,9 @@ uint8_t UART3_ChangeBaud(uint32_t baudrate)
|
|||||||
*
|
*
|
||||||
* */
|
* */
|
||||||
|
|
||||||
uint8_t MCU485_SendString_1(uint8_t *buff, uint16_t len)
|
uint8_t MCU485_SendString_0(uint8_t *buff, uint16_t len)
|
||||||
{
|
{
|
||||||
uint32_t delay_num = 0;
|
uint32_t delay_num = 0;
|
||||||
MCU485_EN1_H;
|
|
||||||
|
|
||||||
UART0_SendString(buff,len);
|
UART0_SendString(buff,len);
|
||||||
|
|
||||||
@@ -587,7 +559,6 @@ uint8_t MCU485_SendString_1(uint8_t *buff, uint16_t len)
|
|||||||
if(delay_num > 50000) break;
|
if(delay_num > 50000) break;
|
||||||
}
|
}
|
||||||
|
|
||||||
MCU485_EN1_L;
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -615,25 +586,33 @@ uint8_t MCU485_SendString_2(uint8_t *buff, uint16_t len)
|
|||||||
* Function Name : Uart0_Add_Data_To_SendBuff
|
* Function Name : Uart0_Add_Data_To_SendBuff
|
||||||
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뷢<EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뷢<EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||||
* Input :
|
* Input :
|
||||||
|
* uart_info<66><6F><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
buff<66><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
buff<66><66><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
len<65><6E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
len<65><6E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
sendCount <20><><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
sendCount <20><><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
||||||
ValidDuration <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чʱ<D0A7>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB>ms
|
ValidDuration <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Чʱ<D0A7>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB>ms
|
||||||
sendInterval <20><><EFBFBD><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB>ms
|
sendInterval <20><><EFBFBD><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB>ms
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
uint8_t Uart0_Add_Data_To_SendBuff(uint8_t *buff,uint16_t len,uint8_t sendCount,uint32_t ValidDuration,uint32_t sendInterval)
|
uint8_t Uartx_Add_Data_To_SendBuff(
|
||||||
|
UART_t *uart_info,
|
||||||
|
uint8_t *buff,
|
||||||
|
uint16_t len,
|
||||||
|
uint8_t sendCount,
|
||||||
|
uint32_t ValidDuration,
|
||||||
|
uint32_t sendInterval)
|
||||||
{
|
{
|
||||||
if( buff == NULL) return 0x01;
|
if( uart_info == NULL ) return 0x01;
|
||||||
|
if( buff == NULL ) return 0x01;
|
||||||
if( len > USART_BUFFER_SIZE ) return 0x02;
|
if( len > USART_BUFFER_SIZE ) return 0x02;
|
||||||
|
|
||||||
memset(g_uart[UART_0].SendBuffer,0,USART_BUFFER_SIZE);
|
memset(uart_info->SendBuffer,0,USART_BUFFER_SIZE);
|
||||||
memcpy(g_uart[UART_0].SendBuffer,buff,len);
|
memcpy(uart_info->SendBuffer,buff,len);
|
||||||
g_uart[UART_0].SendLen = len;
|
uart_info->SendLen = len;
|
||||||
g_uart[UART_0].SendCount = sendCount;
|
uart_info->SendCount = sendCount;
|
||||||
g_uart[UART_0].SendCnt = 0;
|
uart_info->SendCnt = 0;
|
||||||
g_uart[UART_0].SendValidDuration = ValidDuration;
|
uart_info->SendValidDuration = ValidDuration;
|
||||||
g_uart[UART_0].SendInterval = sendInterval;
|
uart_info->SendInterval = sendInterval;
|
||||||
g_uart[UART_0].SendValidTick = SysTick_1ms;
|
uart_info->SendValidTick = SysTick_1ms;
|
||||||
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
@@ -642,10 +621,12 @@ uint8_t Uart0_Add_Data_To_SendBuff(uint8_t *buff,uint16_t len,uint8_t sendCount,
|
|||||||
* Function Name : Uart0_Clear_SendBuff
|
* Function Name : Uart0_Clear_SendBuff
|
||||||
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬʱȡ<CAB1><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬʱȡ<CAB1><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
uint8_t Uart0_Clear_SendBuff(void)
|
uint8_t Uartx_Clear_SendBuff(UART_t *uart_info)
|
||||||
{
|
{
|
||||||
memset(g_uart[UART_0].SendBuffer,0,USART_BUFFER_SIZE);
|
if( uart_info == NULL ) return 0x01;
|
||||||
g_uart[UART_0].SendLen = 0x00;
|
|
||||||
|
memset(uart_info->SendBuffer,0,USART_BUFFER_SIZE);
|
||||||
|
uart_info->SendLen = 0x00;
|
||||||
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
@@ -654,40 +635,45 @@ uint8_t Uart0_Clear_SendBuff(void)
|
|||||||
* Function Name : Uart0_Avoid_Conflict_Send_Task
|
* Function Name : Uart0_Avoid_Conflict_Send_Task
|
||||||
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : Uart0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͻ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
uint8_t Uart0_Avoid_Conflict_Send_Task(void)
|
uint8_t Uartx_Avoid_Conflict_Send_Task(UART_t *uart_info)
|
||||||
{
|
{
|
||||||
if( (g_uart[UART_0].SendLen == 0x00) || (g_uart[UART_0].SendLen > USART_BUFFER_SIZE) ) return 0x01;
|
if( uart_info == NULL ) return 0x01;
|
||||||
|
|
||||||
if( g_uart[UART_0].SendCnt >= g_uart[UART_0].SendCount ) {
|
if( (uart_info->SendLen == 0x00) || (uart_info->SendLen > USART_BUFFER_SIZE) ) return 0x01;
|
||||||
|
|
||||||
|
if( uart_info->SendCnt >= uart_info->SendCount ) {
|
||||||
//<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD><EFB5BD><EFBFBD>ޣ<EFBFBD><DEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
//<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD><EFB5BD><EFBFBD>ޣ<EFBFBD><DEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||||
g_uart[UART_0].SendLen = 0x00;
|
uart_info->SendLen = 0x00;
|
||||||
return 0x02;
|
return 0x02;
|
||||||
}
|
}
|
||||||
|
|
||||||
if( SysTick_1ms - g_uart[UART_0].SendValidTick >= g_uart[UART_0].SendInterval ){
|
if( SysTick_1ms - uart_info->SendValidTick >= uart_info->SendInterval ){
|
||||||
//<2F><><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>Ч<EFBFBD>ڣ<EFBFBD><DAA3>㲻<EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>Ч<EFBFBD>ڣ<EFBFBD><DAA3>㲻<EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||||
g_uart[UART_0].SendLen = 0x00;
|
uart_info->SendLen = 0x00;
|
||||||
return 0x03;
|
return 0x03;
|
||||||
}
|
}
|
||||||
|
|
||||||
if( g_uart[UART_0].CommBusy != UART_COMMBUSY_IDLE_Flag ) return 0x04; //ͨѶ<CDA8><D1B6><EFBFBD>ڷ<EFBFBD>æ״̬
|
if( uart_info->CommBusy != UART_COMMBUSY_IDLE_Flag ) return 0x04; //ͨѶ<CDA8><D1B6><EFBFBD>ڷ<EFBFBD>æ״̬
|
||||||
|
|
||||||
//<2F><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
//<2F><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||||
if( ( g_uart[UART_0].SendCnt == 0x00 ) || ( SysTick_1ms - g_uart[UART_0].SendTick >= g_uart[UART_0].SendInterval ) )
|
if( ( uart_info->SendCnt == 0x00 ) || ( SysTick_1ms - uart_info->SendTick >= uart_info->SendInterval ) )
|
||||||
{
|
{
|
||||||
__disable_irq(); //<2F>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
__disable_irq(); //<2F>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
||||||
g_uart[UART_0].CommBusy |= UART_COMMBUSY_SEND_Flag;
|
uart_info->CommBusy |= UART_COMMBUSY_SEND_Flag;
|
||||||
g_uart[UART_0].SendIdleTick = SysTick_1ms;
|
uart_info->SendIdleTick = SysTick_1ms;
|
||||||
__enable_irq(); //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
__enable_irq(); //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
||||||
|
|
||||||
UART0_SendString(g_uart[UART_0].SendBuffer, g_uart[UART_0].SendLen);
|
if( uart_info->send_data_cf != NULL ){
|
||||||
g_uart[UART_0].SendTick = SysTick_1ms;
|
uart_info->send_data_cf(uart_info->SendBuffer, uart_info->SendLen);
|
||||||
g_uart[UART_0].SendCnt++;
|
}
|
||||||
|
|
||||||
if( g_uart[UART_0].SendCnt >= g_uart[UART_0].SendCount )
|
uart_info->SendTick = SysTick_1ms;
|
||||||
|
uart_info->SendCnt++;
|
||||||
|
|
||||||
|
if( uart_info->SendCnt >= uart_info->SendCount )
|
||||||
{
|
{
|
||||||
memset(g_uart[UART_0].SendBuffer,0,USART_BUFFER_SIZE);
|
memset(uart_info->SendBuffer,0,USART_BUFFER_SIZE);
|
||||||
g_uart[UART_0].SendLen = 0x00;
|
uart_info->SendLen = 0x00;
|
||||||
|
|
||||||
return 0x05; //ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
|
return 0x05; //ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
@@ -696,37 +682,52 @@ uint8_t Uart0_Avoid_Conflict_Send_Task(void)
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Uart0_Task(void)
|
/*******************************************************************************
|
||||||
|
* Function Name : Uartx_IDLE_State_Determination
|
||||||
|
* Description : Uartx <20><><EFBFBD><EFBFBD>״̬<D7B4>ж<EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
void Uartx_IDLE_State_Determination(UART_t *uart_info)
|
||||||
{
|
{
|
||||||
UART0_RECEIVE();
|
if( uart_info->CommBusy == UART_COMMBUSY_IDLE_Flag )
|
||||||
|
|
||||||
Uart0_Avoid_Conflict_Send_Task();
|
|
||||||
|
|
||||||
if( g_uart[UART_0].CommBusy == UART_COMMBUSY_IDLE_Flag )
|
|
||||||
{
|
{
|
||||||
/*<2A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>״̬ - <20><><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><CAB2><EFBFBD>*/
|
/*<2A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>״̬ - <20><><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><CAB2><EFBFBD>*/
|
||||||
if( g_uart[UART_0].ChangeBaudFlag == 0x01 )
|
if( uart_info->ChangeBaudFlag == 0x01 )
|
||||||
{
|
{
|
||||||
g_uart[UART_0].set_baud_cf(g_uart[UART_0].CommBaud);
|
uart_info->set_baud_cf(uart_info->CommBaud);
|
||||||
g_uart[UART_0].ChangeBaudFlag = 0x00;
|
uart_info->ChangeBaudFlag = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
}else {
|
}else {
|
||||||
/*<2A><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD><DAB7>ͷ<EFBFBD>æ״̬<D7B4><CCAC><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>״̬ - <20>ж<EFBFBD>ʹ<EFBFBD>ó<EFBFBD>ʱʱ<CAB1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ճ<EFBFBD>ʱʱ<CAB1><CAB1>һ<EFBFBD><D2BB>*/
|
/*<2A><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD><DAB7>ͷ<EFBFBD>æ״̬<D7B4><CCAC><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>״̬ - <20>ж<EFBFBD>ʹ<EFBFBD>ó<EFBFBD>ʱʱ<CAB1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ճ<EFBFBD>ʱʱ<CAB1><CAB1>һ<EFBFBD><D2BB>*/
|
||||||
if( ((g_uart[UART_0].CommBusy & UART_COMMBUSY_SEND_Flag) != 0x00 ) && ( SysTick_1ms - g_uart[UART_0].SendIdleTick >= g_uart[UART_0].RecvTimeout ) )
|
if( ((uart_info->CommBusy & UART_COMMBUSY_SEND_Flag) != 0x00 ) && ( SysTick_1ms - uart_info->SendIdleTick >= uart_info->RecvTimeout ) )
|
||||||
{
|
{
|
||||||
g_uart[UART_0].SendIdleTick = SysTick_1ms;
|
uart_info->SendIdleTick = SysTick_1ms;
|
||||||
|
|
||||||
__disable_irq(); //<2F>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
__disable_irq(); //<2F>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
||||||
g_uart[UART_0].CommBusy &= ~(UART_COMMBUSY_SEND_Flag);
|
uart_info->CommBusy &= ~(UART_COMMBUSY_SEND_Flag);
|
||||||
g_uart[UART_0].SendIdleTick = SysTick_1ms;
|
uart_info->SendIdleTick = SysTick_1ms;
|
||||||
__enable_irq(); //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
__enable_irq(); //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void Uart0_Task(void)
|
||||||
|
{
|
||||||
|
UART0_RECEIVE();
|
||||||
|
|
||||||
|
Uartx_Avoid_Conflict_Send_Task(&g_uart_0);
|
||||||
|
|
||||||
|
Uartx_IDLE_State_Determination(&g_uart_0);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Uart2_Task(void)
|
||||||
|
{
|
||||||
|
UART2_RECEIVE();
|
||||||
|
|
||||||
|
Uartx_Avoid_Conflict_Send_Task(&g_uart_2);
|
||||||
|
|
||||||
|
Uartx_IDLE_State_Determination(&g_uart_2);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
40
MCU_Driver/watchdog.c
Normal file
40
MCU_Driver/watchdog.c
Normal file
@@ -0,0 +1,40 @@
|
|||||||
|
/*
|
||||||
|
* watchdog.c
|
||||||
|
*
|
||||||
|
* Created on: Jan 9, 2026
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : WDT_Init
|
||||||
|
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD><EFBFBD>100MHz <20><>ƵԼΪ84ms
|
||||||
|
* Input : None
|
||||||
|
* Return : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void WDT_Init(void)
|
||||||
|
{
|
||||||
|
FEED_DOG();
|
||||||
|
WDOG_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : WDT_Feed
|
||||||
|
* Description : <20><><EFBFBD>Ź<EFBFBD>ι<EFBFBD><CEB9>
|
||||||
|
* Input : None
|
||||||
|
* Return : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void WDT_Feed(void)
|
||||||
|
{
|
||||||
|
FEED_DOG();
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : WDT_Reinit
|
||||||
|
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC>
|
||||||
|
*******************************************************************************/
|
||||||
|
void WDT_Reinit(void)
|
||||||
|
{
|
||||||
|
WDOG_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
@@ -11,6 +11,7 @@
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
#include "ch564_spi.h"
|
#include "ch564_spi.h"
|
||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
uint32_t spi_comm_tick = 0;
|
uint32_t spi_comm_tick = 0;
|
||||||
#define SPICOMM_TIMEOUT 10
|
#define SPICOMM_TIMEOUT 10
|
||||||
@@ -77,6 +78,8 @@ void SPI0_MasterSendByte(uint8_t data)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (SPI0_GET_TOTAL_CNT() != 0)
|
while (SPI0_GET_TOTAL_CNT() != 0)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -96,6 +99,8 @@ uint8_t SPI0_MasterRecvByte(void)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (!SPI0_GET_FIFO_CNT())
|
while (!SPI0_GET_FIFO_CNT())
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
||||||
}
|
}
|
||||||
return (SPI0_GET_FIFO());
|
return (SPI0_GET_FIFO());
|
||||||
@@ -121,6 +126,8 @@ void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (sendlen)
|
while (sendlen)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if (SPI0_GET_FIFO_CNT() < SPI0_FIFO_SIZE)
|
if (SPI0_GET_FIFO_CNT() < SPI0_FIFO_SIZE)
|
||||||
{
|
{
|
||||||
SPI0_SET_FIFO(*pbuf);
|
SPI0_SET_FIFO(*pbuf);
|
||||||
@@ -133,6 +140,8 @@ void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (SPI0_GET_TOTAL_CNT() != 0) // Wait for all the data in the FIFO to be sent
|
while (SPI0_GET_TOTAL_CNT() != 0) // Wait for all the data in the FIFO to be sent
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -160,6 +169,8 @@ void SPI0_MasterRecv(uint8_t *pbuf, uint16_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (readlen)
|
while (readlen)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if (SPI0_GET_FIFO_CNT())
|
if (SPI0_GET_FIFO_CNT())
|
||||||
{
|
{
|
||||||
*pbuf = SPI0_GET_FIFO();
|
*pbuf = SPI0_GET_FIFO();
|
||||||
@@ -193,6 +204,8 @@ void SPI0_MasterTransRecv(uint8_t *ptbuf, uint8_t *prbuf, uint16_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (sendlen)
|
while (sendlen)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if (SPI0_GET_FIFO_CNT() == 0)
|
if (SPI0_GET_FIFO_CNT() == 0)
|
||||||
{
|
{
|
||||||
SPI0_SET_FIFO(*ptbuf);
|
SPI0_SET_FIFO(*ptbuf);
|
||||||
@@ -227,6 +240,8 @@ void SPI0_DMATrans(uint8_t *pbuf, uint32_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (SPI0_GET_TOTAL_CNT())
|
while (SPI0_GET_TOTAL_CNT())
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
if(SysTick_100us - spi_comm_tick >= SPICOMM_TIMEOUT) break;
|
||||||
}
|
}
|
||||||
SPI0_SET_DMA_MODE(RB_SPI_DMA_ENABLE, DISABLE);
|
SPI0_SET_DMA_MODE(RB_SPI_DMA_ENABLE, DISABLE);
|
||||||
@@ -252,6 +267,8 @@ void SPI0_DMARecv(uint8_t *pbuf, uint32_t len)
|
|||||||
spi_comm_tick = SysTick_100us;
|
spi_comm_tick = SysTick_100us;
|
||||||
while (SPI0_GET_TOTAL_CNT())
|
while (SPI0_GET_TOTAL_CNT())
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
if(SysTick_100us - spi_comm_tick >= 1000) break;
|
if(SysTick_100us - spi_comm_tick >= 1000) break;
|
||||||
}
|
}
|
||||||
SPI0_SET_DMA_MODE(RB_SPI_DMA_ENABLE, DISABLE);
|
SPI0_SET_DMA_MODE(RB_SPI_DMA_ENABLE, DISABLE);
|
||||||
|
|||||||
34
Readme.md
34
Readme.md
@@ -2,12 +2,36 @@ BLV-C1P Launcher
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
<EFBFBD>״<EFBFBD><EFBFBD>ύ
|
#### 2026-01-19
|
||||||
|
|
||||||
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Է<EFBFBD><EFBFBD>֣<EFBFBD>
|
? 1<><31>Launcher<65>еĴ<D0B5><C4B4><EFBFBD>ֻʹ<D6BB>ô<EFBFBD><C3B4><EFBFBD>0(<28><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2(<28><><EFBFBD><EFBFBD>RS485<38>˿<EFBFBD>)<29><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD>봮<EFBFBD><EBB4AE>3<EFBFBD><33>ʹ<EFBFBD>ã<EFBFBD><C3A3>Ҳ<EFBFBD><D2B2><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1100Byte<74><EFBFBD>
|
||||||
FLASH_ROMA_ERASE <20><> EEPROM_ERASE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>СΪ4096
|
|
||||||
|
? Ŀ<>ģ<EFBFBD>CH564<36><34><EFBFBD>ڽ<EFBFBD>Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˵<EFBFBD>RAM<41><4D><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>˿<EFBFBD>ʹ<EFBFBD>õı<C3B5><C4B1><EFBFBD><EFBFBD><EFBFBD>Сֻ<D0A1><D6BB>32Kbyte<74><65><EFBFBD><EFBFBD>ʹ<EFBFBD>õĴ<C3B5><C4B4>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ͬʱʹ<CAB1>õ<EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RAM<41>ռ䲻<D5BC><E4B2BB>ʹ<EFBFBD>á<EFBFBD>
|
||||||
|
|
||||||
|
? 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2 - <20><><EFBFBD><EFBFBD>RS485ʹ<35>ܣ<EFBFBD>ͬʱͨѶ<CDA8><D1B6><EFBFBD>ӱ<EFBFBD><D3B1>Ϲ<EFBFBD><CFB9>ܡ<EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
2025-07-30
|
|
||||||
Launcher<65><72>ַ <20><>0x00000000 ~ 0x00004000
|
|
||||||
|
|
||||||
|
#### 2026-01-17
|
||||||
|
|
||||||
|
? 1<><31>Launcher<65><72>MCU Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD><EFBFBD><EFBFBD>תAPPʧ<50><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
? 2<><32>Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD>
|
||||||
|
|
||||||
|
- <20>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>**<2A>¹̼<C2B9>**<2A><><EFBFBD><EFBFBD>
|
||||||
|
- **<2A>¹̼<C2B9>**<2A><>5<EFBFBD><35>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
- д<><D0B4><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>Ӵ˲<D3B4><CBB2><EFBFBD><EFBFBD><EFBFBD>MCU Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD>ݡ<EFBFBD>
|
||||||
|
|
||||||
|
? 3<><33>Laucnher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ơ<EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#### 2026-01-04
|
||||||
|
|
||||||
|
? CH564 FLASH_ROMA_ERASE <20><> EEPROM_ERASE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>СΪ4096
|
||||||
|
?
|
||||||
|
|
||||||
|
#### 2025-07-30
|
||||||
|
|
||||||
|
? Launcher<65><72>ַ <20><>0x00000000 ~ 0x00004000
|
||||||
|
?
|
||||||
@@ -24,14 +24,17 @@
|
|||||||
#include "flash_mem_addr.h"
|
#include "flash_mem_addr.h"
|
||||||
#include "rtc.h"
|
#include "rtc.h"
|
||||||
#include "mcu_flash.h"
|
#include "mcu_flash.h"
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƽ<EFBFBD><C6BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƽ<EFBFBD><C6BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
||||||
<20>˶<EFBFBD><CBB6><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD><D0B1>붨<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD>
|
<20>˶<EFBFBD><CBB6><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD><D0B1>붨<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD>
|
||||||
Boot<6F>л<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ȡEEPROM<4F>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0>ʲô<CAB2><C3B4><EFBFBD><EFBFBD>
|
Boot<6F>л<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD>ȡEEPROM<4F>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0>ʲô<CAB2><C3B4><EFBFBD><EFBFBD>
|
||||||
<20><><EFBFBD><EFBFBD>EEPROM <20><>û<EFBFBD>б<EFBFBD><D0B1><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>ô<EFBFBD><C3B4>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>Boot<6F><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַΪ0x00<30><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ϊ0x00
|
<20><><EFBFBD><EFBFBD>EEPROM <20><>û<EFBFBD>б<EFBFBD><D0B1><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>ô<EFBFBD><C3B4>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>Boot<6F><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַΪ0x00<30><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ϊ0x00
|
||||||
*/
|
*/
|
||||||
|
#define Project_Version "--BLV_C1P_Launcher V01--" //<2F>ù<EFBFBD><C3B9>̰汾<CCB0><E6B1BE><EFBFBD>ڱ<EFBFBD><DAB1>뵽HEX/BIN <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||||
|
|
||||||
#define Project_Area 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪBoot<6F><74><EFBFBD><EFBFBD> 0x01:Boot<6F><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:APP<50><50><EFBFBD><EFBFBD>
|
#define Project_Area 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪBoot<6F><74><EFBFBD><EFBFBD> 0x01:Boot<6F><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:APP<50><50><EFBFBD><EFBFBD>
|
||||||
#define Peoject_Name "BLV_C1P_Bootload" //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
#define Peoject_Name "BLV_C1P_Launcher" //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
#define Project_FW_Version 0x01 //<2F><><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
#define Project_FW_Version 0x01 //<2F><><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>
|
||||||
#define Project_Type 0x00 //<2F><><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> BootĬ<74><C4AC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
#define Project_Type 0x00 //<2F><><EFBFBD>̶<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> BootĬ<74><C4AC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|||||||
105
User/main.c
105
User/main.c
@@ -14,6 +14,8 @@
|
|||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
|
const char Prject_File_Name[] __attribute__((section(".project_info"))) = Project_Version;
|
||||||
|
|
||||||
uint32_t test_tick = 0;
|
uint32_t test_tick = 0;
|
||||||
|
|
||||||
/*********************************************************************
|
/*********************************************************************
|
||||||
@@ -26,18 +28,18 @@ uint32_t test_tick = 0;
|
|||||||
int main(void)
|
int main(void)
|
||||||
{
|
{
|
||||||
uint8_t sys_reset = 0;
|
uint8_t sys_reset = 0;
|
||||||
uint32_t wdt_reste_tick = 0;
|
|
||||||
unsigned char Buffer;
|
unsigned char Buffer;
|
||||||
|
|
||||||
unsigned long DATA_ROM_ADDR;
|
|
||||||
|
|
||||||
|
/* - <20>ϵ<EFBFBD>ǰ<EFBFBD><C7B0>Ҫ<EFBFBD>رտ<D8B1><D5BF>Ź<EFBFBD>
|
||||||
|
* - ԭ<><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>и<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD>һֱ<D2BB><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
|
||||||
|
* */
|
||||||
|
WDT_Reinit();
|
||||||
SystemCoreClockUpdate(); //ϵͳ<CFB5><CDB3>ʼ<EFBFBD><CABC>
|
SystemCoreClockUpdate(); //ϵͳ<CFB5><CDB3>ʼ<EFBFBD><CABC>
|
||||||
Systick_Init();
|
Systick_Init();
|
||||||
|
|
||||||
UARTx_Init(UART_0,512000);
|
UARTx_Init(UART_0,512000);
|
||||||
UARTx_Init(UART_1,512000);
|
|
||||||
UARTx_Init(UART_2,512000);
|
UARTx_Init(UART_2,512000);
|
||||||
UARTx_Init(UART_3,512000);
|
|
||||||
|
|
||||||
SYS_LED_Init();
|
SYS_LED_Init();
|
||||||
|
|
||||||
@@ -48,36 +50,37 @@ int main(void)
|
|||||||
Get_Flash_Size(&Buffer);
|
Get_Flash_Size(&Buffer);
|
||||||
|
|
||||||
if(Buffer){
|
if(Buffer){
|
||||||
DATA_ROM_ADDR = 0x70000;
|
DBG_SYS_Printf("CH564 ROMA :0x0 - 0x6FFFF");
|
||||||
|
DBG_SYS_Printf("CH564 EEPROM :0x70000 - 0x77FFF");
|
||||||
}else {
|
}else {
|
||||||
DATA_ROM_ADDR = 0x30000;
|
DBG_SYS_Printf("CH564 ROMA :0x0 - 0x2FFFF");
|
||||||
|
DBG_SYS_Printf("CH564 EEPROM :0x30000 - 0x37FFF");
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_SYS_Printf("RTC_Init \r\n");
|
|
||||||
|
|
||||||
RTC_Init();
|
|
||||||
|
|
||||||
DBG_SYS_Printf("EEPROM_Init - DATA_ROM_ADDR:%x\r\n",DATA_ROM_ADDR);
|
|
||||||
|
|
||||||
EEPROM_Init();
|
EEPROM_Init();
|
||||||
|
|
||||||
DBG_SYS_Printf("G PARA \r\n");
|
|
||||||
|
|
||||||
memset((uint8_t *)&g_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
memset((uint8_t *)&g_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
||||||
memset((uint8_t *)&g_mcu_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
memset((uint8_t *)&g_mcu_app_feature,0,sizeof(G_SYS_FEATURE_T));
|
||||||
memset((uint8_t *)&g_update_recode,0,sizeof(UPDATE_RECORD_T));
|
memset((uint8_t *)&g_update_recode,0,sizeof(UPDATE_RECORD_T));
|
||||||
|
|
||||||
DBG_SYS_Printf("G_SYS_FEATURE_T : %d \r\n",sizeof(G_SYS_FEATURE_T));
|
DBG_SYS_Printf("Project Name:%s",Prject_File_Name);
|
||||||
|
|
||||||
sys_reset = RCC_GET_GLOB_RST_KEEP();
|
sys_reset = RCC_GET_GLOB_RST_KEEP(); //<2F><>λ<EFBFBD><CEBB><EFBFBD>ּĴ<D6BC><C4B4><EFBFBD>
|
||||||
if(sys_reset == 0x00)
|
if(sys_reset == 0x00)
|
||||||
{
|
{
|
||||||
DBG_SYS_Printf("<EFBFBD>ϵ縴λ \r\n");
|
DBG_SYS_Printf("<EFBFBD>ϵ縴λ \r\n");
|
||||||
|
g_Boot_Time = 10000;
|
||||||
}else if(sys_reset == 0x02){
|
}else if(sys_reset == 0x02){
|
||||||
|
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
|
||||||
|
g_Boot_Time = 30000;
|
||||||
|
|
||||||
|
}else if(sys_reset == 0x03){
|
||||||
|
DBG_SYS_Printf("MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
|
||||||
|
g_Boot_Time = 3000;
|
||||||
|
|
||||||
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><EFBFBD><EFBFBD>λ \r\n");
|
|
||||||
}else {
|
}else {
|
||||||
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
|
DBG_SYS_Printf("<EFBFBD>쳣<EFBFBD><EFBFBD>λ \r\n");
|
||||||
|
g_Boot_Time = 30000;
|
||||||
}
|
}
|
||||||
|
|
||||||
RCC_SET_GLOB_RST_KEEP(0x01);
|
RCC_SET_GLOB_RST_KEEP(0x01);
|
||||||
@@ -86,48 +89,66 @@ int main(void)
|
|||||||
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||||
if(g_jump_flag == 2) {
|
if(g_jump_flag == 2) {
|
||||||
MCU_APP_Write(); //MCU<43><55>Ҫд<D2AA><D0B4>
|
MCU_APP_Write(); //MCU<43><55>Ҫд<D2AA><D0B4>
|
||||||
g_jump_flag = 0;
|
|
||||||
|
|
||||||
// printf("Jump APP 1\r\n");
|
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
|
||||||
//
|
|
||||||
// Delay_Ms(1000);
|
|
||||||
//
|
|
||||||
// __disable_irq();
|
|
||||||
// Jump_APP(g_mcu_app_feature.app_start_addr);
|
|
||||||
|
|
||||||
NVIC_EnableIRQ( Software_IRQn );
|
//WDT_Init();
|
||||||
Delay_Ms( 20 );
|
//RCC_SET_GLOB_RST_KEEP(0x03);
|
||||||
NVIC_SetPendingIRQ( Software_IRQn );
|
Delay_Ms(1000);
|
||||||
|
|
||||||
|
// - <20><><EFBFBD><EFBFBD>ȫ<EFBFBD>ָ<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>оƬ<D0BE><C6AC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Code Flash
|
||||||
|
RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
|
||||||
|
while(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
WDT_Init();
|
||||||
|
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
SYS_LED_Task();
|
SYS_LED_Task();
|
||||||
|
|
||||||
Uart0_Task();
|
Uart0_Task();
|
||||||
|
|
||||||
UART1_RECEIVE();
|
Uart2_Task();
|
||||||
UART2_RECEIVE();
|
|
||||||
UART3_RECEIVE();
|
|
||||||
|
|
||||||
RTC_TASK();
|
|
||||||
|
|
||||||
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||||
if(SysTick_1ms - g_Boot_Tick >= 5000)
|
if(g_jump_flag == 0x00)
|
||||||
{
|
{
|
||||||
g_Boot_Tick = SysTick_1ms;
|
if(SysTick_1ms - g_Boot_Tick >= 5000)
|
||||||
|
|
||||||
if(g_jump_flag == 0x00) //APP У<><D0A3><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>תAPP
|
|
||||||
{
|
{
|
||||||
printf("Jump APP 2\r\n");
|
g_Boot_Tick = SysTick_1ms;
|
||||||
|
|
||||||
|
DBG_SYS_Printf("Jump APP 2\r\n");
|
||||||
|
|
||||||
Delay_Ms(1000);
|
Delay_Ms(1000);
|
||||||
|
|
||||||
|
WDT_Reinit();
|
||||||
|
|
||||||
NVIC_EnableIRQ( Software_IRQn );
|
NVIC_EnableIRQ( Software_IRQn );
|
||||||
Delay_Ms( 20 );
|
Delay_Ms( 20 );
|
||||||
|
HSI_ON();
|
||||||
|
CLKSEL_HSI();
|
||||||
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
NVIC_SetPendingIRQ( Software_IRQn );
|
NVIC_SetPendingIRQ( Software_IRQn );
|
||||||
}
|
}
|
||||||
|
}else {
|
||||||
|
if(SysTick_1ms - g_Boot_Tick >= g_Boot_Time)
|
||||||
|
{
|
||||||
|
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ ....");
|
||||||
|
RCC_SET_GLOB_RST_KEEP(0x02);
|
||||||
|
|
||||||
|
Delay_Ms(1000);
|
||||||
|
|
||||||
|
RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
|
||||||
|
while(1);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -145,6 +166,7 @@ void NMI_Handler(void)
|
|||||||
{
|
{
|
||||||
while (1)
|
while (1)
|
||||||
{
|
{
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -172,12 +194,11 @@ void HardFault_Handler(void)
|
|||||||
while(1);
|
while(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* - <20><>תAPP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SW_Handler<65>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ת
|
||||||
|
* - <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>SW_Handler<65>жϺ<D0B6><CFBA><EFBFBD>оƬ<D0BE><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>תAPP */
|
||||||
void SW_Handler(void) {
|
void SW_Handler(void) {
|
||||||
printf("SW_Handler Jump App\r\n");
|
|
||||||
Delay_Ms( 100 );
|
|
||||||
|
|
||||||
__disable_irq();
|
__asm volatile("li a6, 0x01000");
|
||||||
__asm volatile("li a6, 0x07000");
|
|
||||||
__asm volatile("jr a6");
|
__asm volatile("jr a6");
|
||||||
while(1);
|
while(1);
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user