Boonlive_RD_Embedded/RCU_C1P_Launcher
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fix:修改芯片时钟初始化函数

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This commit is contained in:
caocong
2026-02-10 17:48:22 +08:00
parent 5e9338cee4
commit bba63c4763
47 changed files with 460 additions and 36434 deletions
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53
MCU_Driver/bootload_fun.c
View File

@@ -45,7 +45,14 @@ void Boot_Timeout_Task(void)
*******************************************************************************/
void SPI_FLASH_APP_Data_Erase(void)
{
for(uint8_t i = 0;i < 7;i++)
Flash_Erase_Page(0); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(uint8_t i = 1;i < 16;i++)
{
WDT_Feed();
Flash_Erase_Sector(i);
}
for(uint8_t i = 1;i < 7;i++)
{
WDT_Feed();
@@ -140,8 +147,8 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
__enable_irq();
DBG_SYS_Printf("Len %d \r\n",g_rev->deal_len);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UARTx_Buff:",g_rev->deal_buff,g_rev->deal_len);
// DBG_SYS_Printf("Len %d \r\n",g_rev->deal_len);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UARTx_Buff:",g_rev->deal_buff,g_rev->deal_len);
temp_val = g_rev->deal_buff[BCOMM_FMT_LEN_H];
temp_val <<= 8;
@@ -149,7 +156,8 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
if(temp_val != g_rev->deal_len)
{
DBG_SYS_Printf("Len Fail \r\n");
DBG_SYS_Printf("Len Fail %d - %d\r\n",g_rev->deal_len,temp_val);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UARTx_Buff:",g_rev->deal_buff,g_rev->deal_len);
return 0x01;
}
@@ -288,11 +296,17 @@ uint8_t Launcher_Uart_Upgrade_Process(UART_t *g_rev)
if(g_Boot_Time < 10) g_Boot_Time = 10;
g_Boot_Time = g_Boot_Time * 1000;
DBG_SYS_Printf("BaudSet: %d",temp_val);
DBG_SYS_Printf("bootTimeout: %d",g_Boot_Time);
g_rev->ChangeBaudFlag = 0x01;
g_rev->CommBaud = temp_val;
if(g_rev->CommBaud != temp_val)
{
g_rev->ChangeBaudFlag = 0x01;
g_rev->CommBaud = temp_val;
DBG_SYS_Printf("BaudSet: %d",temp_val);
}else {
DBG_SYS_Printf("Baud Not Change: %d",temp_val);
}
g_rev->ackBuffer[BCOMM_FMT_PARAM] = BCOMM_CMD_ReplySUCC;
g_rev->ackLen = 1;
@@ -838,13 +852,14 @@ uint8_t Read_APP_Feature(void)
if( update_flag == 0x01 )
{
/*˵<><CBB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ǹ<EFBFBD><C7B8>µ<EFBFBD>APP<50><50>
* <20><>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD>Ϊ0x05<30><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>ΪAPP <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* ÿд<C3BF><D0B4>һ<EFBFBD>Σ<EFBFBD>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>1<EFBFBD><31>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD>Ϊ0<CEAA><30><EFBFBD>㲻<EFBFBD><E3B2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*- <20><>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD>Ϊ0x05<30><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>ΪAPP <20>̼<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*- ÿд<C3BF><D0B4>һ<EFBFBD>Σ<EFBFBD>app_flag <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB>1<EFBFBD><31>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD>Ϊ0<CEAA><30><EFBFBD>㲻<EFBFBD><E3B2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* */
g_update_flag.app_flag = 0x05;
}else {
/**/
if( (g_update_flag.app_flag != 0x00) && (g_update_flag.app_flag <= 0x05) )
/* - <20><>APP֮ǰû<C7B0><C3BB>д<EFBFBD><D0B4><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* */
if( (g_update_flag.app_flag != 0x00) && (g_update_flag.app_flag != App_Procedure_Ready) && (g_update_flag.app_flag <= 0x05) )
{
g_update_flag.app_flag--;
update_flag = 0x02;
@@ -868,12 +883,14 @@ uint8_t Read_APP_Feature(void)
}
DBG_SYS_Printf("--<2D><><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>APP<50>̼<EFBFBD>--");
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
}else if( update_flag == 0x02 ){
DBG_SYS_Printf("--APP<50>̼<EFBFBD><CCBC><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d --",g_update_flag.app_flag);
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
}else{
DBG_SYS_Printf("--APP<50>̼<EFBFBD><CCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%x--",g_update_flag.app_flag);
}
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡMCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>ͬʱ<CDAC><CAB1>֤APP<50>ĺϷ<C4BA><CFB7><EFBFBD>*/
rev = Read_APP_Feature_Info(0x01,&g_mcu_app_feature);
@@ -1038,7 +1055,7 @@ uint8_t MCU_APP_Write(void)
uint16_t crcVal = 0,crcNumIndex = 0;
uint32_t crc_data_len = 0;
SPIFLASH_Read_Update_Recode(&g_update_recode); //<2F><>ȡAPPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
g_update_recode.mcuflash_fw_count++;
DBG_SYS_Printf("MCU Flash <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>");
@@ -1161,6 +1178,7 @@ uint8_t MCU_APP_Write(void)
/*д<><D0B4>ʧ<EFBFBD><CAA7> - ʧ<>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD><EFBFBD>һ*/
g_update_recode.mcuflash_fw_fail++;
SPIFLASH_Write_Update_Recode(&g_update_recode);
SPIFLASH_Read_Update_Recode(&g_update_recode); //<2F><>ȡAPPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
return 0x01;
}
@@ -1174,6 +1192,7 @@ uint8_t MCU_APP_Write(void)
/*APP<50><50><EFBFBD>±<EFBFBD>־λ - ״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>*/
g_update_flag.app_flag = App_Procedure_Ready;
SPIFLASH_Write_APP_Upate_Flag_Info(&g_update_flag);
SPIFLASH_Read_Update_Recode(&g_update_recode); //<2F><>ȡAPPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
/*4<><34>У<EFBFBD><D0A3><EFBFBD>ɹ<EFBFBD>*/
DBG_SYS_Printf("MCU APP Update Succ!!");
@@ -1202,7 +1221,7 @@ uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info)
read_len |= g_flash_buff[EEPROM_Offset_Datalen];
DBG_SYS_Printf("%s read_len : %d ",__func__,read_len);
if(read_len == UPDATE_RECORD_INFO_Size)
if(read_len == sizeof(UPDATE_RECORD_T) )
{
if(EEPROM_CheckSum(&g_flash_buff[EEPROM_Offset_Data],read_len) == g_flash_buff[EEPROM_Offset_Check]){
@@ -1238,16 +1257,16 @@ uint8_t SPIFLASH_Read_Update_Recode(UPDATE_RECORD_T *info)
*******************************************************************************/
uint8_t SPIFLASH_Write_Update_Recode(UPDATE_RECORD_T *info)
{
uint16_t save_len = UPDATE_RECORD_INFO_Size;
uint16_t save_len = sizeof(UPDATE_RECORD_T);
memset(g_flash_buff,0,sizeof(g_flash_buff));
g_flash_buff[EEPROM_Offset_SaveFlag] = EEPROM_SVAE_FLAG;
g_flash_buff[EEPROM_Offset_Datalen] = save_len & 0xFF;
g_flash_buff[EEPROM_Offset_Datalen] = (save_len >> 8) & 0xFF;
g_flash_buff[EEPROM_Offset_Datalen + 1] = (save_len >> 8) & 0xFF;
memcpy(&g_flash_buff[EEPROM_Offset_Data],(uint8_t *)info,save_len);
g_flash_buff[3] = EEPROM_CheckSum(&g_flash_buff[4],save_len);
g_flash_buff[3] = EEPROM_CheckSum(&g_flash_buff[EEPROM_Offset_Data],save_len);
save_len+=4;
Flash_Write(g_flash_buff, APP_FEATURE_SIZE, SPIFLASH_UPDATE_RECORD_Addr);

6
MCU_Driver/debug.c
View File

@@ -14,6 +14,7 @@ volatile uint32_t SysTick_100us = 0;
volatile uint32_t SysTick_1ms = 0;
volatile uint32_t SysTick_1s = 0;
void Systick_Init(void)
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>*/
@@ -280,12 +281,12 @@ void my_printf(const char *fmt, ...)
void Dbg_Println(int DbgOptBit ,const char *fmt, ...)
{
#if DBG_LOG_EN
char ch;
va_list ap;
if ( (DBG_LOG_EN & DBG_BIT_SYS_STATUS) != 0x00 )
if ( (Dbg_Switch & DbgOptBit ) != 0x00 )
{
SysTick_Now = SysTick_1ms;
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
@@ -337,6 +338,7 @@ void Dbg_Println(int DbgOptBit ,const char *fmt, ...)
va_end(ap);
printf("\r\n");
}
#endif
}

12
MCU_Driver/inc/flash_mem_addr.h
View File

@@ -25,12 +25,12 @@
#define SPIFLASH_APP_End_Addr 0x0006FFFF
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define SPIFLASH_LOGIC_FILE_Start_Addr 0x00070000
#define SPIFLASH_LOGIC_DataFlag_ADDRESS 0x00070000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SPIFLASH_LOGIC_DataSize_ADDRESS 0x00070004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SPIFLASH_LOGIC_DataMD5_ADDRESS 0x00070008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SPIFLASH_LOGIC_DataStart_ADDRESS 0x00070200 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SPIFLASH_LOGIC_FILE_End_Addr 0x000FFFFF
#define SPIFLASH_LOGIC_FILE_Start_Addr 0x00090000
#define SPIFLASH_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SPIFLASH_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SPIFLASH_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SPIFLASH_LOGIC_DataStart_ADDRESS 0x00090200 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SPIFLASH_LOGIC_FILE_End_Addr 0x000FFFFF
#endif /* MCU_DRIVER_INC_FLASH_MEM_ADDR_H_ */

4
MCU_Driver/inc/uart.h
View File

@@ -25,7 +25,7 @@
#define Recv_115200_TimeOut 3 //ms
#define Recv_512000_TimeOut 3 //ms
#define USART_BUFFER_SIZE 512
#define USART_BUFFER_SIZE 1100
typedef uint8_t (*Uart_prt)(uint8_t * ,uint16_t );
@@ -97,6 +97,7 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate);
uint8_t UART3_ChangeBaud(uint32_t baudrate);
uint8_t MCU485_SendString_0(uint8_t *buff, uint16_t len);
uint8_t MCU485_SendString_1(uint8_t *buff, uint16_t len);
uint8_t MCU485_SendString_2(uint8_t *buff, uint16_t len);
uint8_t Uartx_Add_Data_To_SendBuff(UART_t *uart_info,uint8_t *buff,uint16_t len,uint8_t sendCount,uint32_t ValidDuration,uint32_t sendInterval);
@@ -104,6 +105,7 @@ uint8_t Uartx_Clear_SendBuff(UART_t *uart_info);
uint8_t Uartx_Avoid_Conflict_Send_Task(UART_t *uart_info);
void Uart0_Task(void);
void Uart1_Task(void);
void Uart2_Task(void);
#endif /* MCU_DRIVER_INC_UART_H_ */

14
MCU_Driver/mcu_flash.c
View File

@@ -93,7 +93,7 @@ uint8_t MCU_APP_Flash_Read(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t rea
sta = FLASH_ROMA_READ(readAddr, pBuffer, NumByteToWrite);
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
DBG_SYS_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
return 0x01;
}
@@ -125,7 +125,7 @@ uint8_t MCU_APP_Flash_Erase(uint32_t readAddr,uint16_t NumByteToWrite)
FLASH_Lock();
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", readAddr, sta);
DBG_SYS_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", readAddr, sta);
return 0x01;
}
@@ -142,13 +142,13 @@ uint8_t MCU_APP_Flash_ALLErase(void)
for(uint32_t i=MCU_APP_Flash_Start_Addr;i<MCU_APP_Flash_End_Addr;i+=MCU_APP_Flash_PageSize)
{
DBG_Printf("MCU FLASH_ROMA_ERASE - %x!! \r\n", i);
DBG_SYS_Printf("MCU FLASH_ROMA_ERASE - %x!! \r\n", i);
FLASH_Unlock();
sta = FLASH_ROMA_ERASE(i, MCU_APP_Flash_PageSize);
FLASH_Lock();
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
DBG_SYS_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
return 0x01;
}
}
@@ -208,7 +208,7 @@ uint8_t MCU_EEPROM_Read(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t readAd
sta = EEPROM_READ(readAddr, pBuffer, NumByteToWrite);
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
DBG_SYS_Printf("MCU FLASH_ROMA_READ failed %x!! Err Code %x\r\n", readAddr, sta);
return 0x01;
}
@@ -237,7 +237,7 @@ uint8_t MCU_EEPROM_Erase(uint32_t eraseAddr,uint16_t length)
FLASH_Lock();
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU MCU_EEPROM_Erase failed %x!! Err Code %x\r\n", eraseAddr, sta);
DBG_SYS_Printf("MCU MCU_EEPROM_Erase failed %x!! Err Code %x\r\n", eraseAddr, sta);
return 0x01;
}
@@ -259,7 +259,7 @@ uint8_t MCU_EEPROM_ALLErase(void)
FLASH_Lock();
if (sta != FLASH_COMPLETE){
DBG_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
DBG_SYS_Printf("MCU FLASH_ROMA_ERASE failed %x!! Err Code %x\r\n", i, sta);
return 0x01;
}
}

155
MCU_Driver/uart.c
View File

@@ -18,12 +18,12 @@
#include <string.h>
/* Bootload <20>й滮<D0B9><E6BBAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* 1<><31><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>0
* 1<><31><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>1
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - <20><><EFBFBD><EFBFBD>2
* - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD>
*/
UART_t g_uart_0;
UART_t g_uart_1;
UART_t g_uart_2;
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
@@ -54,8 +54,8 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_BaudRateCfg(buad);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
@@ -65,11 +65,6 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
memset(&g_uart_0,0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart_0,buad);
g_uart_0.send_data_cf = MCU485_SendString_0;
g_uart_0.set_baud_cf = UART0_ChangeBaud;
break;
case UART_1:
UART1_Reset();
@@ -79,18 +74,23 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_BaudRateCfg(buad);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
memset(&g_uart_1,0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart_1,buad);
g_uart_1.send_data_cf = MCU485_SendString_1;
g_uart_1.set_baud_cf = UART1_ChangeBaud;
break;
case UART_2:
//RS485ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
MCU485_EN2_L;
UART2_Reset();
@@ -99,9 +99,10 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_BaudRateCfg(buad);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
@@ -109,6 +110,7 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
NVIC_EnableIRQ(UART2_IRQn);
memset(&g_uart_2,0,sizeof(UART_t));
g_uart_2.CommBaud = buad;
Set_Uart_recvTimeout(&g_uart_2,buad);
g_uart_2.send_data_cf = MCU485_SendString_2;
@@ -122,8 +124,8 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_BaudRateCfg(buad);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
@@ -170,14 +172,7 @@ void UART0_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart_0.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_0.RecvLen = 0x00;
g_uart_0.RecvBuffer[g_uart_0.RecvLen] = UART0_RecvByte();
g_uart_0.RecvLen += 1;
g_uart_0.Receiving = 0x01;
g_uart_0.RecvIdleTiming = SysTick_1ms;
//<2F><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD>æ״̬
g_uart_0.CommBusy |= UART_COMMBUSY_RECV_Flag;
break;
}
@@ -199,11 +194,11 @@ void UART1_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
// if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
// g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
// g_uart[UART_1].RecvLen += 1;
// g_uart[UART_1].Receiving = 0x01;
// g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
if( (g_uart_1.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_1.RecvLen = 0x00;
g_uart_1.RecvBuffer[g_uart_1.RecvLen] = UART1_RecvByte();
g_uart_1.RecvLen += 1;
g_uart_1.Receiving = 0x01;
g_uart_1.RecvIdleTiming = SysTick_1ms;
break;
}
}
@@ -249,11 +244,7 @@ void UART3_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
// if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
// g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
// g_uart[UART_3].RecvLen += 1;
// g_uart[UART_3].Receiving = 0x01;
// g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
break;
}
}
@@ -291,11 +282,21 @@ void UART0_RECEIVE(void)
*/
void UART1_RECEIVE(void)
{
if(g_uart_1.Receiving == 0x01)
{
if(SysTick_1ms - g_uart_1.RecvIdleTiming >= g_uart_1.RecvTimeout)
{
g_uart_1.RecvIdleTiming = SysTick_1ms;
DBG_SYS_Printf("UART1_RECEIVE");
Launcher_Uart_Upgrade_Process(&g_uart_1);
g_uart_1.RecvLen = 0;
g_uart_1.Receiving = 0;
}
}
}
/*********************************************************************
* @fn UART2_RECEIVE
*
@@ -321,7 +322,6 @@ void UART2_RECEIVE(void)
}
/*********************************************************************
* @fn USART3_RECEIVE
*
@@ -352,23 +352,23 @@ uint8_t UART0_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART0_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
// UART0_Reset();
//
// GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
// GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
// GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_BaudRateCfg(baudrate);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
// R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// // FIFO open, trigger point 14 bytes
// R8_UART0_LCR = RB_LCR_WORD_SZ;
// R8_UART0_IER = RB_IER_TXD_EN;
UART0_CLR_RXFIFO();
UART0_CLR_TXFIFO();
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
// UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
// NVIC_EnableIRQ(UART0_IRQn);
Set_Uart_recvTimeout(&g_uart_0,baudrate);
@@ -403,6 +403,8 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
NVIC_DisableIRQ(UART1_IRQn);
UART1_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
@@ -410,18 +412,22 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_BaudRateCfg(baudrate);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
UART1_CLR_RXFIFO();
UART1_CLR_TXFIFO();
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
//Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
Set_Uart_recvTimeout(&g_uart_1,baudrate);
__enable_irq();
return 0;
}
@@ -444,6 +450,7 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
DBG_SYS_Printf("%s - %d",__func__,baudrate);
while(1)
{
if( UART2_GetLinSTA() & RB_LSR_TX_ALL_EMP )
@@ -451,6 +458,8 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
NVIC_DisableIRQ(UART2_IRQn);
UART2_Reset();
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
@@ -458,18 +467,23 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_BaudRateCfg(baudrate);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
UART2_CLR_RXFIFO();
UART2_CLR_TXFIFO();
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART2_IRQn);
Set_Uart_recvTimeout(&g_uart_2,baudrate);
__enable_irq();
DBG_SYS_Printf("%s - SUCC",__func__);
return 0;
}
@@ -506,8 +520,8 @@ uint8_t UART3_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_BaudRateCfg(baudrate);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
@@ -562,6 +576,24 @@ uint8_t MCU485_SendString_0(uint8_t *buff, uint16_t len)
return 0x00;
}
uint8_t MCU485_SendString_1(uint8_t *buff, uint16_t len)
{
uint32_t delay_num = 0;
UART1_SendString(buff,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
if((R8_UART1_LSR & RB_LSR_TX_ALL_EMP)) break;
Delay_Us(1);
delay_num++;
if(delay_num > 50000) break;
}
return 0x00;
}
uint8_t MCU485_SendString_2(uint8_t *buff, uint16_t len)
{
uint32_t delay_num = 0;
@@ -713,11 +745,20 @@ void Uartx_IDLE_State_Determination(UART_t *uart_info)
void Uart0_Task(void)
{
UART0_RECEIVE();
// UART0_RECEIVE();
//
// Uartx_Avoid_Conflict_Send_Task(&g_uart_0);
//
// Uartx_IDLE_State_Determination(&g_uart_0);
}
Uartx_Avoid_Conflict_Send_Task(&g_uart_0);
void Uart1_Task(void)
{
UART1_RECEIVE();
Uartx_IDLE_State_Determination(&g_uart_0);
Uartx_Avoid_Conflict_Send_Task(&g_uart_1);
Uartx_IDLE_State_Determination(&g_uart_1);
}
void Uart2_Task(void)