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fix:修改芯片时钟初始化函数

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This commit is contained in:
caocong
2026-02-10 17:48:22 +08:00
parent 5e9338cee4
commit bba63c4763
47 changed files with 460 additions and 36434 deletions
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155
MCU_Driver/uart.c
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@@ -18,12 +18,12 @@
#include <string.h>
/* Bootload <20>й滮<D0B9><E6BBAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* 1<><31><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>0
* 1<><31><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>1
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - <20><><EFBFBD><EFBFBD>2
* - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD>
*/
UART_t g_uart_0;
UART_t g_uart_1;
UART_t g_uart_2;
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
@@ -54,8 +54,8 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_BaudRateCfg(buad);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
@@ -65,11 +65,6 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
memset(&g_uart_0,0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart_0,buad);
g_uart_0.send_data_cf = MCU485_SendString_0;
g_uart_0.set_baud_cf = UART0_ChangeBaud;
break;
case UART_1:
UART1_Reset();
@@ -79,18 +74,23 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_BaudRateCfg(buad);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
memset(&g_uart_1,0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart_1,buad);
g_uart_1.send_data_cf = MCU485_SendString_1;
g_uart_1.set_baud_cf = UART1_ChangeBaud;
break;
case UART_2:
//RS485ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
MCU485_EN2_L;
UART2_Reset();
@@ -99,9 +99,10 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_BaudRateCfg(buad);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
@@ -109,6 +110,7 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
NVIC_EnableIRQ(UART2_IRQn);
memset(&g_uart_2,0,sizeof(UART_t));
g_uart_2.CommBaud = buad;
Set_Uart_recvTimeout(&g_uart_2,buad);
g_uart_2.send_data_cf = MCU485_SendString_2;
@@ -122,8 +124,8 @@ void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_BaudRateCfg(buad);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
@@ -170,14 +172,7 @@ void UART0_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart_0.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_0.RecvLen = 0x00;
g_uart_0.RecvBuffer[g_uart_0.RecvLen] = UART0_RecvByte();
g_uart_0.RecvLen += 1;
g_uart_0.Receiving = 0x01;
g_uart_0.RecvIdleTiming = SysTick_1ms;
//<2F><>ǰ<EFBFBD><C7B0><EFBFBD>ڷ<EFBFBD>æ״̬
g_uart_0.CommBusy |= UART_COMMBUSY_RECV_Flag;
break;
}
@@ -199,11 +194,11 @@ void UART1_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
// if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
// g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
// g_uart[UART_1].RecvLen += 1;
// g_uart[UART_1].Receiving = 0x01;
// g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
if( (g_uart_1.RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart_1.RecvLen = 0x00;
g_uart_1.RecvBuffer[g_uart_1.RecvLen] = UART1_RecvByte();
g_uart_1.RecvLen += 1;
g_uart_1.Receiving = 0x01;
g_uart_1.RecvIdleTiming = SysTick_1ms;
break;
}
}
@@ -249,11 +244,7 @@ void UART3_IRQHandler(void)
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
// if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
// g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
// g_uart[UART_3].RecvLen += 1;
// g_uart[UART_3].Receiving = 0x01;
// g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
break;
}
}
@@ -291,11 +282,21 @@ void UART0_RECEIVE(void)
*/
void UART1_RECEIVE(void)
{
if(g_uart_1.Receiving == 0x01)
{
if(SysTick_1ms - g_uart_1.RecvIdleTiming >= g_uart_1.RecvTimeout)
{
g_uart_1.RecvIdleTiming = SysTick_1ms;
DBG_SYS_Printf("UART1_RECEIVE");
Launcher_Uart_Upgrade_Process(&g_uart_1);
g_uart_1.RecvLen = 0;
g_uart_1.Receiving = 0;
}
}
}
/*********************************************************************
* @fn UART2_RECEIVE
*
@@ -321,7 +322,6 @@ void UART2_RECEIVE(void)
}
/*********************************************************************
* @fn USART3_RECEIVE
*
@@ -352,23 +352,23 @@ uint8_t UART0_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART0_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
// UART0_Reset();
//
// GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
// GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
// GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_BaudRateCfg(baudrate);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
// R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// // FIFO open, trigger point 14 bytes
// R8_UART0_LCR = RB_LCR_WORD_SZ;
// R8_UART0_IER = RB_IER_TXD_EN;
UART0_CLR_RXFIFO();
UART0_CLR_TXFIFO();
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
// UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
// NVIC_EnableIRQ(UART0_IRQn);
Set_Uart_recvTimeout(&g_uart_0,baudrate);
@@ -403,6 +403,8 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
NVIC_DisableIRQ(UART1_IRQn);
UART1_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
@@ -410,18 +412,22 @@ uint8_t UART1_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_BaudRateCfg(baudrate);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
UART1_CLR_RXFIFO();
UART1_CLR_TXFIFO();
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
//Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
Set_Uart_recvTimeout(&g_uart_1,baudrate);
__enable_irq();
return 0;
}
@@ -444,6 +450,7 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
DBG_SYS_Printf("%s - %d",__func__,baudrate);
while(1)
{
if( UART2_GetLinSTA() & RB_LSR_TX_ALL_EMP )
@@ -451,6 +458,8 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
NVIC_DisableIRQ(UART2_IRQn);
UART2_Reset();
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
@@ -458,18 +467,23 @@ uint8_t UART2_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_BaudRateCfg(baudrate);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
UART2_CLR_RXFIFO();
UART2_CLR_TXFIFO();
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART2_IRQn);
Set_Uart_recvTimeout(&g_uart_2,baudrate);
__enable_irq();
DBG_SYS_Printf("%s - SUCC",__func__);
return 0;
}
@@ -506,8 +520,8 @@ uint8_t UART3_ChangeBaud(uint32_t baudrate)
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_BaudRateCfg(baudrate);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
@@ -562,6 +576,24 @@ uint8_t MCU485_SendString_0(uint8_t *buff, uint16_t len)
return 0x00;
}
uint8_t MCU485_SendString_1(uint8_t *buff, uint16_t len)
{
uint32_t delay_num = 0;
UART1_SendString(buff,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
if((R8_UART1_LSR & RB_LSR_TX_ALL_EMP)) break;
Delay_Us(1);
delay_num++;
if(delay_num > 50000) break;
}
return 0x00;
}
uint8_t MCU485_SendString_2(uint8_t *buff, uint16_t len)
{
uint32_t delay_num = 0;
@@ -713,11 +745,20 @@ void Uartx_IDLE_State_Determination(UART_t *uart_info)
void Uart0_Task(void)
{
UART0_RECEIVE();
// UART0_RECEIVE();
//
// Uartx_Avoid_Conflict_Send_Task(&g_uart_0);
//
// Uartx_IDLE_State_Determination(&g_uart_0);
}
Uartx_Avoid_Conflict_Send_Task(&g_uart_0);
void Uart1_Task(void)
{
UART1_RECEIVE();
Uartx_IDLE_State_Determination(&g_uart_0);
Uartx_Avoid_Conflict_Send_Task(&g_uart_1);
Uartx_IDLE_State_Determination(&g_uart_1);
}
void Uart2_Task(void)