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fix:修改芯片时钟初始化函数

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This commit is contained in:
caocong
2026-02-10 17:48:22 +08:00
parent 5e9338cee4
commit bba63c4763
47 changed files with 460 additions and 36434 deletions
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31
User/main.c
View File

@@ -30,7 +30,6 @@ int main(void)
uint8_t sys_reset = 0;
unsigned char Buffer;
/* - <20>ϵ<EFBFBD>ǰ<EFBFBD><C7B0>Ҫ<EFBFBD>رտ<D8B1><D5BF>Ź<EFBFBD>
* - ԭ<><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>и<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD>һֱ<D2BB><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
* */
@@ -38,7 +37,7 @@ int main(void)
SystemCoreClockUpdate(); //ϵͳ<CFB5><CDB3>ʼ<EFBFBD><CABC>
Systick_Init();
UARTx_Init(UART_0,512000);
UARTx_Init(UART_1,512000);
UARTx_Init(UART_2,512000);
SYS_LED_Init();
@@ -65,14 +64,17 @@ int main(void)
DBG_SYS_Printf("Project Name:%s",Prject_File_Name);
DBG_SYS_Printf("Project - SYSCLK_FREQ_120MHz_HSI");
sys_reset = RCC_GET_GLOB_RST_KEEP(); //<2F><>λ<EFBFBD><CEBB><EFBFBD>ּĴ<D6BC><C4B4><EFBFBD>
if(sys_reset == 0x00)
{
DBG_SYS_Printf("<EFBFBD>ϵ縴λ \r\n");
g_Boot_Time = 10000;
}else if(sys_reset == 0x02){
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
g_Boot_Time = 30000;
g_Boot_Time = 10000;
}else if(sys_reset == 0x03){
DBG_SYS_Printf("MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
@@ -80,10 +82,12 @@ int main(void)
}else {
DBG_SYS_Printf("<EFBFBD>쳣<EFBFBD><EFBFBD>λ \r\n");
g_Boot_Time = 30000;
g_Boot_Time = 10000;
}
RCC_SET_GLOB_RST_KEEP(0x01);
SPIFLASH_Read_Update_Recode(&g_update_recode); //<2F><>ȡAPPд<50><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
g_jump_flag = Read_APP_Feature();
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
@@ -92,15 +96,18 @@ int main(void)
DBG_SYS_Printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD>MCU Flash<73><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ \r\n");
//WDT_Init();
//RCC_SET_GLOB_RST_KEEP(0x03);
RCC_SET_GLOB_RST_KEEP(0x03);
Delay_Ms(1000);
// - <20><><EFBFBD><EFBFBD>ȫ<EFBFBD>ָ<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>оƬ<D0BE><C6AC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Code Flash
RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
//RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
// - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>оƬ<D0BE><C6AC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Code Flash,<2C><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>е<EFBFBD>LD<4C>ļ<EFBFBD> .vector<6F>ֶ<EFBFBD><D6B6>м<EFBFBD><D0BC><EFBFBD> KEEP,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
NVIC_SystemReset();
while(1);
}
//Dbg_Switch = 0x00;
WDT_Init();
while (1)
@@ -109,14 +116,14 @@ int main(void)
SYS_LED_Task();
Uart0_Task();
Uart1_Task();
Uart2_Task();
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
if(g_jump_flag == 0x00)
{
if(SysTick_1ms - g_Boot_Tick >= 5000)
if(SysTick_1ms - g_Boot_Tick >= g_Boot_Time)
{
g_Boot_Tick = SysTick_1ms;
@@ -144,7 +151,11 @@ int main(void)
Delay_Ms(1000);
RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
//<2F><>ʽ1<CABD><31>
//RCC_GlobleRstCFG(RB_GLOB_FORCE_RST, ENABLE);
//<2F><>ʽ2<CABD><32>
NVIC_SystemReset();
while(1);
}
}

325
User/system_ch564.c
View File

@@ -12,7 +12,6 @@
#include "ch564.h"
#include "debug.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK)
* frequency (after reset the HSI is used as SYSCLK source).
@@ -88,38 +87,23 @@ static void SetSysClockTo25_HSE(void);
*/
void SystemInit(void)
{
if ( SystemCoreClock >= 60000000 )
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
else
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
SystemCoreClockUpdate();
//Delay_Init();
HSI_ON();
SystemCoreClockUpdate();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
HSI_ON();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
}
/*********************************************************************
@@ -131,55 +115,55 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0;
uint32_t tmp = 0;
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
SystemCoreClock = tmp;
SystemCoreClock = tmp;
}
/*********************************************************************
@@ -191,29 +175,30 @@ void SystemCoreClockUpdate(void)
*/
static void SetSysClock(void)
{
SystemCoreClockUpdate();
GPIO_IPD_Unused();
SystemCoreClockUpdate();
//Delay_Init();
GPIO_IPD_Unused();
#ifdef SYSCLK_FREQ_120MHz_HSI
SetSysClockTo120_HSI();
SetSysClockTo120_HSI();
#elif defined SYSCLK_FREQ_80MHz_HSI
SetSysClockTo80_HSI();
SetSysClockTo80_HSI();
#elif defined SYSCLK_FREQ_60MHz_HSI
SetSysClockTo60_HSI();
SetSysClockTo60_HSI();
#elif defined SYSCLK_FREQ_40MHz_HSI
SetSysClockTo40_HSI();
SetSysClockTo40_HSI();
#elif defined SYSCLK_FREQ_20MHz_HSI
SetSysClockTo20_HSI();
SetSysClockTo20_HSI();
#elif defined SYSCLK_FREQ_120MHz_HSE
SetSysClockTo120_HSE();
SetSysClockTo120_HSE();
#elif defined SYSCLK_FREQ_80MHz_HSE
SetSysClockTo80_HSE();
SetSysClockTo80_HSE();
#elif defined SYSCLK_FREQ_60MHz_HSE
SetSysClockTo60_HSE();
SetSysClockTo60_HSE();
#elif defined SYSCLK_FREQ_40MHz_HSE
SetSysClockTo40_HSE();
SetSysClockTo40_HSE();
#elif defined SYSCLK_FREQ_25MHz_HSE
SetSysClockTo25_HSE();
SetSysClockTo25_HSE();
#endif
}
@@ -228,12 +213,16 @@ static void SetSysClock(void)
*/
static void SetSysClockTo120_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_80MHz_HSI
@@ -247,12 +236,16 @@ static void SetSysClockTo120_HSI(void)
*/
static void SetSysClockTo80_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSI
@@ -266,12 +259,16 @@ static void SetSysClockTo80_HSI(void)
*/
static void SetSysClockTo60_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSI
@@ -285,12 +282,12 @@ static void SetSysClockTo60_HSI(void)
*/
static void SetSysClockTo40_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_20MHz_HSI
@@ -304,8 +301,8 @@ static void SetSysClockTo40_HSI(void)
*/
static void SetSysClockTo20_HSI(void)
{
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}
#elif defined SYSCLK_FREQ_120MHz_HSE
@@ -319,15 +316,19 @@ static void SetSysClockTo20_HSI(void)
*/
static void SetSysClockTo120_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_80MHz_HSE
@@ -341,15 +342,19 @@ static void SetSysClockTo120_HSE(void)
*/
static void SetSysClockTo80_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSE
@@ -363,15 +368,19 @@ static void SetSysClockTo80_HSE(void)
*/
static void SetSysClockTo60_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSE
@@ -385,15 +394,15 @@ static void SetSysClockTo60_HSE(void)
*/
static void SetSysClockTo40_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_25MHz_HSE
@@ -407,13 +416,13 @@ static void SetSysClockTo40_HSE(void)
*/
static void SetSysClockTo25_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}