feat:网络升级流程完善

1、局域网升级流程 - 初步测试OK
2、云端升级流程 - 初步测试OK
3、云端升级上报升级进度 - 初步测试OK
This commit is contained in:
caocong
2026-02-10 17:45:08 +08:00
parent f16825ea2b
commit 3041468aa7
23 changed files with 1184 additions and 336 deletions

View File

@@ -65,7 +65,8 @@
#define MCU_TYPE "BLV-C1F" //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
#define APP_NAME "App_L4_C1F_42" //APP<50><50><EFBFBD><EFBFBD> 16Byte
#define SoftwareVer "C1P_A_L4_01_251107" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte
#define SoftwareVer "C1P_A_L4_01_251109" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte

View File

@@ -14,6 +14,8 @@
#include <stdio.h>
#include <string.h>
uint32_t test_tick = 0;
uint8_t test_buff[10] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
@@ -30,6 +32,7 @@ int main(void)
SystemCoreClockUpdate();
Systick_Init();
WDT_Reinit();
UARTx_Init(UART_0,9600); //RS485<38><35>ѯ<EFBFBD>˿<EFBFBD>
UARTx_Init(UART_1,512000); //<2F><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
UARTx_Init(UART_2,9600); //RS485<38><35><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
@@ -41,6 +44,8 @@ int main(void)
SPI_FLASH_Init();
Read_Flash_Register_Data();
WCHNET_LIB_Init();
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! \r\n");
@@ -48,8 +53,8 @@ int main(void)
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"DEV_ACTION_INFO Size:%d \r\n",sizeof(DEV_ACTION_INFO));
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev_Action_U64Cond Size:%d \r\n",sizeof(Dev_Action_U64Cond));
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Struct_Dev_Dly Size:%d \r\n",sizeof(Struct_Dev_Dly));
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev_Action_U64Cond Size:%d \r\n",sizeof(Dev_Action_U64Cond));
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Struct_Dev_Dly Size:%d \r\n",sizeof(Struct_Dev_Dly));
BLV_DevAction_AllData_Init();

View File

@@ -12,7 +12,6 @@
#include "ch564.h"
#include "debug.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK)
* frequency (after reset the HSI is used as SYSCLK source).
@@ -88,38 +87,23 @@ static void SetSysClockTo25_HSE(void);
*/
void SystemInit(void)
{
if ( SystemCoreClock >= 60000000 )
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
else
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
SystemCoreClockUpdate();
//Delay_Init();
HSI_ON();
SystemCoreClockUpdate();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
HSI_ON();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
}
/*********************************************************************
@@ -131,55 +115,55 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0;
uint32_t tmp = 0;
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
SystemCoreClock = tmp;
SystemCoreClock = tmp;
}
/*********************************************************************
@@ -191,29 +175,30 @@ void SystemCoreClockUpdate(void)
*/
static void SetSysClock(void)
{
SystemCoreClockUpdate();
GPIO_IPD_Unused();
SystemCoreClockUpdate();
//Delay_Init();
GPIO_IPD_Unused();
#ifdef SYSCLK_FREQ_120MHz_HSI
SetSysClockTo120_HSI();
SetSysClockTo120_HSI();
#elif defined SYSCLK_FREQ_80MHz_HSI
SetSysClockTo80_HSI();
SetSysClockTo80_HSI();
#elif defined SYSCLK_FREQ_60MHz_HSI
SetSysClockTo60_HSI();
SetSysClockTo60_HSI();
#elif defined SYSCLK_FREQ_40MHz_HSI
SetSysClockTo40_HSI();
SetSysClockTo40_HSI();
#elif defined SYSCLK_FREQ_20MHz_HSI
SetSysClockTo20_HSI();
SetSysClockTo20_HSI();
#elif defined SYSCLK_FREQ_120MHz_HSE
SetSysClockTo120_HSE();
SetSysClockTo120_HSE();
#elif defined SYSCLK_FREQ_80MHz_HSE
SetSysClockTo80_HSE();
SetSysClockTo80_HSE();
#elif defined SYSCLK_FREQ_60MHz_HSE
SetSysClockTo60_HSE();
SetSysClockTo60_HSE();
#elif defined SYSCLK_FREQ_40MHz_HSE
SetSysClockTo40_HSE();
SetSysClockTo40_HSE();
#elif defined SYSCLK_FREQ_25MHz_HSE
SetSysClockTo25_HSE();
SetSysClockTo25_HSE();
#endif
}
@@ -228,12 +213,16 @@ static void SetSysClock(void)
*/
static void SetSysClockTo120_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_80MHz_HSI
@@ -247,12 +236,16 @@ static void SetSysClockTo120_HSI(void)
*/
static void SetSysClockTo80_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSI
@@ -266,12 +259,16 @@ static void SetSysClockTo80_HSI(void)
*/
static void SetSysClockTo60_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSI
@@ -285,12 +282,12 @@ static void SetSysClockTo60_HSI(void)
*/
static void SetSysClockTo40_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_20MHz_HSI
@@ -304,8 +301,8 @@ static void SetSysClockTo40_HSI(void)
*/
static void SetSysClockTo20_HSI(void)
{
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}
#elif defined SYSCLK_FREQ_120MHz_HSE
@@ -319,15 +316,19 @@ static void SetSysClockTo20_HSI(void)
*/
static void SetSysClockTo120_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_80MHz_HSE
@@ -341,15 +342,19 @@ static void SetSysClockTo120_HSE(void)
*/
static void SetSysClockTo80_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSE
@@ -363,15 +368,19 @@ static void SetSysClockTo80_HSE(void)
*/
static void SetSysClockTo60_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSE
@@ -385,15 +394,15 @@ static void SetSysClockTo60_HSE(void)
*/
static void SetSysClockTo40_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_25MHz_HSE
@@ -407,13 +416,13 @@ static void SetSysClockTo40_HSE(void)
*/
static void SetSysClockTo25_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}