调试:CSIO继电器控制
CSIO继电器控制初步测试OK
This commit is contained in:
@@ -117,7 +117,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
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memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
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memset(&C5IO_Info,0,sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),csio_addr);
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BLV_Device_PublicInfo_Read_To_Struct(csio_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
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input_num = dev_info->input_num;
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@@ -198,10 +198,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
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temp_len += 4;
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),csio_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(csio_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BLV_Nor_Dev_LVinput_Init(dev_info->addr,dev_info->input_num);
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}
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@@ -224,7 +221,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
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@@ -232,10 +229,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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//Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>,ֻ<><D6BB><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
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BUS_C5IO_Inquire_Datasend(dev_addr,&C5IO_Info);
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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return RS485OCCUPYTIME;
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}
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@@ -332,10 +326,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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C5IO_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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return RS485OCCUPYTIME;
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}
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@@ -413,7 +404,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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return 0x01; //<2F><>У<EFBFBD><D0A3>
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}
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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memset(deal_buff,0,sizeof(deal_buff));
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@@ -482,7 +473,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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Device_Public_Information_G BUS_Public;
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C5IO_Info.DevOfflineLast = C5IO_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
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}
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if((DI_Init_flg == 0) && (deal_buff[PKT_PARA] != 0xF0)) //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>ѯ<EFBFBD>Ļظ<C4BB> 2024-04-01 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>DI<44><49><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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@@ -494,10 +485,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"IO VERSION:%d", C5IO_Info.C5IO_Version);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DI_Control_Flag:%X", C5IO_Info.DI_Control_Flag);
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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return 0x00;
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}
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@@ -753,10 +741,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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LOG_Device_COMM_ASK_TO_Reply_Record2(dev_addr+Dev_port,dev_addr+Dev_baud,(SysTick_1ms - C5IO_Info.inquire_tick),deal_buff,deal_len);
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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return 0x00;
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}
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@@ -1219,7 +1204,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
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@@ -1247,10 +1232,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
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}
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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/*******************************************************************************
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@@ -1269,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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if(temp1 < C5IO_DO_CH_MAX)
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@@ -1289,10 +1271,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
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}
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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/*******************************************************************************
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@@ -1311,7 +1290,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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if(temp1 < C5IO_Relay_CH_MAX)
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@@ -1334,10 +1313,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
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}
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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/*******************************************************************************
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@@ -1355,7 +1331,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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for(uint8_t i=0;i<C5IO_Relay_CH_MAX;i++)
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@@ -1375,10 +1351,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
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temp2 >>= 1;
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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/*******************************************************************************
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@@ -1397,16 +1370,13 @@ __attribute__((section(".non_0_wait"))) void BUS_CSIO_Set_RTC_Time(uint32_t dev_
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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/*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>*/
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C5IO_Info.rtc_set_flag = 0x01;
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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/*******************************************************************************
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@@ -113,7 +113,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
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// temp = SRAM_Read_Byte(dev_addr+Dev_Type); //<2F>ж<EFBFBD><D0B6>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
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// if(temp != DEV_C5MUSIC_Type) return 0x01;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
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if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
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@@ -122,10 +122,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
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BUS_C5MUSIC_Playback_Status_Datasend(dev_addr,&C5Music_Info);
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
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return RS485OCCUPYTIME;
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}
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@@ -227,10 +224,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
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C5Music_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
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}
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BUS_Public.check = 0x00;
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
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return RS485OCCUPYTIME;
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}
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@@ -253,7 +247,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
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Device_Public_Information_G BUS_Public;
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BUS_C5MUSIC_INFO C5Music_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
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uint16_t deal_len = len;
|
||||
@@ -487,10 +481,8 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
|
||||
C5Music_Info.DevOfflineLast = C5Music_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
@@ -1201,16 +1193,13 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Playback_Mode(uint3
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
C5Music_Info.playback_mode = play_mode;
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
}
|
||||
|
||||
@@ -1230,7 +1219,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
|
||||
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
C5Music_Info.playback_fun = playback;
|
||||
@@ -1239,12 +1228,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1260,7 +1244,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
C5Music_Info.assign_dir = BLV_C5MUSIC_Doorbell_Dir;
|
||||
@@ -1268,11 +1252,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
}
|
||||
|
||||
@@ -1290,7 +1270,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
C5Music_Info.playback_fun = start;
|
||||
@@ -1299,11 +1279,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
}
|
||||
|
||||
@@ -1321,23 +1297,17 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Greet_Dir(uint32_t deva
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
C5Music_Info.playback_fun = start;
|
||||
|
||||
|
||||
C5Music_Info.assign_dir = BLV_C5MUSIC_Greet_Dir;
|
||||
C5Music_Info.assign_playback_idx = id;
|
||||
// C5Music_Info.set_playback_volume = 20; //<2F><>ӭ<EFBFBD><D3AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ15
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
}
|
||||
|
||||
@@ -1355,7 +1325,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||
@@ -1385,12 +1355,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1408,7 +1373,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||
@@ -1437,11 +1402,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1458,7 +1419,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||
@@ -1487,12 +1448,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1507,7 +1463,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1517,11 +1473,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
}
|
||||
|
||||
@@ -1537,7 +1489,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1559,14 +1511,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
// C5Music_Info.playback_mode = BLV_C5MUSIC_Folder_Loop;
|
||||
// C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1581,7 +1526,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1600,11 +1545,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d",__func__,C5Music_Info.assign_playback_idx);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1619,7 +1560,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1640,11 +1581,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1659,7 +1596,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1669,12 +1606,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1691,7 +1623,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1701,12 +1633,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1723,7 +1650,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1733,12 +1660,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1753,7 +1675,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ
|
||||
@@ -1766,12 +1688,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
|
||||
C5Music_Info.adjust_volume_loop = 0x03; //<2F><>·1<C2B7><31><EFBFBD><EFBFBD>·2
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1786,7 +1703,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
||||
@@ -1800,11 +1717,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
||||
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1819,7 +1732,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
||||
@@ -1839,11 +1752,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
|
||||
C5Music_Info.adjust_volume_type |= 0x10;
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1858,7 +1767,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
||||
@@ -1878,12 +1787,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
||||
C5Music_Info.adjust_volume_type |= 0x10;
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1898,7 +1802,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>״̬ȡ<CCAC><C8A1>*/
|
||||
@@ -1920,11 +1824,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1942,7 +1842,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1962,11 +1862,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
|
||||
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -1983,7 +1879,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
|
||||
@@ -1999,11 +1895,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
|
||||
C5Music_Info.quiet_mode = 0x00;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -2024,7 +1916,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
switch(loop)
|
||||
@@ -2046,11 +1938,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
|
||||
break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -2071,7 +1959,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
|
||||
if(devaddr == 0x00) return;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if((loop & 0x01)) //<2F><><EFBFBD><EFBFBD>
|
||||
@@ -2096,11 +1984,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
|
||||
C5Music_Info.adjust_volume_type |= 0x10;
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
}
|
||||
|
||||
}
|
||||
@@ -2125,7 +2009,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Get_BUS_C5MUSIC_Loop_Volume(uint
|
||||
|
||||
Device_Public_Information_G BUS_Public;
|
||||
BUS_C5MUSIC_INFO C5Music_Info;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||
|
||||
switch(loop)
|
||||
@@ -2197,7 +2081,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= MUSICLOOPMAX)
|
||||
@@ -2410,11 +2294,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
|
||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||
}
|
||||
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddrOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddrOut,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[0].CtrlCont.CtrlVoice);
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[1].CtrlCont.CtrlVoice);
|
||||
|
||||
197
BLV_485_Driver/blv_nor_dev_c5relay.c
Normal file
197
BLV_485_Driver/blv_nor_dev_c5relay.c
Normal file
@@ -0,0 +1,197 @@
|
||||
/*
|
||||
* blv_nor_dev_c5relay.c
|
||||
*
|
||||
* Created on: Jan 5, 2026
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "blv_nor_dev_c5relay.h"
|
||||
#include "blv_bus_dev_c5iofun.h"
|
||||
|
||||
|
||||
#include "blv_dev_action.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "debug.h"
|
||||
|
||||
#define REPEATSENDTIMEMAX 0x03 //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C5EXPANDTYPE 0xF1 //C5RELAY<41><59><EFBFBD><EFBFBD>
|
||||
#define C5RelayAddrDefault 0x01 //Ĭ<><C4AC>Ϊ1<CEAA><31>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>Ȼ<EFBFBD><C8BB>Ĭ<EFBFBD>ϵ<EFBFBD>ַ
|
||||
|
||||
#define C5RELAYSnMin 0x00 //<2F><>СSn<53><6E>
|
||||
#define C5RELAYSnMax 0x0F //<2F><><EFBFBD><EFBFBD>Sn<53><6E>
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_RS485_C5RELAY_Data_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
|
||||
* Input :
|
||||
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s",__func__);
|
||||
|
||||
BUS_Public->polling_cf = (uint32_t)&BLW_C5RELAYCycleCtrl;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLW_Rs485_C5RELAY_Check;
|
||||
|
||||
/* <20>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ҫ֪<D2AA><D6AA>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF>Ƽ̵<C6BC><CCB5><EFBFBD>
|
||||
<20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡCSIO<49><4F>ַ<EFBFBD>ŵ<EFBFBD><C5B5>豸ȫ<E8B1B8><C8AB><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>浽<EFBFBD>ü̵<C3BC><CCB5><EFBFBD><EFBFBD>豸<EFBFBD>С<EFBFBD>
|
||||
<20><><EFBFBD>Һ<EFBFBD><D2BA><EFBFBD><EFBFBD><EFBFBD>Dev_Coord_Get*/
|
||||
|
||||
}
|
||||
|
||||
#define C5EXPANDCTRLLEN 13 //<2F><>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD>
|
||||
/**
|
||||
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* @para
|
||||
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||
* @return <20><>
|
||||
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
*/
|
||||
void BLW_Rs485_C5RELAY_Ctrl(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD><EFBFBD>CSIO<49><4F>*/
|
||||
if( DevHVoutInfo->HVoutLoopValidNum >= HVoutNumMAX ) DevHVoutInfo->HVoutLoopValidNum = HVoutNumMAX; //<2F><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
|
||||
|
||||
for(uint8_t i = 0; i < DevHVoutInfo->HVoutLoopValidNum; i++)
|
||||
{
|
||||
if( (DevHVoutInfo->DevChangeFlag & (0x01 << i)) != 0x00 )
|
||||
{
|
||||
switch(DevHVoutInfo->DevHVoutState[i])
|
||||
{
|
||||
case 0x01:
|
||||
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_HIGH;
|
||||
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
|
||||
|
||||
break;
|
||||
case 0x00:
|
||||
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_LOW;
|
||||
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
|
||||
break;
|
||||
}
|
||||
|
||||
DevHVoutInfo->DevChangeFlag &= ~(0x01<<i);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_C5RELAYCycleCtrl
|
||||
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr)
|
||||
{
|
||||
uint8_t i; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>·
|
||||
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||
uint8_t keep_flag = 0;
|
||||
|
||||
Device_Public_Information_G BUS_Public;
|
||||
NOR_HVOUT_INFO DevHVoutInfo;
|
||||
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
|
||||
BUS_C5IO_INFO C5IO_Info;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr, &BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(0x00 == DevHVoutInfo.DevC5IOAddr)
|
||||
{
|
||||
return Ret;
|
||||
}
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevHVoutInfo.DevC5IOAddr+Dev_Privately);
|
||||
|
||||
if( (DevHVoutInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
|
||||
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
|
||||
DevHVoutInfo.init_flag = 0x01;
|
||||
|
||||
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
|
||||
{
|
||||
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
|
||||
{
|
||||
DevHVoutInfo.DevHVoutState[i] = 0x01;
|
||||
DevHVoutInfo.DevHVoutStateLast[i] = 0x01;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||
}else {
|
||||
DevHVoutInfo.DevHVoutState[i] = 0x00;
|
||||
DevHVoutInfo.DevHVoutStateLast[i] = 0x00;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||
}
|
||||
}
|
||||
|
||||
keep_flag = 0x01;
|
||||
}
|
||||
|
||||
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
|
||||
{
|
||||
if( DevHVoutInfo.DevHVoutStateLast[i] != DevHVoutInfo.DevHVoutState[i] )
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><EFBFBD>λ:<3A><>%d·", i);
|
||||
|
||||
DevHVoutInfo.DevChangeFlag |= 0x01 << i;
|
||||
DevHVoutInfo.HVoutCtrlCnt = REPEATSENDTIMEMAX;
|
||||
DevHVoutInfo.DevHVoutStateLast[i] = DevHVoutInfo.DevHVoutState[i];//ͬ<><CDAC>
|
||||
|
||||
keep_flag = 0x01;
|
||||
}
|
||||
}
|
||||
|
||||
if(keep_flag == 0x01)
|
||||
{
|
||||
BLW_Rs485_C5RELAY_Ctrl(&BUS_Public, &DevHVoutInfo, &C5IO_Info); //9·<39><C2B7><EFBFBD>ƣ<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO, (uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||
}
|
||||
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
#define RECDATALENMAX 0x28 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define IsMyData 0x00
|
||||
#define IsNotMyData 0x01
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Rs485_C5RELAY_Check
|
||||
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
*******************************************************************************/
|
||||
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint8_t rev = IsNotMyData;
|
||||
|
||||
|
||||
return rev;
|
||||
}
|
||||
|
||||
#define C5EXPANDREADLEN 7 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
/**
|
||||
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* @para
|
||||
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||
* @return <20><>
|
||||
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
*/
|
||||
void BLW_Rs485_C5RELAY_Read(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -11,13 +11,15 @@
|
||||
#include "debug.h"
|
||||
|
||||
#include "blv_bus_dev_c5iofun.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "blv_nor_dev_c5relay.h"
|
||||
|
||||
#include <string.h>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_DEV_PRO_FUN_01 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) //((DevFunP)NULL) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_01 DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_A9RELAY_Flag, BLW_RS485_A9RELAY_Data_Init) //((DevFunP)NULL) //A9IO<49>̵<EFBFBD><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_SwiRELAY_Flag, BLW_RS485_SwiRELAY_Data_Init) //((DevFunP)NULL) //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL) //
|
||||
@@ -46,6 +48,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
||||
|
||||
if(ENUM_RS485_DEV_PRO_01 == dev_info->version)
|
||||
{
|
||||
|
||||
BUS_Public.retry_num = C5IO_REPEATSENDTIMEMAX; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = C5IO_SEND_WAIT_TIME; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||
}else{
|
||||
@@ -68,6 +71,8 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
||||
DevHVoutInfo.HVoutLoopValidNum = dev_info->output_num;
|
||||
}
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"HVOUT loop:%d",DevHVoutInfo.HVoutLoopValidNum);
|
||||
|
||||
switch(BUS_Public.Protocol)
|
||||
{
|
||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &DevHVoutInfo);break; //
|
||||
@@ -91,6 +96,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
||||
Poll485_Info.device_num += 1;
|
||||
break;
|
||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||
BUS_Public.baud = 115200;
|
||||
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
BUS485_Info.device_num += 1;
|
||||
@@ -152,7 +158,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
switch(start)
|
||||
@@ -191,10 +197,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
|
||||
{
|
||||
BLV_Active_Set_List_Addr(devaddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -224,7 +228,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(CtrlNum >= DevHVoutInfo.HVoutLoopValidNum)
|
||||
@@ -270,10 +274,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
|
||||
{
|
||||
BLV_Active_Set_List_Addr(devaddr);
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
210
BLV_485_Driver/blv_nor_dev_lvoutput.c
Normal file
210
BLV_485_Driver/blv_nor_dev_lvoutput.c
Normal file
@@ -0,0 +1,210 @@
|
||||
/*
|
||||
* blv_nor_dev_lvoutput.c
|
||||
*
|
||||
* Created on: Dec 31, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "includes.h"
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>*/
|
||||
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&DevLVoutputInfo,0,sizeof(NOR_LVOUTPUT_INFO));
|
||||
|
||||
BUS_Public.addr = devaddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = Dev_Host_LVoutput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
// BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
// BUS_Public.baud = 9600; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
// BUS_Public.retry_num = 0x03; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
// BUS_Public.wait_time = 0x0064; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
// BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||
// BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_LVoutput_Dis; //
|
||||
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_LVoutput_Control_State; //
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = LVoutput_Loop_State; //
|
||||
|
||||
DevLVoutputInfo.LVoutputLoopValidNum = C1_LVOUTPUTNUMMAX;
|
||||
DevLVoutputInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00);
|
||||
|
||||
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LVoutput_Loop_State
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - ״̬<D7B4><CCAC>ȡ
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||
* Return : ״̬ 0x01<30><31> 0x02<30><32>
|
||||
*******************************************************************************/
|
||||
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||
{
|
||||
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return 0x00;
|
||||
|
||||
if(DevLVoutputInfo.DevLVoutputState[DevOutputLoop] == 0x01)
|
||||
{
|
||||
return 0x01;
|
||||
}else{
|
||||
return 0x02;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LVoutput_Control_State
|
||||
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType)
|
||||
{
|
||||
uint8_t temp1 = 0;
|
||||
uint8_t state; //0<><30> 1<><31>
|
||||
uint8_t CtrlWay;
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return ;
|
||||
|
||||
CtrlWay = DevOutputType&0x00ff; //ȡ<><C8A1><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
switch(CtrlWay)
|
||||
{
|
||||
case 0x01:state = 0x01;break; //<2F><><EFBFBD><EFBFBD>
|
||||
case 0x02:state = 0x00;break; //<2F>ر<EFBFBD>
|
||||
case 0x04: //<2F><>˸
|
||||
if(0x01 == DevLVoutputInfo.DevLVoutputState[DevOutputLoop])
|
||||
{
|
||||
state = 0x00;
|
||||
}else{
|
||||
state = 0x01;
|
||||
}
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD>ֵ,start:%d",state);
|
||||
break;
|
||||
default:return;
|
||||
}
|
||||
|
||||
|
||||
if( DevLVoutputInfo.DevLVoutputState[DevOutputLoop] != state )
|
||||
{
|
||||
switch(state)
|
||||
{
|
||||
case 0x00: //ָ<><D6B8>λ<EFBFBD><CEBB>0
|
||||
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x00;
|
||||
break;
|
||||
case 0x01: //ָ<><D6B8>λ<EFBFBD><CEBB>һ
|
||||
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x01;
|
||||
break;
|
||||
}
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LVoutput loop:%d,state:%d",DevOutputLoop,state);
|
||||
temp1++;
|
||||
}
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
void Dev_LVoutput_Dis(uint32_t DevAddr)
|
||||
{
|
||||
Device_Public_Information_G BUS_PublicLVoutput; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
|
||||
BUS_C5IO_INFO C5IO_Info;
|
||||
|
||||
uint8_t KeepFlag = 0x00;
|
||||
|
||||
if(DevAddr == 0x00) return ;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVoutput);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if(DevLVoutputInfo.DevC5IOAddr == 0x00) return ;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevLVoutputInfo.DevC5IOAddr,&BUS_PublicC5IO);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVoutputInfo.DevC5IOAddr+Dev_Privately);
|
||||
|
||||
if( (DevLVoutputInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
|
||||
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
|
||||
DevLVoutputInfo.init_flag = 0x01;
|
||||
|
||||
for(uint32_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
|
||||
{
|
||||
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
|
||||
{
|
||||
DevLVoutputInfo.DevLVoutputState[i] = 0x01;
|
||||
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x01;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||
}else {
|
||||
DevLVoutputInfo.DevLVoutputState[i] = 0x00;
|
||||
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x00;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||
}
|
||||
}
|
||||
|
||||
KeepFlag = 1;
|
||||
}
|
||||
|
||||
for(uint16_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
|
||||
{
|
||||
|
||||
if(DevLVoutputInfo.DevLVoutputStateLast[i] != DevLVoutputInfo.DevLVoutputState[i])
|
||||
{
|
||||
KeepFlag = 0x01;
|
||||
DevLVoutputInfo.DevLVoutputStateLast[i] = DevLVoutputInfo.DevLVoutputState[i];
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevLVoutputInfo.DevLVoutputState[i]);
|
||||
switch(DevLVoutputInfo.DevLVoutputState[i]) //
|
||||
{
|
||||
case 0x01: //<2F><>
|
||||
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_HIGH;
|
||||
C5IO_Info.DO_Control_Flag |= 0x01<<i;
|
||||
break;
|
||||
case 0x00: //<2F><>
|
||||
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_LOW;
|
||||
C5IO_Info.DO_Control_Flag |= 0x00000001<<i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
if(g_pc_test.test_flag == 0x12)
|
||||
{
|
||||
BLV_PC_Testing_Data_Reported(0x02,DEV_C5IO_Type,0x00,SRAM_LOG_Device_C5IO_Relay_Status,4);
|
||||
}
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVoutput,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevLVoutputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
476
BLV_485_Driver/blv_nor_dev_serviceinfo.c
Normal file
476
BLV_485_Driver/blv_nor_dev_serviceinfo.c
Normal file
@@ -0,0 +1,476 @@
|
||||
/*
|
||||
* blv_nor_dev_servicefun.c
|
||||
*
|
||||
* Created on: Dec 31, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "includes.h"
|
||||
#include "blv_nor_dev_serviceinfo.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Nor_Dev_Service_For_Logic_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&DevServiceInfo,0,sizeof(NOR_SERVICE_INFO));
|
||||
|
||||
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = Dev_Host_Service; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
BUS_Public.port = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
BUS_Public.baud = dev_info->baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.retry_num = dev_info->retry; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = dev_info->writ_time; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||
BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_Service_Dis;
|
||||
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_Service_InType_Get;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_Service_Control_State;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = Service_Loop_State;
|
||||
|
||||
DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
|
||||
DevServiceInfo.Loop_State[Service_Warning] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>
|
||||
|
||||
DevServiceInfo.Loop_State[Service_Dnd] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
DevServiceInfo.Loop_State[Service_Clean] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_Luggage] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_Meals] = 0x02; //<2F>ر<EFBFBD>9<EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_CheckOut] = 0x02; //<2F>ر<EFBFBD><D8B1>˷<EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_Strong] = 0x02; //<2F>رձ<D8B1><D5B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_Wait] = 0x02; //<2F>ر<EFBFBD><D8B1>Ժ<EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_Sos] = 0x02; //Ĭ<>Ϲر<CFB9>SOS<4F><53><EFBFBD><EFBFBD>
|
||||
|
||||
DevServiceInfo.Loop_State[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
|
||||
|
||||
DevServiceInfo.Loop_State_Last[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
|
||||
DevServiceInfo.Loop_State_Last[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>˽<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>:%d",sizeof(NOR_SERVICE_INFO));
|
||||
|
||||
/*RCU<43><55><EFBFBD><EFBFBD>MCU<43><55>λ״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC> -
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF>Ź<EFBFBD><C5B9><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ⲿ<EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>(Ĭ<><C4AC>״̬<D7B4><CCAC>ͨ<EFBFBD><CDA8>RCU_POWER_Deivce_State_Init <20>궨<EFBFBD><EAB6A8> <20><EFBFBD>Ĭ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><CABC>״̬)
|
||||
*/
|
||||
if( (DevActionGlobal.sram_save_flag == 0xA8) && ((SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x01) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x03) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x05)) )
|
||||
{
|
||||
DevServiceInfo.Loop_State[Service_Ele] = DevActionGlobal.Last_EleState;
|
||||
DevServiceInfo.Loop_State_Last[Service_Ele] = DevActionGlobal.Last_EleState;
|
||||
}else {
|
||||
|
||||
#if RCU_POWER_Deivce_State_Init
|
||||
DevServiceInfo.Loop_State[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||
#else
|
||||
DevServiceInfo.Loop_State[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||
#endif
|
||||
}
|
||||
|
||||
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState_Last); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
|
||||
DevServiceInfo.is_first_power_on = 0x00; //<2F>ϵ<EFBFBD>Ĭ<EFBFBD><C4AC> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||
|
||||
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Service_Loop_State
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ļ<EFBFBD>·״̬
|
||||
*******************************************************************************/
|
||||
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||
{
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||
{
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
return DevServiceInfo.Loop_State[DevOutputLoop];
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Service_Control_State
|
||||
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32> 0x04<30><34><EFBFBD><EFBFBD><EFBFBD>״α<D7B4>־λ 0x04
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start)
|
||||
{
|
||||
// uint16_t DataLen = 0;
|
||||
uint8_t temp1 = 0; //crc_val = 0,
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||
{
|
||||
return ;
|
||||
}
|
||||
|
||||
switch(start)
|
||||
{
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
if( DevServiceInfo.Loop_State[DevOutputLoop] != start )
|
||||
{
|
||||
if((DevOutputLoop == Service_16) && (start == 0x01)) //
|
||||
{
|
||||
if(0x01 == DevActionGlobal.DevActionU64Cond.NeightFlag) //ҹ<>ƴ<EFBFBD><C6B4><EFBFBD>
|
||||
{
|
||||
if(NightModeStart != DevActionGlobal.DevActionU64Cond.NeightState)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><EFBFBD>г<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>ߣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ"); //<2F>г<EFBFBD><D0B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DevActionGlobal.DevActionU64Cond.NeightState = NightModeStart; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if((DevOutputLoop == Service_Dnd)&& (start == 0x01)) //2023-10-31 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevServiceInfo.Loop_State[DevOutputLoop+1] = 0x02;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop+1),0x02);
|
||||
}
|
||||
else if((DevOutputLoop == Service_Clean)&& (start == 0x01))
|
||||
{
|
||||
DevServiceInfo.Loop_State[DevOutputLoop-1] = 0x02;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop-1),0x02);
|
||||
}
|
||||
else if((DevOutputLoop == Service_24) && (start == 0x01)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -- <20><><EFBFBD>ʵ㣺Ϊɶ<CEAA><C9B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ24<32><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ14 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevServiceInfo.Loop_State[Service_Warning] = 0x02;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
}
|
||||
else if((DevOutputLoop == Service_24) && (start == 0x02)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevServiceInfo.Loop_State[Service_Warning] = 0x01;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
}
|
||||
else if((DevOutputLoop == Service_Ele)&& (start == 0x01)) //2024-04-29
|
||||
{
|
||||
DevActionGlobal.CardInFlag = 0x01;
|
||||
}
|
||||
|
||||
if(DevOutputLoop == Service_Ele){
|
||||
/*ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>¼ 2025-02-19*/
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d\r\n",DevOutputLoop,start);
|
||||
LOG_LogicInfo_DebugRecord("DevService:loop:%d,start:%d",DevOutputLoop,start);
|
||||
}
|
||||
|
||||
DevServiceInfo.Loop_State[DevOutputLoop] = start;//<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",DevOutputLoop,start);
|
||||
temp1++;
|
||||
}
|
||||
break;
|
||||
case 0x03: //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ <20><>λ Ŀǰֻ<C7B0><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x00) )
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Service_Ele Set first_power_on");
|
||||
DevServiceInfo.is_first_power_on = 0x01;
|
||||
temp1++;
|
||||
}
|
||||
break;
|
||||
case 0x04: //<2F><>ȡ<EFBFBD><C8A1>
|
||||
/*
|
||||
1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3>㴥<EFBFBD><E3B4A5><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||
2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>Ҵ<EFBFBD><D2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>硱<EFBFBD>¼<EFBFBD>
|
||||
*/
|
||||
|
||||
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x01) )
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20>״<EFBFBD>ȡ<EFBFBD><C8A1>");
|
||||
DevActionGlobal.CardInFlag = 0x01;
|
||||
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
|
||||
temp1++;
|
||||
}else if( DevOutputLoop == Service_Ele ){
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>");
|
||||
DevActionGlobal.CardInFlag = 0x01;
|
||||
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
|
||||
DevServiceInfo.Loop_State_Last[DevOutputLoop] = 0x01;
|
||||
DevServiceInfo.DevChangeFlag[DevOutputLoop] = 0x04; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||
temp1++;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Service_InType_Get
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||
DevInputLoop <20><><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><>Χ0~ServiceLoopValidNum
|
||||
DevInputType <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : <20><>
|
||||
*******************************************************************************/
|
||||
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevInputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||
{
|
||||
return Ret;
|
||||
}
|
||||
|
||||
if(DevInputType == DevServiceInfo.DevChangeFlag[DevInputLoop]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͶԵ<CDB6><D4B5><EFBFBD> 1<><31> 2<><32>
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> %d - %d <20><><EFBFBD><EFBFBD>",DevInputLoop,DevInputType);
|
||||
|
||||
DevServiceInfo.DevChangeFlag[DevInputLoop] = 0x00; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
Ret = CtrlValid;
|
||||
}
|
||||
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>*/
|
||||
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo)
|
||||
{
|
||||
DevActionGlobal.DevActionU64Cond.EleState = DevServiceInfo->Loop_State[Service_Ele];
|
||||
DevActionGlobal.DevActionU64Cond.DndState = DevServiceInfo->Loop_State[Service_Dnd];
|
||||
DevActionGlobal.DevActionU64Cond.CleanState = DevServiceInfo->Loop_State[Service_Clean];
|
||||
DevActionGlobal.DevActionU64Cond.CallState = DevServiceInfo->Loop_State[Service_Call];
|
||||
DevActionGlobal.DevActionU64Cond.WashState = DevServiceInfo->Loop_State[Service_Wash];
|
||||
DevActionGlobal.DevActionU64Cond.CheckOutState = DevServiceInfo->Loop_State[Service_CheckOut];
|
||||
DevActionGlobal.DevActionU64Cond.WaitState = DevServiceInfo->Loop_State[Service_Wait];
|
||||
DevActionGlobal.DevActionU64Cond.SosState = DevServiceInfo->Loop_State[Service_Sos];
|
||||
DevActionGlobal.DevActionU64Cond.RentState = DevServiceInfo->Loop_State[Service_Meals];
|
||||
DevActionGlobal.DevActionU64Cond.LockState = DevServiceInfo->Loop_State[Service_Food_Plate];
|
||||
DevActionGlobal.DevActionU64Cond.LuggageState = DevServiceInfo->Loop_State[Service_Luggage];
|
||||
DevActionGlobal.DevActionU64Cond.StrongState = DevServiceInfo->Loop_State[Service_Strong];
|
||||
DevActionGlobal.DevActionU64Cond.DoorState = DevServiceInfo->Loop_State[Service_Door];
|
||||
DevActionGlobal.DevActionU64Cond.WarningState = DevServiceInfo->Loop_State[Service_Warning];
|
||||
DevActionGlobal.Service_16 = DevServiceInfo->Loop_State[Service_16];
|
||||
|
||||
SRAM_Write_Byte(DevActionGlobal.DevActionU64Cond.EleState,SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Service_Dis
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣɨ<CFA2>躯<EFBFBD><E8BAAF> <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||
* Return : <20><>
|
||||
*******************************************************************************/
|
||||
void Dev_Service_Dis(uint32_t DevAddr)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t KeepFlag = 0x00;
|
||||
|
||||
if(DevAddr == 0x00) return ;
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if( DevActionGlobal.SleepMode_State != 0x01 ) //2024-10-21 <20><>ҹ<EFBFBD>ر<EFBFBD>ҹ<EFBFBD>ƿ<EFBFBD><C6BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⣬ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>16<31>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevServiceInfo.Loop_State[Service_16] = 0x02;
|
||||
KeepFlag = 0x01;
|
||||
}
|
||||
|
||||
for(uint16_t i = 0; i < DevServiceInfo.ServiceLoopValidNum; i++)
|
||||
{
|
||||
if(DevServiceInfo.Loop_State_Last[i] != DevServiceInfo.Loop_State[i])
|
||||
{
|
||||
KeepFlag = 0x01;
|
||||
DevServiceInfo.Loop_State_Last[i] = DevServiceInfo.Loop_State[i];
|
||||
|
||||
if( (i == Service_Ele) && ( DevServiceInfo.Loop_State[i] == 0x01 ) && (DevServiceInfo.is_first_power_on == 0x01) )
|
||||
{
|
||||
DevServiceInfo.is_first_power_on = 0x00;
|
||||
DevServiceInfo.DevChangeFlag[i] = 0x03; //<2F><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||
}else {
|
||||
DevServiceInfo.DevChangeFlag[i] = DevServiceInfo.Loop_State[i];
|
||||
}
|
||||
|
||||
Udp_Addtion_Roomstate(Dev_Host_Service,0x00, i+1, DevServiceInfo.Loop_State[i]); //<2F>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevServiceInfo.DevChangeFlag[i]);
|
||||
}
|
||||
}
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
Dev_Action_CondService_Get(&DevServiceInfo); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>б仯<D0B1><E4BBAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ͬ<CCAC><CDAC>
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ServiceInfo_Set_first_power_on
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||
* Input :
|
||||
state : <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>״̬
|
||||
* Return : <20><>
|
||||
*******************************************************************************/
|
||||
uint8_t ServiceInfo_Set_first_power_on(uint8_t state)
|
||||
{
|
||||
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(DevServiceInfo.is_first_power_on != state)
|
||||
{
|
||||
DevServiceInfo.is_first_power_on = state;
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
}
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ServiceInfo_Get_ALL_Loop_State
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><>ȡȫ<C8A1><C8AB><EFBFBD><EFBFBD>·<EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>״̬
|
||||
* Input :
|
||||
read_buff : <20><>ȡ״̬<D7B4><CCAC><EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : <20><>
|
||||
*******************************************************************************/
|
||||
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff)
|
||||
{
|
||||
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t loop_offset = 0;
|
||||
uint8_t loop_ide = 0;
|
||||
|
||||
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if( DevServiceInfo.ServiceLoopValidNum >= ServiceNumMAX ) DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
|
||||
|
||||
for(uint8_t i=0;i<DevServiceInfo.ServiceLoopValidNum;i++)
|
||||
{
|
||||
loop_ide = i / 8;
|
||||
loop_offset = i % 8;
|
||||
if(DevServiceInfo.Loop_State[i] == 0x01)
|
||||
{
|
||||
read_buff[loop_ide] |= 0x01 << loop_offset;
|
||||
}
|
||||
}
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ServiceInfo_Set_RoomState
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD>÷<EFBFBD>̬<EFBFBD><CCAC>Ӧ<EFBFBD>Ļ<EFBFBD>·״̬ 2025-10-27
|
||||
<20><><EFBFBD>Է<EFBFBD><D4B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PMS<4D><53><EFBFBD>͵ķ<CDB5>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ı<F3A3ACB8><C4B1><EFBFBD>Ӧ<EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>¼<EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·25 - <20><><EFBFBD><EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·26 - <20>˷<EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·27 - <20><><EFBFBD><EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·28 - <20>շ<EFBFBD>
|
||||
<20><>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·<EFBFBD><C2B7><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>ҽ<EFBFBD><D2BD><EFBFBD>һ<EFBFBD><D2BB>״̬Ϊ<CCAC><CEAA><EFBFBD><EFBFBD>
|
||||
* Input : state -0x01:<3A><><EFBFBD>⡢0x02:<3A>˷<EFBFBD><CBB7><EFBFBD>0x03:<3A><><EFBFBD>⡢0x04:<3A>շ<EFBFBD>
|
||||
* Return : 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ:<3A><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
*******************************************************************************/
|
||||
uint8_t ServiceInfo_Set_RoomState(uint8_t state)
|
||||
{
|
||||
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t keep_flag = 0;
|
||||
|
||||
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
switch(state)
|
||||
{
|
||||
case 0x01: //<2F><><EFBFBD><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x01;
|
||||
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||
|
||||
if(DevServiceInfo.is_first_power_on != 0x01)
|
||||
{
|
||||
DevServiceInfo.is_first_power_on = 0x01;
|
||||
}
|
||||
keep_flag = 0x01;
|
||||
break;
|
||||
case 0x02: //<2F>˷<EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x01;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||
|
||||
if(DevServiceInfo.is_first_power_on != 0x01)
|
||||
{
|
||||
DevServiceInfo.is_first_power_on = 0x01;
|
||||
}
|
||||
keep_flag = 0x01;
|
||||
break;
|
||||
case 0x03: //<2F><><EFBFBD><EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x01;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||
keep_flag = 0x01;
|
||||
break;
|
||||
case 0x04: //<2F>շ<EFBFBD>
|
||||
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x01;
|
||||
keep_flag = 0x01;
|
||||
break;
|
||||
}
|
||||
|
||||
if(keep_flag == 0x01)
|
||||
{
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||
}
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
@@ -270,7 +270,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
||||
|
||||
/*<2A><>ʼ<EFBFBD><CABC>ӳ<EFBFBD><D3B3><EFBFBD>˿ڿ<CBBF>ʼ*/
|
||||
@@ -517,7 +517,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
||||
if(tempaddr != 0x00)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),tempaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(tempaddr,&BUS_Public);
|
||||
if(BUS_Public.Protocol == 0x03) //<2F><><EFBFBD><EFBFBD>A9IO
|
||||
{
|
||||
//SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),tempaddr+Dev_Privately);
|
||||
@@ -1238,10 +1238,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1254,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
|
||||
|
||||
if(DevAddr == 0x00) return Ret;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
switch(DevInputType)
|
||||
@@ -1284,11 +1281,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"VirtualCard Action Clear!!!!");
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -1304,7 +1297,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
|
||||
|
||||
temp_start = start&0xFF;
|
||||
@@ -1328,10 +1321,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
|
||||
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevInputLoop >= DevLVinputInfo.LVinputValidNum)
|
||||
@@ -85,11 +85,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d: %d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>",__func__,DevInputLoop, DevInputType);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -113,7 +109,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
||||
{
|
||||
return ;
|
||||
}
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicLVinput,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVinput);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if( (0x00000000 == DevLVinputInfo.DevC5IOAddr) || (0xFFFFFFFF == DevAddr) )
|
||||
@@ -121,7 +117,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicC5IO,sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevLVinputInfo.DevC5IOAddr,&BUS_PublicC5IO);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
||||
|
||||
for(uint8_t i = 0;i<C5IO_DI_CH_MAX;i++)
|
||||
@@ -239,16 +235,11 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_PublicLVinput.check = 0x00;
|
||||
BUS_PublicLVinput.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G),DevAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVinput,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
BUS_PublicC5IO.check = 0x00;
|
||||
BUS_PublicC5IO.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevLVinputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
|
||||
RS485_LED_INFO Rs485LEDInfo;
|
||||
uint8_t KeepFlag = 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
|
||||
@@ -187,10 +187,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -221,7 +218,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
|
||||
if(( data[0] != C12Rs485AddrDefault ) || ( DEVC12DimTYPE != data[2] ) //
|
||||
|| ( len != (data[4] ) )
|
||||
@@ -293,10 +290,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
|
||||
break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||
}
|
||||
|
||||
return rev;
|
||||
|
||||
@@ -200,7 +200,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
|
||||
|
||||
uint8_t keepflag = 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.DevPort != Rs485CardInfo.DevPort_Last)
|
||||
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
|
||||
|
||||
if(keepflag == 0x01)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||
}
|
||||
|
||||
return ret;
|
||||
@@ -302,7 +299,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
|
||||
return 0x01;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.DevOffline == DEV_IS_OFFLINE)
|
||||
@@ -396,10 +393,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>*/
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
@@ -443,7 +437,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.Rs485CardAction == DevInputType)
|
||||
@@ -456,11 +450,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
|
||||
@@ -120,7 +120,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(loop >= Rs485LED.LEDLoopValidNum) //<2F><>Ч<EFBFBD><D0A7>·
|
||||
@@ -216,10 +216,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d",loop,start);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -292,7 +289,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
|
||||
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LED<45><44><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ؿ<EFBFBD><D8BF>ƿ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>־<EFBFBD><D6BE>%04X <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>%d ", CtrlFlag, CtrlNum);
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(CtrlNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||
@@ -426,10 +423,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
|
||||
}
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
@@ -455,7 +449,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LEDInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(ReadNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||
@@ -549,10 +543,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
|
||||
|
||||
if(tempflag!=0)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
|
||||
@@ -133,7 +133,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevInputLoop >= RS_SWITCH_CH_MAX)
|
||||
@@ -164,10 +164,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>%d",Ret);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -198,7 +195,7 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
|
||||
@@ -254,10 +251,8 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
|
||||
{
|
||||
BLV_Active_Set_List_Addr(DevAddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||
}
|
||||
|
||||
// BLW_Touch_Switch_Feedback(DevAddr, DevOutputLoop, State);
|
||||
|
||||
@@ -160,7 +160,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
|
||||
return 0; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAddIn);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
||||
|
||||
Rs485Tem.TemCondCfg.IndoorFlag = DevInputType & 0x0001;
|
||||
@@ -303,10 +303,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
|
||||
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAddIn);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -347,9 +344,9 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
|
||||
}
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicIn,sizeof(Device_Public_Information_G),CfgDevAddIn);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_PublicIn);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TemIn,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicOut,sizeof(Device_Public_Information_G),CfgDevAddOut);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddOut,&BUS_PublicOut);
|
||||
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>¿<EFBFBD><C2BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>485<38><35>ַ:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x<34><78><EFBFBD><EFBFBD><EFBFBD>Ʋ<EFBFBD><C6B2><EFBFBD>:%4x,<2C><><EFBFBD><EFBFBD>״̬:%d",BUS_PublicOut.addr, TEMSTATECONVER(Rs485Tem.TemStateCtrl), DevOutputType, Rs485Tem.DevOffline);
|
||||
|
||||
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemStateCtrl);
|
||||
@@ -601,10 +598,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_PublicOut.check = 0x00;
|
||||
BUS_PublicOut.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G),CfgDevAddOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_PublicOut,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||
}
|
||||
}
|
||||
|
||||
@@ -667,7 +661,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_TEMP_INFO Rs485TempT1;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(Rs485TempT1.TemStateCtrlLast.on_off != Rs485TempT1.TemStateCtrl.on_off) //<2F><><EFBFBD>ػ<EFBFBD>
|
||||
@@ -799,10 +793,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
|
||||
Rs485TempT1.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
@@ -826,7 +817,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_TEMP_INFO Rs485Tem;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(Dev_Temp_State_Data(Rs485Tem.TemStateCtrlLast) != Dev_Temp_State_Data(Rs485Tem.TemStateCtrl)) //<2F><><EFBFBD><EFBFBD>״̬<D7B4>ı<EFBFBD><C4B1><EFBFBD>
|
||||
@@ -895,10 +886,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
|
||||
Rs485Tem.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
|
||||
@@ -63,7 +63,7 @@ __attribute__((section(".non_0_wait"))) void BlwRelaySwtRecAsk(uint8_t *data)
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),device_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BLV_Device_PublicInfo_Read_To_Struct(device_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),device_addr+Dev_Privately);
|
||||
|
||||
if(DevHVoutInfo.HVSwitchFlag==0x01)
|
||||
@@ -221,14 +221,14 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
|
||||
if(data[0] == SRAM_Read_Byte(DevAdd+Dev_Addr)) //<2F><>ַ<EFBFBD>պ<EFBFBD>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>BUS_Public.addr
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַƥ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> DevAdd:%d,len:%d",data[0],DataLen);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||
}
|
||||
else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
|
||||
if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
|
||||
{
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||
}else{
|
||||
return ret;
|
||||
}
|
||||
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,DataLen);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -333,7 +330,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
|
||||
uint8_t i;
|
||||
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevActionGlobal.DevActionU64Cond.EleState==0x01)
|
||||
@@ -385,10 +382,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
|
||||
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
|
||||
BLV_Communication_Record(&Rs485SwiInfo.comm_record,0x01,0x00);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||
}
|
||||
|
||||
return Ret;
|
||||
|
||||
@@ -412,7 +412,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
|
||||
return rev; //<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(len < 6) return rev;
|
||||
@@ -490,10 +490,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
|
||||
break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
|
||||
}
|
||||
|
||||
return rev;
|
||||
|
||||
20
BLV_485_Driver/inc/blv_nor_dev_c5relay.h
Normal file
20
BLV_485_Driver/inc/blv_nor_dev_c5relay.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* blv_nor_dev_c5relay.h
|
||||
*
|
||||
* Created on: Jan 5, 2026
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
#include "blv_nor_dev_hvoutfun.h"
|
||||
|
||||
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo);
|
||||
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr);
|
||||
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_ */
|
||||
32
BLV_485_Driver/inc/blv_nor_dev_lvoutput.h
Normal file
32
BLV_485_Driver/inc/blv_nor_dev_lvoutput.h
Normal file
@@ -0,0 +1,32 @@
|
||||
/*
|
||||
* blv_nor_dev_lvoutput.h
|
||||
*
|
||||
* Created on: Dec 31, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
|
||||
|
||||
#define LVoutputNumMAX 32 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C1_LVOUTPUTNUMMAX 0x14 //C1Ϊ20·
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
||||
uint8_t DevLVoutputState[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||
uint8_t DevLVoutputStateLast[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
|
||||
uint8_t LVoutputLoopValidNum; //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||
|
||||
uint8_t init_flag; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
|
||||
uint32_t DevC5IOAddr; //C5IO<49>ĵ<EFBFBD>ַ
|
||||
|
||||
}NOR_LVOUTPUT_INFO;
|
||||
|
||||
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr);
|
||||
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType);
|
||||
void Dev_LVoutput_Dis(uint32_t DevAddr);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_ */
|
||||
@@ -90,13 +90,20 @@ typedef enum //
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevChangeFlag[ServiceNumMAX]; //<2F>豸<EFBFBD>仯<EFBFBD><E4BBAF>־ 1<><31><EFBFBD><EFBFBD> 2<>ر<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||
uint8_t DevServiceState[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||
uint8_t DevServiceStateLast[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t Loop_State[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||
uint8_t Loop_State_Last[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t ServiceLoopValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||
uint8_t is_first_power_on; //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||
}NOR_SERVICE_INFO; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start);
|
||||
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo);
|
||||
void Dev_Service_Dis(uint32_t DevAddr);
|
||||
uint8_t ServiceInfo_Set_first_power_on(uint8_t state);
|
||||
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff);
|
||||
uint8_t ServiceInfo_Set_RoomState(uint8_t state);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_ */
|
||||
|
||||
@@ -5,8 +5,12 @@
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define VC_CONDGROUP_MAX 10 //条件组最大支持数
|
||||
#define VC_CONDSUB_MAX 10 //每组条件最大支持数
|
||||
@@ -47,8 +51,6 @@
|
||||
#define VC_Event_BrieflyLeaving_Flag 0x40 //短暂人离事件:条件逻辑判断有人->无人中,短暂判定人离
|
||||
#define VC_Event_LongTermLeaving_Flag 0x80 //短暂人离事件:条件逻辑判断有人->无人中,长时间判定人离
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t HPort_Type; //映射端口类型
|
||||
@@ -141,4 +143,4 @@ typedef struct
|
||||
|
||||
void BLV_Nor_Dev_VirtualCard_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_ */
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_ */
|
||||
@@ -54,7 +54,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
||||
Device_Public_Information_G BUS_Public;
|
||||
PC_TEST_DEVICE_INFO PC_Test_Info;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if((PC_Test_Info.test_flag == 0x01) || (PC_Test_Info.test_flag == 0x02) || (PC_Test_Info.test_flag == 0x11) || (PC_Test_Info.test_flag == 0x12)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
@@ -66,11 +66,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
||||
|
||||
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test - The Input Test END");
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||
}
|
||||
}else if((PC_Test_Info.test_flag == 0x03) || (PC_Test_Info.test_flag == 0x13)) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2>ԣ<EFBFBD><D4A3>رն˿<D5B6>1<EFBFBD><31><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
@@ -103,10 +99,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
||||
g_pc_test.test_flag = PC_Test_Info.test_flag;
|
||||
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test TOUR DATAS END<4E><44>%d num:%d SUCC:%d",PC_Test_Info.test_flag,g_pc_test.tour_num,g_pc_test.tour_succ);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||
|
||||
}else {
|
||||
g_pc_test.tour_num++;
|
||||
@@ -267,10 +260,9 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
|
||||
Device_Public_Information_G BUS_Public;
|
||||
PC_TEST_DEVICE_INFO PC_Test_Info;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
|
||||
/*У<><D0A3>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
if(BLV_PC_TEST_TOUR_DATACheck(data_addr,len) == 0x00)
|
||||
{
|
||||
@@ -518,10 +510,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
|
||||
default: break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user