调试:CSIO继电器控制

CSIO继电器控制初步测试OK
This commit is contained in:
caocong
2026-01-05 21:17:51 +08:00
parent 63ebdb7baa
commit 6e19d0b451
35 changed files with 2094 additions and 929 deletions

View File

@@ -50,6 +50,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
memset(&g_uart[UART_0],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
g_uart[UART_0].RX_Buffer_ReadAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].TX_Buffer_ReadAddr = SRAM_UART0_SendBuffer_Start_Addr;
g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
break;
case UART_1:
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
@@ -69,6 +73,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
memset(&g_uart[UART_1],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
g_uart[UART_1].RX_Buffer_ReadAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].TX_Buffer_ReadAddr = SRAM_UART1_SendBuffer_Start_Addr;
g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
break;
case UART_2:
UART2_BaudRateCfg(buad);
@@ -86,6 +94,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
memset(&g_uart[UART_2],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
g_uart[UART_2].RX_Buffer_ReadAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].TX_Buffer_ReadAddr = SRAM_UART2_SendBuffer_Start_Addr;
g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
break;
case UART_3:
UART3_BaudRateCfg(buad);
@@ -103,6 +115,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
memset(&g_uart[UART_3],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
g_uart[UART_3].RX_Buffer_ReadAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].TX_Buffer_ReadAddr = SRAM_UART3_SendBuffer_Start_Addr;
g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
break;
}
@@ -244,10 +260,18 @@ __attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
g_uart[UART_0].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_0].RX_Buffer_WriteAddr < SRAM_UART0_RecvBuffer_Start_Addr) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_0].RecvLen & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_0].RecvLen >> 8) & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen,g_uart[UART_0].RX_Buffer_WriteAddr+2);
g_uart[UART_0].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if( g_uart[UART_0].RX_Buffer_WriteAddr > SRAM_UART0_RecvBuffer_End_Addr ) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].RecvLen = 0;
g_uart[UART_0].Receiving = 0;
}
}
}
@@ -270,7 +294,10 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
g_uart[UART_1].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_1].RX_Buffer_WriteAddr < SRAM_UART1_RecvBuffer_Start_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_1].RecvLen & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_1].RecvLen >> 8) & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen,g_uart[UART_1].RX_Buffer_WriteAddr+2);
@@ -279,7 +306,6 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
if(g_uart[UART_1].RX_Buffer_WriteAddr > SRAM_UART1_RecvBuffer_End_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].RecvLen = 0;
g_uart[UART_1].Receiving = 0;
}
}
}
@@ -304,10 +330,19 @@ __attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
g_uart[UART_2].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_2].RX_Buffer_WriteAddr < SRAM_UART2_RecvBuffer_Start_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_2].RecvLen & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_2].RecvLen >> 8) & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen,g_uart[UART_2].RX_Buffer_WriteAddr+2);
g_uart[UART_2].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_2].RX_Buffer_WriteAddr > SRAM_UART2_RecvBuffer_End_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].RecvLen = 0;
g_uart[UART_2].Receiving = 0;
}
}
}
@@ -329,13 +364,21 @@ __attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
{
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
g_uart[UART_3].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_3].RX_Buffer_WriteAddr < SRAM_UART3_RecvBuffer_Start_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_3].RecvLen & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_3].RecvLen >> 8) & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen,g_uart[UART_3].RX_Buffer_WriteAddr+2);
g_uart[UART_3].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_3].RX_Buffer_WriteAddr > SRAM_UART3_RecvBuffer_End_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].RecvLen = 0;
g_uart[UART_3].Receiving = 0;
}
}
}