调试:CSIO继电器控制
CSIO继电器控制初步测试OK
This commit is contained in:
@@ -72,7 +72,7 @@
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</option>
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</option>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.2020844713" name="Language standard" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.gnu99" valueType="enumerated"/>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.2020844713" name="Language standard" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.gnu99" valueType="enumerated"/>
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<listOptionValue builtIn="false" value="DEBUG=1"/>
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<listOptionValue builtIn="false" value="DEBUG=2"/>
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</tool>
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</tool>
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@@ -5,7 +5,7 @@
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-966894059699624056" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1281506000959020851" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.gcc"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</provider>
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</provider>
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@@ -117,7 +117,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
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memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
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memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
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memset(&C5IO_Info,0,sizeof(BUS_C5IO_INFO));
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memset(&C5IO_Info,0,sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),csio_addr);
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BLV_Device_PublicInfo_Read_To_Struct(csio_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
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input_num = dev_info->input_num;
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input_num = dev_info->input_num;
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@@ -198,10 +198,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
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temp_len += 4;
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temp_len += 4;
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}
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}
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(csio_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),csio_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
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BLV_Nor_Dev_LVinput_Init(dev_info->addr,dev_info->input_num);
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BLV_Nor_Dev_LVinput_Init(dev_info->addr,dev_info->input_num);
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}
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}
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@@ -224,7 +221,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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Device_Public_Information_G BUS_Public;
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
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if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
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@@ -232,10 +229,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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//Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>,ֻ<><D6BB><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
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//Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>,ֻ<><D6BB><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
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BUS_C5IO_Inquire_Datasend(dev_addr,&C5IO_Info);
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BUS_C5IO_Inquire_Datasend(dev_addr,&C5IO_Info);
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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return RS485OCCUPYTIME;
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return RS485OCCUPYTIME;
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}
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}
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@@ -332,10 +326,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
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C5IO_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
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C5IO_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
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}
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}
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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return RS485OCCUPYTIME;
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return RS485OCCUPYTIME;
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}
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}
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@@ -413,7 +404,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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return 0x01; //<2F><>У<EFBFBD><D0A3>
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return 0x01; //<2F><>У<EFBFBD><D0A3>
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}
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}
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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memset(deal_buff,0,sizeof(deal_buff));
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memset(deal_buff,0,sizeof(deal_buff));
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@@ -482,7 +473,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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Device_Public_Information_G BUS_Public;
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Device_Public_Information_G BUS_Public;
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C5IO_Info.DevOfflineLast = C5IO_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
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C5IO_Info.DevOfflineLast = C5IO_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
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Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
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}
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}
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if((DI_Init_flg == 0) && (deal_buff[PKT_PARA] != 0xF0)) //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>ѯ<EFBFBD>Ļظ<C4BB> 2024-04-01 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>DI<44><49><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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if((DI_Init_flg == 0) && (deal_buff[PKT_PARA] != 0xF0)) //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>ѯ<EFBFBD>Ļظ<C4BB> 2024-04-01 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>DI<44><49><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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@@ -494,10 +485,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"IO VERSION:%d", C5IO_Info.C5IO_Version);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"IO VERSION:%d", C5IO_Info.C5IO_Version);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DI_Control_Flag:%X", C5IO_Info.DI_Control_Flag);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DI_Control_Flag:%X", C5IO_Info.DI_Control_Flag);
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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return 0x00;
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return 0x00;
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}
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}
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@@ -753,10 +741,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
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LOG_Device_COMM_ASK_TO_Reply_Record2(dev_addr+Dev_port,dev_addr+Dev_baud,(SysTick_1ms - C5IO_Info.inquire_tick),deal_buff,deal_len);
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LOG_Device_COMM_ASK_TO_Reply_Record2(dev_addr+Dev_port,dev_addr+Dev_baud,(SysTick_1ms - C5IO_Info.inquire_tick),deal_buff,deal_len);
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}
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}
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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return 0x00;
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return 0x00;
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}
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}
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@@ -1219,7 +1204,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
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Device_Public_Information_G BUS_Public;
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
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@@ -1247,10 +1232,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
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}
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}
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}
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}
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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@@ -1269,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
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Device_Public_Information_G BUS_Public;
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
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BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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if(temp1 < C5IO_DO_CH_MAX)
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if(temp1 < C5IO_DO_CH_MAX)
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@@ -1289,10 +1271,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
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}
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}
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}
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}
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BUS_Public.check = 0x00;
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BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
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SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
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SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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@@ -1311,7 +1290,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
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Device_Public_Information_G BUS_Public;
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Device_Public_Information_G BUS_Public;
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BUS_C5IO_INFO C5IO_Info;
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BUS_C5IO_INFO C5IO_Info;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if(temp1 < C5IO_Relay_CH_MAX)
|
if(temp1 < C5IO_Relay_CH_MAX)
|
||||||
@@ -1334,10 +1313,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1355,7 +1331,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5IO_INFO C5IO_Info;
|
BUS_C5IO_INFO C5IO_Info;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
for(uint8_t i=0;i<C5IO_Relay_CH_MAX;i++)
|
for(uint8_t i=0;i<C5IO_Relay_CH_MAX;i++)
|
||||||
@@ -1375,10 +1351,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
|
|||||||
temp2 >>= 1;
|
temp2 >>= 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1397,16 +1370,13 @@ __attribute__((section(".non_0_wait"))) void BUS_CSIO_Set_RTC_Time(uint32_t dev_
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5IO_INFO C5IO_Info;
|
BUS_C5IO_INFO C5IO_Info;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>*/
|
/*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>*/
|
||||||
C5IO_Info.rtc_set_flag = 0x01;
|
C5IO_Info.rtc_set_flag = 0x01;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
|
|||||||
@@ -113,7 +113,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
|
|||||||
// temp = SRAM_Read_Byte(dev_addr+Dev_Type); //<2F>ж<EFBFBD><D0B6>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
// temp = SRAM_Read_Byte(dev_addr+Dev_Type); //<2F>ж<EFBFBD><D0B6>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
// if(temp != DEV_C5MUSIC_Type) return 0x01;
|
// if(temp != DEV_C5MUSIC_Type) return 0x01;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
|
if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
|
||||||
@@ -122,10 +122,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
|
|||||||
|
|
||||||
BUS_C5MUSIC_Playback_Status_Datasend(dev_addr,&C5Music_Info);
|
BUS_C5MUSIC_Playback_Status_Datasend(dev_addr,&C5Music_Info);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return RS485OCCUPYTIME;
|
return RS485OCCUPYTIME;
|
||||||
}
|
}
|
||||||
@@ -227,10 +224,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
|
|||||||
C5Music_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
C5Music_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return RS485OCCUPYTIME;
|
return RS485OCCUPYTIME;
|
||||||
}
|
}
|
||||||
@@ -253,7 +247,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
uint16_t deal_len = len;
|
uint16_t deal_len = len;
|
||||||
@@ -487,10 +481,8 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
|
|||||||
C5Music_Info.DevOfflineLast = C5Music_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
C5Music_Info.DevOfflineLast = C5Music_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||||
}
|
}
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
@@ -1201,16 +1193,13 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Playback_Mode(uint3
|
|||||||
|
|
||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
C5Music_Info.playback_mode = play_mode;
|
C5Music_Info.playback_mode = play_mode;
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1230,7 +1219,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
|
|||||||
|
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
C5Music_Info.playback_fun = playback;
|
C5Music_Info.playback_fun = playback;
|
||||||
@@ -1239,12 +1228,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1260,7 +1244,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
C5Music_Info.assign_dir = BLV_C5MUSIC_Doorbell_Dir;
|
C5Music_Info.assign_dir = BLV_C5MUSIC_Doorbell_Dir;
|
||||||
@@ -1268,11 +1252,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1290,7 +1270,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
C5Music_Info.playback_fun = start;
|
C5Music_Info.playback_fun = start;
|
||||||
@@ -1299,11 +1279,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1321,23 +1297,17 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Greet_Dir(uint32_t deva
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
C5Music_Info.playback_fun = start;
|
C5Music_Info.playback_fun = start;
|
||||||
|
|
||||||
|
|
||||||
C5Music_Info.assign_dir = BLV_C5MUSIC_Greet_Dir;
|
C5Music_Info.assign_dir = BLV_C5MUSIC_Greet_Dir;
|
||||||
C5Music_Info.assign_playback_idx = id;
|
C5Music_Info.assign_playback_idx = id;
|
||||||
// C5Music_Info.set_playback_volume = 20; //<2F><>ӭ<EFBFBD><D3AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ15
|
// C5Music_Info.set_playback_volume = 20; //<2F><>ӭ<EFBFBD><D3AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ15
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1355,7 +1325,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||||
@@ -1385,12 +1355,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1408,7 +1373,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||||
@@ -1437,11 +1402,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1458,7 +1419,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
|
||||||
@@ -1487,12 +1448,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1507,7 +1463,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1517,11 +1473,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1537,7 +1489,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1559,14 +1511,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
// C5Music_Info.playback_mode = BLV_C5MUSIC_Folder_Loop;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
// C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
|
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1581,7 +1526,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1600,11 +1545,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
|
|||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d",__func__,C5Music_Info.assign_playback_idx);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d",__func__,C5Music_Info.assign_playback_idx);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1619,7 +1560,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1640,11 +1581,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1659,7 +1596,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1669,12 +1606,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1691,7 +1623,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1701,12 +1633,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1723,7 +1650,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1733,12 +1660,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1753,7 +1675,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ
|
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ
|
||||||
@@ -1766,12 +1688,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
|
|||||||
C5Music_Info.adjust_volume_loop = 0x03; //<2F><>·1<C2B7><31><EFBFBD><EFBFBD>·2
|
C5Music_Info.adjust_volume_loop = 0x03; //<2F><>·1<C2B7><31><EFBFBD><EFBFBD>·2
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1786,7 +1703,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
||||||
@@ -1800,11 +1717,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
|||||||
|
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1819,7 +1732,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
||||||
@@ -1839,11 +1752,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
|
|||||||
C5Music_Info.adjust_volume_type |= 0x10;
|
C5Music_Info.adjust_volume_type |= 0x10;
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1858,7 +1767,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
|
||||||
@@ -1878,12 +1787,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
|
|||||||
C5Music_Info.adjust_volume_type |= 0x10;
|
C5Music_Info.adjust_volume_type |= 0x10;
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1898,7 +1802,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>״̬ȡ<CCAC><C8A1>*/
|
/*<2A><><EFBFBD><EFBFBD>״̬ȡ<CCAC><C8A1>*/
|
||||||
@@ -1920,11 +1824,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
|
|||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1942,7 +1842,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1962,11 +1862,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
|
|||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -1983,7 +1879,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
@@ -1999,11 +1895,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
|
|||||||
C5Music_Info.quiet_mode = 0x00;
|
C5Music_Info.quiet_mode = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -2024,7 +1916,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
switch(loop)
|
switch(loop)
|
||||||
@@ -2046,11 +1938,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -2071,7 +1959,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
|
|||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
if((loop & 0x01)) //<2F><><EFBFBD><EFBFBD>
|
if((loop & 0x01)) //<2F><><EFBFBD><EFBFBD>
|
||||||
@@ -2096,11 +1984,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
|
|||||||
C5Music_Info.adjust_volume_type |= 0x10;
|
C5Music_Info.adjust_volume_type |= 0x10;
|
||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
@@ -2125,7 +2009,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Get_BUS_C5MUSIC_Loop_Volume(uint
|
|||||||
|
|
||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
BUS_C5MUSIC_INFO C5Music_Info;
|
BUS_C5MUSIC_INFO C5Music_Info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
switch(loop)
|
switch(loop)
|
||||||
@@ -2197,7 +2081,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
|
|||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
|
||||||
|
|
||||||
if(DevOutputLoop >= MUSICLOOPMAX)
|
if(DevOutputLoop >= MUSICLOOPMAX)
|
||||||
@@ -2410,11 +2294,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
|
|||||||
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddrOut,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddrOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
|
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[0].CtrlCont.CtrlVoice);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[0].CtrlCont.CtrlVoice);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[1].CtrlCont.CtrlVoice);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[1].CtrlCont.CtrlVoice);
|
||||||
|
|||||||
197
BLV_485_Driver/blv_nor_dev_c5relay.c
Normal file
197
BLV_485_Driver/blv_nor_dev_c5relay.c
Normal file
@@ -0,0 +1,197 @@
|
|||||||
|
/*
|
||||||
|
* blv_nor_dev_c5relay.c
|
||||||
|
*
|
||||||
|
* Created on: Jan 5, 2026
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "blv_nor_dev_c5relay.h"
|
||||||
|
#include "blv_bus_dev_c5iofun.h"
|
||||||
|
|
||||||
|
|
||||||
|
#include "blv_dev_action.h"
|
||||||
|
#include "spi_sram.h"
|
||||||
|
#include "check_fun.h"
|
||||||
|
#include "debug.h"
|
||||||
|
|
||||||
|
#define REPEATSENDTIMEMAX 0x03 //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define C5EXPANDTYPE 0xF1 //C5RELAY<41><59><EFBFBD><EFBFBD>
|
||||||
|
#define C5RelayAddrDefault 0x01 //Ĭ<><C4AC>Ϊ1<CEAA><31>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>Ȼ<EFBFBD><C8BB>Ĭ<EFBFBD>ϵ<EFBFBD>ַ
|
||||||
|
|
||||||
|
#define C5RELAYSnMin 0x00 //<2F><>СSn<53><6E>
|
||||||
|
#define C5RELAYSnMax 0x0F //<2F><><EFBFBD><EFBFBD>Sn<53><6E>
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLW_RS485_C5RELAY_Data_Init
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
|
||||||
|
* Input :
|
||||||
|
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
|
BUS_Public->polling_cf = (uint32_t)&BLW_C5RELAYCycleCtrl;
|
||||||
|
BUS_Public->processing_cf = (uint32_t)&BLW_Rs485_C5RELAY_Check;
|
||||||
|
|
||||||
|
/* <20>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ҫ֪<D2AA><D6AA>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF>Ƽ̵<C6BC><CCB5><EFBFBD>
|
||||||
|
<20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡCSIO<49><4F>ַ<EFBFBD>ŵ<EFBFBD><C5B5>豸ȫ<E8B1B8><C8AB><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>浽<EFBFBD>ü̵<C3BC><CCB5><EFBFBD><EFBFBD>豸<EFBFBD>С<EFBFBD>
|
||||||
|
<20><><EFBFBD>Һ<EFBFBD><D2BA><EFBFBD><EFBFBD><EFBFBD>Dev_Coord_Get*/
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
#define C5EXPANDCTRLLEN 13 //<2F><>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD>
|
||||||
|
/**
|
||||||
|
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||||
|
* @para
|
||||||
|
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||||
|
* @return <20><>
|
||||||
|
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
*/
|
||||||
|
void BLW_Rs485_C5RELAY_Ctrl(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
|
||||||
|
{
|
||||||
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD><EFBFBD>CSIO<49><4F>*/
|
||||||
|
if( DevHVoutInfo->HVoutLoopValidNum >= HVoutNumMAX ) DevHVoutInfo->HVoutLoopValidNum = HVoutNumMAX; //<2F><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
for(uint8_t i = 0; i < DevHVoutInfo->HVoutLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
if( (DevHVoutInfo->DevChangeFlag & (0x01 << i)) != 0x00 )
|
||||||
|
{
|
||||||
|
switch(DevHVoutInfo->DevHVoutState[i])
|
||||||
|
{
|
||||||
|
case 0x01:
|
||||||
|
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_HIGH;
|
||||||
|
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
|
||||||
|
|
||||||
|
break;
|
||||||
|
case 0x00:
|
||||||
|
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_LOW;
|
||||||
|
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
DevHVoutInfo->DevChangeFlag &= ~(0x01<<i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLW_C5RELAYCycleCtrl
|
||||||
|
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr)
|
||||||
|
{
|
||||||
|
uint8_t i; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>·
|
||||||
|
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||||
|
uint8_t keep_flag = 0;
|
||||||
|
|
||||||
|
Device_Public_Information_G BUS_Public;
|
||||||
|
NOR_HVOUT_INFO DevHVoutInfo;
|
||||||
|
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
BUS_C5IO_INFO C5IO_Info;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr, &BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
|
if(0x00 == DevHVoutInfo.DevC5IOAddr)
|
||||||
|
{
|
||||||
|
return Ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevHVoutInfo.DevC5IOAddr+Dev_Privately);
|
||||||
|
|
||||||
|
if( (DevHVoutInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
|
||||||
|
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
|
||||||
|
DevHVoutInfo.init_flag = 0x01;
|
||||||
|
|
||||||
|
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
|
||||||
|
{
|
||||||
|
DevHVoutInfo.DevHVoutState[i] = 0x01;
|
||||||
|
DevHVoutInfo.DevHVoutStateLast[i] = 0x01;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||||
|
}else {
|
||||||
|
DevHVoutInfo.DevHVoutState[i] = 0x00;
|
||||||
|
DevHVoutInfo.DevHVoutStateLast[i] = 0x00;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
keep_flag = 0x01;
|
||||||
|
}
|
||||||
|
|
||||||
|
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
if( DevHVoutInfo.DevHVoutStateLast[i] != DevHVoutInfo.DevHVoutState[i] )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><EFBFBD>λ:<3A><>%d·", i);
|
||||||
|
|
||||||
|
DevHVoutInfo.DevChangeFlag |= 0x01 << i;
|
||||||
|
DevHVoutInfo.HVoutCtrlCnt = REPEATSENDTIMEMAX;
|
||||||
|
DevHVoutInfo.DevHVoutStateLast[i] = DevHVoutInfo.DevHVoutState[i];//ͬ<><CDAC>
|
||||||
|
|
||||||
|
keep_flag = 0x01;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if(keep_flag == 0x01)
|
||||||
|
{
|
||||||
|
BLW_Rs485_C5RELAY_Ctrl(&BUS_Public, &DevHVoutInfo, &C5IO_Info); //9·<39><C2B7><EFBFBD>ƣ<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(dev_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO, (uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
return Ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
#define RECDATALENMAX 0x28 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define IsMyData 0x00
|
||||||
|
#define IsNotMyData 0x01
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLW_Rs485_C5RELAY_Check
|
||||||
|
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Input :
|
||||||
|
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||||
|
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
|
||||||
|
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
* Return :
|
||||||
|
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||||
|
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
|
||||||
|
{
|
||||||
|
uint8_t rev = IsNotMyData;
|
||||||
|
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
|
#define C5EXPANDREADLEN 7 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||||
|
/**
|
||||||
|
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||||
|
* @para
|
||||||
|
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||||
|
* @return <20><>
|
||||||
|
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
*/
|
||||||
|
void BLW_Rs485_C5RELAY_Read(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
|
||||||
|
{
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -11,13 +11,15 @@
|
|||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
|
||||||
#include "blv_bus_dev_c5iofun.h"
|
#include "blv_bus_dev_c5iofun.h"
|
||||||
|
#include "blv_device_option.h"
|
||||||
|
#include "blv_nor_dev_c5relay.h"
|
||||||
|
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
||||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||||
|
|
||||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||||
#define RS485_DEV_PRO_FUN_01 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) //((DevFunP)NULL) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
|
#define RS485_DEV_PRO_FUN_01 DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
|
||||||
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_A9RELAY_Flag, BLW_RS485_A9RELAY_Data_Init) //((DevFunP)NULL) //A9IO<49>̵<EFBFBD><CCB5><EFBFBD>
|
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_A9RELAY_Flag, BLW_RS485_A9RELAY_Data_Init) //((DevFunP)NULL) //A9IO<49>̵<EFBFBD><CCB5><EFBFBD>
|
||||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_SwiRELAY_Flag, BLW_RS485_SwiRELAY_Data_Init) //((DevFunP)NULL) //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD>
|
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_SwiRELAY_Flag, BLW_RS485_SwiRELAY_Data_Init) //((DevFunP)NULL) //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD>
|
||||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL) //
|
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL) //
|
||||||
@@ -46,6 +48,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
|||||||
|
|
||||||
if(ENUM_RS485_DEV_PRO_01 == dev_info->version)
|
if(ENUM_RS485_DEV_PRO_01 == dev_info->version)
|
||||||
{
|
{
|
||||||
|
|
||||||
BUS_Public.retry_num = C5IO_REPEATSENDTIMEMAX; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
BUS_Public.retry_num = C5IO_REPEATSENDTIMEMAX; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||||
BUS_Public.wait_time = C5IO_SEND_WAIT_TIME; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
BUS_Public.wait_time = C5IO_SEND_WAIT_TIME; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||||
}else{
|
}else{
|
||||||
@@ -68,6 +71,8 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
|||||||
DevHVoutInfo.HVoutLoopValidNum = dev_info->output_num;
|
DevHVoutInfo.HVoutLoopValidNum = dev_info->output_num;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"HVOUT loop:%d",DevHVoutInfo.HVoutLoopValidNum);
|
||||||
|
|
||||||
switch(BUS_Public.Protocol)
|
switch(BUS_Public.Protocol)
|
||||||
{
|
{
|
||||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &DevHVoutInfo);break; //
|
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &DevHVoutInfo);break; //
|
||||||
@@ -91,6 +96,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
|||||||
Poll485_Info.device_num += 1;
|
Poll485_Info.device_num += 1;
|
||||||
break;
|
break;
|
||||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||||
|
BUS_Public.baud = 115200;
|
||||||
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||||
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
BUS485_Info.device_num += 1;
|
BUS485_Info.device_num += 1;
|
||||||
@@ -152,7 +158,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
|
|||||||
|
|
||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
switch(start)
|
switch(start)
|
||||||
@@ -191,10 +197,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
|
|||||||
{
|
{
|
||||||
BLV_Active_Set_List_Addr(devaddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
BLV_Active_Set_List_Addr(devaddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||||
}
|
}
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -224,7 +228,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
|
|||||||
|
|
||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
if(CtrlNum >= DevHVoutInfo.HVoutLoopValidNum)
|
if(CtrlNum >= DevHVoutInfo.HVoutLoopValidNum)
|
||||||
@@ -270,10 +274,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
|
|||||||
{
|
{
|
||||||
BLV_Active_Set_List_Addr(devaddr);
|
BLV_Active_Set_List_Addr(devaddr);
|
||||||
}
|
}
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
210
BLV_485_Driver/blv_nor_dev_lvoutput.c
Normal file
210
BLV_485_Driver/blv_nor_dev_lvoutput.c
Normal file
@@ -0,0 +1,210 @@
|
|||||||
|
/*
|
||||||
|
* blv_nor_dev_lvoutput.c
|
||||||
|
*
|
||||||
|
* Created on: Dec 31, 2025
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
#include "includes.h"
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>*/
|
||||||
|
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr)
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_Public;
|
||||||
|
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||||
|
memset(&DevLVoutputInfo,0,sizeof(NOR_LVOUTPUT_INFO));
|
||||||
|
|
||||||
|
BUS_Public.addr = devaddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
BUS_Public.type = Dev_Host_LVoutput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
// BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||||
|
// BUS_Public.baud = 9600; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
// BUS_Public.retry_num = 0x03; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
// BUS_Public.wait_time = 0x0064; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||||
|
// BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||||
|
// BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||||
|
|
||||||
|
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_LVoutput_Dis; //
|
||||||
|
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_LVoutput_Control_State; //
|
||||||
|
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = LVoutput_Loop_State; //
|
||||||
|
|
||||||
|
DevLVoutputInfo.LVoutputLoopValidNum = C1_LVOUTPUTNUMMAX;
|
||||||
|
DevLVoutputInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00);
|
||||||
|
|
||||||
|
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : LVoutput_Loop_State
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - ״̬<D7B4><CCAC>ȡ
|
||||||
|
* Input :
|
||||||
|
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||||
|
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||||
|
* Return : ״̬ 0x01<30><31> 0x02<30><32>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||||
|
{
|
||||||
|
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(devaddr == 0x00) return 0x00;
|
||||||
|
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return 0x00;
|
||||||
|
|
||||||
|
if(DevLVoutputInfo.DevLVoutputState[DevOutputLoop] == 0x01)
|
||||||
|
{
|
||||||
|
return 0x01;
|
||||||
|
}else{
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLW_LVoutput_Control_State
|
||||||
|
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||||
|
* Input :
|
||||||
|
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||||
|
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||||
|
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||||
|
* Return : <20><>
|
||||||
|
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType)
|
||||||
|
{
|
||||||
|
uint8_t temp1 = 0;
|
||||||
|
uint8_t state; //0<><30> 1<><31>
|
||||||
|
uint8_t CtrlWay;
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return ;
|
||||||
|
|
||||||
|
CtrlWay = DevOutputType&0x00ff; //ȡ<><C8A1><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
|
switch(CtrlWay)
|
||||||
|
{
|
||||||
|
case 0x01:state = 0x01;break; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
case 0x02:state = 0x00;break; //<2F>ر<EFBFBD>
|
||||||
|
case 0x04: //<2F><>˸
|
||||||
|
if(0x01 == DevLVoutputInfo.DevLVoutputState[DevOutputLoop])
|
||||||
|
{
|
||||||
|
state = 0x00;
|
||||||
|
}else{
|
||||||
|
state = 0x01;
|
||||||
|
}
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD>ֵ,start:%d",state);
|
||||||
|
break;
|
||||||
|
default:return;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
if( DevLVoutputInfo.DevLVoutputState[DevOutputLoop] != state )
|
||||||
|
{
|
||||||
|
switch(state)
|
||||||
|
{
|
||||||
|
case 0x00: //ָ<><D6B8>λ<EFBFBD><CEBB>0
|
||||||
|
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x00;
|
||||||
|
break;
|
||||||
|
case 0x01: //ָ<><D6B8>λ<EFBFBD><CEBB>һ
|
||||||
|
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LVoutput loop:%d,state:%d",DevOutputLoop,state);
|
||||||
|
temp1++;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(temp1 != 0x00)
|
||||||
|
{
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void Dev_LVoutput_Dis(uint32_t DevAddr)
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_PublicLVoutput; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
BUS_C5IO_INFO C5IO_Info;
|
||||||
|
|
||||||
|
uint8_t KeepFlag = 0x00;
|
||||||
|
|
||||||
|
if(DevAddr == 0x00) return ;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVoutput);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),DevAddr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevLVoutputInfo.DevC5IOAddr == 0x00) return ;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(DevLVoutputInfo.DevC5IOAddr,&BUS_PublicC5IO);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVoutputInfo.DevC5IOAddr+Dev_Privately);
|
||||||
|
|
||||||
|
if( (DevLVoutputInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
|
||||||
|
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
|
||||||
|
DevLVoutputInfo.init_flag = 0x01;
|
||||||
|
|
||||||
|
for(uint32_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
|
||||||
|
{
|
||||||
|
DevLVoutputInfo.DevLVoutputState[i] = 0x01;
|
||||||
|
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x01;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||||
|
}else {
|
||||||
|
DevLVoutputInfo.DevLVoutputState[i] = 0x00;
|
||||||
|
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x00;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
KeepFlag = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
for(uint16_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
|
||||||
|
if(DevLVoutputInfo.DevLVoutputStateLast[i] != DevLVoutputInfo.DevLVoutputState[i])
|
||||||
|
{
|
||||||
|
KeepFlag = 0x01;
|
||||||
|
DevLVoutputInfo.DevLVoutputStateLast[i] = DevLVoutputInfo.DevLVoutputState[i];
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevLVoutputInfo.DevLVoutputState[i]);
|
||||||
|
switch(DevLVoutputInfo.DevLVoutputState[i]) //
|
||||||
|
{
|
||||||
|
case 0x01: //<2F><>
|
||||||
|
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_HIGH;
|
||||||
|
C5IO_Info.DO_Control_Flag |= 0x01<<i;
|
||||||
|
break;
|
||||||
|
case 0x00: //<2F><>
|
||||||
|
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_LOW;
|
||||||
|
C5IO_Info.DO_Control_Flag |= 0x00000001<<i;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if(0x01 == KeepFlag)
|
||||||
|
{
|
||||||
|
if(g_pc_test.test_flag == 0x12)
|
||||||
|
{
|
||||||
|
BLV_PC_Testing_Data_Reported(0x02,DEV_C5IO_Type,0x00,SRAM_LOG_Device_C5IO_Relay_Status,4);
|
||||||
|
}
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVoutput,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevLVoutputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
476
BLV_485_Driver/blv_nor_dev_serviceinfo.c
Normal file
476
BLV_485_Driver/blv_nor_dev_serviceinfo.c
Normal file
@@ -0,0 +1,476 @@
|
|||||||
|
/*
|
||||||
|
* blv_nor_dev_servicefun.c
|
||||||
|
*
|
||||||
|
* Created on: Dec 31, 2025
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
#include "includes.h"
|
||||||
|
#include "blv_nor_dev_serviceinfo.h"
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Nor_Dev_Service_For_Logic_Init
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_Public;
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||||
|
memset(&DevServiceInfo,0,sizeof(NOR_SERVICE_INFO));
|
||||||
|
|
||||||
|
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
BUS_Public.type = Dev_Host_Service; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
BUS_Public.port = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||||
|
BUS_Public.baud = dev_info->baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
BUS_Public.retry_num = dev_info->retry; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
BUS_Public.wait_time = dev_info->writ_time; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||||
|
BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||||
|
BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||||
|
|
||||||
|
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_Service_Dis;
|
||||||
|
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_Service_InType_Get;
|
||||||
|
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_Service_Control_State;
|
||||||
|
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = Service_Loop_State;
|
||||||
|
|
||||||
|
DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
|
||||||
|
DevServiceInfo.Loop_State[Service_Warning] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>
|
||||||
|
|
||||||
|
DevServiceInfo.Loop_State[Service_Dnd] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||||
|
DevServiceInfo.Loop_State[Service_Clean] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_Luggage] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_Meals] = 0x02; //<2F>ر<EFBFBD>9<EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_CheckOut] = 0x02; //<2F>ر<EFBFBD><D8B1>˷<EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_Strong] = 0x02; //<2F>رձ<D8B1><D5B1><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_Wait] = 0x02; //<2F>ر<EFBFBD><D8B1>Ժ<EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_Sos] = 0x02; //Ĭ<>Ϲر<CFB9>SOS<4F><53><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
DevServiceInfo.Loop_State[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
|
||||||
|
|
||||||
|
DevServiceInfo.Loop_State_Last[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State_Last[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>˽<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>:%d",sizeof(NOR_SERVICE_INFO));
|
||||||
|
|
||||||
|
/*RCU<43><55><EFBFBD><EFBFBD>MCU<43><55>λ״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC> -
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF>Ź<EFBFBD><C5B9><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ⲿ<EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>(Ĭ<><C4AC>״̬<D7B4><CCAC>ͨ<EFBFBD><CDA8>RCU_POWER_Deivce_State_Init <20>궨<EFBFBD><EAB6A8> <20><EFBFBD>Ĭ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><CABC>״̬)
|
||||||
|
*/
|
||||||
|
if( (DevActionGlobal.sram_save_flag == 0xA8) && ((SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x01) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x03) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x05)) )
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[Service_Ele] = DevActionGlobal.Last_EleState;
|
||||||
|
DevServiceInfo.Loop_State_Last[Service_Ele] = DevActionGlobal.Last_EleState;
|
||||||
|
}else {
|
||||||
|
|
||||||
|
#if RCU_POWER_Deivce_State_Init
|
||||||
|
DevServiceInfo.Loop_State[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||||
|
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||||
|
#else
|
||||||
|
DevServiceInfo.Loop_State[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||||
|
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||||
|
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState_Last); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||||
|
|
||||||
|
DevServiceInfo.is_first_power_on = 0x00; //<2F>ϵ<EFBFBD>Ĭ<EFBFBD><C4AC> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||||
|
|
||||||
|
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Service_Loop_State
|
||||||
|
* Description : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ļ<EFBFBD>·״̬
|
||||||
|
*******************************************************************************/
|
||||||
|
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||||
|
{
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(devaddr == 0x00) return 0x00;
|
||||||
|
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||||
|
{
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
return DevServiceInfo.Loop_State[DevOutputLoop];
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLW_Service_Control_State
|
||||||
|
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||||
|
* Input :
|
||||||
|
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||||
|
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||||
|
start <20><>״̬ 0x01<30><31> 0x02<30><32> 0x04<30><34><EFBFBD><EFBFBD><EFBFBD>״α<D7B4>־λ 0x04
|
||||||
|
* Return : <20><>
|
||||||
|
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start)
|
||||||
|
{
|
||||||
|
// uint16_t DataLen = 0;
|
||||||
|
uint8_t temp1 = 0; //crc_val = 0,
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||||
|
{
|
||||||
|
return ;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch(start)
|
||||||
|
{
|
||||||
|
case 0x01:
|
||||||
|
case 0x02:
|
||||||
|
if( DevServiceInfo.Loop_State[DevOutputLoop] != start )
|
||||||
|
{
|
||||||
|
if((DevOutputLoop == Service_16) && (start == 0x01)) //
|
||||||
|
{
|
||||||
|
if(0x01 == DevActionGlobal.DevActionU64Cond.NeightFlag) //ҹ<>ƴ<EFBFBD><C6B4><EFBFBD>
|
||||||
|
{
|
||||||
|
if(NightModeStart != DevActionGlobal.DevActionU64Cond.NeightState)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><EFBFBD>г<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>ߣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ"); //<2F>г<EFBFBD><D0B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
DevActionGlobal.DevActionU64Cond.NeightState = NightModeStart; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if((DevOutputLoop == Service_Dnd)&& (start == 0x01)) //2023-10-31 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[DevOutputLoop+1] = 0x02;
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop+1),0x02);
|
||||||
|
}
|
||||||
|
else if((DevOutputLoop == Service_Clean)&& (start == 0x01))
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[DevOutputLoop-1] = 0x02;
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop-1),0x02);
|
||||||
|
}
|
||||||
|
else if((DevOutputLoop == Service_24) && (start == 0x01)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -- <20><><EFBFBD>ʵ㣺Ϊɶ<CEAA><C9B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ24<32><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ14 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[Service_Warning] = 0x02;
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
}
|
||||||
|
else if((DevOutputLoop == Service_24) && (start == 0x02)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[Service_Warning] = 0x01;
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
}
|
||||||
|
else if((DevOutputLoop == Service_Ele)&& (start == 0x01)) //2024-04-29
|
||||||
|
{
|
||||||
|
DevActionGlobal.CardInFlag = 0x01;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(DevOutputLoop == Service_Ele){
|
||||||
|
/*ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>¼ 2025-02-19*/
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d\r\n",DevOutputLoop,start);
|
||||||
|
LOG_LogicInfo_DebugRecord("DevService:loop:%d,start:%d",DevOutputLoop,start);
|
||||||
|
}
|
||||||
|
|
||||||
|
DevServiceInfo.Loop_State[DevOutputLoop] = start;//<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",DevOutputLoop,start);
|
||||||
|
temp1++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case 0x03: //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ <20><>λ Ŀǰֻ<C7B0><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x00) )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Service_Ele Set first_power_on");
|
||||||
|
DevServiceInfo.is_first_power_on = 0x01;
|
||||||
|
temp1++;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case 0x04: //<2F><>ȡ<EFBFBD><C8A1>
|
||||||
|
/*
|
||||||
|
1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3>㴥<EFBFBD><E3B4A5><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||||
|
2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>Ҵ<EFBFBD><D2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>硱<EFBFBD>¼<EFBFBD>
|
||||||
|
*/
|
||||||
|
|
||||||
|
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x01) )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20>״<EFBFBD>ȡ<EFBFBD><C8A1>");
|
||||||
|
DevActionGlobal.CardInFlag = 0x01;
|
||||||
|
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
|
||||||
|
temp1++;
|
||||||
|
}else if( DevOutputLoop == Service_Ele ){
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>");
|
||||||
|
DevActionGlobal.CardInFlag = 0x01;
|
||||||
|
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
|
||||||
|
DevServiceInfo.Loop_State_Last[DevOutputLoop] = 0x01;
|
||||||
|
DevServiceInfo.DevChangeFlag[DevOutputLoop] = 0x04; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||||
|
temp1++;
|
||||||
|
}
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(temp1 != 0x00)
|
||||||
|
{
|
||||||
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Dev_Service_InType_Get
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||||
|
* Input :
|
||||||
|
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
DevInputLoop <20><><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><>Χ0~ServiceLoopValidNum
|
||||||
|
DevInputType <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return : <20><>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
|
if(DevInputLoop >= DevServiceInfo.ServiceLoopValidNum)
|
||||||
|
{
|
||||||
|
return Ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(DevInputType == DevServiceInfo.DevChangeFlag[DevInputLoop]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͶԵ<CDB6><D4B5><EFBFBD> 1<><31> 2<><32>
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> %d - %d <20><><EFBFBD><EFBFBD>",DevInputLoop,DevInputType);
|
||||||
|
|
||||||
|
DevServiceInfo.DevChangeFlag[DevInputLoop] = 0x00; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||||
|
Ret = CtrlValid;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(CtrlValid == Ret)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
return Ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>*/
|
||||||
|
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo)
|
||||||
|
{
|
||||||
|
DevActionGlobal.DevActionU64Cond.EleState = DevServiceInfo->Loop_State[Service_Ele];
|
||||||
|
DevActionGlobal.DevActionU64Cond.DndState = DevServiceInfo->Loop_State[Service_Dnd];
|
||||||
|
DevActionGlobal.DevActionU64Cond.CleanState = DevServiceInfo->Loop_State[Service_Clean];
|
||||||
|
DevActionGlobal.DevActionU64Cond.CallState = DevServiceInfo->Loop_State[Service_Call];
|
||||||
|
DevActionGlobal.DevActionU64Cond.WashState = DevServiceInfo->Loop_State[Service_Wash];
|
||||||
|
DevActionGlobal.DevActionU64Cond.CheckOutState = DevServiceInfo->Loop_State[Service_CheckOut];
|
||||||
|
DevActionGlobal.DevActionU64Cond.WaitState = DevServiceInfo->Loop_State[Service_Wait];
|
||||||
|
DevActionGlobal.DevActionU64Cond.SosState = DevServiceInfo->Loop_State[Service_Sos];
|
||||||
|
DevActionGlobal.DevActionU64Cond.RentState = DevServiceInfo->Loop_State[Service_Meals];
|
||||||
|
DevActionGlobal.DevActionU64Cond.LockState = DevServiceInfo->Loop_State[Service_Food_Plate];
|
||||||
|
DevActionGlobal.DevActionU64Cond.LuggageState = DevServiceInfo->Loop_State[Service_Luggage];
|
||||||
|
DevActionGlobal.DevActionU64Cond.StrongState = DevServiceInfo->Loop_State[Service_Strong];
|
||||||
|
DevActionGlobal.DevActionU64Cond.DoorState = DevServiceInfo->Loop_State[Service_Door];
|
||||||
|
DevActionGlobal.DevActionU64Cond.WarningState = DevServiceInfo->Loop_State[Service_Warning];
|
||||||
|
DevActionGlobal.Service_16 = DevServiceInfo->Loop_State[Service_16];
|
||||||
|
|
||||||
|
SRAM_Write_Byte(DevActionGlobal.DevActionU64Cond.EleState,SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Dev_Service_Dis
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣɨ<CFA2>躯<EFBFBD><E8BAAF> <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||||
|
* Input :
|
||||||
|
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
* Return : <20><>
|
||||||
|
*******************************************************************************/
|
||||||
|
void Dev_Service_Dis(uint32_t DevAddr)
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t KeepFlag = 0x00;
|
||||||
|
|
||||||
|
if(DevAddr == 0x00) return ;
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately);
|
||||||
|
|
||||||
|
if( DevActionGlobal.SleepMode_State != 0x01 ) //2024-10-21 <20><>ҹ<EFBFBD>ر<EFBFBD>ҹ<EFBFBD>ƿ<EFBFBD><C6BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⣬ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>16<31>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
DevServiceInfo.Loop_State[Service_16] = 0x02;
|
||||||
|
KeepFlag = 0x01;
|
||||||
|
}
|
||||||
|
|
||||||
|
for(uint16_t i = 0; i < DevServiceInfo.ServiceLoopValidNum; i++)
|
||||||
|
{
|
||||||
|
if(DevServiceInfo.Loop_State_Last[i] != DevServiceInfo.Loop_State[i])
|
||||||
|
{
|
||||||
|
KeepFlag = 0x01;
|
||||||
|
DevServiceInfo.Loop_State_Last[i] = DevServiceInfo.Loop_State[i];
|
||||||
|
|
||||||
|
if( (i == Service_Ele) && ( DevServiceInfo.Loop_State[i] == 0x01 ) && (DevServiceInfo.is_first_power_on == 0x01) )
|
||||||
|
{
|
||||||
|
DevServiceInfo.is_first_power_on = 0x00;
|
||||||
|
DevServiceInfo.DevChangeFlag[i] = 0x03; //<2F><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
|
||||||
|
}else {
|
||||||
|
DevServiceInfo.DevChangeFlag[i] = DevServiceInfo.Loop_State[i];
|
||||||
|
}
|
||||||
|
|
||||||
|
Udp_Addtion_Roomstate(Dev_Host_Service,0x00, i+1, DevServiceInfo.Loop_State[i]); //<2F>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevServiceInfo.DevChangeFlag[i]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if(0x01 == KeepFlag)
|
||||||
|
{
|
||||||
|
Dev_Action_CondService_Get(&DevServiceInfo); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>б仯<D0B1><E4BBAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ͬ<CCAC><CDAC>
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : ServiceInfo_Set_first_power_on
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||||
|
* Input :
|
||||||
|
state : <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>״̬
|
||||||
|
* Return : <20><>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t ServiceInfo_Set_first_power_on(uint8_t state)
|
||||||
|
{
|
||||||
|
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
|
if(DevServiceInfo.is_first_power_on != state)
|
||||||
|
{
|
||||||
|
DevServiceInfo.is_first_power_on = state;
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : ServiceInfo_Get_ALL_Loop_State
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><>ȡȫ<C8A1><C8AB><EFBFBD><EFBFBD>·<EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>״̬
|
||||||
|
* Input :
|
||||||
|
read_buff : <20><>ȡ״̬<D7B4><CCAC><EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return : <20><>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff)
|
||||||
|
{
|
||||||
|
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t loop_offset = 0;
|
||||||
|
uint8_t loop_ide = 0;
|
||||||
|
|
||||||
|
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
|
if( DevServiceInfo.ServiceLoopValidNum >= ServiceNumMAX ) DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
|
||||||
|
|
||||||
|
for(uint8_t i=0;i<DevServiceInfo.ServiceLoopValidNum;i++)
|
||||||
|
{
|
||||||
|
loop_ide = i / 8;
|
||||||
|
loop_offset = i % 8;
|
||||||
|
if(DevServiceInfo.Loop_State[i] == 0x01)
|
||||||
|
{
|
||||||
|
read_buff[loop_ide] |= 0x01 << loop_offset;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : ServiceInfo_Set_RoomState
|
||||||
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD>÷<EFBFBD>̬<EFBFBD><CCAC>Ӧ<EFBFBD>Ļ<EFBFBD>·״̬ 2025-10-27
|
||||||
|
<20><><EFBFBD>Է<EFBFBD><D4B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PMS<4D><53><EFBFBD>͵ķ<CDB5>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ı<F3A3ACB8><C4B1><EFBFBD>Ӧ<EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>¼<EFBFBD>
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·25 - <20><><EFBFBD><EFBFBD>
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·26 - <20>˷<EFBFBD>
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·27 - <20><><EFBFBD><EFBFBD>
|
||||||
|
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·28 - <20>շ<EFBFBD>
|
||||||
|
<20><>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·<EFBFBD><C2B7><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>ҽ<EFBFBD><D2BD><EFBFBD>һ<EFBFBD><D2BB>״̬Ϊ<CCAC><CEAA><EFBFBD><EFBFBD>
|
||||||
|
* Input : state -0x01:<3A><><EFBFBD>⡢0x02:<3A>˷<EFBFBD><CBB7><EFBFBD>0x03:<3A><><EFBFBD>⡢0x04:<3A>շ<EFBFBD>
|
||||||
|
* Return : 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ:<3A><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t ServiceInfo_Set_RoomState(uint8_t state)
|
||||||
|
{
|
||||||
|
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t keep_flag = 0;
|
||||||
|
|
||||||
|
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
|
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
|
switch(state)
|
||||||
|
{
|
||||||
|
case 0x01: //<2F><><EFBFBD><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x01;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||||
|
|
||||||
|
if(DevServiceInfo.is_first_power_on != 0x01)
|
||||||
|
{
|
||||||
|
DevServiceInfo.is_first_power_on = 0x01;
|
||||||
|
}
|
||||||
|
keep_flag = 0x01;
|
||||||
|
break;
|
||||||
|
case 0x02: //<2F>˷<EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x01;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||||
|
|
||||||
|
if(DevServiceInfo.is_first_power_on != 0x01)
|
||||||
|
{
|
||||||
|
DevServiceInfo.is_first_power_on = 0x01;
|
||||||
|
}
|
||||||
|
keep_flag = 0x01;
|
||||||
|
break;
|
||||||
|
case 0x03: //<2F><><EFBFBD><EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x01;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
|
||||||
|
keep_flag = 0x01;
|
||||||
|
break;
|
||||||
|
case 0x04: //<2F>շ<EFBFBD>
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
|
||||||
|
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x01;
|
||||||
|
keep_flag = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if(keep_flag == 0x01)
|
||||||
|
{
|
||||||
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
@@ -270,7 +270,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
|||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
||||||
|
|
||||||
/*<2A><>ʼ<EFBFBD><CABC>ӳ<EFBFBD><D3B3><EFBFBD>˿ڿ<CBBF>ʼ*/
|
/*<2A><>ʼ<EFBFBD><CABC>ӳ<EFBFBD><D3B3><EFBFBD>˿ڿ<CBBF>ʼ*/
|
||||||
@@ -517,7 +517,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
|||||||
if(tempaddr != 0x00)
|
if(tempaddr != 0x00)
|
||||||
{
|
{
|
||||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),tempaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(tempaddr,&BUS_Public);
|
||||||
if(BUS_Public.Protocol == 0x03) //<2F><><EFBFBD><EFBFBD>A9IO
|
if(BUS_Public.Protocol == 0x03) //<2F><><EFBFBD><EFBFBD>A9IO
|
||||||
{
|
{
|
||||||
//SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),tempaddr+Dev_Privately);
|
//SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),tempaddr+Dev_Privately);
|
||||||
@@ -1238,10 +1238,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
|
|||||||
|
|
||||||
if(0x01 == KeepFlag)
|
if(0x01 == KeepFlag)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -1254,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
|
|||||||
|
|
||||||
if(DevAddr == 0x00) return Ret;
|
if(DevAddr == 0x00) return Ret;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
switch(DevInputType)
|
switch(DevInputType)
|
||||||
@@ -1284,11 +1281,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
|
|||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"VirtualCard Action Clear!!!!");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"VirtualCard Action Clear!!!!");
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -1304,7 +1297,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
|
|||||||
|
|
||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
|
||||||
|
|
||||||
temp_start = start&0xFF;
|
temp_start = start&0xFF;
|
||||||
@@ -1328,10 +1321,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
|
|||||||
|
|
||||||
if(temp1 != 0x00)
|
if(temp1 != 0x00)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
|
|||||||
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(DevInputLoop >= DevLVinputInfo.LVinputValidNum)
|
if(DevInputLoop >= DevLVinputInfo.LVinputValidNum)
|
||||||
@@ -85,11 +85,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
|
|||||||
if(CtrlValid == Ret)
|
if(CtrlValid == Ret)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d: %d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>",__func__,DevInputLoop, DevInputType);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d: %d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>",__func__,DevInputLoop, DevInputType);
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -113,7 +109,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
|||||||
{
|
{
|
||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicLVinput,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVinput);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||||
|
|
||||||
if( (0x00000000 == DevLVinputInfo.DevC5IOAddr) || (0xFFFFFFFF == DevAddr) )
|
if( (0x00000000 == DevLVinputInfo.DevC5IOAddr) || (0xFFFFFFFF == DevAddr) )
|
||||||
@@ -121,7 +117,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
|||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicC5IO,sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevLVinputInfo.DevC5IOAddr,&BUS_PublicC5IO);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
||||||
|
|
||||||
for(uint8_t i = 0;i<C5IO_DI_CH_MAX;i++)
|
for(uint8_t i = 0;i<C5IO_DI_CH_MAX;i++)
|
||||||
@@ -239,16 +235,11 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
|||||||
|
|
||||||
if(0x01 == KeepFlag)
|
if(0x01 == KeepFlag)
|
||||||
{
|
{
|
||||||
BUS_PublicLVinput.check = 0x00;
|
|
||||||
BUS_PublicLVinput.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVinput,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G),DevAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
BUS_PublicC5IO.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevLVinputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
|
||||||
BUS_PublicC5IO.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
|
|||||||
RS485_LED_INFO Rs485LEDInfo;
|
RS485_LED_INFO Rs485LEDInfo;
|
||||||
uint8_t KeepFlag = 0x00;
|
uint8_t KeepFlag = 0x00;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
|
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
|
||||||
@@ -187,10 +187,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
|
|||||||
|
|
||||||
if(0x01 == KeepFlag)
|
if(0x01 == KeepFlag)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -221,7 +218,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
|
|||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
|
|
||||||
if(( data[0] != C12Rs485AddrDefault ) || ( DEVC12DimTYPE != data[2] ) //
|
if(( data[0] != C12Rs485AddrDefault ) || ( DEVC12DimTYPE != data[2] ) //
|
||||||
|| ( len != (data[4] ) )
|
|| ( len != (data[4] ) )
|
||||||
@@ -293,10 +290,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return rev;
|
return rev;
|
||||||
|
|||||||
@@ -200,7 +200,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
|
|||||||
|
|
||||||
uint8_t keepflag = 0x00;
|
uint8_t keepflag = 0x00;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if(Rs485CardInfo.DevPort != Rs485CardInfo.DevPort_Last)
|
if(Rs485CardInfo.DevPort != Rs485CardInfo.DevPort_Last)
|
||||||
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
|
|||||||
|
|
||||||
if(keepflag == 0x01)
|
if(keepflag == 0x01)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
@@ -302,7 +299,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
|
|||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if(Rs485CardInfo.DevOffline == DEV_IS_OFFLINE)
|
if(Rs485CardInfo.DevOffline == DEV_IS_OFFLINE)
|
||||||
@@ -396,10 +393,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>*/
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
@@ -443,7 +437,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
|
|||||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
||||||
|
|
||||||
if(Rs485CardInfo.Rs485CardAction == DevInputType)
|
if(Rs485CardInfo.Rs485CardAction == DevInputType)
|
||||||
@@ -456,11 +450,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
|
|||||||
if(CtrlValid == Ret)
|
if(CtrlValid == Ret)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
|
|||||||
@@ -120,7 +120,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
|
|||||||
|
|
||||||
if(devaddr == 0x00) return;
|
if(devaddr == 0x00) return;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
if(loop >= Rs485LED.LEDLoopValidNum) //<2F><>Ч<EFBFBD><D0A7>·
|
if(loop >= Rs485LED.LEDLoopValidNum) //<2F><>Ч<EFBFBD><D0A7>·
|
||||||
@@ -216,10 +216,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
|
|||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d",loop,start);
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d",loop,start);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -292,7 +289,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
|
|||||||
|
|
||||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LED<45><44><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ؿ<EFBFBD><D8BF>ƿ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>־<EFBFBD><D6BE>%04X <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>%d ", CtrlFlag, CtrlNum);
|
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LED<45><44><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ؿ<EFBFBD><D8BF>ƿ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>־<EFBFBD><D6BE>%04X <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>%d ", CtrlFlag, CtrlNum);
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
if(CtrlNum >= Rs485LEDInfo.LEDLoopValidNum)
|
if(CtrlNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||||
@@ -426,10 +423,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -455,7 +449,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
RS485_LED_INFO Rs485LEDInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
RS485_LED_INFO Rs485LEDInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||||
|
|
||||||
if(ReadNum >= Rs485LEDInfo.LEDLoopValidNum)
|
if(ReadNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||||
@@ -549,10 +543,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
|
|||||||
|
|
||||||
if(tempflag!=0)
|
if(tempflag!=0)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
|
|||||||
@@ -133,7 +133,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
|
|||||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(DevInputLoop >= RS_SWITCH_CH_MAX)
|
if(DevInputLoop >= RS_SWITCH_CH_MAX)
|
||||||
@@ -164,10 +164,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
|
|||||||
|
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>%d",Ret);
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>%d",Ret);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -198,7 +195,7 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
|
|||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
|
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
|
||||||
@@ -254,10 +251,8 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
|
|||||||
{
|
{
|
||||||
BLV_Active_Set_List_Addr(DevAddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
BLV_Active_Set_List_Addr(DevAddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||||
}
|
}
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// BLW_Touch_Switch_Feedback(DevAddr, DevOutputLoop, State);
|
// BLW_Touch_Switch_Feedback(DevAddr, DevOutputLoop, State);
|
||||||
|
|||||||
@@ -160,7 +160,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
|
|||||||
return 0; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>
|
return 0; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>
|
||||||
}
|
}
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAddIn);
|
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
||||||
|
|
||||||
Rs485Tem.TemCondCfg.IndoorFlag = DevInputType & 0x0001;
|
Rs485Tem.TemCondCfg.IndoorFlag = DevInputType & 0x0001;
|
||||||
@@ -303,10 +303,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
|
|||||||
|
|
||||||
if(CtrlValid == Ret)
|
if(CtrlValid == Ret)
|
||||||
{
|
{
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAddIn);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -347,9 +344,9 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
|
|||||||
}
|
}
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicIn,sizeof(Device_Public_Information_G),CfgDevAddIn);
|
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_PublicIn);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TemIn,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TemIn,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicOut,sizeof(Device_Public_Information_G),CfgDevAddOut);
|
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddOut,&BUS_PublicOut);
|
||||||
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>¿<EFBFBD><C2BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>485<38><35>ַ:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x<34><78><EFBFBD><EFBFBD><EFBFBD>Ʋ<EFBFBD><C6B2><EFBFBD>:%4x,<2C><><EFBFBD><EFBFBD>״̬:%d",BUS_PublicOut.addr, TEMSTATECONVER(Rs485Tem.TemStateCtrl), DevOutputType, Rs485Tem.DevOffline);
|
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>¿<EFBFBD><C2BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>485<38><35>ַ:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x<34><78><EFBFBD><EFBFBD><EFBFBD>Ʋ<EFBFBD><C6B2><EFBFBD>:%4x,<2C><><EFBFBD><EFBFBD>״̬:%d",BUS_PublicOut.addr, TEMSTATECONVER(Rs485Tem.TemStateCtrl), DevOutputType, Rs485Tem.DevOffline);
|
||||||
|
|
||||||
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemStateCtrl);
|
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemStateCtrl);
|
||||||
@@ -601,10 +598,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
|
|||||||
|
|
||||||
if(0x01 == KeepFlag)
|
if(0x01 == KeepFlag)
|
||||||
{
|
{
|
||||||
BUS_PublicOut.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_PublicOut,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||||
BUS_PublicOut.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G),CfgDevAddOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -667,7 +661,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
RS485_TEMP_INFO Rs485TempT1;
|
RS485_TEMP_INFO Rs485TempT1;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(Rs485TempT1.TemStateCtrlLast.on_off != Rs485TempT1.TemStateCtrl.on_off) //<2F><><EFBFBD>ػ<EFBFBD>
|
if(Rs485TempT1.TemStateCtrlLast.on_off != Rs485TempT1.TemStateCtrl.on_off) //<2F><><EFBFBD>ػ<EFBFBD>
|
||||||
@@ -799,10 +793,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
|
|||||||
Rs485TempT1.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
Rs485TempT1.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -826,7 +817,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
RS485_TEMP_INFO Rs485Tem;
|
RS485_TEMP_INFO Rs485Tem;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(Dev_Temp_State_Data(Rs485Tem.TemStateCtrlLast) != Dev_Temp_State_Data(Rs485Tem.TemStateCtrl)) //<2F><><EFBFBD><EFBFBD>״̬<D7B4>ı<EFBFBD><C4B1><EFBFBD>
|
if(Dev_Temp_State_Data(Rs485Tem.TemStateCtrlLast) != Dev_Temp_State_Data(Rs485Tem.TemStateCtrl)) //<2F><><EFBFBD><EFBFBD>״̬<D7B4>ı<EFBFBD><C4B1><EFBFBD>
|
||||||
@@ -895,10 +886,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
|
|||||||
Rs485Tem.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
Rs485Tem.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
|
|||||||
@@ -63,7 +63,7 @@ __attribute__((section(".non_0_wait"))) void BlwRelaySwtRecAsk(uint8_t *data)
|
|||||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),device_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(device_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),device_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),device_addr+Dev_Privately);
|
||||||
|
|
||||||
if(DevHVoutInfo.HVSwitchFlag==0x01)
|
if(DevHVoutInfo.HVSwitchFlag==0x01)
|
||||||
@@ -221,14 +221,14 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
|
|||||||
if(data[0] == SRAM_Read_Byte(DevAdd+Dev_Addr)) //<2F><>ַ<EFBFBD>պ<EFBFBD>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>BUS_Public.addr
|
if(data[0] == SRAM_Read_Byte(DevAdd+Dev_Addr)) //<2F><>ַ<EFBFBD>պ<EFBFBD>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>BUS_Public.addr
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַƥ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> DevAdd:%d,len:%d",data[0],DataLen);
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַƥ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> DevAdd:%d,len:%d",data[0],DataLen);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||||
}
|
}
|
||||||
else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
|
else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
|
||||||
{
|
{
|
||||||
DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
|
DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
|
||||||
if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
|
if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||||
}else{
|
}else{
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
|
|||||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,DataLen);
|
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,DataLen);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@@ -333,7 +330,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
|
|||||||
uint8_t i;
|
uint8_t i;
|
||||||
uint8_t Ret = RS485OCCUPYNOTIME;
|
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||||
|
|
||||||
if(DevActionGlobal.DevActionU64Cond.EleState==0x01)
|
if(DevActionGlobal.DevActionU64Cond.EleState==0x01)
|
||||||
@@ -385,10 +382,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
|
|||||||
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
|
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
|
||||||
BLV_Communication_Record(&Rs485SwiInfo.comm_record,0x01,0x00);
|
BLV_Communication_Record(&Rs485SwiInfo.comm_record,0x01,0x00);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return Ret;
|
return Ret;
|
||||||
|
|||||||
@@ -412,7 +412,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
|
|||||||
return rev; //<2F><><EFBFBD><EFBFBD>
|
return rev; //<2F><><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if(len < 6) return rev;
|
if(len < 6) return rev;
|
||||||
@@ -490,10 +490,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return rev;
|
return rev;
|
||||||
|
|||||||
20
BLV_485_Driver/inc/blv_nor_dev_c5relay.h
Normal file
20
BLV_485_Driver/inc/blv_nor_dev_c5relay.h
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
/*
|
||||||
|
* blv_nor_dev_c5relay.h
|
||||||
|
*
|
||||||
|
* Created on: Jan 5, 2026
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
|
||||||
|
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "blv_rs485_protocol.h"
|
||||||
|
#include "logic_file_function.h"
|
||||||
|
#include "blv_nor_dev_hvoutfun.h"
|
||||||
|
|
||||||
|
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo);
|
||||||
|
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr);
|
||||||
|
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||||
|
|
||||||
|
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_ */
|
||||||
32
BLV_485_Driver/inc/blv_nor_dev_lvoutput.h
Normal file
32
BLV_485_Driver/inc/blv_nor_dev_lvoutput.h
Normal file
@@ -0,0 +1,32 @@
|
|||||||
|
/*
|
||||||
|
* blv_nor_dev_lvoutput.h
|
||||||
|
*
|
||||||
|
* Created on: Dec 31, 2025
|
||||||
|
* Author: cc
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
|
||||||
|
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
|
||||||
|
|
||||||
|
#define LVoutputNumMAX 32 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define C1_LVOUTPUTNUMMAX 0x14 //C1Ϊ20·
|
||||||
|
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint8_t DevLVoutputState[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||||
|
uint8_t DevLVoutputStateLast[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||||
|
|
||||||
|
uint8_t LVoutputLoopValidNum; //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||||
|
|
||||||
|
uint8_t init_flag; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
|
||||||
|
uint32_t DevC5IOAddr; //C5IO<49>ĵ<EFBFBD>ַ
|
||||||
|
|
||||||
|
}NOR_LVOUTPUT_INFO;
|
||||||
|
|
||||||
|
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr);
|
||||||
|
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||||
|
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType);
|
||||||
|
void Dev_LVoutput_Dis(uint32_t DevAddr);
|
||||||
|
|
||||||
|
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_ */
|
||||||
@@ -90,13 +90,20 @@ typedef enum //
|
|||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
uint8_t DevChangeFlag[ServiceNumMAX]; //<2F>豸<EFBFBD>仯<EFBFBD><E4BBAF>־ 1<><31><EFBFBD><EFBFBD> 2<>ر<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
uint8_t DevChangeFlag[ServiceNumMAX]; //<2F>豸<EFBFBD>仯<EFBFBD><E4BBAF>־ 1<><31><EFBFBD><EFBFBD> 2<>ر<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||||
uint8_t DevServiceState[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
uint8_t Loop_State[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||||
uint8_t DevServiceStateLast[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
uint8_t Loop_State_Last[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||||
uint8_t ServiceLoopValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
uint8_t ServiceLoopValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||||
uint8_t is_first_power_on; //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
uint8_t is_first_power_on; //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
|
||||||
}NOR_SERVICE_INFO; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
}NOR_SERVICE_INFO; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||||
|
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||||
|
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start);
|
||||||
|
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||||
|
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo);
|
||||||
|
void Dev_Service_Dis(uint32_t DevAddr);
|
||||||
|
uint8_t ServiceInfo_Set_first_power_on(uint8_t state);
|
||||||
|
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff);
|
||||||
|
uint8_t ServiceInfo_Set_RoomState(uint8_t state);
|
||||||
|
|
||||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_ */
|
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_ */
|
||||||
|
|||||||
@@ -5,8 +5,12 @@
|
|||||||
* Author: cc
|
* Author: cc
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
|
||||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "blv_rs485_protocol.h"
|
||||||
|
#include "logic_file_function.h"
|
||||||
|
|
||||||
#define VC_CONDGROUP_MAX 10 //条件组最大支持数
|
#define VC_CONDGROUP_MAX 10 //条件组最大支持数
|
||||||
#define VC_CONDSUB_MAX 10 //每组条件最大支持数
|
#define VC_CONDSUB_MAX 10 //每组条件最大支持数
|
||||||
@@ -47,8 +51,6 @@
|
|||||||
#define VC_Event_BrieflyLeaving_Flag 0x40 //短暂人离事件:条件逻辑判断有人->无人中,短暂判定人离
|
#define VC_Event_BrieflyLeaving_Flag 0x40 //短暂人离事件:条件逻辑判断有人->无人中,短暂判定人离
|
||||||
#define VC_Event_LongTermLeaving_Flag 0x80 //短暂人离事件:条件逻辑判断有人->无人中,长时间判定人离
|
#define VC_Event_LongTermLeaving_Flag 0x80 //短暂人离事件:条件逻辑判断有人->无人中,长时间判定人离
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
uint8_t HPort_Type; //映射端口类型
|
uint8_t HPort_Type; //映射端口类型
|
||||||
@@ -141,4 +143,4 @@ typedef struct
|
|||||||
|
|
||||||
void BLV_Nor_Dev_VirtualCard_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
void BLV_Nor_Dev_VirtualCard_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||||
|
|
||||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_ */
|
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_ */
|
||||||
@@ -54,7 +54,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
PC_TEST_DEVICE_INFO PC_Test_Info;
|
PC_TEST_DEVICE_INFO PC_Test_Info;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
if((PC_Test_Info.test_flag == 0x01) || (PC_Test_Info.test_flag == 0x02) || (PC_Test_Info.test_flag == 0x11) || (PC_Test_Info.test_flag == 0x12)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>ж<EFBFBD>
|
if((PC_Test_Info.test_flag == 0x01) || (PC_Test_Info.test_flag == 0x02) || (PC_Test_Info.test_flag == 0x11) || (PC_Test_Info.test_flag == 0x12)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
@@ -66,11 +66,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
|||||||
|
|
||||||
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test - The Input Test END");
|
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test - The Input Test END");
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
}
|
}
|
||||||
}else if((PC_Test_Info.test_flag == 0x03) || (PC_Test_Info.test_flag == 0x13)) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2>ԣ<EFBFBD><D4A3>رն˿<D5B6>1<EFBFBD><31><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
}else if((PC_Test_Info.test_flag == 0x03) || (PC_Test_Info.test_flag == 0x13)) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2>ԣ<EFBFBD><D4A3>رն˿<D5B6>1<EFBFBD><31><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
{
|
{
|
||||||
@@ -103,10 +99,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
|
|||||||
g_pc_test.test_flag = PC_Test_Info.test_flag;
|
g_pc_test.test_flag = PC_Test_Info.test_flag;
|
||||||
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test TOUR DATAS END<4E><44>%d num:%d SUCC:%d",PC_Test_Info.test_flag,g_pc_test.tour_num,g_pc_test.tour_succ);
|
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test TOUR DATAS END<4E><44>%d num:%d SUCC:%d",PC_Test_Info.test_flag,g_pc_test.tour_num,g_pc_test.tour_succ);
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
}else {
|
}else {
|
||||||
g_pc_test.tour_num++;
|
g_pc_test.tour_num++;
|
||||||
@@ -267,10 +260,9 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
PC_TEST_DEVICE_INFO PC_Test_Info;
|
PC_TEST_DEVICE_INFO PC_Test_Info;
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
|
|
||||||
/*У<><D0A3>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*У<><D0A3>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(BLV_PC_TEST_TOUR_DATACheck(data_addr,len) == 0x00)
|
if(BLV_PC_TEST_TOUR_DATACheck(data_addr,len) == 0x00)
|
||||||
{
|
{
|
||||||
@@ -518,10 +510,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
|
|||||||
default: break;
|
default: break;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -10,6 +10,209 @@ BLV_DevAction_Manage_G DevActionGlobal; //
|
|||||||
|
|
||||||
#define Action_Group_Ctrl_Num 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ⱥ<>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
#define Action_Group_Ctrl_Num 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ⱥ<>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Add_DevAction_To_List
|
||||||
|
* Description : <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>浽<EFBFBD>ⲿSRAM
|
||||||
|
* DevAction_Info <20><><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) void Add_DevAction_To_List(DEV_ACTION_INFO *DevAction_Info)
|
||||||
|
{
|
||||||
|
uint32_t list_addr = SRAM_DevAction_List_Start_Addr + DevActionGlobal.DevActionNum*SRAM_DevAction_List_Size; //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
if(DevActionGlobal.DevActionNum >= SRAM_DevAction_List_Num) //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ<EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: %d", SRAM_DevAction_List_Num);
|
||||||
|
return ;
|
||||||
|
}
|
||||||
|
DevActionGlobal.DevActionNum++;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ: %X", DevActionGlobal.DevActionNum, list_addr);
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
for(uint16_t i = 0;i<SRAM_DevAction_List_Size;i++)
|
||||||
|
{
|
||||||
|
SRAM_Write_Byte(0x00,list_addr+i);
|
||||||
|
}
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>ȣ<EFBFBD>%d", DevAction_Info->data_len);
|
||||||
|
|
||||||
|
DevAction_Info->CheckVal = 0x00;
|
||||||
|
DevAction_Info->CheckVal = DevAction_CheckSum(list_addr,DevAction_Info->data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD>飺%d", DevAction_Info->CheckVal);
|
||||||
|
|
||||||
|
SRAM_DMA_Write_Buff((uint8_t *)DevAction_Info, DevAction_Info->data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
__attribute__((section(".non_0_wait"))) void Logic_Action_Output_DataGet(DEV_ACTION_INFO *DevAction_Info, uint8_t *DevCtrlBuf)
|
||||||
|
{
|
||||||
|
uint8_t i = 0;
|
||||||
|
uint8_t NeightLight = 0x00;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", DevAction_Info->DevCtrlNum);
|
||||||
|
|
||||||
|
for(i = 0; i < DevAction_Info->DevCtrlNum; i++)
|
||||||
|
{
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType = DevCtrlBuf[i*DEVACTIONOUTCFGLEN];
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevAddr = DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 1];
|
||||||
|
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevOutputLoop = DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 3];
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevOutputLoop <<= 8;
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevOutputLoop |= DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 2];
|
||||||
|
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState = DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 5];
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState <<= 8;
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState |= DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 4];
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayCont = DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 6];
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayWeight = DevCtrlBuf[i*DEVACTIONOUTCFGLEN + 7];
|
||||||
|
|
||||||
|
if(DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Host_Invalid) //<2F><><EFBFBD>Ͳ<EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
if(DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevOutputLoop != 0x00) //<2F>һ<EFBFBD>·<EFBFBD><C2B7>Ϊ0
|
||||||
|
{
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevOutputLoop--;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if( ( (DEV_CTRLWAY_RELATESCENE == (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState&0x00ff)) //<2F><>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀǰ<C4BF><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>غʹ<D8BA><CDB4><EFBFBD>
|
||||||
|
||(CFG_Dev_CtrlWay_Is_RelateBlink == (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState&0x00ff))) //<2F><>Ӧ<EFBFBD><D3A6>˸ Ŀǰ<C4BF><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != DEV_RS485_HEATER)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != DEV_Virtual_ColorTemp)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != Dev_485_BLE_Music)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != DEV_Carbon_Saved)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Scene_Restore)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Energy_Monitor)
|
||||||
|
&& (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Host_Service) ) //<2F><><EFBFBD>Ҷ<EFBFBD><D2B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͳ<EFBFBD><CDB2>ǵ<EFBFBD>ů<EFBFBD><C5AF><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState &= 0x00ff; //<2F><><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>0
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState |= 0x6400; //<2F><><EFBFBD>ֽڸ<D6BD>ֵ
|
||||||
|
}
|
||||||
|
|
||||||
|
if(DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayCont == 0x00)
|
||||||
|
{
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayCont = 0x00; //<2F><><EFBFBD>ݺ͵<DDBA>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>0
|
||||||
|
DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayWeight = 0x00; //<2F><><EFBFBD>ݺ͵<DDBA>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>0
|
||||||
|
}
|
||||||
|
|
||||||
|
Dbg_Print_Buff(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:",&DevCtrlBuf[i*DEVACTIONOUTCFGLEN], DEVACTIONOUTCFGLEN);
|
||||||
|
|
||||||
|
Logic_Device_Action_Data_Analysis(&DevCtrlBuf[i*DEVACTIONOUTCFGLEN]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if( (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState & 0x00ff) == DEV_CTRLWAY_OPEN )
|
||||||
|
{
|
||||||
|
switch(DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType) //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
case Dev_Host_HVout:
|
||||||
|
case DEV_RS485_PWM:
|
||||||
|
case DEV_RS485_STRIP:
|
||||||
|
case Dev_Rs485_PB20:
|
||||||
|
case Dev_Rs485_PB20_LD:
|
||||||
|
case Dev_Rs485_PB20_LS:
|
||||||
|
case Dev_Rs485_PB20_Relay:
|
||||||
|
case DEV_Virtual_ColorTemp:
|
||||||
|
NeightLight = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if( (DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevCtrlState&0x00ff) == 0x12 ) //ֻ<><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
switch(DevAction_Info->DevActionOutput[i].DevActionOutCfg.DevType) //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
case Dev_Rs485_PB20:
|
||||||
|
case Dev_Rs485_PB20_LD:
|
||||||
|
case Dev_Rs485_PB20_LS:
|
||||||
|
NeightLight = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if( (ACTION_SCENE_SLEEP == DevAction_Info->DevActionCond.SceneExcute) && (0x01 == NeightLight) ) //
|
||||||
|
{
|
||||||
|
DevActionGlobal.DevActionU64Cond.NeightFlag = 0x01; //<2F><><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9> <20><>Ϊ1
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_DevAction_Add
|
||||||
|
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȼ<EFBFBD>浽<F3B1A3B4>ⲿSRAM
|
||||||
|
* data <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* len <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) void Logic_DevAction_Add(uint8_t *data,uint16_t len)
|
||||||
|
{
|
||||||
|
DEV_ACTION_INFO DevAction_Info;
|
||||||
|
|
||||||
|
memset(&DevAction_Info,0,sizeof(DEV_ACTION_INFO)); //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
memcpy((uint8_t *)&DevAction_Info.DevActionCore.ActionNo, &data[81], 2); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
memcpy((uint8_t *)&DevAction_Info.DevActionCore.DevActionName, &data[49], 32); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
DevAction_Info.DevActionInput.DevType = data[0]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
DevAction_Info.DevActionInput.DevAddr = data[1]; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
DevAction_Info.DevActionInput.inAddr = data[4] + (data[5]<<8); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||||
|
if(0x00 != DevAction_Info.DevActionInput.inAddr)
|
||||||
|
{
|
||||||
|
DevAction_Info.DevActionInput.inAddr--; //ת<><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
DevAction_Info.DevActionInput.inType = data[6] + (data[7]<<8);
|
||||||
|
|
||||||
|
memcpy(&DevAction_Info.DevActionCond.DevActionU64Cond, &data[8], sizeof(Dev_Action_U64Cond)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> DevActionOutFlag: %d", DevAction_Info.DevActionCond.DevActionU64Cond.DevActionOutFlag);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><>̬ RoomState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.RoomState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> EleCtrlFlag: %d", DevAction_Info.DevActionCond.DevActionU64Cond.EleCtrlFlag);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:ȡ<><C8A1>״̬ EleState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.EleState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ DndState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.DndState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ CleanState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.CleanState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ CallState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.CallState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:ϴ<><CFB4>״̬ WashState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.WashState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>˷<EFBFBD>״̬ CheckOutState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.CheckOutState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>Ժ<EFBFBD>״̬ WaitState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.WaitState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:SOS״̬ SosState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.SosState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬ RentState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.RentState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ LockState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.LockState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ LuggageState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.LuggageState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ StrongState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.StrongState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A>Ŵ<EFBFBD>״̬ DoorState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.DoorState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><>ʾ<EFBFBD><CABE>״̬ WarningState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.WarningState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>״̬ BacklightState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.BacklightState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD> SeasonState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.SeasonState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:ʱ<><CAB1> TimeState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.TimeState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><>ҹ<EFBFBD><D2B9><EFBFBD>й<EFBFBD> NeightFlag: %d", DevAction_Info.DevActionCond.DevActionU64Cond.NeightFlag);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><>ҹ״̬ NeightState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.NeightState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:RCU<43><55><EFBFBD><EFBFBD> RcuLockState: %d", DevAction_Info.DevActionCond.DevActionU64Cond.RcuLockState);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:<3A><><EFBFBD><EFBFBD>2λ Reserve1: %d", DevAction_Info.DevActionCond.DevActionU64Cond.Reserve1);
|
||||||
|
|
||||||
|
DevAction_Info.DevActionCond.SceneExcute = data[48]; //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ
|
||||||
|
if((ACTION_SCENE_SLEEP == DevAction_Info.DevActionCond.SceneExcute) && (0x00 == DevActionGlobal.SleepActionNo)) //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽΪ˯<CEAA><CBAF>ģʽ δ<><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD>
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߶<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", DevAction_Info.DevActionCore.ActionNo);
|
||||||
|
DevActionGlobal.SleepActionNo = DevAction_Info.DevActionCore.ActionNo; //<2F><><EFBFBD><EFBFBD>˯<EFBFBD>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
if(data[115] > DevCtrlNumMax)
|
||||||
|
{
|
||||||
|
DevAction_Info.DevCtrlNum = DevCtrlNumMax; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
}else{
|
||||||
|
DevAction_Info.DevCtrlNum = data[115]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD>洢<EFBFBD><E6B4A2>ַ:%x,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>:%X <20><><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ:%d", \
|
||||||
|
DevAction_Info.DevCtrlNum, \
|
||||||
|
DevAction_Info.DevActionInput.DevType, \
|
||||||
|
DevAction_Info.DevActionInput.DevAddr, \
|
||||||
|
DevAction_Info.DevActionState.DevAddrIn, \
|
||||||
|
DevAction_Info.DevActionInput.inType, \
|
||||||
|
DevAction_Info.DevActionCond.SceneExcute);
|
||||||
|
|
||||||
|
Logic_Action_Output_DataGet(&DevAction_Info, &data[116]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC>豸<EFBFBD>ڵ<EFBFBD><DAB5>õ<EFBFBD>
|
||||||
|
|
||||||
|
DevAction_Info.data_len = sizeof(DEV_ACTION_INFO) ;
|
||||||
|
Add_DevAction_To_List(&DevAction_Info);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Expand_And_Dimm_Action_Get
|
* Function Name : Expand_And_Dimm_Action_Get
|
||||||
* Description : ɨ<>趯<EFBFBD><E8B6AF><EFBFBD><EFBFBD><EFBFBD>еļ̵<C4BC><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵Ķ<CDB5><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : ɨ<>趯<EFBFBD><E8B6AF><EFBFBD><EFBFBD><EFBFBD>еļ̵<C4BC><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͵Ķ<CDB5><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -250,7 +453,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_DevAction_Cond_Judge(DEV_ACT
|
|||||||
__attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *DevActionInfo)
|
__attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *DevActionInfo)
|
||||||
{
|
{
|
||||||
uint8_t i = 0x00,j = 0x00;
|
uint8_t i = 0x00,j = 0x00;
|
||||||
uint32_t DevAddrOut = 0x00; //<2F>豸<EFBFBD><E8B1B8>ַ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
//uint32_t DevAddrOut = 0x00; //<2F>豸<EFBFBD><E8B1B8>ַ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t DevCtrlWay = 0x00; //ִ<>з<EFBFBD>ʽ
|
uint8_t DevCtrlWay = 0x00; //ִ<>з<EFBFBD>ʽ
|
||||||
uint8_t DevCtrlCont = 0x00; //ִ<><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t DevCtrlCont = 0x00; //ִ<><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t SceneState = DEV_STATE_OPEN;
|
uint8_t SceneState = DEV_STATE_OPEN;
|
||||||
@@ -280,7 +483,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
{
|
{
|
||||||
if(expand_type[j].ExpandReadFlag != 0x00)
|
if(expand_type[j].ExpandReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevActionInfo->DevActionOutput[i].DevActionOutAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr)
|
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr)
|
||||||
{
|
{
|
||||||
if(DEV_STATE_CLOSE == BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevActionInfo->DevActionOutput[i].DevActionOutAddr, SceneType, expand_type[j].ExpandReadFlag, HVoutNumMAX, expand_type[j].ExpandReadState))
|
if(DEV_STATE_CLOSE == BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevActionInfo->DevActionOutput[i].DevActionOutAddr, SceneType, expand_type[j].ExpandReadFlag, HVoutNumMAX, expand_type[j].ExpandReadState))
|
||||||
@@ -302,7 +505,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
{
|
{
|
||||||
if(0x00!=dimm_type[j].DimmReadFlag)
|
if(0x00!=dimm_type[j].DimmReadFlag)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevActionInfo->DevActionOutput[i].DevActionOutAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr)
|
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr)
|
||||||
{
|
{
|
||||||
if(DEV_STATE_CLOSE == BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevActionInfo->DevActionOutput[i].DevActionOutAddr, SceneType, dimm_type[j].DimmReadFlag, LED_OUT_CH_MAX, dimm_type[j].DimmReadState))
|
if(DEV_STATE_CLOSE == BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevActionInfo->DevActionOutput[i].DevActionOutAddr, SceneType, dimm_type[j].DimmReadFlag, LED_OUT_CH_MAX, dimm_type[j].DimmReadState))
|
||||||
@@ -335,13 +538,13 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut); //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) || (DevCtrlWay == DEV_CTRLWAY_CLOSE) || (DevCtrlWay == DEV_CTRLWAY_STOP) )
|
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) || (DevCtrlWay == DEV_CTRLWAY_CLOSE) || (DevCtrlWay == DEV_CTRLWAY_STOP) )
|
||||||
{
|
{
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
@@ -352,13 +555,13 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
break;
|
break;
|
||||||
#if RS485_PB20_Relay_Flag
|
#if RS485_PB20_Relay_Flag
|
||||||
case Dev_Rs485_PB20_Relay:
|
case Dev_Rs485_PB20_Relay:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) || (DevCtrlWay == DEV_CTRLWAY_CLOSE) || (DevCtrlWay == DEV_CTRLWAY_STOP) )
|
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) || (DevCtrlWay == DEV_CTRLWAY_CLOSE) || (DevCtrlWay == DEV_CTRLWAY_STOP) )
|
||||||
{
|
{
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
@@ -371,7 +574,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
case DEV_RS485_CURTAIN: //RS485<38>豸 - <20><><EFBFBD><EFBFBD>
|
case DEV_RS485_CURTAIN: //RS485<38>豸 - <20><><EFBFBD><EFBFBD>
|
||||||
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -381,14 +584,14 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
|| (DevCtrlWay == 0x15) \
|
|| (DevCtrlWay == 0x15) \
|
||||||
|| (DevCtrlWay == 0x16) )
|
|| (DevCtrlWay == 0x16) )
|
||||||
{
|
{
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlWay)
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}else if( (DevCtrlWay == CFG_Dev_CtrlWay_Is_TOGGLE) || (DevCtrlWay == 0x05) )
|
}else if( (DevCtrlWay == CFG_Dev_CtrlWay_Is_TOGGLE) || (DevCtrlWay == 0x05) )
|
||||||
{
|
{
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DEV_CTRLWAY_STOP)
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DEV_CTRLWAY_STOP)
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
@@ -399,7 +602,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
break;
|
break;
|
||||||
#if Dev_Nor_ColorTemp
|
#if Dev_Nor_ColorTemp
|
||||||
case Dev_Nor_ColorTemp:
|
case Dev_Nor_ColorTemp:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -408,14 +611,14 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
if(DevCtrlWay == DEV_CTRLWAY_OPEN)
|
if(DevCtrlWay == DEV_CTRLWAY_OPEN)
|
||||||
{
|
{
|
||||||
DevCtrlCont |= 0x80;
|
DevCtrlCont |= 0x80;
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlCont )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != DevCtrlCont )
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}else if(DevCtrlWay == DEV_CTRLWAY_CLOSE)
|
}else if(DevCtrlWay == DEV_CTRLWAY_CLOSE)
|
||||||
{
|
{
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != (DevCtrlCont & 0x80) )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != (DevCtrlCont & 0x80) )
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
@@ -427,7 +630,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
case DEV_C5MUSIC_Type:
|
case DEV_C5MUSIC_Type:
|
||||||
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
if(DevActionInfo->DevActionCond.SceneExcute != ACTION_SCENE_SLEEP)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DEV_MUSIC_CTRLSTATE DevMusicCtrlState;
|
DEV_MUSIC_CTRLSTATE DevMusicCtrlState;
|
||||||
@@ -438,7 +641,7 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) \
|
if( (DevCtrlWay == DEV_CTRLWAY_OPEN) \
|
||||||
|| (DevCtrlWay == DEV_CTRLWAY_CLOSE) )
|
|| (DevCtrlWay == DEV_CTRLWAY_CLOSE) )
|
||||||
{
|
{
|
||||||
if(DevCtrlWay != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop))
|
if(DevCtrlWay != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop))
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE;
|
SceneState = DEV_STATE_CLOSE;
|
||||||
break;
|
break;
|
||||||
@@ -450,14 +653,14 @@ __attribute__((section(".non_0_wait"))) void Expand_State_Get(DEV_ACTION_INFO *D
|
|||||||
break;
|
break;
|
||||||
#if Dev_Nor_Carbon_Flag
|
#if Dev_Nor_Carbon_Flag
|
||||||
case DEV_Carbon_Saved:
|
case DEV_Carbon_Saved:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
|
||||||
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get) //<2F>ǿ<EFBFBD>
|
if(NULL != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get) //<2F>ǿ<EFBFBD>
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff; //<2F><><EFBFBD>ֽ<EFBFBD>
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff; //<2F><><EFBFBD>ֽ<EFBFBD>
|
||||||
DevCtrlCont = ((DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)>>8)&0x00ff; //<2F><><EFBFBD>ֽ<EFBFBD>
|
DevCtrlCont = ((DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)>>8)&0x00ff; //<2F><><EFBFBD>ֽ<EFBFBD>
|
||||||
if(0x01 == DevCtrlWay) //<2F>ҿ<EFBFBD><D2BF>ƽ<EFBFBD><C6BD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD>
|
if(0x01 == DevCtrlWay) //<2F>ҿ<EFBFBD><D2BF>ƽ<EFBFBD><C6BD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD>
|
||||||
{
|
{
|
||||||
if(DevCtrlCont != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop))
|
if(DevCtrlCont != BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevActionInfo->DevActionOutput[i].DevActionOutAddr, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop))
|
||||||
{
|
{
|
||||||
SceneState = DEV_STATE_CLOSE; //ֻҪ<D6BB><D2AA>һ<EFBFBD><D2BB>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>״̬Ϊ<CCAC><CEAA>
|
SceneState = DEV_STATE_CLOSE; //ֻҪ<D6BB><D2AA>һ<EFBFBD><D2BB>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>״̬Ϊ<CCAC><CEAA>
|
||||||
break; //<2F><><EFBFBD><EFBFBD>switchѭ<68><D1AD>
|
break; //<2F><><EFBFBD><EFBFBD>switchѭ<68><D1AD>
|
||||||
@@ -508,7 +711,7 @@ __attribute__((section(".non_0_wait"))) void Sleep_State_Get(DEV_ACTION_INFO *De
|
|||||||
switch(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType)
|
switch(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType)
|
||||||
{
|
{
|
||||||
case Dev_Host_HVout: //<2F>̵<EFBFBD><CCB5><EFBFBD>
|
case Dev_Host_HVout: //<2F>̵<EFBFBD><CCB5><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) == DEV_STATE_OPEN)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) == DEV_STATE_OPEN)
|
||||||
@@ -520,7 +723,7 @@ __attribute__((section(".non_0_wait"))) void Sleep_State_Get(DEV_ACTION_INFO *De
|
|||||||
break;
|
break;
|
||||||
#if RS485_LED_Flag
|
#if RS485_LED_Flag
|
||||||
case DEV_RS485_PWM:
|
case DEV_RS485_PWM:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get(DevAddrOut, DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevOutputLoop) != 0x00)
|
||||||
@@ -543,7 +746,7 @@ __attribute__((section(".non_0_wait"))) void Sleep_State_Get(DEV_ACTION_INFO *De
|
|||||||
switch(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType)
|
switch(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType)
|
||||||
{
|
{
|
||||||
case Dev_Rs485_PB20_Relay:
|
case Dev_Rs485_PB20_Relay:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -561,7 +764,7 @@ __attribute__((section(".non_0_wait"))) void Sleep_State_Get(DEV_ACTION_INFO *De
|
|||||||
case Dev_Rs485_PB20:
|
case Dev_Rs485_PB20:
|
||||||
case Dev_Rs485_PB20_LD:
|
case Dev_Rs485_PB20_LD:
|
||||||
case Dev_Rs485_PB20_LS:
|
case Dev_Rs485_PB20_LS:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState & 0x00ff);
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState & 0x00ff);
|
||||||
@@ -572,7 +775,7 @@ __attribute__((section(".non_0_wait"))) void Sleep_State_Get(DEV_ACTION_INFO *De
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00)
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -634,7 +837,7 @@ __attribute__((section(".non_0_wait"))) void MainSwitch_Expand_State_Get(DEV_ACT
|
|||||||
{
|
{
|
||||||
if(expand_type[j].ExpandReadFlag != 0x00)
|
if(expand_type[j].ExpandReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr != 0x00)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr != 0x00)
|
||||||
{
|
{
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevAddrOut, DEV_STATE_CLOSE, expand_type[j].ExpandReadFlag, HVoutNumMAX, expand_type[j].ExpandReadState) == DEV_STATE_OPEN)
|
if(BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevAddrOut, DEV_STATE_CLOSE, expand_type[j].ExpandReadFlag, HVoutNumMAX, expand_type[j].ExpandReadState) == DEV_STATE_OPEN)
|
||||||
@@ -656,7 +859,7 @@ __attribute__((section(".non_0_wait"))) void MainSwitch_Expand_State_Get(DEV_ACT
|
|||||||
{
|
{
|
||||||
if( dimm_type[j].DimmReadFlag != 0x00 )
|
if( dimm_type[j].DimmReadFlag != 0x00 )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr != 0x00 )
|
||||||
{
|
{
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevAddrOut, DEV_STATE_CLOSE, dimm_type[j].DimmReadFlag, LED_OUT_CH_MAX, dimm_type[j].DimmReadState) == DEV_STATE_OPEN )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr(DevAddrOut, DEV_STATE_CLOSE, dimm_type[j].DimmReadFlag, LED_OUT_CH_MAX, dimm_type[j].DimmReadState) == DEV_STATE_OPEN )
|
||||||
@@ -686,7 +889,7 @@ __attribute__((section(".non_0_wait"))) void MainSwitch_Expand_State_Get(DEV_ACT
|
|||||||
case DEV_RS485_STRIP:
|
case DEV_RS485_STRIP:
|
||||||
case Dev_Rs485_PB20:
|
case Dev_Rs485_PB20:
|
||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -703,7 +906,7 @@ __attribute__((section(".non_0_wait"))) void MainSwitch_Expand_State_Get(DEV_ACT
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get != 0x00 )
|
||||||
{
|
{
|
||||||
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
DevCtrlWay = (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState)&0x00ff;
|
||||||
@@ -965,11 +1168,51 @@ __attribute__((section(".non_0_wait"))) uint8_t DevAddrCtr(DEV_ACTION_INFO *DevA
|
|||||||
|
|
||||||
memset((uint8_t *)&DevActionOutput, 0x00, sizeof(Dev_Action_Output));
|
memset((uint8_t *)&DevActionOutput, 0x00, sizeof(Dev_Action_Output));
|
||||||
|
|
||||||
|
Dbg_Print_Buff(DBG_BIT_LOGIC_STATUS_bit,"DevAddrCtr : ",p,DataLen);
|
||||||
|
|
||||||
switch(DataLen)
|
switch(DataLen)
|
||||||
{
|
{
|
||||||
case DevCtrlLen:
|
case DevCtrlLen:
|
||||||
case DevCtrlDlyLenAddr:
|
case DevCtrlDlyLenAddr:
|
||||||
memcpy((uint8_t *)&DevActionOutput, p, DataLen);
|
|
||||||
|
if(DataLen >= 6){
|
||||||
|
DevActionOutput.DevActionOutCfg.DevType = p[0];
|
||||||
|
DevActionOutput.DevActionOutCfg.DevAddr = p[1];
|
||||||
|
DevActionOutput.DevActionOutCfg.DevOutputLoop = p[3];
|
||||||
|
DevActionOutput.DevActionOutCfg.DevOutputLoop <<= 8;
|
||||||
|
DevActionOutput.DevActionOutCfg.DevOutputLoop |= p[2];
|
||||||
|
|
||||||
|
DevActionOutput.DevActionOutCfg.DevCtrlState = p[5];
|
||||||
|
DevActionOutput.DevActionOutCfg.DevCtrlState <<= 8;
|
||||||
|
DevActionOutput.DevActionOutCfg.DevCtrlState |= p[4];
|
||||||
|
|
||||||
|
if(DataLen >= 8)
|
||||||
|
{
|
||||||
|
DevActionOutput.DevActionOutCfg.DevDlyValue.DelayCont = p[6];
|
||||||
|
DevActionOutput.DevActionOutCfg.DevDlyValue.DelayWeight = p[7];
|
||||||
|
|
||||||
|
if(DataLen == 0x10)
|
||||||
|
{
|
||||||
|
DevActionOutput.DevActionOutAddr = p[11];
|
||||||
|
DevActionOutput.DevActionOutAddr <<= 8;
|
||||||
|
DevActionOutput.DevActionOutAddr |= p[10];
|
||||||
|
DevActionOutput.DevActionOutAddr <<= 8;
|
||||||
|
DevActionOutput.DevActionOutAddr |= p[9];
|
||||||
|
DevActionOutput.DevActionOutAddr <<= 8;
|
||||||
|
DevActionOutput.DevActionOutAddr |= p[8];
|
||||||
|
|
||||||
|
DevActionOutput.DevDlyAddr = p[15];
|
||||||
|
DevActionOutput.DevDlyAddr <<= 8;
|
||||||
|
DevActionOutput.DevDlyAddr |= p[14];
|
||||||
|
DevActionOutput.DevDlyAddr <<= 8;
|
||||||
|
DevActionOutput.DevDlyAddr |= p[13];
|
||||||
|
DevActionOutput.DevDlyAddr <<= 8;
|
||||||
|
DevActionOutput.DevDlyAddr |= p[12];
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
return Ret;
|
return Ret;
|
||||||
@@ -978,6 +1221,7 @@ __attribute__((section(".non_0_wait"))) uint8_t DevAddrCtr(DEV_ACTION_INFO *DevA
|
|||||||
{
|
{
|
||||||
case DevCtrlLen: //6<>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD>豸
|
case DevCtrlLen: //6<>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD>豸
|
||||||
DevAddrOut = Find_AllDevice_List_Information(DevActionOutput.DevActionOutCfg.DevType, DevActionOutput.DevActionOutCfg.DevAddr);
|
DevAddrOut = Find_AllDevice_List_Information(DevActionOutput.DevActionOutCfg.DevType, DevActionOutput.DevActionOutCfg.DevAddr);
|
||||||
|
|
||||||
break;
|
break;
|
||||||
case DevCtrlDlyLenAddr: //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
case DevCtrlDlyLenAddr: //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
DevAddrOut = DevActionOutput.DevActionOutAddr;
|
DevAddrOut = DevActionOutput.DevActionOutAddr;
|
||||||
@@ -997,8 +1241,8 @@ __attribute__((section(".non_0_wait"))) uint8_t DevAddrCtr(DEV_ACTION_INFO *DevA
|
|||||||
DevActionOutput.DevActionOutCfg.DevCtrlState,
|
DevActionOutput.DevActionOutCfg.DevCtrlState,
|
||||||
DevActionOutput.DevActionOutCfg.DevDlyValue,
|
DevActionOutput.DevActionOutCfg.DevDlyValue,
|
||||||
0x00);
|
0x00);
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>ַ<EFBFBD><EFBFBD>%x",DevAddrOut);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
switch(DevActionOutput.DevActionOutCfg.DevType)
|
switch(DevActionOutput.DevActionOutCfg.DevType)
|
||||||
{
|
{
|
||||||
case DEV_RS485_SWT:
|
case DEV_RS485_SWT:
|
||||||
@@ -1183,7 +1427,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandCtrl(DEV_ACTION_INF
|
|||||||
{
|
{
|
||||||
if( expand_type[j].ExpandReadFlag != 0x00 )
|
if( expand_type[j].ExpandReadFlag != 0x00 )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != 0x00 )
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1213,7 +1457,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandCtrl(DEV_ACTION_INF
|
|||||||
{
|
{
|
||||||
if( dimm_type[j].DimmReadFlag != 0x00 )
|
if( dimm_type[j].DimmReadFlag != 0x00 )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != 0x00 )
|
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != 0x00 )
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1276,7 +1520,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandCtrl(DEV_ACTION_INF
|
|||||||
case DEV_Carbon_Saved:
|
case DEV_Carbon_Saved:
|
||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
case Dev_Energy_Monitor:
|
case Dev_Energy_Monitor:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != NULL) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != NULL) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1307,7 +1551,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandCtrl(DEV_ACTION_INF
|
|||||||
case DEV_RS485_STRIP:
|
case DEV_RS485_STRIP:
|
||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
case Dev_Virtual_GlobalSet:
|
case Dev_Virtual_GlobalSet:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
|
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
@@ -1337,7 +1581,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandCtrl(DEV_ACTION_INF
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case DEV_RS485_MUSIC:
|
case DEV_RS485_MUSIC:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
if( ( DevActionInfo != NULL )
|
if( ( DevActionInfo != NULL )
|
||||||
@@ -1426,7 +1670,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightOpen(DEV_ACTIO
|
|||||||
{
|
{
|
||||||
if( expand_type[j].ExpandReadFlag != 0x00 )
|
if( expand_type[j].ExpandReadFlag != 0x00 )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL )
|
if( BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL )
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1456,7 +1700,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightOpen(DEV_ACTIO
|
|||||||
{
|
{
|
||||||
if( dimm_type[j].DimmReadFlag != 0x00 )
|
if( dimm_type[j].DimmReadFlag != 0x00 )
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1497,7 +1741,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightOpen(DEV_ACTIO
|
|||||||
case Dev_Rs485_PB20_LS:
|
case Dev_Rs485_PB20_LS:
|
||||||
case Dev_Rs485_PB20_Relay:
|
case Dev_Rs485_PB20_Relay:
|
||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1528,7 +1772,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightOpen(DEV_ACTIO
|
|||||||
case DEV_RS485_STRIP:
|
case DEV_RS485_STRIP:
|
||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
case Dev_Virtual_GlobalSet:
|
case Dev_Virtual_GlobalSet:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1618,7 +1862,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightClose(DEV_ACTI
|
|||||||
{
|
{
|
||||||
if(expand_type[j].ExpandReadFlag != 0x00)
|
if(expand_type[j].ExpandReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1646,7 +1890,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightClose(DEV_ACTI
|
|||||||
{
|
{
|
||||||
if(dimm_type[j].DimmReadFlag != 0x00)
|
if(dimm_type[j].DimmReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1693,7 +1937,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightClose(DEV_ACTI
|
|||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
case Dev_Virtual_GlobalSet:
|
case Dev_Virtual_GlobalSet:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1724,7 +1968,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandLightClose(DEV_ACTI
|
|||||||
case Dev_Rs485_PB20:
|
case Dev_Rs485_PB20:
|
||||||
case Dev_Rs485_PB20_LD:
|
case Dev_Rs485_PB20_LD:
|
||||||
case Dev_Rs485_PB20_LS:
|
case Dev_Rs485_PB20_LS:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1801,7 +2045,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
{
|
{
|
||||||
if(expand_type[j].ExpandReadFlag != 0x00)
|
if(expand_type[j].ExpandReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1830,7 +2074,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
{
|
{
|
||||||
if(dimm_type[j].DimmReadFlag != 0x00)
|
if(dimm_type[j].DimmReadFlag != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl(
|
||||||
@@ -1877,7 +2121,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
case DEV_Virtual_ColorTemp:
|
case DEV_Virtual_ColorTemp:
|
||||||
case Dev_Scene_Restore:
|
case Dev_Scene_Restore:
|
||||||
case Dev_Virtual_GlobalSet:
|
case Dev_Virtual_GlobalSet:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
if( (DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00) )
|
||||||
@@ -1908,7 +2152,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
case Dev_Rs485_PB20:
|
case Dev_Rs485_PB20:
|
||||||
case Dev_Rs485_PB20_LD:
|
case Dev_Rs485_PB20_LD:
|
||||||
case Dev_Rs485_PB20_LS:
|
case Dev_Rs485_PB20_LS:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL) //<2F>ǿ<EFBFBD>
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL) //<2F>ǿ<EFBFBD>
|
||||||
{
|
{
|
||||||
if((DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00)) //
|
if((DevActionInfo != 0x00) && (DevActionInfo->DevActionState.DevAddrIn != 0x00)) //
|
||||||
@@ -1937,7 +2181,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case Dev_NodeCurtain: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ͣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ͣ <20><><EFBFBD><EFBFBD>ͣȡ<CDA3><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
case Dev_NodeCurtain: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ͣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ͣ <20><><EFBFBD><EFBFBD>ͣȡ<CDA3><C8A1>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
switch(ModeCtrl)
|
switch(ModeCtrl)
|
||||||
@@ -1980,7 +2224,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case DEV_RS485_CURTAIN:
|
case DEV_RS485_CURTAIN:
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
|
||||||
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
if( BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL )
|
||||||
{
|
{
|
||||||
switch(ModeCtrl)
|
switch(ModeCtrl)
|
||||||
@@ -2017,7 +2261,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandClose(DEV_ACTION_IN
|
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}
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}
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break;
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break;
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case Dev_Host_Service: //˯<>߿<EFBFBD><DFBF>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD><EFBFBD>Ϣ
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case Dev_Host_Service: //˯<>߿<EFBFBD><DFBF>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD><EFBFBD>Ϣ
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
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BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
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if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
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if(BUS_Public.DevFunInfo.Dev_Output_Ctrl != NULL)
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{
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{
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switch(ModeCtrl)
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switch(ModeCtrl)
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@@ -2089,7 +2333,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ExpandDlyClear(DEV_ACTION
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{
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{
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if(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Host_Invalid)
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if(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevType != Dev_Host_Invalid)
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{
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{
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
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BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
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}
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}
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if( (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayCont != 0x00) && (DevActionInfo->DevActionOutput[i].DevDlyAddr != 0x00) )
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if( (DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevDlyValue.DelayCont != 0x00) && (DevActionInfo->DevActionOutput[i].DevDlyAddr != 0x00) )
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@@ -2567,7 +2811,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_IndicateCtrl(DEV_ACTION_I
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{
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{
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case DEV_STATE_OPEN:
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case DEV_STATE_OPEN:
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case DEV_STATE_CLOSE:
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case DEV_STATE_CLOSE:
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevActionInfo->DevActionOutput[i].DevActionOutAddr);
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BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD><EFBFBD><EFBFBD>˳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>: %d <20><>ַ:%d<><64><EFBFBD><EFBFBD>·:%d<><64>״̬:%d",
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD><EFBFBD><EFBFBD>˳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>: %d <20><>ַ:%d<><64><EFBFBD><EFBFBD>·:%d<><64>״̬:%d",
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BUS_Public.type,
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BUS_Public.type,
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@@ -2600,7 +2844,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_IndicateCtrl(DEV_ACTION_I
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switch(DevActionInfo->DevActionState.SceneState)
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switch(DevActionInfo->DevActionState.SceneState)
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{
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{
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case DEV_STATE_OPEN: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸ Ӧ<>ȿ<EFBFBD>ָʾ<D6B8><CABE>
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case DEV_STATE_OPEN: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸ Ӧ<>ȿ<EFBFBD>ָʾ<D6B8><CABE>
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevActionInfo->DevActionOutput[i].DevActionOutAddr);
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BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸,״̬:%04X",CFG_Dev_CtrlWay_Is_TOGGLE |(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState&0xff00));
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸,״̬:%04X",CFG_Dev_CtrlWay_Is_TOGGLE |(DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevCtrlState&0xff00));
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DevDly_InfoSet(
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DevDly_InfoSet(
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DevActionInfo->DevActionOutput[i].DevDlyAddr,
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DevActionInfo->DevActionOutput[i].DevDlyAddr,
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@@ -2643,7 +2887,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_IndicateCtrl(DEV_ACTION_I
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case DEV_CTRLWAY_OPEN: //<2F><>
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case DEV_CTRLWAY_OPEN: //<2F><>
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case DEV_CTRLWAY_CLOSE: //<2F><>
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case DEV_CTRLWAY_CLOSE: //<2F><>
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case DEV_CTRLWAY_STOP: //ͣ
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case DEV_CTRLWAY_STOP: //ͣ
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevActionInfo->DevActionOutput[i].DevActionOutAddr);
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BLV_Device_PublicInfo_Read_To_Struct(DevActionInfo->DevActionOutput[i].DevActionOutAddr,&BUS_Public);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD><EFBFBD><EFBFBD>˳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>: %d <20><>ַ:%d<><64><EFBFBD><EFBFBD>·:%d<><64>״̬:%d",
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƿ<EFBFBD><EFBFBD><EFBFBD>˳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>: %d <20><>ַ:%d<><64><EFBFBD><EFBFBD>·:%d<><64>״̬:%d",
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BUS_Public.type,
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BUS_Public.type,
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DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevAddr,
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DevActionInfo->DevActionOutput[i].DevActionOutCfg.DevAddr,
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@@ -2684,6 +2928,8 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_Cycle(uint32_t Dev_pr
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uint16_t j = 0x00; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint16_t j = 0x00; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint8_t BreakFlag = 0x00; //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>־ <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4>
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uint8_t BreakFlag = 0x00; //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>־ <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4>
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//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__ );
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for(j = BUS_Public->ActionCoord; j < DevActionGlobal.DevActionNum; j++) //<2F><><EFBFBD><EFBFBD>Ϊɶ<CEAA><C9B6>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ʵ<EFBFBD>
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for(j = BUS_Public->ActionCoord; j < DevActionGlobal.DevActionNum; j++) //<2F><><EFBFBD><EFBFBD>Ϊɶ<CEAA><C9B6>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ʵ<EFBFBD>
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{
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{
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DevActionAddr = SRAM_DevAction_List_Start_Addr + j*SRAM_DevAction_List_Size;
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DevActionAddr = SRAM_DevAction_List_Start_Addr + j*SRAM_DevAction_List_Size;
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@@ -2695,8 +2941,10 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_Cycle(uint32_t Dev_pr
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if( Data_CheckSum((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO)) != 0x00 )
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if( Data_CheckSum((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO)) != 0x00 )
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{
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{
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%d");
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",DevActionAddr);
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continue;
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continue;
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}else {
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//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ͨ<EFBFBD><CDA8>:%x <20><><EFBFBD>봥<EFBFBD><EBB4A5><EFBFBD>ڵ<EFBFBD>:%x",DevActionAddr,Dev_processing_addr);
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}
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}
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RcuLockState_Scan();
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RcuLockState_Scan();
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@@ -2869,6 +3117,8 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_Task(void)
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{
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{
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Dev_processing_addr = SRAM_Device_List_Start_Addr + DevActionGlobal.Devi*SRAM_Device_List_Size;
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Dev_processing_addr = SRAM_Device_List_Start_Addr + DevActionGlobal.Devi*SRAM_Device_List_Size;
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//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s:%x %d %d",__func__,Dev_processing_addr,DevActionGlobal.Devi,DevActionGlobal.DevNum);
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switch(SRAM_Read_Byte(Dev_processing_addr+Dev_Type))
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switch(SRAM_Read_Byte(Dev_processing_addr+Dev_Type))
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{
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{
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case Dev_Host_LVinput: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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case Dev_Host_LVinput: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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@@ -2885,8 +3135,14 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_Task(void)
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case DEV_Carbon_Saved: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - ̼<><CCBC><EFBFBD><EFBFBD>
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case DEV_Carbon_Saved: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - ̼<><CCBC><EFBFBD><EFBFBD>
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case Dev_Scene_Restore: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ
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case Dev_Scene_Restore: //<2F><><EFBFBD><EFBFBD><EFBFBD>豸 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ
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BreakFlag = 0x01;
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BreakFlag = 0x01;
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SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), Dev_processing_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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if(BLV_Device_PublicInfo_Read_To_Struct(Dev_processing_addr,&BUS_Public) == 0x00)
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BLV_DevAction_Cycle(Dev_processing_addr, &BUS_Public); //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ㣬<DAB5>ѵ<EFBFBD>ַ<EFBFBD><D6B7>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ȥ
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{
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//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s:%x %d Check Succ",__func__,Dev_processing_addr,SRAM_Read_Byte(Dev_processing_addr+Dev_Type) );
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BLV_DevAction_Cycle(Dev_processing_addr, &BUS_Public); //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ㣬<DAB5>ѵ<EFBFBD>ַ<EFBFBD><D6B7>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ȥ
|
||||||
|
}else {
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s:%x %d Check error",__func__,Dev_processing_addr,SRAM_Read_Byte(Dev_processing_addr+Dev_Type) );
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}
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break;
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break;
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}
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}
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@@ -2916,12 +3172,12 @@ __attribute__((section(".non_0_wait"))) void DevAction_DevAddr_Ctrl(
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if( (DevActionAddr < SRAM_DevAction_List_Start_Addr) || (DevActionAddr >= SRAM_DevAction_List_End_Addr) )
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if( (DevActionAddr < SRAM_DevAction_List_Start_Addr) || (DevActionAddr >= SRAM_DevAction_List_End_Addr) )
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{
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{
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Ч:%08X",DevActionAddr);
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Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Ч:%X",DevActionAddr);
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||||||
return ;
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return ;
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||||||
}
|
}
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||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), DevActionAddr);
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SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), DevActionAddr);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Ч:%08X<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d",DevActionAddr, DevActionInfo.DevActionCore.ActionNo);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Ч:%X<><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d",DevActionAddr, DevActionInfo.DevActionCore.ActionNo);
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||||||
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||||||
if( DevActionInfo.DevActionCore.ActionNo == ACTION_SCENE_SLEEP )
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if( DevActionInfo.DevActionCore.ActionNo == ACTION_SCENE_SLEEP )
|
||||||
{
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{
|
||||||
@@ -2985,7 +3241,7 @@ __attribute__((section(".non_0_wait"))) void BLV_DevDly_Process(uint32_t dly_pro
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|||||||
case Dev_485_BLE_Music:
|
case Dev_485_BLE_Music:
|
||||||
case DEV_Carbon_Saved:
|
case DEV_Carbon_Saved:
|
||||||
case Dev_Energy_Monitor:
|
case Dev_Energy_Monitor:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʱ<EFBFBD>豸ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d %d· <20><><EFBFBD><EFBFBD>: %04X",DevDlyInfo.DevDlyCore.DevType, DevDlyInfo.DevDlyCore.DevOutputLoop ,DevDlyInfo.DevOutputType);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʱ<EFBFBD>豸ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d %d· <20><><EFBFBD><EFBFBD>: %X",DevDlyInfo.DevDlyCore.DevType, DevDlyInfo.DevDlyCore.DevOutputLoop ,DevDlyInfo.DevOutputType);
|
||||||
Dev_Output_Ctrl = (Dev_Output_Ctrl_ptr)SRAM_Read_DW(DevDlyInfo.DevDlyCore.DevDlyAddr + Dev_Output_Ctrl_0);
|
Dev_Output_Ctrl = (Dev_Output_Ctrl_ptr)SRAM_Read_DW(DevDlyInfo.DevDlyCore.DevDlyAddr + Dev_Output_Ctrl_0);
|
||||||
if(Dev_Output_Ctrl != NULL)
|
if(Dev_Output_Ctrl != NULL)
|
||||||
{
|
{
|
||||||
@@ -2993,7 +3249,7 @@ __attribute__((section(".non_0_wait"))) void BLV_DevDly_Process(uint32_t dly_pro
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case Dev_Host_Invalid:
|
case Dev_Host_Invalid:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD>е<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X ״̬: %04X",DevDlyInfo.DevDlyCore.DevDlyAddr, DevDlyInfo.DevOutputType);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱִ<EFBFBD>е<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X ״̬: %X",DevDlyInfo.DevDlyCore.DevDlyAddr, DevDlyInfo.DevOutputType);
|
||||||
DevAction_DevAddr_Ctrl(DevDlyInfo.DevDlyCore.DevDlyAddr, 0x01, NOR_MODE_CTRL, DevDlyInfo.DevOutputType);
|
DevAction_DevAddr_Ctrl(DevDlyInfo.DevDlyCore.DevDlyAddr, 0x01, NOR_MODE_CTRL, DevDlyInfo.DevOutputType);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@@ -3005,7 +3261,7 @@ __attribute__((section(".non_0_wait"))) void BLV_DevDly_Process(uint32_t dly_pro
|
|||||||
|
|
||||||
if( DevDlyInfo.DlyBlinkFlag == 0x01 )
|
if( DevDlyInfo.DlyBlinkFlag == 0x01 )
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>˸ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d %d· <20><><EFBFBD><EFBFBD>: %04X",DevDlyInfo.DevDlyCore.DevType, DevDlyInfo.DevDlyCore.DevOutputLoop ,DevDlyInfo.DevOutputType); //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC>ֵ
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>˸ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d %d· <20><><EFBFBD><EFBFBD>: %X",DevDlyInfo.DevDlyCore.DevType, DevDlyInfo.DevDlyCore.DevOutputLoop ,DevDlyInfo.DevOutputType); //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC>ֵ
|
||||||
DevDly_InfoSet(dly_processing_addr, 0x01, DevDlyInfo.DevOutputType, DevDlyInfo.DlyBlinkTime, 0x01);
|
DevDly_InfoSet(dly_processing_addr, 0x01, DevDlyInfo.DevOutputType, DevDlyInfo.DlyBlinkTime, 0x01);
|
||||||
}else if( DevDlyInfo.DlyBlinkFlag == 0x02 )
|
}else if( DevDlyInfo.DlyBlinkFlag == 0x02 )
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -941,7 +941,7 @@ __attribute__((section(".non_0_wait"))) uint32_t Find_TempDevice_List_Informatio
|
|||||||
{
|
{
|
||||||
if(Device_Data_Check(read_addr) == 0)
|
if(Device_Data_Check(read_addr) == 0)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),read_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(read_addr,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Temp,sizeof(RS485_TEMP_INFO),read_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Temp,sizeof(RS485_TEMP_INFO),read_addr+Dev_Privately);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s Type:%d Addr:%d",__func__,BUS_Public.type,BUS_Public.addr);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s Type:%d Addr:%d",__func__,BUS_Public.type,BUS_Public.addr);
|
||||||
@@ -1359,57 +1359,55 @@ __attribute__((section(".non_0_wait"))) uint8_t Udp_Internal_BLVPCTestDevice_Pro
|
|||||||
Device_Public_Information_G BUS_Public;
|
Device_Public_Information_G BUS_Public;
|
||||||
PC_TEST_DEVICE_INFO PC_Test_Info;
|
PC_TEST_DEVICE_INFO PC_Test_Info;
|
||||||
|
|
||||||
|
if(BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public) == 0x00)
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
temp1 = data[BLV_UDP_HEAD_LEN];
|
|
||||||
if(temp1 == 0x01) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
|
||||||
{
|
{
|
||||||
g_pc_test.test_flag = 0x11;
|
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
||||||
|
|
||||||
g_pc_test.test_dev = data[BLV_UDP_HEAD_LEN + 1]; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
/*<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
g_pc_test.test_addr = data[BLV_UDP_HEAD_LEN + 2]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
temp1 = data[BLV_UDP_HEAD_LEN];
|
||||||
PC_Test_Info.test_time = data[BLV_UDP_HEAD_LEN + 3]; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
if(temp1 == 0x01) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - ͬʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
g_pc_test.test_flag = 0x11;
|
||||||
|
|
||||||
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
g_pc_test.test_dev = data[BLV_UDP_HEAD_LEN + 1]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
PC_Test_Info.test_tick = SysTick_1ms;
|
g_pc_test.test_addr = data[BLV_UDP_HEAD_LEN + 2]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
PC_Test_Info.test_time *= 60000;
|
PC_Test_Info.test_time = data[BLV_UDP_HEAD_LEN + 3]; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
g_pc_test.pc_ip[0] = ip[0]; //2022-07-12
|
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
||||||
g_pc_test.pc_ip[1] = ip[1];
|
PC_Test_Info.test_tick = SysTick_1ms;
|
||||||
g_pc_test.pc_ip[2] = ip[2];
|
PC_Test_Info.test_time *= 60000;
|
||||||
g_pc_test.pc_ip[3] = ip[3];
|
|
||||||
g_pc_test.pc_port = port;
|
g_pc_test.pc_ip[0] = ip[0]; //2022-07-12
|
||||||
|
g_pc_test.pc_ip[1] = ip[1];
|
||||||
|
g_pc_test.pc_ip[2] = ip[2];
|
||||||
|
g_pc_test.pc_ip[3] = ip[3];
|
||||||
|
g_pc_test.pc_port = port;
|
||||||
|
}
|
||||||
|
else if(temp1 == 0x02) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
g_pc_test.test_flag = 0x12;
|
||||||
|
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
||||||
|
PC_Test_Info.test_tick = SysTick_1ms;
|
||||||
|
PC_Test_Info.test_time = 120000;
|
||||||
|
|
||||||
|
Udp_Internal_PC_Testing_DataDeal(data,DataLen,ip,port);
|
||||||
|
}else if(temp1 == 0x03) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2><EFBFBD> - <20><><EFBFBD><EFBFBD>485<38>˿<EFBFBD>
|
||||||
|
{
|
||||||
|
g_pc_test.test_flag = 0x13;
|
||||||
|
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
||||||
|
g_pc_test.tour_num = 0;
|
||||||
|
g_pc_test.tour_succ = 0;
|
||||||
|
|
||||||
|
|
||||||
|
g_pc_test.pc_ip[0] = ip[0];
|
||||||
|
g_pc_test.pc_ip[1] = ip[1];
|
||||||
|
g_pc_test.pc_ip[2] = ip[2];
|
||||||
|
g_pc_test.pc_ip[3] = ip[3];
|
||||||
|
g_pc_test.pc_port = port;
|
||||||
|
}
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
|
||||||
}
|
}
|
||||||
else if(temp1 == 0x02) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
{
|
|
||||||
g_pc_test.test_flag = 0x12;
|
|
||||||
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
|
||||||
PC_Test_Info.test_tick = SysTick_1ms;
|
|
||||||
PC_Test_Info.test_time = 120000;
|
|
||||||
|
|
||||||
Udp_Internal_PC_Testing_DataDeal(data,DataLen,ip,port);
|
|
||||||
}else if(temp1 == 0x03) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2><EFBFBD> - <20><><EFBFBD><EFBFBD>485<38>˿<EFBFBD>
|
|
||||||
{
|
|
||||||
g_pc_test.test_flag = 0x13;
|
|
||||||
PC_Test_Info.test_flag = g_pc_test.test_flag;
|
|
||||||
g_pc_test.tour_num = 0;
|
|
||||||
g_pc_test.tour_succ = 0;
|
|
||||||
|
|
||||||
|
|
||||||
g_pc_test.pc_ip[0] = ip[0];
|
|
||||||
g_pc_test.pc_ip[1] = ip[1];
|
|
||||||
g_pc_test.pc_ip[2] = ip[2];
|
|
||||||
g_pc_test.pc_ip[3] = ip[3];
|
|
||||||
g_pc_test.pc_port = port;
|
|
||||||
}
|
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
@@ -2066,37 +2064,6 @@ uint8_t Udp_Internal_RoomState_Process(uint8_t *data, uint16_t DataLen, uint8_t
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
|
||||||
* Function Name : ServiceInfo_Get_ALL_Loop_State
|
|
||||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><>ȡȫ<C8A1><C8AB><EFBFBD><EFBFBD>·<EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>״̬
|
|
||||||
*******************************************************************************/
|
|
||||||
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff)
|
|
||||||
{
|
|
||||||
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
|
|
||||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
|
||||||
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t loop_offset = 0;
|
|
||||||
uint8_t loop_ide = 0;
|
|
||||||
|
|
||||||
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
|
|
||||||
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
|
|
||||||
|
|
||||||
if( DevServiceInfo.ServiceLoopValidNum >= ServiceNumMAX ) DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
|
|
||||||
|
|
||||||
for(uint8_t i=0;i<DevServiceInfo.ServiceLoopValidNum;i++)
|
|
||||||
{
|
|
||||||
loop_ide = i / 8;
|
|
||||||
loop_offset = i % 8;
|
|
||||||
if(DevServiceInfo.DevServiceState[i] == 0x01)
|
|
||||||
{
|
|
||||||
read_buff[loop_ide] |= 0x01 << loop_offset;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0x00;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Udp_Internal_Periodic_Report_PackSend
|
* Function Name : Udp_Internal_Periodic_Report_PackSend
|
||||||
@@ -2283,6 +2250,9 @@ void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t po
|
|||||||
case In_BLVIAPLogic_Cmd:
|
case In_BLVIAPLogic_Cmd:
|
||||||
Udp_Internal_BLVIAP_Logic(data, len, ip, port);
|
Udp_Internal_BLVIAP_Logic(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
|
case In_BLVPCTestDevice_Cmd:
|
||||||
|
Udp_Internal_BLVPCTestDevice_Process(data, len, ip, port);
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP CMD %X",data[CMD_OFFSET]);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP CMD %X",data[CMD_OFFSET]);
|
||||||
break;
|
break;
|
||||||
|
|||||||
@@ -14,6 +14,248 @@ BLV_NORDEV_Manage_G NorDevInfoGlobal; /*
|
|||||||
|
|
||||||
uint8_t rs485_temp_buff[612];
|
uint8_t rs485_temp_buff[612];
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Device_Info_Write_To_SRAM
|
||||||
|
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>д<EFBFBD>뵽SRAM<41><4D>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_Info_Write_To_SRAM(
|
||||||
|
uint32_t dev_addr,
|
||||||
|
Device_Public_Information_G *dev_info,
|
||||||
|
uint8_t *dev_data,
|
||||||
|
uint16_t data_len)
|
||||||
|
{
|
||||||
|
if(dev_info == NULL) return 1;
|
||||||
|
|
||||||
|
if( (Dev_Privately + data_len) > SRAM_Device_List_Size ) return 2;
|
||||||
|
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s :%x",__func__,dev_addr);
|
||||||
|
|
||||||
|
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
||||||
|
|
||||||
|
//BLV_Device_Public_Info_Printf(dev_info);
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Type] = dev_info->type;
|
||||||
|
rs485_temp_buff[Dev_Addr] = dev_info->addr;
|
||||||
|
rs485_temp_buff[Dev_port] = dev_info->port;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_baud] = dev_info->baud & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_8] = ( dev_info->baud >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_16] = ( dev_info->baud >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_24] = ( dev_info->baud >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Retrynum] = dev_info->retry_num;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_WaitTime] = dev_info->wait_time & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_WaitTime_8] = ( dev_info->wait_time >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Protocol] = dev_info->Protocol;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Coord] = dev_info->DevCoord & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Coord_8] = ( dev_info->DevCoord >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_ActionCoord] = dev_info->ActionCoord & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_ActionCoord_8] = ( dev_info->ActionCoord >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Polling_CF] = dev_info->polling_cf & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_8] = ( dev_info->polling_cf >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_16] = ( dev_info->polling_cf >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_24] = ( dev_info->polling_cf >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Processing_CF] = dev_info->processing_cf & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_8] = ( dev_info->processing_cf >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_16] = ( dev_info->processing_cf >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_24] = ( dev_info->processing_cf >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
memcpy(&rs485_temp_buff[Dev_Data_Process_0],(uint8_t *)&(dev_info->DevFunInfo),Dev_Fun_Ptr_Len);
|
||||||
|
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
||||||
|
|
||||||
|
dev_info->data_len = Dev_Privately + data_len;
|
||||||
|
rs485_temp_buff[Dev_DataLen] = dev_info->data_len & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_DataLen_H] = ( dev_info->data_len >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Check] = 0x00;
|
||||||
|
rs485_temp_buff[Dev_Check] = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
||||||
|
|
||||||
|
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"W BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
|
||||||
|
|
||||||
|
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Device_PublicInfo_Read_To_Struct
|
||||||
|
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>SRAM<41><4D>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_PublicInfo_Read_To_Struct(
|
||||||
|
uint32_t dev_addr,
|
||||||
|
Device_Public_Information_G *dev_info)
|
||||||
|
{
|
||||||
|
if( (dev_info == NULL) || (dev_addr == 0x00) ) {
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x ptr_null",__func__,dev_addr);
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
//<2F><><EFBFBD>ⲿSRAM<41>ж<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
|
||||||
|
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
||||||
|
|
||||||
|
dev_info->data_len = SRAM_Read_Word(dev_addr + Dev_DataLen);
|
||||||
|
SRAM_DMA_Read_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
|
||||||
|
|
||||||
|
if( dev_info->data_len > SRAM_Device_List_Size ) {
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x data_len error",__func__,dev_addr);
|
||||||
|
return 1; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3>Ȳ<EFBFBD><C8B2>ԣ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
if( Data_CheckSum(rs485_temp_buff,dev_info->data_len) != 0x00 ) {
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x Check error",__func__,dev_addr);
|
||||||
|
return 2; //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ʧ<EFBFBD>ܣ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"R BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
|
||||||
|
|
||||||
|
dev_info->type = rs485_temp_buff[Dev_Type];
|
||||||
|
dev_info->addr = rs485_temp_buff[Dev_Addr];
|
||||||
|
dev_info->port = rs485_temp_buff[Dev_port];
|
||||||
|
|
||||||
|
dev_info->baud = rs485_temp_buff[Dev_baud_24];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= rs485_temp_buff[Dev_baud_16];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= rs485_temp_buff[Dev_baud_8];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= rs485_temp_buff[Dev_baud];
|
||||||
|
|
||||||
|
dev_info->retry_num = rs485_temp_buff[Dev_Retrynum];
|
||||||
|
|
||||||
|
dev_info->wait_time = rs485_temp_buff[Dev_WaitTime_8];
|
||||||
|
dev_info->wait_time <<= 8;
|
||||||
|
dev_info->wait_time |= rs485_temp_buff[Dev_WaitTime];
|
||||||
|
|
||||||
|
dev_info->Protocol = rs485_temp_buff[Dev_Protocol];
|
||||||
|
|
||||||
|
dev_info->DevCoord = rs485_temp_buff[Dev_Coord_8];
|
||||||
|
dev_info->DevCoord <<= 8;
|
||||||
|
dev_info->DevCoord |= rs485_temp_buff[Dev_Coord];
|
||||||
|
|
||||||
|
dev_info->ActionCoord = rs485_temp_buff[Dev_ActionCoord_8];
|
||||||
|
dev_info->ActionCoord <<= 8;
|
||||||
|
dev_info->ActionCoord |= rs485_temp_buff[Dev_ActionCoord];
|
||||||
|
|
||||||
|
dev_info->polling_cf = rs485_temp_buff[Dev_Polling_CF_24];
|
||||||
|
dev_info->polling_cf <<= 8;
|
||||||
|
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF_16];
|
||||||
|
dev_info->polling_cf <<= 8;
|
||||||
|
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF_8];
|
||||||
|
dev_info->polling_cf <<= 8;
|
||||||
|
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF];
|
||||||
|
|
||||||
|
dev_info->processing_cf = rs485_temp_buff[Dev_Processing_CF_24];
|
||||||
|
dev_info->processing_cf <<= 8;
|
||||||
|
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF_16];
|
||||||
|
dev_info->processing_cf <<= 8;
|
||||||
|
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF_8];
|
||||||
|
dev_info->processing_cf <<= 8;
|
||||||
|
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF];
|
||||||
|
|
||||||
|
memcpy((uint8_t *)&(dev_info->DevFunInfo),&rs485_temp_buff[Dev_Data_Process_0],Dev_Fun_Ptr_Len);
|
||||||
|
|
||||||
|
//BLV_Device_Public_Info_Printf(dev_info);
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Device_PublicInfo_Update_To_Struct
|
||||||
|
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>SRAM<41><4D>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_PublicInfo_Update_To_Struct(
|
||||||
|
uint32_t dev_addr,
|
||||||
|
Device_Public_Information_G *dev_info)
|
||||||
|
{
|
||||||
|
if( (dev_info == NULL) || (dev_addr == 0x00) ) return 1;
|
||||||
|
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s :%x",__func__,dev_addr);
|
||||||
|
|
||||||
|
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
||||||
|
|
||||||
|
dev_info->data_len = SRAM_Read_Word(dev_addr + Dev_DataLen);
|
||||||
|
SRAM_DMA_Read_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Type] = dev_info->type;
|
||||||
|
rs485_temp_buff[Dev_Addr] = dev_info->addr;
|
||||||
|
rs485_temp_buff[Dev_port] = dev_info->port;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_baud] = dev_info->baud & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_8] = ( dev_info->baud >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_16] = ( dev_info->baud >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_baud_24] = ( dev_info->baud >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Retrynum] = dev_info->retry_num;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_WaitTime] = dev_info->wait_time & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_WaitTime_8] = ( dev_info->wait_time >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Protocol] = dev_info->Protocol;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Coord] = dev_info->DevCoord & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Coord_8] = ( dev_info->DevCoord >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_ActionCoord] = dev_info->ActionCoord & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_ActionCoord_8] = ( dev_info->ActionCoord >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Polling_CF] = dev_info->polling_cf & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_8] = ( dev_info->polling_cf >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_16] = ( dev_info->polling_cf >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Polling_CF_24] = ( dev_info->polling_cf >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Processing_CF] = dev_info->processing_cf & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_8] = ( dev_info->processing_cf >> 8 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_16] = ( dev_info->processing_cf >> 16 ) & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_Processing_CF_24] = ( dev_info->processing_cf >> 24 ) & 0xFF;
|
||||||
|
|
||||||
|
memcpy(&rs485_temp_buff[Dev_Data_Process_0],(uint8_t *)&(dev_info->DevFunInfo),Dev_Fun_Ptr_Len);
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_DataLen] = dev_info->data_len & 0xFF;
|
||||||
|
rs485_temp_buff[Dev_DataLen_H] = ( dev_info->data_len >> 8 ) & 0xFF;
|
||||||
|
|
||||||
|
rs485_temp_buff[Dev_Check] = 0x00;
|
||||||
|
rs485_temp_buff[Dev_Check] = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
||||||
|
|
||||||
|
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"W BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
|
||||||
|
|
||||||
|
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Device_Public_Info_Printf
|
||||||
|
* Description : <20><>ӡ<EFBFBD>豸<EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||||
|
* Input :
|
||||||
|
dev_info : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
* Return : None
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLV_Device_Public_Info_Printf(Device_Public_Information_G *dev_info)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info type : %d",dev_info->type);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info addr : %d",dev_info->addr);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info port : %d",dev_info->port);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info baud : %d",dev_info->baud);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info retry_num : %d",dev_info->retry_num);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info wait_time : %d",dev_info->wait_time);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Protocol : %d",dev_info->Protocol);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info DevCoord : %d",dev_info->DevCoord);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info ActionCoord : %d",dev_info->ActionCoord);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info polling_cf : %x",dev_info->polling_cf);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info processing_cf : %x",dev_info->processing_cf);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Data_Process : %x",dev_info->DevFunInfo.Dev_Data_Process);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Input_Type_Get : %x",dev_info->DevFunInfo.Dev_Input_Type_Get);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Ctrl : %x",dev_info->DevFunInfo.Dev_Output_Ctrl);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Loop_State_Get : %x",dev_info->DevFunInfo.Dev_Output_Loop_State_Get);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Group_Ctrl : %x",dev_info->DevFunInfo.Dev_Output_Group_Ctrl);
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Loop_Group_State_Get_ptr : %x",dev_info->DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr);
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Add_BUS_Device_To_List
|
* Function Name : Add_BUS_Device_To_List
|
||||||
* Description : <20><><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : <20><><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -33,31 +275,9 @@ __attribute__((section(".non_0_wait"))) void Add_BUS_Device_To_List(
|
|||||||
uint32_t list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr); //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
uint32_t list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr); //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
if((list_addr < SRAM_Device_List_Start_Addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = SRAM_Device_List_Start_Addr;
|
if((list_addr < SRAM_Device_List_Start_Addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = SRAM_Device_List_Start_Addr;
|
||||||
|
|
||||||
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
|
||||||
|
|
||||||
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
|
BLV_Device_Public_Info_Printf(dev_info);
|
||||||
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
|
||||||
|
|
||||||
dev_info->check = 0x00;
|
|
||||||
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
|
||||||
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
|
|
||||||
|
|
||||||
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff(rs485_temp_buff,Dev_Privately,list_addr);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
|
|
||||||
// check_val = Dev_CheckSum(list_addr,dev_info->data_len);
|
|
||||||
// SRAM_Write_Byte(check_val,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
|
|
||||||
// for(uint16_t i = 0;i < write_len;i++)
|
|
||||||
// {
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
|
|
||||||
// }
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
|
|
||||||
|
|
||||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
||||||
list_addr += SRAM_Device_List_Size;
|
list_addr += SRAM_Device_List_Size;
|
||||||
@@ -91,42 +311,7 @@ __attribute__((section(".non_0_wait"))) void Add_POLL_Device_To_List(
|
|||||||
}
|
}
|
||||||
if( (list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
if( (list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
||||||
|
|
||||||
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
|
||||||
|
|
||||||
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
|
|
||||||
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
|
||||||
|
|
||||||
dev_info->check = 0x00;
|
|
||||||
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
|
||||||
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
|
|
||||||
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
|
|
||||||
// {
|
|
||||||
// SRAM_Write_Byte(0x00,list_addr+i);
|
|
||||||
// }
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>485<38>豸<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_Write_DW(dev_info->polling_cf,list_addr+Dev_Polling_CF);
|
|
||||||
//
|
|
||||||
// SRAM_Write_DW(dev_info->processing_cf,list_addr+Dev_Processing_CF);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
|
|
||||||
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
|
|
||||||
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
|
|
||||||
// for(uint16_t i = 0;i < write_len;i++)
|
|
||||||
// {
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
|
|
||||||
// }
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
|
|
||||||
|
|
||||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
||||||
list_addr += SRAM_Device_List_Size;
|
list_addr += SRAM_Device_List_Size;
|
||||||
@@ -161,41 +346,7 @@ __attribute__((section(".non_0_wait"))) void Add_ACT_Device_To_List(
|
|||||||
}
|
}
|
||||||
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
||||||
|
|
||||||
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
|
||||||
|
|
||||||
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
|
|
||||||
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
|
||||||
|
|
||||||
dev_info->check = 0x00;
|
|
||||||
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
|
||||||
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
|
|
||||||
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
|
|
||||||
// {
|
|
||||||
// SRAM_Write_Byte(0x00,list_addr+i);
|
|
||||||
// }
|
|
||||||
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>485<38>豸<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_Write_DW(dev_info->polling_cf,list_addr+Dev_Polling_CF);
|
|
||||||
//
|
|
||||||
// SRAM_Write_DW(dev_info->processing_cf,list_addr+Dev_Processing_CF);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
|
|
||||||
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
|
|
||||||
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
|
|
||||||
// for(uint16_t i = 0;i < write_len;i++)
|
|
||||||
// {
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
|
|
||||||
// }
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
|
|
||||||
|
|
||||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
||||||
list_addr += SRAM_Device_List_Size;
|
list_addr += SRAM_Device_List_Size;
|
||||||
@@ -231,66 +382,13 @@ __attribute__((section(".non_0_wait"))) void Add_Nor_Device_To_List(
|
|||||||
}
|
}
|
||||||
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
|
||||||
|
|
||||||
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
|
||||||
|
|
||||||
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
|
|
||||||
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
|
||||||
|
|
||||||
dev_info->check = 0x00;
|
|
||||||
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
|
||||||
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
|
|
||||||
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
|
|
||||||
// {
|
|
||||||
// SRAM_Write_Byte(0x00,list_addr+i);
|
|
||||||
// }
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
|
|
||||||
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
|
|
||||||
//
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
|
|
||||||
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
|
|
||||||
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
|
|
||||||
// for(uint16_t i = 0;i < write_len;i++)
|
|
||||||
// {
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
|
|
||||||
// }
|
|
||||||
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
|
|
||||||
|
|
||||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
|
||||||
list_addr += SRAM_Device_List_Size;
|
list_addr += SRAM_Device_List_Size;
|
||||||
SRAM_Write_DW(list_addr,SRAM_NORMAL_Device_List_Addr);
|
SRAM_Write_DW(list_addr,SRAM_NORMAL_Device_List_Addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
|
||||||
* Function Name : BLV_Device_Info_Write_To_SRAM
|
|
||||||
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>д<EFBFBD>뵽SRAM<41><4D>
|
|
||||||
*******************************************************************************/
|
|
||||||
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_Info_Write_To_SRAM(
|
|
||||||
uint32_t dev_addr,
|
|
||||||
Device_Public_Information_G *dev_info,
|
|
||||||
uint8_t *dev_data,
|
|
||||||
uint16_t data_len)
|
|
||||||
{
|
|
||||||
if(dev_info == NULL) return 1;
|
|
||||||
|
|
||||||
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
|
|
||||||
|
|
||||||
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
|
|
||||||
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
|
|
||||||
|
|
||||||
dev_info->check = 0x00;
|
|
||||||
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
|
|
||||||
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
|
|
||||||
return 0x00;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Device_Data_Check
|
* Function Name : Device_Data_Check
|
||||||
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
||||||
@@ -319,11 +417,11 @@ __attribute__((section(".non_0_wait"))) uint8_t Device_Data_Check(uint32_t sram_
|
|||||||
__attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
__attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
||||||
{
|
{
|
||||||
static uint32_t BLV_BUS_Wait = 0;
|
static uint32_t BLV_BUS_Wait = 0;
|
||||||
|
Device_Public_Information_G dev_info;
|
||||||
uint16_t data_len = 0;
|
uint16_t data_len = 0;
|
||||||
uint8_t rev = 0;
|
uint8_t rev = 0;
|
||||||
|
|
||||||
if(BUS485_Info.device_num == 0x00) return ;
|
if(BUS485_Info.device_num == 0x00) return ;
|
||||||
|
|
||||||
switch(BUS485_Info.BUS_Start)
|
switch(BUS485_Info.BUS_Start)
|
||||||
{
|
{
|
||||||
@@ -341,8 +439,8 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
BUS485_Info.n_list_read_addr = BUS485_Info.Last_list_addr;
|
BUS485_Info.n_list_read_addr = BUS485_Info.Last_list_addr;
|
||||||
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
||||||
|
|
||||||
Device_Public_Information_G dev_info;
|
BLV_Device_PublicInfo_Read_To_Struct(BUS485_Info.n_list_read_addr,&dev_info);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),BUS485_Info.n_list_read_addr);
|
|
||||||
BUS485_Info.n_dev_type = dev_info.type;
|
BUS485_Info.n_dev_type = dev_info.type;
|
||||||
BUS485_Info.n_dev_addr = dev_info.addr;
|
BUS485_Info.n_dev_addr = dev_info.addr;
|
||||||
BUS485_Info.n_dev_datalen = dev_info.data_len;
|
BUS485_Info.n_dev_datalen = dev_info.data_len;
|
||||||
@@ -354,12 +452,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
BUS485_Info.Retry_Flag = 0x01;
|
BUS485_Info.Retry_Flag = 0x01;
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Polling");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Polling %x %x",BUS485_Info.n_polling_cf,BUS485_Info.n_processing_cf);
|
||||||
|
|
||||||
if(BUS485_Info.baud != dev_info.baud) //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뵱ǰͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><CAB2><EFBFBD>
|
if(BUS485_Info.baud != dev_info.baud) //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뵱ǰͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><CAB2><EFBFBD>
|
||||||
{
|
{
|
||||||
/*<2A>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS_Port Baud:%ld,Change Baud:%ld\r\n",BUS485_Info.baud,dev_info.baud);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS_Port Baud:%d,Change Baud:%d\r\n",BUS485_Info.baud,dev_info.baud);
|
||||||
BUS485_Info.baud = dev_info.baud;
|
BUS485_Info.baud = dev_info.baud;
|
||||||
if(BUS485_Info.BaudRateCfg != NULL) BUS485_Info.BaudRateCfg(BUS485_Info.baud);
|
if(BUS485_Info.BaudRateCfg != NULL) BUS485_Info.BaudRateCfg(BUS485_Info.baud);
|
||||||
|
|
||||||
@@ -374,7 +471,6 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
{
|
{
|
||||||
BUS485_Info.BUS_Start = Change_Dev;
|
BUS485_Info.BUS_Start = Change_Dev;
|
||||||
/*BUS485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݵ<EFBFBD><DDB5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4>ظ<EFBFBD><D8B8><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>л<EFBFBD><D0BB>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>λ - 2022-05-04*/
|
|
||||||
BUS485_Info.Retry_Flag = 0x00;
|
BUS485_Info.Retry_Flag = 0x00;
|
||||||
BUS485_Info.n_retry_num = 0x00;
|
BUS485_Info.n_retry_num = 0x00;
|
||||||
}else { //<2F><><EFBFBD>ݷ<EFBFBD><DDB7>ͳɹ<CDB3><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
|
}else { //<2F><><EFBFBD>ݷ<EFBFBD><DDB7>ͳɹ<CDB3><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
|
||||||
@@ -383,11 +479,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"[BLV_BUS_Polling_Task2]BLV_BUS_dev Check Fail:%08X",BUS485_Info.Last_list_addr);
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Check Fail:%08X",BUS485_Info.Last_list_addr);
|
||||||
BUS485_Info.BUS_Start = Change_Dev;
|
BUS485_Info.BUS_Start = Change_Dev;
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Type Fail");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Type Fail");
|
||||||
BUS485_Info.BUS_Start = Change_Dev;
|
BUS485_Info.BUS_Start = Change_Dev;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -395,15 +491,14 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
case Change_Dev:
|
case Change_Dev:
|
||||||
BUS485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
|
BUS485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
if(BUS485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_BUS_Device_List_Addr)) BUS485_Info.Last_list_addr = SRAM_Device_List_Start_Addr;
|
if(BUS485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_BUS_Device_List_Addr)) BUS485_Info.Last_list_addr = SRAM_Device_List_Start_Addr;
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Change_Dev");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Change_Dev %x %x",BUS485_Info.Last_list_addr,SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
|
||||||
BUS485_Info.BUS_Start = B_Polling;
|
BUS485_Info.BUS_Start = B_Polling;
|
||||||
break;
|
break;
|
||||||
case B_Retry:
|
case B_Retry:
|
||||||
if((BUS485_Info.Retry_Flag == 0x01) && (BUS485_Info.n_retry_num != 0x00)) //<2F>ط<EFBFBD><D8B7><EFBFBD>־δ<D6BE><CEB4><EFBFBD>㣬<EFBFBD><E3A3AC>ʾû<CABE><C3BB><EFBFBD>ͳɹ<CDB3>
|
if((BUS485_Info.Retry_Flag == 0x01) && (BUS485_Info.n_retry_num != 0x00)) //<2F>ط<EFBFBD><D8B7><EFBFBD>־δ<D6BE><CEB4><EFBFBD>㣬<EFBFBD><E3A3AC>ʾû<CABE><C3BB><EFBFBD>ͳɹ<CDB3>
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Retransmitting Data:%d-%d-%08X...",BUS485_Info.n_dev_type,BUS485_Info.n_dev_addr,BUS485_Info.n_list_read_addr);
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Retransmitting Data:%d-%d-%08X...",BUS485_Info.n_dev_type,BUS485_Info.n_dev_addr,BUS485_Info.n_list_read_addr);
|
||||||
|
|
||||||
//<2F><EFBFBD>ʱ<EFBFBD><CAB1>:2022-07-12
|
|
||||||
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
|
||||||
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
@@ -431,19 +526,21 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
{
|
{
|
||||||
data_len = SRAM_Read_Word(g_uart[UART_3].RX_Buffer_ReadAddr);
|
data_len = SRAM_Read_Word(g_uart[UART_3].RX_Buffer_ReadAddr);
|
||||||
|
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply Len:%d",data_len);
|
||||||
|
|
||||||
if((BUS485_Info.n_processing_cf!=0x00000000) && (BUS485_Info.n_processing_cf!=0xFFFFFFFF)) {
|
if((BUS485_Info.n_processing_cf!=0x00000000) && (BUS485_Info.n_processing_cf!=0xFFFFFFFF)) {
|
||||||
BUS485_Info.Retry_Flag = ((fun2_prt)BUS485_Info.n_processing_cf)(BUS485_Info.n_list_read_addr,g_uart[UART_3].RX_Buffer_ReadAddr + 2,data_len);
|
BUS485_Info.Retry_Flag = ((fun2_prt)BUS485_Info.n_processing_cf)(BUS485_Info.n_list_read_addr,g_uart[UART_3].RX_Buffer_ReadAddr + 2,data_len);
|
||||||
}
|
}
|
||||||
|
|
||||||
if(BUS485_Info.Retry_Flag == 0x00) {
|
if(BUS485_Info.Retry_Flag == 0x00) {
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC\r\n");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC 1\r\n");
|
||||||
BUS485_Info.send_wait = SysTick_1ms;
|
BUS485_Info.send_wait = SysTick_1ms;
|
||||||
BUS485_Info.BUS_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
|
BUS485_Info.BUS_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
}
|
}
|
||||||
|
|
||||||
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
|
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
|
||||||
{
|
{
|
||||||
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr); //<2F>ϱ<EFBFBD>
|
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr);
|
||||||
}
|
}
|
||||||
|
|
||||||
g_uart[UART_3].RX_Buffer_ReadAddr += SRAM_Uart_Buffer_Size;
|
g_uart[UART_3].RX_Buffer_ReadAddr += SRAM_Uart_Buffer_Size;
|
||||||
@@ -462,21 +559,19 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
}
|
}
|
||||||
//BUS485_Info.BUS_Start = Change_Dev;
|
//BUS485_Info.BUS_Start = Change_Dev;
|
||||||
break;
|
break;
|
||||||
/*2021-11-24 : <20><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><EFBFBD><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ݵ<EFBFBD>ǰ<EFBFBD>豸ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3>л<EFBFBD><D0BB><EFBFBD><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3>л<EFBFBD><D0BB>겨<EFBFBD><EAB2A8><EFBFBD>ʺȴ<F3A3ACB5>10ms<6D>ڽ<EFBFBD><DABD>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
2022-07-19 : <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ͨѶһ<D1B6>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>Ӷ<EFBFBD><D3B6><EFBFBD>
|
|
||||||
*/
|
|
||||||
|
|
||||||
case Baud_Wait: //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>ʱ<EFBFBD><CAB1>
|
case Baud_Wait: //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>ʱ<EFBFBD><CAB1>
|
||||||
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudWaitTime)
|
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudWaitTime)
|
||||||
{
|
{
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Wait");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Wait %x",BUS485_Info.n_polling_cf);
|
||||||
|
|
||||||
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
if((BUS485_Info.n_polling_cf != 0x00000000) && (BUS485_Info.n_polling_cf != 0xFFFFFFFF)) {
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS Baud_Wait -- n_polling_cf %x",BUS485_Info.n_polling_cf);
|
||||||
|
rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
BUS485_Info.change_tick = SysTick_1ms;
|
BUS485_Info.change_tick = SysTick_1ms;
|
||||||
BUS485_Info.BUS_Start = Baud_Comm;
|
BUS485_Info.BUS_Start = Baud_Comm;
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
case Baud_Comm:
|
case Baud_Comm:
|
||||||
/*<2A><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD>*/
|
/*<2A><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD>*/
|
||||||
@@ -491,12 +586,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
}
|
}
|
||||||
if(BUS485_Info.Retry_Flag == 0x00) //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>һ<EFBFBD><D2BB>ͨѶ
|
if(BUS485_Info.Retry_Flag == 0x00) //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>һ<EFBFBD><D2BB>ͨѶ
|
||||||
{
|
{
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm3");
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm3");
|
||||||
BUS485_Info.BUS_Start = Baud_SendWait;
|
BUS485_Info.BUS_Start = Baud_SendWait;
|
||||||
BUS485_Info.change_tick = SysTick_1ms;
|
BUS485_Info.change_tick = SysTick_1ms;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
|
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
|
||||||
{
|
{
|
||||||
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr); //<2F>ϱ<EFBFBD>
|
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr); //<2F>ϱ<EFBFBD>
|
||||||
@@ -516,7 +610,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
break;
|
break;
|
||||||
case Baud_SendWait:
|
case Baud_SendWait:
|
||||||
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudSendWaitTime) {
|
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudSendWaitTime) {
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm2");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm1");
|
||||||
BUS485_Info.change_tick = SysTick_1ms;
|
BUS485_Info.change_tick = SysTick_1ms;
|
||||||
BUS485_Info.BUS_Start = B_Send;
|
BUS485_Info.BUS_Start = B_Send;
|
||||||
}
|
}
|
||||||
@@ -524,10 +618,9 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
case B_Send: //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
case B_Send: //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- send");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- send");
|
||||||
|
|
||||||
//if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) Convert_To_Fun_Prt(BUS485_Info.n_polling_cf,BUS485_Info.n_list_read_addr);
|
if( (BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF) ) {
|
||||||
|
rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr);
|
||||||
//<2F><EFBFBD>ʱ<EFBFBD><CAB1>:2022-07-12
|
}
|
||||||
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
|
||||||
|
|
||||||
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
{
|
{
|
||||||
@@ -552,7 +645,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
|
|||||||
{
|
{
|
||||||
if(SysTick_1s - BUS485_Info.mode_tick > BUS485_Info.mode_outtime)
|
if(SysTick_1s - BUS485_Info.mode_tick > BUS485_Info.mode_outtime)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC");
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Mode:%d Outtime %d",BUS485_Info.port_mode,BUS485_Info.device_num);
|
||||||
BUS485_Info.mode_tick = SysTick_1s;
|
BUS485_Info.mode_tick = SysTick_1s;
|
||||||
BUS485_Info.port_mode = Port_Normal_Mode; //<2F><><EFBFBD><EFBFBD>ģʽ
|
BUS485_Info.port_mode = Port_Normal_Mode; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||||
}
|
}
|
||||||
@@ -649,9 +742,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS485Port_ModeTask(void)
|
|||||||
break;
|
break;
|
||||||
case Port_Normal_Mode:
|
case Port_Normal_Mode:
|
||||||
case Port_Monitoring_mode:
|
case Port_Monitoring_mode:
|
||||||
|
|
||||||
BLV_BUS_Polling_Task(); //<2F><><EFBFBD><EFBFBD>ģʽ <20>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>¼<EFBFBD><C2BC><EFBFBD>ģʽ
|
BLV_BUS_Polling_Task(); //<2F><><EFBFBD><EFBFBD>ģʽ <20>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>¼<EFBFBD><C2BC><EFBFBD>ģʽ
|
||||||
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -691,7 +782,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
}else {
|
}else {
|
||||||
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
||||||
Device_Public_Information_G dev_info;
|
Device_Public_Information_G dev_info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Poll485_Info.n_list_read_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(Poll485_Info.n_list_read_addr,&dev_info);
|
||||||
|
|
||||||
Poll485_Info.n_dev_type = dev_info.type;
|
Poll485_Info.n_dev_type = dev_info.type;
|
||||||
Poll485_Info.n_dev_addr = dev_info.addr;
|
Poll485_Info.n_dev_addr = dev_info.addr;
|
||||||
@@ -731,7 +822,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
||||||
|
|
||||||
Device_Public_Information_G dev_info;
|
Device_Public_Information_G dev_info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Poll485_Info.n_list_read_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(Poll485_Info.n_list_read_addr,&dev_info);
|
||||||
|
|
||||||
Poll485_Info.n_dev_type = dev_info.type;
|
Poll485_Info.n_dev_type = dev_info.type;
|
||||||
Poll485_Info.n_dev_addr = dev_info.addr;
|
Poll485_Info.n_dev_addr = dev_info.addr;
|
||||||
@@ -795,7 +886,6 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if(Poll485_Info.Retry_Flag == 0x00) {
|
if(Poll485_Info.Retry_Flag == 0x00) {
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC\r\n");
|
|
||||||
Poll485_Info.send_wait = SysTick_1ms;
|
Poll485_Info.send_wait = SysTick_1ms;
|
||||||
Poll485_Info.POLL_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
|
Poll485_Info.POLL_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
}
|
}
|
||||||
@@ -1100,7 +1190,7 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_Task(void)
|
|||||||
|
|
||||||
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
||||||
Device_Public_Information_G dev_info;
|
Device_Public_Information_G dev_info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Act485_Info.Last_list_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(Act485_Info.Last_list_addr,&dev_info);
|
||||||
|
|
||||||
Act485_Info.n_polling_cf = dev_info.polling_cf;
|
Act485_Info.n_polling_cf = dev_info.polling_cf;
|
||||||
Act485_Info.n_processing_cf = dev_info.processing_cf;
|
Act485_Info.n_processing_cf = dev_info.processing_cf;
|
||||||
@@ -1119,7 +1209,7 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_Task(void)
|
|||||||
{
|
{
|
||||||
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
|
||||||
Device_Public_Information_G dev_info;
|
Device_Public_Information_G dev_info;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Act485_Info.n_list_read_addr);
|
BLV_Device_PublicInfo_Read_To_Struct(Act485_Info.n_list_read_addr,&dev_info);
|
||||||
|
|
||||||
Act485_Info.n_polling_cf = dev_info.polling_cf;
|
Act485_Info.n_polling_cf = dev_info.polling_cf;
|
||||||
Act485_Info.n_processing_cf = dev_info.processing_cf;
|
Act485_Info.n_processing_cf = dev_info.processing_cf;
|
||||||
|
|||||||
@@ -221,7 +221,7 @@ __attribute__((section(".non_0_wait"))) void Dbg_NoTick_Print(int DbgOptBit ,con
|
|||||||
fmt++;
|
fmt++;
|
||||||
}
|
}
|
||||||
va_end(ap);
|
va_end(ap);
|
||||||
printf("\r\n");
|
//printf("\r\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -101,8 +101,8 @@ typedef struct
|
|||||||
}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
|
uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
|
||||||
|
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
@@ -114,15 +114,15 @@ typedef struct
|
|||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
|
||||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
|
||||||
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ - 1Byte
|
||||||
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 2Byte
|
||||||
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬
|
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬ - 2Byte
|
||||||
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
|
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ - 2Byte
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
|
||||||
}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
#define DEVACTIONOUTCFGLEN sizeof(Dev_Action_OutCfg) //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
#define DEVACTIONOUTCFGLEN 0x08 //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> Dev_Action_OutCfg<EFBFBD>ṹ<EFBFBD>峤<EFBFBD><EFBFBD>
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
@@ -159,68 +159,38 @@ typedef struct CFG_Action_Add
|
|||||||
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
|
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
|
||||||
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
|
||||||
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
|
||||||
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
|
|
||||||
|
|
||||||
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
|
uint8_t BlwMapDevi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||||
uint8_t BlwMapDevi; //<2F><EFBFBD><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
uint8_t DevNum; //<2F>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t DevBusNum; //Bus<75><73><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t DevNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t DevPollNum; //<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t DevBusNum; //Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t DevPollNum; //<2F><>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||||
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t TimeGetFlag; //ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><EFBFBD>
|
||||||
|
uint8_t Lock485Addr; //<><CEA2><EFBFBD><EFBFBD>485<38><35>ַ
|
||||||
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
uint8_t CheckTypeNum; //Ѳ<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t CheckMapList[4]; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
|
||||||
/*ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
|
uint8_t OffLineDevType; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
|
||||||
uint8_t TimeGetFlag; //ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1>
|
uint8_t OffLineDevAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ 2023-10-08
|
||||||
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
uint8_t InputType; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
|
||||||
|
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
||||||
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
|
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
|
||||||
uint16_t SleepActionNo; //˯<EFBFBD>߳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
uint8_t People_Flag; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><EFBFBD><EFBFBD> 2024-03-01
|
||||||
uint32_t DevLockAddr; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ
|
uint8_t ServerCtrl; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t Lock485Addr; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ַ
|
uint8_t CardInFlag; //<EFBFBD><EFBFBD>ס<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><EFBFBD><EFBFBD> 2024-04-29
|
||||||
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ
|
uint8_t TimeSyncFlag; //ʱ<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
|
||||||
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
|
||||||
uint8_t CheckTypeNum; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t VC_ConNToSGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t CheckMapList[4]; //Ѳ<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
|
uint8_t VC_ConNToSSubset; //<2F><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint8_t VC_ConSToNGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t OffLineDevType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
|
uint8_t VC_ConSToNSubset; //<2F><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t OffLineDevAddr; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ 2023-10-08
|
uint8_t VC_PortNum; //<2F><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t InputType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
|
|
||||||
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
|
||||||
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
|
|
||||||
|
|
||||||
uint8_t People_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 2024-03-01
|
|
||||||
uint8_t ServerCtrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t CardInFlag; //<2F><>ס<EFBFBD><D7A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD> 2024-04-29
|
|
||||||
|
|
||||||
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
uint8_t TimeSyncFlag; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
|
|
||||||
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
|
||||||
|
|
||||||
uint8_t VC_ConNToSGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t VC_ConNToSSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
uint8_t VC_ConSToNGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t VC_ConSToNSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
uint8_t VC_PortNum; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
|
|
||||||
|
|
||||||
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
|
||||||
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
|
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
|
||||||
|
|
||||||
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
|
||||||
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
|
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
|
||||||
uint8_t SleepMode_State;
|
uint8_t SleepMode_State;
|
||||||
uint8_t Last_SleepMode_State;
|
uint8_t Last_SleepMode_State;
|
||||||
@@ -229,9 +199,6 @@ typedef struct{
|
|||||||
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
|
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
|
||||||
uint8_t Last_Person_Detected;
|
uint8_t Last_Person_Detected;
|
||||||
|
|
||||||
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
|
|
||||||
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
|
||||||
|
|
||||||
uint8_t CardState; //<2F>忨״̬
|
uint8_t CardState; //<2F>忨״̬
|
||||||
uint8_t Last_CardState;
|
uint8_t Last_CardState;
|
||||||
|
|
||||||
@@ -239,6 +206,23 @@ typedef struct{
|
|||||||
uint8_t Last_Rs485CardType;
|
uint8_t Last_Rs485CardType;
|
||||||
uint8_t Last_NeightState;
|
uint8_t Last_NeightState;
|
||||||
|
|
||||||
|
uint16_t SleepActionNo; //˯<>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||||
|
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||||
|
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
|
||||||
|
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||||
|
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||||
|
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||||
|
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
|
||||||
|
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
|
||||||
|
|
||||||
|
uint32_t DevLockAddr; //<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
|
||||||
|
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
|
||||||
|
|
||||||
}BLV_DevAction_Manage_G;
|
}BLV_DevAction_Manage_G;
|
||||||
|
|
||||||
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
|
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
|
||||||
@@ -273,14 +257,14 @@ typedef struct
|
|||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
uint8_t Addr;
|
uint8_t Addr;
|
||||||
uint32_t ExpandReadFlag;
|
|
||||||
uint16_t ExpandReadState[32];
|
uint16_t ExpandReadState[32];
|
||||||
|
uint32_t ExpandReadFlag;
|
||||||
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
uint8_t Addr;
|
uint8_t Addr;
|
||||||
uint32_t DimmReadFlag;
|
|
||||||
uint16_t DimmReadState[32];
|
uint16_t DimmReadState[32];
|
||||||
|
uint32_t DimmReadFlag;
|
||||||
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||||
|
|
||||||
|
|
||||||
@@ -294,11 +278,14 @@ typedef struct{
|
|||||||
|
|
||||||
extern BLV_DevAction_Manage_G DevActionGlobal;
|
extern BLV_DevAction_Manage_G DevActionGlobal;
|
||||||
|
|
||||||
|
void Logic_DevAction_Add(uint8_t *data,uint16_t len);
|
||||||
|
|
||||||
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
||||||
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||||
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||||
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
|
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
|
||||||
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
||||||
|
|
||||||
|
void BLV_DevAction_Task(void);
|
||||||
|
|
||||||
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
||||||
|
|||||||
@@ -172,7 +172,8 @@ typedef void (*Dev_Output_Group_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInpu
|
|||||||
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
#define Dev_Fun_Ptr_Len sizeof(Struct_Dev_Fun_Info) //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸<EFBFBD>ĸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> һ<><D2BB>16<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
#define Dev_Fun_Ptr_Len 24 //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸6<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> һ<><D2BB>24<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
@@ -226,30 +227,35 @@ typedef struct{
|
|||||||
typedef struct{
|
typedef struct{
|
||||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||||
|
|
||||||
|
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
|
||||||
|
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||||
|
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||||
|
|
||||||
|
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
|
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
|
|
||||||
|
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||||
|
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
|
||||||
|
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||||
|
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||||
|
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
|
|
||||||
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
|
||||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
||||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
||||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
|
||||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
|
||||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
|
||||||
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
|
||||||
|
|
||||||
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
|
||||||
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
|
||||||
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
|
||||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
|
||||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
|
||||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||||
|
|
||||||
|
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}BLV_BUS_Manage_G;
|
}BLV_BUS_Manage_G;
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
@@ -320,10 +326,16 @@ extern BLV_POLL_Manage_G Poll485_Info;
|
|||||||
extern BLV_ACTIVE_Manage_G Act485_Info;
|
extern BLV_ACTIVE_Manage_G Act485_Info;
|
||||||
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
|
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
|
||||||
|
|
||||||
|
uint8_t BLV_Device_Info_Write_To_SRAM( uint32_t dev_addr, Device_Public_Information_G *dev_info, uint8_t *dev_data, uint16_t data_len);
|
||||||
|
uint8_t BLV_Device_PublicInfo_Read_To_Struct( uint32_t dev_addr, Device_Public_Information_G *dev_info);
|
||||||
|
void BLV_Device_Public_Info_Printf(Device_Public_Information_G *dev_info);
|
||||||
|
uint8_t BLV_Device_PublicInfo_Update_To_Struct( uint32_t dev_addr, Device_Public_Information_G *dev_info);
|
||||||
|
|
||||||
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||||
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||||
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||||
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||||
|
|
||||||
uint8_t Device_Data_Check(uint32_t sram_addr);
|
uint8_t Device_Data_Check(uint32_t sram_addr);
|
||||||
void BLV_BUS_Polling_Task(void);
|
void BLV_BUS_Polling_Task(void);
|
||||||
void BUS485Port_Passthrough_Task(void);
|
void BUS485Port_Passthrough_Task(void);
|
||||||
|
|||||||
@@ -73,10 +73,8 @@ typedef struct {
|
|||||||
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||||
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
|
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
|
||||||
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
|
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
|
||||||
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint16_t writ_time; //ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
|
|
||||||
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
@@ -86,7 +84,9 @@ typedef struct {
|
|||||||
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||||
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||||
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||||
}LOGICFILE_DEVICE_INFO; //<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ
|
uint16_t writ_time; //ͨѶ<EFBFBD>ȴ<EFBFBD>ʱ<EFBFBD><EFBFBD>
|
||||||
|
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}LOGICFILE_DEVICE_INFO; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ(ע<>Ᵽ<EFBFBD><E2B1A3>Flash<73>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ<DDBD>붨<EFBFBD><EBB6A8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD>ͬ)
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||||
@@ -114,14 +114,15 @@ typedef struct{
|
|||||||
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
|
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
|
||||||
}LOGIC_ACTIVE_CONDITION_G; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
|
}LOGIC_ACTIVE_CONDITION_G; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
|
||||||
|
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||||
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
|
|
||||||
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
|
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
|
||||||
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||||
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
|
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
|
||||||
|
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
|
||||||
}LOGIC_DEVICE_ACTIVE_G; //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
|
}LOGIC_DEVICE_ACTIVE_G; //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
|
||||||
|
|
||||||
#if C8_TYPE
|
#if C8_TYPE
|
||||||
@@ -163,6 +164,7 @@ typedef struct {
|
|||||||
|
|
||||||
void BLV_DevAction_AllData_Init(void);
|
void BLV_DevAction_AllData_Init(void);
|
||||||
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
|
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
|
||||||
|
void Logic_Device_Action_Data_Analysis(uint8_t *data);
|
||||||
uint8_t LOGIC_FILE_Check(void);
|
uint8_t LOGIC_FILE_Check(void);
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -234,6 +234,7 @@
|
|||||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
||||||
|
#define SRAM_DevAction_List_Num 950
|
||||||
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
||||||
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|||||||
@@ -9,6 +9,8 @@
|
|||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
|
#define LOGIC_DEBUG_INFO_EN 1
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : DevAction_CondData_Init
|
* Function Name : DevAction_CondData_Init
|
||||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||||||
@@ -44,7 +46,7 @@ __attribute__((section(".non_0_wait"))) void Action_Coord_Get(uint32_t Dev_proce
|
|||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Action_Coord_Get
|
* Function Name : Action_Coord_Get
|
||||||
* Description : <20>豸<EFBFBD>±<EFBFBD><C2B1>õ<EFBFBD>
|
* Description : <20>豸<EFBFBD>±<EFBFBD><C2B1>õ<EFBFBD> - <20><><EFBFBD>ʵ㣺<CAB5><E3A3BA>ʲôʹ<C3B4>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
* Input :
|
* Input :
|
||||||
Dev_processing_addr :<3A>豸<EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD>ַ
|
Dev_processing_addr :<3A>豸<EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD>ַ
|
||||||
BUS_Public :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BUS_Public :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -58,33 +60,34 @@ __attribute__((section(".non_0_wait"))) void Dev_Coord_Get(void)
|
|||||||
for(i = 0; i < DevActionGlobal.DevNum; i++)
|
for(i = 0; i < DevActionGlobal.DevNum; i++)
|
||||||
{
|
{
|
||||||
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
|
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), Dev_processing_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(Dev_processing_addr,&BUS_Public);
|
||||||
BUS_Public.DevCoord = i; //<2F>õ<EFBFBD><C3B5>豸<EFBFBD>±<EFBFBD>
|
BUS_Public.DevCoord = i; //<2F>õ<EFBFBD><C3B5>豸<EFBFBD>±<EFBFBD>
|
||||||
Action_Coord_Get(Dev_processing_addr, &BUS_Public); //<2F>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
Action_Coord_Get(Dev_processing_addr, &BUS_Public); //<2F>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d<><64><EFBFBD>豸<EFBFBD>±<EFBFBD>:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d", Dev_processing_addr, BUS_Public.type, BUS_Public.addr, BUS_Public.DevCoord, BUS_Public.ActionCoord);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X<><58><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d<><64><EFBFBD>豸<EFBFBD>±<EFBFBD>:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d", Dev_processing_addr, BUS_Public.type, BUS_Public.addr, BUS_Public.DevCoord, BUS_Public.ActionCoord);
|
||||||
switch(BUS_Public.type)
|
switch(BUS_Public.type)
|
||||||
{
|
{
|
||||||
case Dev_Host_HVout: //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>
|
case Dev_Host_HVout: //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>
|
||||||
if((ENUM_RS485_DEV_PRO_01 == BUS_Public.Protocol)&&(0x00 == BUS_Public.addr)) //1<><31>Э<EFBFBD><D0AD> <20><>ַΪ0
|
if((ENUM_RS485_DEV_PRO_01 == BUS_Public.Protocol)&&(0x00 == BUS_Public.addr)) //1<><31>Э<EFBFBD><D0AD> <20><>ַΪ0
|
||||||
{
|
{
|
||||||
// NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
// SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
|
||||||
//
|
|
||||||
// DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
|
DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
|
||||||
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%08X", DevHVoutInfo.DevC5IOAddr);
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%08X", DevHVoutInfo.DevC5IOAddr);
|
||||||
// SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately); //<2F>̵<EFBFBD><CCB5><EFBFBD>˽<EFBFBD><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately); //<2F>̵<EFBFBD><CCB5><EFBFBD>˽<EFBFBD><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
||||||
|
|
||||||
|
BLV_Device_Info_Write_To_SRAM(Dev_processing_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
|
}else {
|
||||||
|
|
||||||
|
BLV_Device_PublicInfo_Update_To_Struct(Dev_processing_addr,&BUS_Public);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
default:
|
||||||
|
/*<2A><><EFBFBD>±<EFBFBD><C2B1>浱ǰ<E6B5B1>豸*/
|
||||||
|
BLV_Device_PublicInfo_Update_To_Struct(Dev_processing_addr,&BUS_Public);
|
||||||
|
break;
|
||||||
}
|
}
|
||||||
/*<2A><><EFBFBD>±<EFBFBD><C2B1>浱ǰ<E6B5B1>豸*/
|
|
||||||
BUS_Public.check = 0x00;
|
|
||||||
SRAM_Write_Byte(BUS_Public.check, Dev_processing_addr+Dev_Check); //<2F><>У<EFBFBD><D0A3>
|
|
||||||
SRAM_Write_Word(BUS_Public.DevCoord, Dev_processing_addr+Dev_Coord); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>豸<EFBFBD>±<EFBFBD>
|
|
||||||
SRAM_Write_Word(BUS_Public.ActionCoord, Dev_processing_addr+Dev_ActionCoord); //<2F><><EFBFBD><EFBFBD>д<EFBFBD>붯<EFBFBD><EBB6AF><EFBFBD>±<EFBFBD>
|
|
||||||
|
|
||||||
BUS_Public.check = Log_CheckSum(Dev_processing_addr,BUS_Public.data_len); //<2F><><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3> DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
|
||||||
SRAM_Write_Byte(BUS_Public.check, Dev_processing_addr+Dev_Check); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>У<EFBFBD><D0A3>
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -105,7 +108,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
list_addri = SRAM_DevAction_List_Start_Addr + i * SRAM_DevAction_List_Size;
|
list_addri = SRAM_DevAction_List_Start_Addr + i * SRAM_DevAction_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoi, sizeof(DEV_ACTION_INFO), list_addri);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoi, sizeof(DEV_ACTION_INFO), list_addri);
|
||||||
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%04x",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%x",
|
||||||
DevActionInfoi.DevCtrlNum,
|
DevActionInfoi.DevCtrlNum,
|
||||||
DevActionInfoi.DevActionInput.DevType,
|
DevActionInfoi.DevActionInput.DevType,
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr,
|
||||||
@@ -126,7 +129,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
&& ( DevActionInfoi.DevActionInput.inAddr == DevActionInfoj.DevActionInput.inAddr )
|
&& ( DevActionInfoi.DevActionInput.inAddr == DevActionInfoj.DevActionInput.inAddr )
|
||||||
&& ( DevActionInfoi.DevActionInput.inType == DevActionInfoj.DevActionInput.inType ) )
|
&& ( DevActionInfoi.DevActionInput.inType == DevActionInfoj.DevActionInput.inType ) )
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X<EFBFBD><EFBFBD>֮ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X", list_addri, list_addrj);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X<><58>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X", list_addri, list_addrj);
|
||||||
DevActionInfoi.DevActionState.SceneReuseFlag = 0x01;
|
DevActionInfoi.DevActionState.SceneReuseFlag = 0x01;
|
||||||
if( (DevActionInfoi.DevActionInput.DevType == DEV_RS485_SWT)
|
if( (DevActionInfoi.DevActionInput.DevType == DEV_RS485_SWT)
|
||||||
&& (DevActionInfoi.DevActionCond.SceneExcute == ACTION_SCENE_MULTI)
|
&& (DevActionInfoi.DevActionCond.SceneExcute == ACTION_SCENE_MULTI)
|
||||||
@@ -141,7 +144,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevActionInfoi.DevActionState.MultiSetFlag = 0x01;
|
DevActionInfoi.DevActionState.MultiSetFlag = 0x01;
|
||||||
DevActionInfoi.DevActionState.MultiNumber = 0x01;
|
DevActionInfoi.DevActionState.MultiNumber = 0x01;
|
||||||
DevActionInfoi.DevActionState.MultiValidNo++;
|
DevActionInfoi.DevActionState.MultiValidNo++;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr,
|
||||||
DevActionInfoi.DevActionInput.inAddr,
|
DevActionInfoi.DevActionInput.inAddr,
|
||||||
list_addri,
|
list_addri,
|
||||||
@@ -158,7 +161,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevActionInfoj.DevActionState.MultiNumber = DevActionInfoi.DevActionState.MultiValidNo;
|
DevActionInfoj.DevActionState.MultiNumber = DevActionInfoi.DevActionState.MultiValidNo;
|
||||||
DevActionInfoj.DevActionState.MultiSetFlag = 0x01;
|
DevActionInfoj.DevActionState.MultiSetFlag = 0x01;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
||||||
DevActionInfoj.DevActionInput.DevAddr,
|
DevActionInfoj.DevActionInput.DevAddr,
|
||||||
DevActionInfoj.DevActionInput.inAddr,
|
DevActionInfoj.DevActionInput.inAddr,
|
||||||
list_addrj,
|
list_addrj,
|
||||||
@@ -169,7 +172,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
{
|
{
|
||||||
SRAM_Write_Byte(0x00,list_addrj+k);
|
SRAM_Write_Byte(0x00,list_addrj+k);
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addrj);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addrj);
|
||||||
DevActionInfoj.CheckVal = 0x00;
|
DevActionInfoj.CheckVal = 0x00;
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoj, DevActionInfoj.data_len, list_addrj);
|
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoj, DevActionInfoj.data_len, list_addrj);
|
||||||
DevActionInfoj.CheckVal = DevAction_CheckSum(list_addrj,DevActionInfoj.data_len);
|
DevActionInfoj.CheckVal = DevAction_CheckSum(list_addrj,DevActionInfoj.data_len);
|
||||||
@@ -178,17 +181,14 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevAdd = Find_AllDevice_List_Information2(Active_Port, DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
DevAdd = Find_AllDevice_List_Information2(Active_Port, DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
||||||
if(DevAdd != 0x00)
|
if(DevAdd != 0x00)
|
||||||
{
|
{
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||||
if(DevActionInfoi.DevActionState.MultiValidNo <= 127)
|
if(DevActionInfoi.DevActionState.MultiValidNo <= 127)
|
||||||
{
|
{
|
||||||
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr] = DevActionInfoi.DevActionState.MultiValidNo;
|
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr] = DevActionInfoi.DevActionState.MultiValidNo;
|
||||||
}
|
}
|
||||||
|
|
||||||
BUS_Public.check = 0x00;
|
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>·:%d <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>·:%d <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>:%d",
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr,
|
||||||
@@ -210,7 +210,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
{
|
{
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr = DevAction_No_Get(DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr = DevAction_No_Get(DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20>±<EFBFBD>:%d <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
||||||
i,
|
i,
|
||||||
@@ -221,7 +221,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr);
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD>洢<EFBFBD><E6B4A2>ַ:%04x",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD>洢<EFBFBD><E6B4A2>ַ:%x",
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop,
|
||||||
@@ -238,14 +238,14 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
|
|
||||||
if(Dev_Host_Invalid != DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType)
|
if(Dev_Host_Invalid != DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
i,
|
i,
|
||||||
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
||||||
}else{
|
}else{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
i,
|
i,
|
||||||
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
||||||
@@ -261,7 +261,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
{
|
{
|
||||||
SRAM_Write_Byte(0x00,list_addri+k);
|
SRAM_Write_Byte(0x00,list_addri+k);
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addri);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addri);
|
||||||
DevActionInfoi.CheckVal = 0x00;
|
DevActionInfoi.CheckVal = 0x00;
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoi, DevActionInfoi.data_len, list_addri); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoi, DevActionInfoi.data_len, list_addri); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
@@ -297,7 +297,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
|
|||||||
if( DevActionInfo.DevActionOutput[j].DevActionOutAddr != 0x00 )
|
if( DevActionInfo.DevActionOutput[j].DevActionOutAddr != 0x00 )
|
||||||
{
|
{
|
||||||
KeepFlag = 0x01;
|
KeepFlag = 0x01;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20>±<EFBFBD>:%d <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
||||||
list_addr,DevActionInfo.DevActionOutput[j].DevActionOutAddr,
|
list_addr,DevActionInfo.DevActionOutput[j].DevActionOutAddr,
|
||||||
i,
|
i,
|
||||||
DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevOutputLoop);
|
DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevOutputLoop);
|
||||||
@@ -345,7 +345,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
|
|||||||
{
|
{
|
||||||
SRAM_Write_Byte(0x00,list_addr+k);
|
SRAM_Write_Byte(0x00,list_addr+k);
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addr);
|
||||||
DevActionInfo.CheckVal = 0x00;
|
DevActionInfo.CheckVal = 0x00;
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
@@ -368,7 +368,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
|
|||||||
uint32_t list_addr = 0;
|
uint32_t list_addr = 0;
|
||||||
DEV_ACTION_INFO DevActionInfo;
|
DEV_ACTION_INFO DevActionInfo;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĶ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%08X",DevActionGlobal.DevActionNum, SRAM_DevAction_List_Start_Addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĶ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X",DevActionGlobal.DevActionNum, SRAM_DevAction_List_Start_Addr);
|
||||||
|
|
||||||
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
|
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
|
||||||
{
|
{
|
||||||
@@ -383,7 +383,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
|
|||||||
if(DevActionInfo.DevActionOutput[j].DevDlyAddr != 0x00)
|
if(DevActionInfo.DevActionOutput[j].DevDlyAddr != 0x00)
|
||||||
{
|
{
|
||||||
KeepFlag = 0x01;
|
KeepFlag = 0x01;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
||||||
list_addr,
|
list_addr,
|
||||||
i,
|
i,
|
||||||
DevActionInfo.DevActionOutput[j].DevDlyAddr,
|
DevActionInfo.DevActionOutput[j].DevDlyAddr,
|
||||||
@@ -399,7 +399,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
|
|||||||
{
|
{
|
||||||
SRAM_Write_Byte(0x00,list_addr+k);
|
SRAM_Write_Byte(0x00,list_addr+k);
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addr);
|
||||||
DevActionInfo.CheckVal = 0x00; //У<><D0A3><EFBFBD><EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
DevActionInfo.CheckVal = 0x00; //У<><D0A3><EFBFBD><EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
@@ -422,6 +422,8 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_AllData_Init(void)
|
|||||||
memset((void *)&NorDevInfoGlobal,0,sizeof(BLV_NORDEV_Manage_G));
|
memset((void *)&NorDevInfoGlobal,0,sizeof(BLV_NORDEV_Manage_G));
|
||||||
memset((void *)&DevActionGlobal,0,sizeof(BLV_DevAction_Manage_G)); //ȫ<>ֲ<EFBFBD><D6B2><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>0
|
memset((void *)&DevActionGlobal,0,sizeof(BLV_DevAction_Manage_G)); //ȫ<>ֲ<EFBFBD><D6B2><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>0
|
||||||
|
|
||||||
|
BUS485_Info.port_mode = Port_Normal_Mode;
|
||||||
|
|
||||||
//SRAM_PowerOn_Restore_ParaInfo();
|
//SRAM_PowerOn_Restore_ParaInfo();
|
||||||
|
|
||||||
DevAction_CondData_Init(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
|
DevAction_CondData_Init(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
|
||||||
@@ -1041,7 +1043,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_LogicInfo_TempProce
|
|||||||
|
|
||||||
strncpy(temp_str,(const char *)&data[temp_len],7);
|
strncpy(temp_str,(const char *)&data[temp_len],7);
|
||||||
temp_data = temp_str[0]*256+temp_str[1];
|
temp_data = temp_str[0]*256+temp_str[1];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>: %04d-%02d-%02d %02d:%02d:%02d \r\n",temp_data,temp_str[2],temp_str[3],temp_str[4],temp_str[5],temp_str[6]);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>: %d-%d-%d %d:%d:%d \r\n",temp_data,temp_str[2],temp_str[3],temp_str[4],temp_str[5],temp_str[6]);
|
||||||
temp_len += 7;
|
temp_len += 7;
|
||||||
|
|
||||||
strncpy(temp_str,(const char *)&data[temp_len],32);
|
strncpy(temp_str,(const char *)&data[temp_len],32);
|
||||||
@@ -1258,10 +1260,10 @@ __attribute__((section(".non_0_wait"))) uint8_t Read_LogicFile_Information(uint8
|
|||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!");
|
||||||
}
|
}
|
||||||
}else{
|
}else{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",temp_len);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",temp_len);
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ!%02X %02X",Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_L) , Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_H));
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ!%X %X",Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_L) , Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_H));
|
||||||
}
|
}
|
||||||
|
|
||||||
return rev;
|
return rev;
|
||||||
@@ -1492,6 +1494,67 @@ __attribute__((section(".non_0_wait"))) uint8_t Logic_DeviceType_Legal_Judgment(
|
|||||||
return rev;
|
return rev;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : LogicFile_Device_Info_Struct_Assignment
|
||||||
|
* Description : <20><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ<EFBFBD>帳ֵ
|
||||||
|
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
- *<2A>豸<EFBFBD><E8B1B8>ַ - 1Byte
|
||||||
|
- *<2A>豸<EFBFBD>˿<EFBFBD> - 1Byte
|
||||||
|
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||||
|
- *<2A>豸Э<E8B1B8><D0AD><EFBFBD>汾 - 1Byte
|
||||||
|
- *<2A>豸ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
- *<2A>豸ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
|
||||||
|
- *<2A><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 4Byte
|
||||||
|
- *<2A><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
- *<2A><><EFBFBD>豸<EFBFBD><E8B1B8>ַ - 1Byte
|
||||||
|
- *<2A><><EFBFBD>豸<EFBFBD>˿<EFBFBD> - 1Byte
|
||||||
|
- *<2A><EFBFBD><DEBF>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>· - 5Byte
|
||||||
|
- *˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 10Byte
|
||||||
|
- *<2A><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD> - 42Byte
|
||||||
|
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> - 1Byte
|
||||||
|
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> - 1Byte
|
||||||
|
* Return :
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t LogicFile_Device_Info_Struct_Assignment(uint8_t *data,LOGICFILE_DEVICE_INFO *dev_info)
|
||||||
|
{
|
||||||
|
dev_info->type = data[0];
|
||||||
|
dev_info->addr = data[1];
|
||||||
|
dev_info->port = data[2];
|
||||||
|
|
||||||
|
dev_info->baud = data[6];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= data[5];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= data[4];
|
||||||
|
dev_info->baud <<= 8;
|
||||||
|
dev_info->baud |= data[3];
|
||||||
|
|
||||||
|
dev_info->version = data[7];
|
||||||
|
dev_info->retry = data[8];
|
||||||
|
dev_info->writ_time = data[10];
|
||||||
|
dev_info->writ_time <<= 8;
|
||||||
|
dev_info->writ_time |= data[9];
|
||||||
|
|
||||||
|
memcpy(dev_info->ipaddr,&data[11],4);
|
||||||
|
|
||||||
|
dev_info->parent_type = data[15];
|
||||||
|
dev_info->parent_addr = data[16];
|
||||||
|
dev_info->parent_port = data[17];
|
||||||
|
|
||||||
|
memcpy(dev_info->lin,&data[18],5);
|
||||||
|
memcpy(dev_info->priproperty,&data[23],10);
|
||||||
|
memcpy(dev_info->remain,&data[33],42);
|
||||||
|
dev_info->input_num = data[76];
|
||||||
|
dev_info->input_num <<= 8;
|
||||||
|
dev_info->input_num |= data[75];
|
||||||
|
|
||||||
|
dev_info->output_num = data[78];
|
||||||
|
dev_info->output_num <<= 8;
|
||||||
|
dev_info->output_num |= data[77];
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Logic_FrameType_DeviceExist_TempProcessing
|
* Function Name : Logic_FrameType_DeviceExist_TempProcessing
|
||||||
* Description : <20><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
* Description : <20><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
@@ -1505,11 +1568,13 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceExist_TempPro
|
|||||||
uint16_t len)
|
uint16_t len)
|
||||||
{
|
{
|
||||||
uint32_t temp_len = 0;
|
uint32_t temp_len = 0;
|
||||||
char temp_str[38] = {0};
|
//char temp_str[38] = {0};
|
||||||
LOGICFILE_DEVICE_INFO temp_dev_info;
|
LOGICFILE_DEVICE_INFO temp_dev_info;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
memcpy(&temp_dev_info,data,sizeof(LOGICFILE_DEVICE_INFO));
|
if(len < LogicFile_DeviceInfo_InputSet) return;
|
||||||
|
|
||||||
|
LogicFile_Device_Info_Struct_Assignment(data,&temp_dev_info);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_dev_info.type,Logic_Info_DeviceType_To_String(temp_dev_info.type));
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_dev_info.type,Logic_Info_DeviceType_To_String(temp_dev_info.type));
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_dev_info.addr);
|
||||||
@@ -1535,12 +1600,12 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceExist_TempPro
|
|||||||
temp_len += temp_dev_info.input_num*4;
|
temp_len += temp_dev_info.input_num*4;
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·*32Byte 2022-06-07 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȸ<EFBFBD>Ϊ32Byte*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·*32Byte 2022-06-07 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȸ<EFBFBD>Ϊ32Byte*/
|
||||||
for(uint16_t i=0;i<temp_dev_info.output_num;i++)
|
// for(uint16_t i=0;i<temp_dev_info.output_num;i++)
|
||||||
{
|
// {
|
||||||
memcpy(temp_str,&data[temp_len],32);
|
// memcpy(temp_str,&data[temp_len],32);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d - %s",i+1,temp_str);
|
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d - %s",i+1,temp_str);
|
||||||
temp_len += 32;
|
// temp_len += 32;
|
||||||
}
|
// }
|
||||||
|
|
||||||
Lfile_info->device_num += 1;
|
Lfile_info->device_num += 1;
|
||||||
|
|
||||||
@@ -1731,6 +1796,17 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Action_Data_Analysis(u
|
|||||||
|
|
||||||
LOGIC_DEVICE_ACTIVE_G temp_active;
|
LOGIC_DEVICE_ACTIVE_G temp_active;
|
||||||
memcpy(&temp_active,data,sizeof(LOGIC_DEVICE_ACTIVE_G));
|
memcpy(&temp_active,data,sizeof(LOGIC_DEVICE_ACTIVE_G));
|
||||||
|
|
||||||
|
temp_active.type = data[0];
|
||||||
|
temp_active.addr = data[1];
|
||||||
|
temp_active.loop = data[3];
|
||||||
|
temp_active.loop <<= 8;
|
||||||
|
temp_active.loop |= data[2];
|
||||||
|
temp_active.execute = data[4];
|
||||||
|
temp_active.content = data[5];
|
||||||
|
temp_active.delay_time = data[6];
|
||||||
|
temp_active.delay_unit = data[7];
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"****************************");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"****************************");
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_active.type,Logic_Info_DeviceType_To_String(temp_active.type));
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_active.type,Logic_Info_DeviceType_To_String(temp_active.type));
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_active.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_active.addr);
|
||||||
@@ -2426,7 +2502,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
|
|||||||
char temp_str[38] = {0};
|
char temp_str[38] = {0};
|
||||||
uint32_t temp_len = 0;
|
uint32_t temp_len = 0;
|
||||||
uint32_t temp_data = 0;
|
uint32_t temp_data = 0;
|
||||||
uint8_t temp_num = 0;
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
Lfile_info->active_num += 1;
|
Lfile_info->active_num += 1;
|
||||||
@@ -2448,46 +2524,46 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
|
|||||||
temp_len += 2;
|
temp_len += 2;
|
||||||
|
|
||||||
temp_data = Data_Uint8_Convert_To_Uint16(&data[temp_len]);
|
temp_data = Data_Uint8_Convert_To_Uint16(&data[temp_len]);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>:0x%04x",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>:0x%x",temp_data);
|
||||||
temp_len += 2;
|
temp_len += 2;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Logic_Info_DeviceAction_Condition_To_String(&data[temp_len]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
Logic_Info_DeviceAction_Condition_To_String(&data[temp_len]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>5:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>5:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>7:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>7:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32Byte
|
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32Byte
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
strncpy(temp_str,(const char *)&data[temp_len],32);
|
strncpy(temp_str,(const char *)&data[temp_len],32);
|
||||||
@@ -2502,7 +2578,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
|
|||||||
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD>
|
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X",temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X",temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
|
|
||||||
if((temp_len + temp_data*8) > len)
|
if((temp_len + temp_data*8) > len)
|
||||||
@@ -2510,18 +2586,8 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
|
|||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%d - %d",temp_len + temp_data*8,len);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%d - %d",temp_len + temp_data*8,len);
|
||||||
return ;
|
return ;
|
||||||
}
|
}
|
||||||
temp_num = temp_data;
|
|
||||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
for(uint16_t i=0;i<temp_num;i++)
|
|
||||||
{
|
|
||||||
Logic_Device_Action_Data_Analysis(&data[temp_len]);
|
|
||||||
|
|
||||||
temp_len+=8;
|
|
||||||
}
|
|
||||||
|
|
||||||
#if LOGIC_FILE_EN
|
|
||||||
Logic_DevAction_Add(data, len);
|
Logic_DevAction_Add(data, len);
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -2675,7 +2741,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
|
|||||||
for(uint8_t i = 0; i < 11; i++)
|
for(uint8_t i = 0; i < 11; i++)
|
||||||
{
|
{
|
||||||
temp_data = data[temp_len];
|
temp_data = data[temp_len];
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>˿<EFBFBD>%02d״̬:%d",i,temp_data);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>˿<EFBFBD>%d״̬:%d",i,temp_data);
|
||||||
temp_len += 1;
|
temp_len += 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -2700,7 +2766,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
|
|||||||
DevActionGlobal.VC_ConNToSGruop = data[1];
|
DevActionGlobal.VC_ConNToSGruop = data[1];
|
||||||
|
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConNToSSubset);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConNToSSubset);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@@ -2719,7 +2785,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
|
|||||||
{
|
{
|
||||||
DevActionGlobal.VC_ConSToNGruop = data[1];
|
DevActionGlobal.VC_ConSToNGruop = data[1];
|
||||||
}
|
}
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConSToNSubset);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConSToNSubset);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@@ -2778,7 +2844,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCPortInfor_TempPro
|
|||||||
|
|
||||||
SRAM_DMA_Write_Buff(data,sizeof(VPORT_INFO_STRUCT), list_addr); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SRAM_DMA_Write_Buff(data,sizeof(VPORT_INFO_STRUCT), list_addr); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
DevActionGlobal.VC_PortNum++;
|
DevActionGlobal.VC_PortNum++;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD>˿ڵ<CBBF>ַ:%08X <20><>ǰ<EFBFBD>˿ڼ<CBBF><DABC><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_PortNum); //
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD>˿ڵ<CBBF>ַ:%X <20><>ǰ<EFBFBD>˿ڼ<CBBF><DABC><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_PortNum); //
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
@@ -2940,7 +3006,7 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
|
|||||||
data_crc <<= 8;
|
data_crc <<= 8;
|
||||||
data_crc |= Temp_Flash_Buff[Logic_D_CRC_L];
|
data_crc |= Temp_Flash_Buff[Logic_D_CRC_L];
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>:%04X %04X",data_crc,temp_crc);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>:%X %X",data_crc,temp_crc);
|
||||||
|
|
||||||
if(data_crc == temp_crc)
|
if(data_crc == temp_crc)
|
||||||
{
|
{
|
||||||
@@ -2977,11 +3043,11 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
|
|||||||
break;
|
break;
|
||||||
case Logic_FrameType_DeviceExist:
|
case Logic_FrameType_DeviceExist:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceExist - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceExist - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
|
||||||
//Logic_FrameType_DeviceExist_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_DeviceExist_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
case Logic_FrameType_DeviceAction:
|
case Logic_FrameType_DeviceAction:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceAction - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceAction - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
|
||||||
//Logic_FrameType_DeviceAction_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_DeviceAction_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
#if RS485_MUSIC_BLW_Flag
|
#if RS485_MUSIC_BLW_Flag
|
||||||
case Logic_FrameType_VoiceMap:
|
case Logic_FrameType_VoiceMap:
|
||||||
@@ -2996,33 +3062,38 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
|
|||||||
#endif
|
#endif
|
||||||
#if Dev_Nor_VirtualCard_Flag
|
#if Dev_Nor_VirtualCard_Flag
|
||||||
case Logic_FrameType_VCCondition:
|
case Logic_FrameType_VCCondition:
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCCondition - <20><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ");
|
||||||
Logic_FrameType_VCCondition_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_VCCondition_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
case Logic_FrameType_VCPortInfor:
|
case Logic_FrameType_VCPortInfor:
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCPortInfor - <20><EFBFBD>ȡ<EFBFBD><C8A1>ӳ<EFBFBD><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ");
|
||||||
Logic_FrameType_VCPortInfor_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_VCPortInfor_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
case Logic_FrameType_VCProperty:
|
case Logic_FrameType_VCProperty:
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCProperty - <20><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
|
||||||
Logic_FrameType_VCProperty_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_VCProperty_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
case Logic_FrameType_ColorTempMap:
|
case Logic_FrameType_ColorTempMap:
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_ColorTempMap - ɫ<><C9AB>ӳ<EFBFBD><D3B3>");
|
||||||
Logic_FrameType_ColorTempMap_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
Logic_FrameType_ColorTempMap_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_Error - %d",Temp_Flash_Buff[Logic_D_FrameType]);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
read_addr+=temp_len-1;
|
read_addr+=temp_len-1;
|
||||||
i+=temp_len - 1;
|
i+=temp_len - 1;
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!%04X %04X",data_crc,temp_crc);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!%X %X",data_crc,temp_crc);
|
||||||
}
|
}
|
||||||
|
|
||||||
}else{
|
}else{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",read_addr,temp_len);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",read_addr,temp_len);
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %08x",i,read_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %x",i,read_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
read_addr++;
|
read_addr++;
|
||||||
@@ -3034,7 +3105,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
{
|
{
|
||||||
LOGICFILE_DEVICE_INFO temp_dev_info;
|
LOGICFILE_DEVICE_INFO temp_dev_info;
|
||||||
|
|
||||||
memcpy(&temp_dev_info,data,sizeof(LOGICFILE_DEVICE_INFO));
|
LogicFile_Device_Info_Struct_Assignment(data,&temp_dev_info);
|
||||||
|
|
||||||
if(temp_dev_info.port != type)
|
if(temp_dev_info.port != type)
|
||||||
{
|
{
|
||||||
@@ -3048,16 +3119,16 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
switch(temp_dev_info.type)
|
switch(temp_dev_info.type)
|
||||||
{
|
{
|
||||||
case Dev_Host_HVout:
|
case Dev_Host_HVout:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
case Dev_BUS_C5IO:
|
case Dev_BUS_C5IO:
|
||||||
|
|
||||||
BLV_BUS_CSIO_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_BUS_CSIO_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
case DEV_C5MUSIC_Type:
|
case DEV_C5MUSIC_Type:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_BUS_C5MUSIC_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_BUS_C5MUSIC_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
#if RS485_LED_Flag
|
#if RS485_LED_Flag
|
||||||
case DEV_RS485_PWM:
|
case DEV_RS485_PWM:
|
||||||
@@ -3084,21 +3155,21 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
switch(temp_dev_info.type)
|
switch(temp_dev_info.type)
|
||||||
{
|
{
|
||||||
case Dev_Host_HVout:
|
case Dev_Host_HVout:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
case DEV_RS485_SWT: //<2F><><EFBFBD><EFBFBD>
|
case DEV_RS485_SWT: //<2F><><EFBFBD><EFBFBD>
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
|
BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
case DEV_RS485_TEMP:
|
case DEV_RS485_TEMP:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLW_RS485_TempFun_For_Logic_Init(&temp_dev_info,data,len);
|
BLW_RS485_TempFun_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
#if Dev_485_Card_Polling_Flag
|
#if Dev_485_Card_Polling_Flag
|
||||||
case DEV_RS485_CARD:
|
case DEV_RS485_CARD:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>Ӳ忨ȡ<EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>Ӳ忨ȡ<EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_RS485_Card_Data_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_RS485_Card_Data_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
#endif
|
#endif
|
||||||
#if Dev_485_IrSend_Polling_Flag
|
#if Dev_485_IrSend_Polling_Flag
|
||||||
@@ -3174,8 +3245,8 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
switch(temp_dev_info.type)
|
switch(temp_dev_info.type)
|
||||||
{
|
{
|
||||||
case Dev_Host_HVout:
|
case Dev_Host_HVout:
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
#if RS485_Dev_IN_CH6
|
#if RS485_Dev_IN_CH6
|
||||||
case Dev_Host_LVinput:
|
case Dev_Host_LVinput:
|
||||||
@@ -3192,8 +3263,8 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
#endif
|
#endif
|
||||||
case DEV_RS485_SWT:
|
case DEV_RS485_SWT:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLW_RS485_Switch_Init(DEVDATALEN, &DevBuf[DEVDATALEN*i]);//<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>˿ڼ<CBBF><DABC><EFBFBD><EFBFBD>ں<EFBFBD><DABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
//BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
|
BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
break;
|
break;
|
||||||
case DEV_RS485_TEMP:
|
case DEV_RS485_TEMP:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
@@ -3303,7 +3374,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
case Dev_Host_Service:
|
case Dev_Host_Service:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
|
|
||||||
//BLV_Nor_Dev_Service_For_Logic_Init(&temp_dev_info,data,len);
|
BLV_Nor_Dev_Service_For_Logic_Init(&temp_dev_info,data,len);
|
||||||
NorDevInfoGlobal.NorDeviceNum += 1;
|
NorDevInfoGlobal.NorDeviceNum += 1;
|
||||||
break;
|
break;
|
||||||
case Dev_Host_LVinput:
|
case Dev_Host_LVinput:
|
||||||
@@ -3317,7 +3388,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
|
|||||||
break;
|
break;
|
||||||
case Dev_Host_LVoutput:
|
case Dev_Host_LVoutput:
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
|
||||||
//BLV_Nor_Dev_LVoutput_Init(temp_dev_info.addr);
|
BLV_Nor_Dev_LVoutput_Init(temp_dev_info.addr);
|
||||||
NorDevInfoGlobal.NorDeviceNum += 1;
|
NorDevInfoGlobal.NorDeviceNum += 1;
|
||||||
break;
|
break;
|
||||||
case Dev_NodeCurtain:
|
case Dev_NodeCurtain:
|
||||||
@@ -3478,10 +3549,10 @@ __attribute__((section(".non_0_wait"))) void Logic_File_Device_Init(LOGICFILE_Co
|
|||||||
}
|
}
|
||||||
|
|
||||||
}else{
|
}else{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",read_addr,temp_len);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",read_addr,temp_len);
|
||||||
}
|
}
|
||||||
}else {
|
}else {
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %08x",i,read_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %x",i,read_addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
read_addr++;
|
read_addr++;
|
||||||
@@ -3503,9 +3574,9 @@ __attribute__((section(".non_0_wait"))) void SRAM_Dev_Data_Check(void)
|
|||||||
for(i = 0; i < DevActionGlobal.DevNum; i++)
|
for(i = 0; i < DevActionGlobal.DevNum; i++)
|
||||||
{
|
{
|
||||||
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
|
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), Dev_processing_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
BLV_Device_PublicInfo_Read_To_Struct(Dev_processing_addr,&BUS_Public);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD>±<EFBFBD>:%d,<2C><>ַ:%08X<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d", i, Dev_processing_addr, BUS_Public.type, BUS_Public.addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD>±<EFBFBD>:%d,<2C><>ַ:%X<><58><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d", i, Dev_processing_addr, BUS_Public.type, BUS_Public.addr);
|
||||||
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit,"BUS_Public Data:",(uint8_t *)&BUS_Public, sizeof(BUS_Public));
|
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit,"BUS_Public Data:",(uint8_t *)&BUS_Public, sizeof(BUS_Public));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -3551,7 +3622,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
|
|
||||||
if((file_len != 0x00) &&(file_len >= 0x70000))
|
if((file_len != 0x00) &&(file_len >= 0x70000))
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%08X",file_len);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%X",file_len);
|
||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -3658,10 +3729,10 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
/*BLV_BUS<55>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
|
/*BLV_BUS<55>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
|
||||||
UARTx_Init(UART_3,BUS485_Info.baud);
|
UARTx_Init(UART_3,BUS485_Info.baud);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Device Info Endaddr:%08X ---",SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Device Info Endaddr:%X ---",SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
|
||||||
|
|
||||||
Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
|
Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Poll485_Info addr:%08X ----",Poll485_Info.Last_list_addr);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Poll485_Info addr:%X ----",Poll485_Info.Last_list_addr);
|
||||||
|
|
||||||
SRAM_Write_DW(Poll485_Info.Last_list_addr,SRAM_POLL_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC>Polling<6E><67>ʼ<EFBFBD><CABC>ַ
|
SRAM_Write_DW(Poll485_Info.Last_list_addr,SRAM_POLL_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC>Polling<6E><67>ʼ<EFBFBD><CABC>ַ
|
||||||
|
|
||||||
@@ -3716,7 +3787,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
|
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Poll485_Info.device_num);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Poll485_Info.device_num);
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_POLL_dev END:%08X",SRAM_Read_DW(SRAM_POLL_Device_List_Addr));
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_POLL_dev END:%X",SRAM_Read_DW(SRAM_POLL_Device_List_Addr));
|
||||||
|
|
||||||
/*<2A>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
|
/*<2A>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
|
||||||
Poll485_Info.port_mode = Port_Normal_Mode;
|
Poll485_Info.port_mode = Port_Normal_Mode;
|
||||||
@@ -3733,7 +3804,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
|
|
||||||
|
|
||||||
Act485_Info.Last_list_addr = SRAM_Read_DW(SRAM_POLL_Device_List_Addr); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
Act485_Info.Last_list_addr = SRAM_Read_DW(SRAM_POLL_Device_List_Addr); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485_Info addr:%08X ----",Act485_Info.Last_list_addr);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485_Info addr:%X ----",Act485_Info.Last_list_addr);
|
||||||
SRAM_Write_DW(Act485_Info.Last_list_addr,SRAM_ACTIVE_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ʼ<EFBFBD><CABC>ַ
|
SRAM_Write_DW(Act485_Info.Last_list_addr,SRAM_ACTIVE_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ʼ<EFBFBD><CABC>ַ
|
||||||
Act485_Info.device_num = 0;
|
Act485_Info.device_num = 0;
|
||||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||||
@@ -3781,15 +3852,15 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
/*<2A><><EFBFBD>Ӳ<EFBFBD><D3B2>Խӿ<D4BD>*/
|
/*<2A><><EFBFBD>Ӳ<EFBFBD><D3B2>Խӿ<D4BD>*/
|
||||||
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PC<EFBFBD><EFBFBD><EFBFBD>Խӿ<EFBFBD> ");
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PC<EFBFBD><EFBFBD><EFBFBD>Խӿ<EFBFBD> ");
|
||||||
//BLV_PC_DEVICE_TEST_Init();
|
BLV_PC_DEVICE_TEST_Init();
|
||||||
//Act485_Info.device_num += 1;
|
Act485_Info.device_num += 1;
|
||||||
|
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>忨״̬ͬ<CCAC><CDAC><EFBFBD>豸");
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>忨״̬ͬ<CCAC><CDAC><EFBFBD>豸");
|
||||||
//BLW_RS485_CardState_AddTo_ActivePort(); //2023-10-31
|
//BLW_RS485_CardState_AddTo_ActivePort(); //2023-10-31
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Act485_Info.device_num);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Act485_Info.device_num);
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Active Device End List:%08X" , SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr));
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Active Device End List:%X" , SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr));
|
||||||
|
|
||||||
Act485_Info.Act_Start = B_IDLE;
|
Act485_Info.Act_Start = B_IDLE;
|
||||||
Act485_Info.baud = 9600;
|
Act485_Info.baud = 9600;
|
||||||
@@ -3798,12 +3869,11 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>*/
|
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>*/
|
||||||
UARTx_Init(UART_2,Act485_Info.baud);
|
UARTx_Init(UART_2,Act485_Info.baud);
|
||||||
|
|
||||||
|
|
||||||
temp = SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr);
|
temp = SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr);
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485 Device Info Endaddr:%08X ----",temp);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485 Device Info Endaddr:%X ----",temp);
|
||||||
|
|
||||||
SRAM_Write_DW(temp,SRAM_NORMAL_Device_List_Addr);
|
SRAM_Write_DW(temp,SRAM_NORMAL_Device_List_Addr);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%08X",temp);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X",temp);
|
||||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸
|
||||||
for(uint8_t i=0;i<Lfile_stat.Nor_device_num;i++)
|
for(uint8_t i=0;i<Lfile_stat.Nor_device_num;i++)
|
||||||
{
|
{
|
||||||
@@ -3855,7 +3925,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
|
|||||||
//NorDevInfoGlobal.NorDeviceNum++;
|
//NorDevInfoGlobal.NorDeviceNum++;
|
||||||
|
|
||||||
temp = SRAM_Read_DW(SRAM_NORMAL_Device_List_Addr);
|
temp = SRAM_Read_DW(SRAM_NORMAL_Device_List_Addr);
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Nor Device Info Endaddr:%08X ----",temp);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Nor Device Info Endaddr:%X ----",temp);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD> - ɫ<>µ<EFBFBD><C2B5>ڻ<EFBFBD>·ӳ<C2B7><D3B3><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD> - ɫ<>µ<EFBFBD><C2B5>ڻ<EFBFBD>·ӳ<C2B7><D3B3><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
|
||||||
// if(Lfile_stat.ColorTemp_Map_Addr != 0x00)
|
// if(Lfile_stat.ColorTemp_Map_Addr != 0x00)
|
||||||
|
|||||||
@@ -50,6 +50,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
|
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
|
||||||
|
|
||||||
|
g_uart[UART_0].RX_Buffer_ReadAddr = SRAM_UART0_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_0].TX_Buffer_ReadAddr = SRAM_UART0_SendBuffer_Start_Addr;
|
||||||
|
g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
|
||||||
break;
|
break;
|
||||||
case UART_1:
|
case UART_1:
|
||||||
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
||||||
@@ -69,6 +73,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
|
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
|
||||||
|
|
||||||
|
g_uart[UART_1].RX_Buffer_ReadAddr = SRAM_UART1_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_1].TX_Buffer_ReadAddr = SRAM_UART1_SendBuffer_Start_Addr;
|
||||||
|
g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
|
||||||
break;
|
break;
|
||||||
case UART_2:
|
case UART_2:
|
||||||
UART2_BaudRateCfg(buad);
|
UART2_BaudRateCfg(buad);
|
||||||
@@ -86,6 +94,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
|
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
|
||||||
|
|
||||||
|
g_uart[UART_2].RX_Buffer_ReadAddr = SRAM_UART2_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_2].TX_Buffer_ReadAddr = SRAM_UART2_SendBuffer_Start_Addr;
|
||||||
|
g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
|
||||||
break;
|
break;
|
||||||
case UART_3:
|
case UART_3:
|
||||||
UART3_BaudRateCfg(buad);
|
UART3_BaudRateCfg(buad);
|
||||||
@@ -103,6 +115,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
||||||
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
|
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
|
||||||
|
|
||||||
|
g_uart[UART_3].RX_Buffer_ReadAddr = SRAM_UART3_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
|
||||||
|
g_uart[UART_3].TX_Buffer_ReadAddr = SRAM_UART3_SendBuffer_Start_Addr;
|
||||||
|
g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
@@ -244,10 +260,18 @@ __attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
|
|||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
|
||||||
|
|
||||||
|
g_uart[UART_0].Receiving = 0;
|
||||||
|
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
if( g_uart[UART_0].RX_Buffer_WriteAddr < SRAM_UART0_RecvBuffer_Start_Addr) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
|
||||||
|
SRAM_Write_Byte((uint8_t)(g_uart[UART_0].RecvLen & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr);
|
||||||
|
SRAM_Write_Byte((uint8_t)((g_uart[UART_0].RecvLen >> 8) & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr+1);
|
||||||
|
SRAM_DMA_Write_Buff(g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen,g_uart[UART_0].RX_Buffer_WriteAddr+2);
|
||||||
|
|
||||||
|
g_uart[UART_0].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||||
|
if( g_uart[UART_0].RX_Buffer_WriteAddr > SRAM_UART0_RecvBuffer_End_Addr ) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
|
||||||
|
|
||||||
g_uart[UART_0].RecvLen = 0;
|
g_uart[UART_0].RecvLen = 0;
|
||||||
g_uart[UART_0].Receiving = 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -270,7 +294,10 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
|
|||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
|
||||||
|
|
||||||
|
g_uart[UART_1].Receiving = 0;
|
||||||
|
|
||||||
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
if( g_uart[UART_1].RX_Buffer_WriteAddr < SRAM_UART1_RecvBuffer_Start_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
|
||||||
SRAM_Write_Byte((uint8_t)(g_uart[UART_1].RecvLen & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr);
|
SRAM_Write_Byte((uint8_t)(g_uart[UART_1].RecvLen & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr);
|
||||||
SRAM_Write_Byte((uint8_t)((g_uart[UART_1].RecvLen >> 8) & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr+1);
|
SRAM_Write_Byte((uint8_t)((g_uart[UART_1].RecvLen >> 8) & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr+1);
|
||||||
SRAM_DMA_Write_Buff(g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen,g_uart[UART_1].RX_Buffer_WriteAddr+2);
|
SRAM_DMA_Write_Buff(g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen,g_uart[UART_1].RX_Buffer_WriteAddr+2);
|
||||||
@@ -279,7 +306,6 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
|
|||||||
if(g_uart[UART_1].RX_Buffer_WriteAddr > SRAM_UART1_RecvBuffer_End_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
|
if(g_uart[UART_1].RX_Buffer_WriteAddr > SRAM_UART1_RecvBuffer_End_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
|
||||||
|
|
||||||
g_uart[UART_1].RecvLen = 0;
|
g_uart[UART_1].RecvLen = 0;
|
||||||
g_uart[UART_1].Receiving = 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -304,10 +330,19 @@ __attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
|
|||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
|
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
|
||||||
|
|
||||||
|
g_uart[UART_2].Receiving = 0;
|
||||||
|
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
if( g_uart[UART_2].RX_Buffer_WriteAddr < SRAM_UART2_RecvBuffer_Start_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
|
||||||
|
SRAM_Write_Byte((uint8_t)(g_uart[UART_2].RecvLen & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr);
|
||||||
|
SRAM_Write_Byte((uint8_t)((g_uart[UART_2].RecvLen >> 8) & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr+1);
|
||||||
|
SRAM_DMA_Write_Buff(g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen,g_uart[UART_2].RX_Buffer_WriteAddr+2);
|
||||||
|
|
||||||
|
g_uart[UART_2].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||||
|
if(g_uart[UART_2].RX_Buffer_WriteAddr > SRAM_UART2_RecvBuffer_End_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
|
||||||
|
|
||||||
g_uart[UART_2].RecvLen = 0;
|
g_uart[UART_2].RecvLen = 0;
|
||||||
g_uart[UART_2].Receiving = 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -329,13 +364,21 @@ __attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
|
|||||||
{
|
{
|
||||||
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
|
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
|
||||||
|
|
||||||
|
g_uart[UART_3].Receiving = 0;
|
||||||
|
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
if( g_uart[UART_3].RX_Buffer_WriteAddr < SRAM_UART3_RecvBuffer_Start_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
|
||||||
|
SRAM_Write_Byte((uint8_t)(g_uart[UART_3].RecvLen & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr);
|
||||||
|
SRAM_Write_Byte((uint8_t)((g_uart[UART_3].RecvLen >> 8) & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr+1);
|
||||||
|
SRAM_DMA_Write_Buff(g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen,g_uart[UART_3].RX_Buffer_WriteAddr+2);
|
||||||
|
|
||||||
|
g_uart[UART_3].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||||
|
if(g_uart[UART_3].RX_Buffer_WriteAddr > SRAM_UART3_RecvBuffer_End_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
|
||||||
|
|
||||||
g_uart[UART_3].RecvLen = 0;
|
g_uart[UART_3].RecvLen = 0;
|
||||||
g_uart[UART_3].Receiving = 0;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
12
Readme.md
12
Readme.md
@@ -1,3 +1,15 @@
|
|||||||
|
#### 2026-01-05
|
||||||
|
|
||||||
|
1、CSIO 继电器单独一个设备存放在BUS设备列表中,应该将这个设备存放到虚拟设备上 - 不合理的地方,待修改
|
||||||
|
|
||||||
|
2、调试BUS总线通讯 - OK
|
||||||
|
|
||||||
|
3、动作执行 - 网络控制继电器 OK
|
||||||
|
|
||||||
|
4、增加C5继电器设备
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#### 2025-12-25
|
#### 2025-12-25
|
||||||
|
|
||||||
1、TFTP升级 - 配置文件初步测试没问题
|
1、TFTP升级 - 配置文件初步测试没问题
|
||||||
|
|||||||
@@ -8,6 +8,7 @@
|
|||||||
#ifndef USER_INCLUDES_H_
|
#ifndef USER_INCLUDES_H_
|
||||||
#define USER_INCLUDES_H_
|
#define USER_INCLUDES_H_
|
||||||
|
|
||||||
|
#include <blv_nor_dev_virtualcard.h>
|
||||||
#include "ch564.h"
|
#include "ch564.h"
|
||||||
#include "system_ch564.h"
|
#include "system_ch564.h"
|
||||||
|
|
||||||
@@ -46,9 +47,10 @@
|
|||||||
#include "blv_rs485_dev_c12dimming.h"
|
#include "blv_rs485_dev_c12dimming.h"
|
||||||
#include "blv_rs485_dev_touchswitch.h"
|
#include "blv_rs485_dev_touchswitch.h"
|
||||||
#include "blv_rs485_dev_touchtempt1.h"
|
#include "blv_rs485_dev_touchtempt1.h"
|
||||||
#include "blv_nor_dec_virtualcard.h"
|
|
||||||
#include "blv_nor_dev_hvoutfun.h"
|
#include "blv_nor_dev_hvoutfun.h"
|
||||||
|
#include "blv_nor_dev_c5relay.h"
|
||||||
#include "blv_nor_dev_lvinput.h"
|
#include "blv_nor_dev_lvinput.h"
|
||||||
|
#include "blv_nor_dev_lvoutput.h"
|
||||||
#include "blv_nor_dev_serviceinfo.h"
|
#include "blv_nor_dev_serviceinfo.h"
|
||||||
#include "blv_rs485_dev_energymonitor.h"
|
#include "blv_rs485_dev_energymonitor.h"
|
||||||
|
|
||||||
|
|||||||
15
User/main.c
15
User/main.c
@@ -43,9 +43,11 @@ int main(void)
|
|||||||
|
|
||||||
WCHNET_LIB_Init();
|
WCHNET_LIB_Init();
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! 2025-11-03-10:42\r\n");
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! \r\n");
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SystemClk:%d\r\n", SystemCoreClock);
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SystemClk:%d\r\n", SystemCoreClock);
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"DEV_ACTION_INFO Size:%d \r\n",sizeof(DEV_ACTION_INFO));
|
||||||
|
|
||||||
BLV_DevAction_AllData_Init();
|
BLV_DevAction_AllData_Init();
|
||||||
|
|
||||||
while (1)
|
while (1)
|
||||||
@@ -57,12 +59,15 @@ int main(void)
|
|||||||
UART2_RECEIVE();
|
UART2_RECEIVE();
|
||||||
UART3_RECEIVE();
|
UART3_RECEIVE();
|
||||||
|
|
||||||
if(SysTick_1ms - test_tick >= 10000){
|
BLV_BUS485Port_ModeTask();
|
||||||
test_tick = SysTick_1ms;
|
|
||||||
|
|
||||||
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"RUN PYH:%x...\r\n",ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR));
|
BLV_PollPort_ModeTask();
|
||||||
|
|
||||||
}
|
BLV_ActivePort_ModeTask();
|
||||||
|
|
||||||
|
//BLV_Nor_Dev_ModeTask();
|
||||||
|
|
||||||
|
BLV_DevAction_Task();
|
||||||
|
|
||||||
NetWork_Task();
|
NetWork_Task();
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user