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BLV主机C1P模块
This commit is contained in:
caocong
2025-12-06 13:49:01 +08:00
commit d2d8800788
118 changed files with 47572 additions and 0 deletions
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MCU_Driver/blv_authorize.c Normal file
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/*
* blv_authorize.c
*
* Created on: Nov 8, 2025
* Author: cc
*/
#include "blv_authorize.h"
#include "SPI_SRAM.h"
#include "rw_logging.h"
#include "sram_mem_addr.h"
#include <string.h>
BLV_AUTHORIZE sys_authorize;
/*******************************************************************************
* Function Name : BLV_Set_Authorize_Status
* Description : <20><><EFBFBD><EFBFBD>BLVϵͳ<CFB5><CDB3>Ȩ״̬
* Input :
expires_time :<3A><>Ȩʱ<C8A8><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void BLV_Set_Authorize_Status(uint32_t Expires_time,uint8_t lock)
{
memset(&sys_authorize,0,sizeof(BLV_AUTHORIZE));
sys_authorize.lock_status = lock;
sys_authorize.expires_time = Expires_time;
}
/*******************************************************************************
* Function Name : BLV_Authorize_Processing
* Description : BLVϵͳ<CFB5><CDB3>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
* Input :
utc_time :<3A><><EFBFBD><EFBFBD>utcʱ<63><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void BLV_Authorize_Processing(uint32_t utc_time)
{
uint32_t temp_tick = utc_time;
uint32_t temp_lock = 0;
if((sys_authorize.expires_time != 0x00) && (temp_tick >= sys_authorize.expires_time ) )
{
sys_authorize.lock_status = 1;
/*<2A><><EFBFBD>⵽ʱ<E2B5BD>䵽<EFBFBD>ں󣬽<DABA><F3A3ACBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC>λ<EFBFBD><CEBB>ͬʱ<CDAC><CAB1><EFBFBD>浽Flash<73><68>*/
temp_lock = SRAM_Read_DW(SRAM_Register_Start_ADDRESS + Register_MandateLock_OFFSET);
if(temp_lock != 0x00000001)
{
SRAM_Write_DW(0x01,SRAM_Register_Start_ADDRESS + Register_MandateLock_OFFSET);
//Retain_Flash_Register_Data();
}
}
}
/*******************************************************************************
* Function Name : Get_Authorize_Lock_Status
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
* Input :
0x00<30><30><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩδ<C8A8><CEB4><EFBFBD><EFBFBD>
0x01<30><31><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Set_Authorize_Lock_Status(uint8_t state)
{
sys_authorize.lock_status = state;
}
/*******************************************************************************
* Function Name : Get_Authorize_Lock_Status
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
* Input : None
* Return :
0x00<30><30><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩδ<C8A8><CEB4><EFBFBD><EFBFBD>
0x01<30><31><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Get_Authorize_Lock_Status(void)
{
if(sys_authorize.expires_time != 0x00) return sys_authorize.lock_status;
return 0x00;
}
/*******************************************************************************
* Function Name : Get_Authorize_UnixTime
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
* Input : None
* Return : <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint32_t Get_Authorize_UnixTime(void)
{
return sys_authorize.expires_time;
}

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MCU_Driver/blv_netcomm_function.c Normal file
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MCU_Driver/blv_rs485_protocol.c Normal file
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/*
* check_fun.c
*
* Created on: Nov 8, 2025
* Author: cc
*/
#include "includes.h"
/*******************************************************************************
* Function Name : Log_CheckSum
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>SRAM<41>ж<EFBFBD>ȡ
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Log_CheckSum(uint32_t addr,uint8_t len)
{
uint8_t data_sum = 0;
for(uint8_t i = 0;i<len;i++)
{
data_sum += SRAM_Read_Byte(addr+i);
}
return ~data_sum;
}
/*******************************************************************************
* Function Name : Data_CheckSum
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Data_CheckSum(uint8_t* data,uint16_t len)
{
uint8_t data_sum = 0;
for(uint16_t i = 0;i<len;i++)
{
data_sum += data[i];
}
return ~data_sum;
}
/*******************************************************************************
* Function Name : CheckSum_Overlook_Check
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>,<2C><><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>
* input: data: <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
len <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>
check_id: У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t CheckSum_Overlook_Check(uint8_t *data, uint16_t len, uint16_t check_id)
{
uint8_t data_sum = 0;
for(uint16_t i = 0;i<len;i++)
{
if(check_id != i) data_sum += data[i];
}
return ~data_sum;
}
/*******************************************************************************
* Function Name : NetCRC16
* Description : CRCУ<43><D0A3> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void NetCRC16(uint8_t *aStr ,uint16_t len)
{
uint16_t alen = len-2; //CRC16
uint16_t xda , xdapoly ;
uint16_t i,j, xdabit ;
xda = 0xFFFF ;
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
for(i=0;i<alen;i++)
{
xda ^= aStr[i] ;
for(j=0;j<8;j++)
{
xdabit = (uint8_t )(xda & 0x01) ;
xda >>= 1 ;
if( xdabit ) xda ^= xdapoly ;
}
}
aStr[alen] = (uint8_t)(xda & 0xFF) ;
aStr[alen+1] = (uint8_t)(xda>>8) ;
}
/*******************************************************************************
* Function Name : NetCRC16_2
* Description : CRCУ<43><D0A3> - <20><>ȡSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
aStr : <20><>ҪУ<D2AA><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
len : <20><><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>512Byte
* Return : <20><><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>ֵ
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint16_t NetCRC16_2(uint8_t *aStr ,uint16_t len)
{
uint16_t xda , xdapoly ;
uint16_t i,j, xdabit ;
xda = 0xFFFF ;
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
for(i=0;i<len;i++)
{
xda ^= aStr[i] ;
for(j=0;j<8;j++)
{
xdabit = (uint8_t )(xda & 0x01) ;
xda >>= 1 ;
if( xdabit ) xda ^= xdapoly ;
}
}
return xda;
}
/*******************************************************************************
* Function Name : NetCRC16_Data
* Description : CRCУ<43><D0A3> - CRC<52>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
aStr : <20><>ҪУ<D2AA><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
len : <20><><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>512Byte
crc_id <20><>CRC<52><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5>±<EFBFBD>λ<EFBFBD>ã<EFBFBD><C3A3>͵<EFBFBD>ַ<EFBFBD><D6B7>ǰ
* Return : <20><><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>ֵ
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint16_t NetCRC16_Data(uint8_t *aStr ,uint16_t len,uint16_t crc_id)
{
uint16_t xda , xdapoly ;
uint16_t i,j, xdabit ;
xda = 0xFFFF ;
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
for(i=0;i<len;i++)
{
if((i == crc_id) || (i == (crc_id + 1)))
{
xda ^= 0x00;
}else {
xda ^= aStr[i];
}
for(j=0;j<8;j++)
{
xdabit = (uint8_t )(xda & 0x01) ;
xda >>= 1 ;
if( xdabit ) xda ^= xdapoly ;
}
}
return xda;
}
/*******************************************************************************
* Function Name : DoubleData_CheckSum
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>
* Data1 <20><><EFBFBD>ݰ<EFBFBD>1
* Data1Len <20><><EFBFBD>ݰ<EFBFBD>1<EFBFBD>ij<EFBFBD><C4B3><EFBFBD>
* Data2 <20><><EFBFBD>ݰ<EFBFBD>2
* Data2Len <20><><EFBFBD>ݰ<EFBFBD>2<EFBFBD>ij<EFBFBD><C4B3><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t DoubleData_CheckSum(uint8_t *Data1, uint16_t Data1Len, uint8_t *Data2, uint16_t Data2Len)
{
uint8_t data_sum = 0;
uint16_t i;
for(i = 0; i < Data1Len;i++)
{
data_sum += Data1[i];
}
for(i = 0; i < Data2Len; i++)
{
data_sum += Data2[i];
}
return ~data_sum;
}
/*******************************************************************************
* Function Name : SOR_CRC
* Description : <20><>У<EFBFBD><D0A3>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t SOR_CRC(uint8_t *Data, uint8_t DataLen)
{
uint8_t i;
uint8_t sor_data = 0;
for(i = 0; i < DataLen; i++)//i<><69><EFBFBD><EFBFBD>Ϊ0 <20><>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
{
sor_data = sor_data+Data[i];
}
return sor_data;
}
/*******************************************************************************
* Function Name : DevAction_Data_Check
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t DeAction_Data_Check(uint32_t sram_addr)
{
uint16_t data_len = SRAM_Read_Word(sram_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State) + 1);
uint8_t data_sum = 0;
uint8_t check_temp_buff[SRAM_DevAction_List_Size] = {0};
if(data_len > SRAM_DevAction_List_Size)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ַ:%08X <20>洢<EFBFBD>ij<EFBFBD><C4B3>ȣ<EFBFBD>%04X",sram_addr, data_len);
return 1;
}
memset(check_temp_buff,0,SRAM_DevAction_List_Size);
SRAM_DMA_Read_Buff(check_temp_buff,data_len,sram_addr);
for(uint16_t i = 0;i<data_len;i++)
{
data_sum += check_temp_buff[i];
}
return ~data_sum;
}
/*******************************************************************************
* Function Name : Dev_CheckSum
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>SRAM<41>ж<EFBFBD>ȡ
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t DevAction_CheckSum(uint32_t addr,uint16_t len)
{
uint8_t data_sum = 0;
uint8_t check_temp_buff[SRAM_DevAction_List_Size];// = {0};
if(len > SRAM_DevAction_List_Size)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ַ:%08X <20>洢<EFBFBD>ij<EFBFBD><C4B3>ȣ<EFBFBD>%04X",addr, len);
return 1;
}
memset(check_temp_buff,0,SRAM_DevAction_List_Size);
SRAM_DMA_Read_Buff(check_temp_buff,len,addr);
for(uint16_t i = 0;i<len;i++)
{
data_sum += check_temp_buff[i];
}
return ~data_sum;
}

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/*
* debug.c
*
* Created on: May 14, 2025
* Author: cc
*/
#include "debug.h"
#include <stddef.h>
#include <stdarg.h>
#include <stdio.h>
volatile uint32_t SysTick_100us = 0;
volatile uint32_t SysTick_1ms = 0;
volatile uint32_t SysTick_1s = 0;
__attribute__((section(".non_0_wait"))) void Systick_Init(void)
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>*/
NVIC_SetPriority(SysTick_IRQn, 0x00);
NVIC_EnableIRQ(SysTick_IRQn);
/*<2A><><EFBFBD>ö<EFBFBD>ʱ<EFBFBD><CAB1>*/
SysTick->CTLR= 0;
SysTick->SR = 0;
SysTick->CNT = 0;
SysTick->CMP = SystemCoreClock/10000;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1000<30><30><EFBFBD><EFBFBD>1000HZ(<28>Ǿ<EFBFBD><C7BE><EFBFBD>1ms<6D><73>һ<EFBFBD><D2BB><EFBFBD>ж<EFBFBD>)
SysTick->CTLR= 0xf;
}
void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void SysTick_Handler(void)
{
static uint8_t NUM = 0;
static uint16_t NUM_s = 0;
SysTick->SR = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
SysTick_100us++;
NUM++;
if(NUM >= 10){
NUM = 0;
SysTick_1ms++;
NUM_s++;
if(NUM_s >= 1000){
NUM_s = 0x00;
SysTick_1s++;
}
}
}
/*********************************************************************
* @fn Delay_Us
*
* @brief Microsecond Delay Time.
*
* @param n - Microsecond number.
*
* @return None
*/
__attribute__((section(".non_0_wait"))) void Delay_Us(uint32_t n)
{
for(uint32_t i=0;i<n;i++){
for(uint32_t j=0;j<30;j++){
__NOP();
}
}
}
/*********************************************************************
* @fn Delay_Ms
*
* @brief Millisecond Delay Time.
*
* @param n - Millisecond number.
*
* @return None
*/
__attribute__((section(".non_0_wait"))) void Delay_Ms(uint32_t n)
{
for(uint32_t i=0;i<n;i++){
Delay_Us(1000);
}
}
/*********************************************************************
* @fn _write
*
* @brief Support Printf Function
*
* @param *buf - UART send Data.
* size - Data length.
*
* @return size - Data length
*/
__attribute__((used)) int _write(int fd, char *buf, int size)
{
int i;
for (i = 0; i < size; i++)
{
#if (DEBUG) == DEBUG_UART0
while ((R8_UART0_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART0_THR = *(buf++);
#elif (DEBUG) == DEBUG_UART1
while ((R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART1_THR = *(buf++);
#elif (DEBUG) == DEBUG_UART2
while ((R8_UART2_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART2_THR = *(buf++);
#endif
}
return size;
}
/*********************************************************************
* @fn _sbrk
*
* @brief Change the spatial position of data segment.
*
* @return size: Data length
*/
void *_sbrk(ptrdiff_t incr)
{
extern char _end[];
extern char _heap_end[];
static char *curbrk = _end;
if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
return NULL - 1;
curbrk += incr;
return curbrk - incr;
}
uint32_t SysTick_Now = 0, SysTick_Last = 0, SysTick_Diff = 0;
char Dbg_Buffer[100];
uint32_t Dbg_Switch = (DBG_OPT_ActCond_STATUS << DBG_BIT_ActCond_STATUS_bit) + \
(DBG_OPT_MQTT_STATUS << DBG_BIT_MQTT_STATUS_bit) + \
(DBG_OPT_Debug_STATUS << DBG_BIT_Debug_STATUS_bit) + \
(DBG_OPT_LOGIC_STATUS << DBG_BIT_LOGIC_STATUS_bit) + \
(DBG_OPT_DEVICE_STATUS << DBG_BIT_DEVICE_STATUS_bit) + \
(DBG_OPT_NET_STATUS << DBG_BIT_NET_STATUS_bit) + \
(DBG_OPT_SYS_STATUS << DBG_BIT_SYS_STATUS_bit);
//<2F>÷<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD>ٴ<EFBFBD><D9B4><EFBFBD><EFBFBD>ռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void __putchar__ (char ch)
{
#if (DEBUG) == DEBUG_UART0
while ((R8_UART0_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART0_THR = ch;
#elif (DEBUG) == DEBUG_UART1
while ((R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART1_THR = ch;
#elif (DEBUG) == DEBUG_UART2
while ((R8_UART2_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART2_THR = ch;
#elif (DEBUG) == DEBUG_UART3
while ((R8_UART3_LSR & RB_LSR_TX_FIFO_EMP) == 0);
R8_UART3_THR = ch;
#endif
}
/*******************************************************************************
* Function Name : Dbg_NoTick_Print
* Description : DEBUG<55><47><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӡ
* Input :
* Return :
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Dbg_NoTick_Print(int DbgOptBit ,const char *fmt, ...)
{
char ch;
va_list ap;
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
{
va_start(ap, fmt);
while (*fmt) {
if (*fmt != '%') {
__putchar__(*fmt++);
continue;
}
switch (*++fmt) {
case 's':
{
char *str = va_arg(ap, char *);
printf("%s",str);
}
break;
case 'd':
{
int num = va_arg(ap, int);
printf("%d", num);
}
break;
case 'x':
case 'X':
{
int num = va_arg(ap, unsigned int);
printf("%x", num);
}
break;
// Add other specifiers here...
case 'c':
case 'C':
ch = (unsigned char)va_arg(ap, int);
printf("%c", ch);
break;
default:
__putchar__(*fmt);
break;
}
fmt++;
}
va_end(ap);
printf("\r\n");
}
}
__attribute__((section(".non_0_wait"))) void Dbg_Print(int DbgOptBit ,const char *fmt, ...)
{
char ch;
va_list ap;
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
{
SysTick_Now = SysTick_1ms;
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
SysTick_Last = SysTick_Now;
printf("%8d [%6d]: ",SysTick_Now,SysTick_Diff);
va_start(ap, fmt);
while (*fmt) {
if (*fmt != '%') {
__putchar__(*fmt++);
continue;
}
switch (*++fmt) {
case 's':
{
char *str = va_arg(ap, char *);
printf("%s",str);
}
break;
case 'd':
{
int num = va_arg(ap, int);
printf("%d", num);
}
break;
case 'x':
case 'X':
{
int num = va_arg(ap, unsigned int);
printf("%x", num);
}
break;
// Add other specifiers here...
case 'c':
case 'C':
ch = (unsigned char)va_arg(ap, int);
printf("%c", ch);
break;
default:
__putchar__(*fmt);
break;
}
fmt++;
}
va_end(ap);
}
}
__attribute__((section(".non_0_wait"))) void Dbg_Println(int DbgOptBit ,const char *fmt, ...)
{
char ch;
va_list ap;
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
{
SysTick_Now = SysTick_1ms;
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
SysTick_Last = SysTick_Now;
printf("%8d [%6d]: ",SysTick_Now,SysTick_Diff);
va_start(ap, fmt);
while (*fmt) {
if (*fmt != '%') {
__putchar__(*fmt++);
continue;
}
switch (*++fmt) {
case 's':
{
char *str = va_arg(ap, char *);
printf("%s",str);
}
break;
case 'd':
{
int num = va_arg(ap, int);
printf("%d", num);
}
break;
case 'x':
case 'X':
{
int num = va_arg(ap, unsigned int);
printf("%x", num);
}
break;
// Add other specifiers here...
case 'c':
case 'C':
ch = (unsigned char)va_arg(ap, int);
printf("%c", ch);
break;
default:
__putchar__(*fmt);
break;
}
fmt++;
}
va_end(ap);
printf("\r\n");
}
}
__attribute__((section(".non_0_wait"))) void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len)
{
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
{
SysTick_Now = SysTick_1ms;
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
SysTick_Last = SysTick_Now;
DBG_Printf("%8d [%6d]: %s",SysTick_Now,SysTick_Diff,cmd);
for(uint32_t i=0;i<len;i++)
{
DBG_Printf("%02X ",buff[i]);
}
DBG_Printf("\n\r");
}
}

28
MCU_Driver/inc/blv_authorize.h Normal file
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@@ -0,0 +1,28 @@
/*
* blv_authorize.h
*
* Created on: Nov 8, 2025
* Author: cc
*/
#ifndef _BLV_AUTHORIZE_H_
#define _BLV_AUTHORIZE_H_
#include "ch564.h"
#include <stdint.h>
typedef struct
{
uint8_t lock_status; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
uint8_t last_status;
uint32_t expires_time; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
}BLV_AUTHORIZE;
void BLV_Set_Authorize_Status(uint32_t Expires_time,uint8_t lock);
void BLV_Authorize_Processing(uint32_t utc_time);
void Set_Authorize_Lock_Status(uint8_t state);
uint8_t Get_Authorize_Lock_Status(void);
uint32_t Get_Authorize_UnixTime(void);
#endif /* MCU_DRIVER_INC_BLV_AUTHORIZE_H_ */

304
MCU_Driver/inc/blv_dev_action.h Normal file
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@@ -0,0 +1,304 @@
/*
* blv_dev_action.h
*
* Created on: Nov 11, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_BLV_DEV_ACTION_H_
#define MCU_DRIVER_INC_BLV_DEV_ACTION_H_
#include <stdint.h>
#include "ch564.h"
#define DevActionNameLenMax 0x20 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define DevCtrlNumMax 50 //<2F><>չ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>50
#define CtrlValid 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
#define CtrlInvalid 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
#define CondIsPass 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>
#define CondIsNotPass 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϲ<D0B6><CFB2><EFBFBD><EFBFBD><EFBFBD>
#define DEV_STATE_OPEN 0x01 //<2F>豸״̬Ϊ<CCAC><CEAA>
#define DEV_STATE_CLOSE 0x02 //<2F>豸״̬Ϊ<CCAC><CEAA>
#define SCENE_MODE_CTRL 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
#define LIGHT_MODE_CTRL 0x02 //<2F>ƹ<EFBFBD><C6B9><EFBFBD><EFBFBD><EFBFBD>ģʽ
#define NOR_MODE_CTRL 0x01 //<2F><>ͨģʽ<C4A3><CABD><EFBFBD><EFBFBD>
#define SLEEP_MODE_CTRL 0x02 //˯<><CBAF>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
#define DEV_CTRLWAY_INVALID 0x00 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><CABD>Ч
#define DEV_CTRLWAY_OPEN 0x01 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
#define DEV_CTRLWAY_CLOSE 0x02 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
#define DEV_CTRLWAY_RELATESCENE 0x03 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define DEV_CTRLWAY_STOP 0x06 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪͣ
#define Season_Spring 0x01 //<2F><><EFBFBD><EFBFBD>
#define Season_Summer 0x02 //<2F>ļ<EFBFBD>
#define Season_Winter 0x03 //<2F><><EFBFBD><EFBFBD>
#define Season_Autumn 0x00 //<2F>＾
#define ACTION_SCENE_ONE 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
#define ACTION_SCENE_TWO 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
#define ACTION_SCENE_SLEEP 0x04 //˯<><CBAF>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
#define ACTION_SCENE_MAINSWITCH 0x05 //<2F>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָʾ<D6B8>ƾͿ<C6BE><CDBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еƹأ<C6B9>ָʾ<D6B8>ƲŹ<C6B2>
#define ACTION_SCENE_HELPSLEEP 0x06 //<2F><><EFBFBD><EFBFBD>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
#define ACTION_SCENE_MULTI 0x0B //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define ACTION_SCENE_Rotary 0x0C //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD>
#define ACTION_SCENE_SLEEP_UNRELATED 0x0E //<2F><>˯<EFBFBD><CBAF><EFBFBD>޹صij<D8B5><C4B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᴥ<EFBFBD><E1B4A5><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD><EFBFBD>
#define NightModeStart 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹģʽ
#define NightModeOpen 0x02 //<2F><><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9>
#define NightModeClose 0x00 //<2F>ر<EFBFBD>ҹ<EFBFBD><D2B9>
#define DevCtrlLen 0x06 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȹ̶<C8B9>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
typedef struct
{
uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
char DevActionName[DevActionNameLenMax]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32<33><32><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>÷ָ<C3B7><D6B8><EFBFBD>
}Dev_Action_Core; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
typedef struct
{
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint16_t inAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint16_t inType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
typedef struct
{
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
uint64_t RoomState:3; //<2F><>̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<>˷<EFBFBD> 3<><33><EFBFBD><EFBFBD> 4<>շ<EFBFBD>
uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint64_t EleState:3; //ȡ<><C8A1>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t WashState:3; //ϴ<><CFB4>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t SosState:3; //SOS״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32> 3<><33> 4<><34> <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB>1<EFBFBD><31> 2<><32> 3<><33> 0<><30>
uint64_t TimeState:3; //ʱ<><CAB1> 1ȫ<31><C8AB> 2<><32><EFBFBD><EFBFBD> 3<><33>ҹ
uint64_t NeightFlag:1; //<2F><>ҹ<EFBFBD><D2B9><EFBFBD>й<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD>й<EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD>޹<EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD><EFBFBD>
uint64_t NeightState:2; //<2F><>ҹ״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ 2<><32>ҹ<EFBFBD><D2B9> 0<>˳<EFBFBD><CBB3><EFBFBD>ҹ
uint64_t RcuLockState:3; //RCU<43><55><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<><32><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
typedef struct{
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
typedef struct
{
uint8_t DelayCont; //<2F><>ʱʱ<CAB1><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱִ<CAB1><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DelayWeight; //<2F><>ʱ<EFBFBD><CAB1>λ
}Dev_Dly_Value; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
typedef struct
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
#define DEVACTIONOUTCFGLEN sizeof(Dev_Action_OutCfg) //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
typedef struct
{
Dev_Action_OutCfg DevActionOutCfg; // <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
uint32_t DevActionOutAddr; //ÿ<><C3BF><EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
uint32_t DevDlyAddr; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
}Dev_Action_Output; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
typedef struct
{
uint8_t SceneState; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬ Ŀǰ<C4BF><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߹<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD>Ƶı<C6B5>־ ˯<>߽ڵ<DFBD><DAB5>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ݱȽ<DDB1><C8BD><EFBFBD><EFBFBD>⣬ȫ<E2A3AC><C8AB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
uint8_t SceneStateLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬<D7B4><CCAC><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ <20><><EFBFBD><EFBFBD>ָʾ<D6B8>ƿ<EFBFBD><C6BF><EFBFBD>
uint8_t SceneReuseFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ȫһ<C8AB><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҷ<EFBFBD><D2B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><D6BE>һ Ϊ1<CEAA><31>ɨ<EFBFBD>趯<EFBFBD><E8B6AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
uint8_t MultiSetFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><C2B1><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD> 2024-05-23
uint8_t MultiNumber; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2024-05-23
uint8_t MultiValidNo; //<2F><>Ч<EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2024-05-23
uint8_t SceneTypeFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־ 1<><31><EFBFBD><EFBFBD>Ҫ<EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ 0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>˯<EFBFBD>ߣ<EFBFBD><DFA3>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 2<><32><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 0<><30><EFBFBD><EFBFBD>ʾδ<CABE><CEB4><EFBFBD>峡<EFBFBD><E5B3A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶƹ<C6B5>һ<EFBFBD>࣬һ·<D2BB>Ƽ<EFBFBD><C6BC>ǵ<EFBFBD><C7B5>أ<EFBFBD><D8A3><EFBFBD>·<EFBFBD>Ƽ<EFBFBD><C6BC>Ƕ<EFBFBD><C7B6>ء<EFBFBD><D8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint32_t DevAddrIn; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
}Dev_Action_State; //<2F>豸״̬ һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
typedef struct CFG_Action_Add
{
Dev_Action_Core DevActionCore; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
Dev_Action_Input DevActionInput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD>ֽ<EFBFBD>
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
uint8_t DevCtrlNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD>ֽ<EFBFBD>
Dev_Action_Output DevActionOutput[DevCtrlNumMax]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16N <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>28<32><38>
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
typedef struct{
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
uint8_t BlwMapDevi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸
uint8_t DevNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevBusNum; //Bus<75><73><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevPollNum; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
uint8_t TimeGetFlag; //ʱ<><CAB1><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1>
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
uint16_t SleepActionNo; //˯<>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
uint32_t DevLockAddr; //΢<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint8_t Lock485Addr; //΢<><CEA2><EFBFBD><EFBFBD>485<38><35>ַ
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CheckTypeNum; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CheckMapList[4]; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
uint8_t OffLineDevType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
uint8_t OffLineDevAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
uint8_t InputType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
uint8_t People_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 2024-03-01
uint8_t ServerCtrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CardInFlag; //<2F><>ס<EFBFBD><D7A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD> 2024-04-29
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t TimeSyncFlag; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t VC_ConNToSGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConNToSSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_PortNum; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
uint8_t SleepMode_State;
uint8_t Last_SleepMode_State;
uint8_t SleepLight_State;
uint8_t Last_SleepLight_State;
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
uint8_t Last_Person_Detected;
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint8_t CardState; //<2F>忨״̬
uint8_t Last_CardState;
uint8_t Rs485CardType; //<2F>忨<EFBFBD><E5BFA8><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD> <20><><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -> "<22><><EFBFBD>޿<EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"<22>¼<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Last_Rs485CardType;
uint8_t Last_NeightState;
}BLV_DevAction_Manage_G;
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
#define DevDlyNumMax ((SRAM_DevDly_List_End_Addr - SRAM_DevDly_List_Start_Addr) / DevDlyStructLen) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define DELAY_TIME_MS 0x01 //<2F><><EFBFBD><EFBFBD>
#define DELAY_TIME_S 0x02 //<2F><>
#define DELAY_TIME_MIN 0x03 //<2F><><EFBFBD><EFBFBD>
#define DELAY_TIME_HOUR 0x04 //Сʱ
typedef struct
{
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0Ϊ<30><CEAA><EFBFBD><EFBFBD>
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>· Ϊ<><CEAA><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>˱<EFBFBD><CBB1><EFBFBD>û<EFBFBD><C3BB>
uint32_t DevDlyAddr; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ڵ<EFBFBD> <20>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Χ<EFBFBD><CEA7><EFBFBD><EFBFBD><EFBFBD>߶<EFBFBD><DFB6><EFBFBD><EFBFBD><EFBFBD>Χ
}Struct_Dev_Dly_Core; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ 7<><37><EFBFBD>ֽ<EFBFBD>
typedef struct
{
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint32_t DlyExcuteTime; //<2F><>ʱִ<CAB1><D6B4>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ʱ<EFBFBD>䱻<EFBFBD><E4B1BB>ֵ
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
typedef struct{
uint8_t Addr;
uint32_t ExpandReadFlag;
uint16_t ExpandReadState[32];
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
typedef struct{
uint8_t Addr;
uint32_t DimmReadFlag;
uint16_t DimmReadState[32];
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
extern BLV_DevAction_Manage_G DevActionGlobal;
uint32_t DevAction_No_Get(uint16_t DevActionNo);
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */

93
MCU_Driver/inc/blv_netcomm_function.h Normal file
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/*
* BLV_NETCOMM_Function.h
*
* Created on: Nov 3, 2025
* Author: cc
*/
#ifndef _BLV_NETCOMM_FUNCTION_H_
#define _BLV_NETCOMM_FUNCTION_H_
#define FRAME_HEAD_OFFSET 0 //ͷλ<CDB7><CEBB> 0
#define FRAME_LEN_OFFSET 2 //֡<><D6A1>λ<EFBFBD><CEBB> 2
#define SYSTEM_ID_OFFSET 4 //ϵͳIDλ<44><CEBB> 4
#define CMD_OFFSET 8 //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 8
#define FRAME_NO_OFFSET 9 //֡<><D6A1>λ<EFBFBD><CEBB> 9
#define FLOOR_NUM_OFFSET 11 //¥<><C2A5><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 11
#define BLV_UDP_HEAD_LEN 15 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
#define BLV_UDP_PACK_LEN 17 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SeriaNet_Cmd_Send_Len 19 //<2F><>ͷ<EFBFBD><CDB7>15Byte+<2B><><EFBFBD>ݣ<EFBFBD>2Byte+CRC<52><43>2Byte
#define Search_Cmd 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define Heart_Cmd 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_QueryTime_Cmd 0x08 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
#define In_RoomState_Cmd 0x0E //״̬<D7B4>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 ȡ<><C8A1>
#define In_DevCtr_Cmd 0x0F //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ͵<C6BA><CDB5><EFBFBD>
#define In_SingleAirCtrl_Cmd 0x13 //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_Sys_Key_Cmd 0x24 //һ<><D2BB><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>
#define In_SetSecretKey_Cmd 0x28 //<2F><><EFBFBD><EFBFBD>MQTT<54><54>Կ
#define In_ReadSecretKey_Cmd 0x29 //<2F><>ȡMQTT<54><54>Կ
#define In_ReadRegister_Cmd 0x30 //<2F><>ȡӳ<C8A1><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
#define In_WriteRegister_Cmd 0x31 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
#define In_Get_RoomRent_Cmd 0x32 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ 2025-09-09
#define In_Reboot_Reason_Cmd 0x33 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_PeriodicReport_Cmd 0x34 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_SeriaNet_Cmd 0x70 //͸<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
#define In_SeriaNetReported_Cmd 0x71 //͸<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
#define In_Read_MCUSystem_Cmd 0xB1 //<2F><>ȡϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define In_BLVIAP_Cmd 0xB2 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ִ<EFBFBD>е<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_BLVIAPCheck_Cmd 0xB3 //BLV_Cx<43><78><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_BLVIAPJump_Cmd 0xB4 //BLV_Cx<43><78>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>
#define In_BLVIAPLogic_Cmd 0xB5 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5>߼<EFBFBD><DFBC>ļ<EFBFBD>
#define In_BLVIAPPlan_Cmd 0xB6 //BLV_Cx<43>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ϱ<EFBFBD>
#define In_BLVPCTest_Cmd 0xD1 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬ 2021-07-13 <20><><EFBFBD><EFBFBD>
#define In_BLVConfig_Cmd 0xD2 //BLV-C1<43><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>·<EFBFBD> 2025-10-09 ȡ<><C8A1>ʹ<EFBFBD><CAB9>
#define In_BLVPCTestDevice_Cmd 0xD3 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-10-26 <20><><EFBFBD><EFBFBD>
#define In_BLVFlashInfoWrite_CMD 0xD4 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
#define In_BLVFlashInfoRead_CMD 0xD5 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
#define In_BLVQueryTFTPIP_CMD 0xD6 //<2F>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP
#define In_BLVRpDomainCtrl_Cmd 0xD7 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
#define In_BLVQueryCommonState_Cmd 0xD8 //ѯ<>ʹ<EFBFBD><CAB9><EFBFBD>״̬
#define In_BLVTFTPDomainName_Cmd 0xD9 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>RCU-TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_BLVTFTPDataRead_Cmd 0xDA //TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ȡ
#define In_BLVDayNightTimeSet_Cmd 0xDB //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD>䷶Χ<E4B7B6><CEA7><EFBFBD><EFBFBD>
#define UDP_ActSend_PowerChange_Flag 0x01 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ȡ<><C8A1>״̬<D7B4>仯 <20><>־λ
#define UDP_ActSend_DevState_Flag 0x02 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20>豸״̬<D7B4>仯 <20><>־λ
#define UDP_ActSend_Periodic_Flag 0x04 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> <20><>־λ
#define UDP_ActSend_Reboot_Flag 0x08 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> <20><>־λ
#define UDP_ActSend_RoomState_Flag 0x10 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ <20><>־λ
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
#define USER_NET_Send_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
#define RCU_SoftwareVer 20 //RCU<43>̼<EFBFBD><CCBC>汾
#define RCU_ConfigVer 3 //RCU<43><55><EFBFBD>ð汾<C3B0><E6B1BE>
extern uint8_t Global_Large_Buff[1100];
void Udp_Addtion_Roomstate(uint8_t type,uint8_t addr,uint16_t loop,uint16_t start);
uint8_t Udp_Internal_PC_Testing_Reported(uint8_t *reply_data,uint16_t reply_len,uint8_t *ip,uint16_t port);
uint8_t Udp_Internal_BLVPCTestDevice_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
uint8_t Udp_Internal_SeriaNet_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
uint8_t Udp_Internal_SeriaNet_Uploading(uint8_t port,uint32_t baud,uint32_t data_addr);
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */

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MCU_Driver/inc/blv_rs485_protocol.h Normal file
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/*
* blv_rs485_protocol.h
*
* Created on: Nov 10, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
#define MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
#include <stdint.h>
#define Polling_Port 0x01 //<2F><>ѯ<EFBFBD>˿<EFBFBD>
#define Active_Port 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
#define Bus_port 0x03 //BUS<55>˿<EFBFBD>
#define Active_Baud 9600 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
#define Polling_Baud 9600 //<2F><>ѯ<EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
#define Bus_Baud 115200 //BUS<55>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
#define RS485OCCUPYTIME 0x01 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
#define RS485OCCUPYNOTIME 0x00 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>洢<EFBFBD>ṹ*/
typedef enum{
Dev_Type = 0x00, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
Dev_Addr, //<2F>豸<EFBFBD><E8B1B8>ַ - 1Byte
Dev_port, //<2F>豸<EFBFBD>˿<EFBFBD> - 1Byte
Dev_baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_baud_8,
Dev_baud_16,
Dev_baud_24,
Dev_Check, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> - 1Byte
Dev_DataLen, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> - 2Byte
Dev_DataLen_H, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
Dev_Retrynum, //<2F>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> - 1Byte
Dev_WaitTime, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1> - 2Byte
Dev_WaitTime_8,
Dev_Protocol, //<2F>豸Э<E8B1B8><D0AD>
Dev_Coord, //<2F>豸<EFBFBD>±<EFBFBD>
Dev_Coord_8,
Dev_ActionCoord, //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
Dev_ActionCoord_8,
Dev_Polling_CF, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Polling_CF_8,
Dev_Polling_CF_16,
Dev_Polling_CF_24,
Dev_Processing_CF, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Processing_CF_8,
Dev_Processing_CF_16,
Dev_Processing_CF_24,
Dev_Data_Process_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte Ҳ<>Ǻ<EFBFBD><C7BA><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
Dev_Data_Process_8,
Dev_Data_Process_16,
Dev_Data_Process_24,
Dev_Input_Type_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Input_Type_Get_8,
Dev_Input_Type_Get_16,
Dev_Input_Type_Get_24,
Dev_Output_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƻص<C6BB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Output_Ctrl_8,
Dev_Output_Ctrl_16,
Dev_Output_Ctrl_24,
Dev_Output_Loop_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Output_Loop_State_Get_8,
Dev_Output_Loop_State_Get_16,
Dev_Output_Loop_State_Get_24,
Dev_Output_Group_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD>Ƶõ<C6B5><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Output_Group_Ctrl_8,
Dev_Output_Group_Ctrl_16,
Dev_Output_Group_Ctrl_24,
Dev_Output_Loop_Group_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
Dev_Output_Loop_Group_State_Get_8,
Dev_Output_Loop_Group_State_Get_16,
Dev_Output_Loop_Group_State_Get_24,
Dev_Privately, //<2F>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD> -- <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
}Device_Attribute_E;
/*485<38>豸״̬<D7B4><CCAC><EFBFBD>忪ʼ*/
#define DEV_IS_ONLINE 0x00 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define DEV_IS_OFFLINE 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define DEV_IS_LINEUNINIT 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δȷ<CEB4><C8B7>
#define Port_Normal_Mode 0x01 //<2F><><EFBFBD><EFBFBD>ģʽ
#define Port_Passthrough_mode 0x02 //͸<><CDB8>ģʽ
#define Port_Monitoring_mode 0x03 //<2F><><EFBFBD><EFBFBD>ģʽ
#define In_ErrFun_LineState 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
#define In_ErrFun_ELEPercent 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>
#define In_ErrFun_CurValue 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ֵ
#define In_ErrFun_ResetTime 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1901<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_ErrFun_LoopState 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8>·״̬
#define Passthrough_DataLen_Max 0x01E0 //͸<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ480Byte
#define BLV_BUS485_WaitLdle_Time 20 //<2F><>λ:ms
#define BUS_Retry_Flag 0x40 //<2F>ط<EFBFBD><D8B7><EFBFBD>־
#define BLV_BUS485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
#define BLV_BUS485_ChangeBaudSendWaitTime 20 //<2F><>λ<EFBFBD><CEBB>ms
#define BLV_POLL485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
/* BLV_BUS 485<38><35><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD>ʽ
<EFBFBD><EFBFBD> PKT_ADD_FM<46><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>ַ
<EFBFBD><EFBFBD> PKT_TYPE<50><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>
<20><> bit 7 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>ǵ<EFBFBD><C7B5><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>
bit 7 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
bit 7 = 1 <20><> Ⱥ<><C8BA><EFBFBD><EFBFBD>ַ
<20><> bit 6 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׷<EFBFBD><D7B7><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݡ<EFBFBD>
bit 6 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׷<EFBFBD><D7B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
bit 6 = 1 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
<20><> bit 3<><33>0 <20><><EFBFBD><EFBFBD><EFBFBD>кš<D0BA>
<20><><EFBFBD>кŷ<D0BA>Χ<EFBFBD><CEA7>0~15ѭ<35><D1AD><EFBFBD>ۼӣ<DBBC>ÿ<EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>μ<EFBFBD>1<EFBFBD><31>
<EFBFBD><EFBFBD> PKT_DevType<70><65><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD> PKT_ADD_TO<54><4F><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪȺ<CEAA><C8BA>ʱ<EFBFBD><CAB1>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ΪȫԱ<C8AB>㲥<EFBFBD><E3B2A5>Ϣ<EFBFBD><CFA2>
<EFBFBD><EFBFBD> PKT_LEN<45><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD>50<35><30>
<EFBFBD><EFBFBD> PKT_CHKSUM<55><4D>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD>1Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>PKT_CHKSUM<55>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ࡣ
<EFBFBD><EFBFBD> PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3>̶<EFBFBD><CCB6><EFBFBD><EFBFBD><EFBFBD> 1Byte
<EFBFBD><EFBFBD> PKT_PARA<52><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><C8B2>̶<EFBFBD>
*/
typedef enum{
PKT_ADD_FM,
PKT_TYPE,
PKT_DevType,
PKT_ADD_TO,
PKT_LEN,
PKT_CHKSUM,
PKT_CMD,
PKT_PARA,
}BLV_BUS_PKT_E;
/*BUS<55><53><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD>2 - <20><><EFBFBD>ȸ<EFBFBD>Ϊuint16_t<5F><74><EFBFBD><EFBFBD>*/
typedef enum{
PKT2_ADD_FM,
PKT2_TYPE,
PKT2_DevType,
PKT2_ADD_TO,
PKT2_LEN,
PKT2_LEN_8,
PKT2_CHKSUM,
PKT2_CMD,
PKT2_PARA,
}BLV_BUS_PKT2_E;
typedef enum{
B_IDLE, //<2F><><EFBFBD><EFBFBD>
B_Polling, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
B_Send, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
Change_Dev, //<2F>л<EFBFBD><D0BB>豸
Read_Dev, //<2F><><EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
B_Retry, //<2F><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
Wait_Reply, //<2F>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
B_Wait, //BUS<55><53><EFBFBD>ߵȴ<DFB5>
Baud_Wait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>
Baud_Comm, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA>ȷ<EFBFBD><C8B7><EFBFBD>һ<EFBFBD><D2BB>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ
Baud_SendWait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA><EFBFBD><EFBFBD>͵ȴ<CDB5>
}G_BLV_BUS;
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6>忪ʼ*/
typedef void (*fun_prt)(uint32_t );
typedef uint8_t (*fun2_prt)(uint32_t ,uint32_t ,uint16_t );
typedef void (*fun3_prt)(unsigned long);
typedef uint8_t (*fun4_prt)(uint32_t );
typedef void (*Dev_Dev_Data_Process_ptr)(uint32_t CfgDevAdd); //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
typedef uint8_t (*Dev_Dev_Input_Type_Get_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputLoop, uint16_t DevInputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
typedef void (*Dev_Output_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t CfgDevAddOut, uint16_t DevOutputLoop, uint16_t DevOutputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD>ɿ<EFBFBD><C9BF><EFBFBD><EFBFBD>豸
typedef uint16_t (*Dev_Output_Loop_State_Get_ptr)(uint32_t CfgDevAddOut, uint16_t DevOutputLoop); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·״̬<D7B4>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱLED<45><44>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>Ϊ50<35><30> <20><>ôӦ<C3B4>÷<EFBFBD><C3B7><EFBFBD>50
typedef void (*Dev_Output_Group_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start);
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define Dev_Fun_Ptr_Len sizeof(Struct_Dev_Fun_Info) //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸<EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> һ<><D2BB>16<31><36><EFBFBD>ֽ<EFBFBD>
typedef struct
{
Dev_Dev_Data_Process_ptr Dev_Data_Process; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
Dev_Dev_Input_Type_Get_ptr Dev_Input_Type_Get; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Dev_Output_Ctrl_ptr Dev_Output_Ctrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Dev_Output_Loop_State_Get_ptr Dev_Output_Loop_State_Get; //<2F><><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD>
Dev_Output_Group_Ctrl_ptr Dev_Output_Group_Ctrl; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD>
Dev_Output_Loop_Group_State_Get_ptr Dev_Output_Loop_Group_State_Get_ptr; //<2F><><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD>
}Struct_Dev_Fun_Info; //<2F>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC>ͬ<EFBFBD><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD>ͬ<EFBFBD>ĺ<EFBFBD><C4BA><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD>Ǵ<EFBFBD><C7B4>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
/*ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
#define BLV_COMM_RecordNum 30
#define BLV_CONTINUE_FAIL_MAX 20 //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define BLV_COMM_Fail_Precent_Max 30 //ʧ<><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٷֱ<D9B7>
#define BLV_COMM_Precent_Num 100 //ͨѶ<CDA8>ٷֱȿ<D6B1>ʼ<EFBFBD><CABC>¼<EFBFBD><C2BC>
#define BLV_BUS_BAUD_ADJUST_SIZE 1000 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>115200*1%
#define BLV_BUS_BAUD_ADJUST_MIN 103200
#define BLV_BUS_BAUD_ADJUST_MAX 126200
typedef struct{
uint8_t record[BLV_COMM_RecordNum]; //ͨѶ<CDA8><D1B6>¼BUFF
uint8_t num; //<2F><>ǰд<C7B0><D0B4><EFBFBD>±<EFBFBD>
uint8_t continue_fail_num; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܼ<EFBFBD><DCBC><EFBFBD>
uint8_t comm_percent; //ͨѶ<CDA8>ٷֱ<D9B7>
uint8_t full_flag; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
uint8_t remian1;
uint8_t remian2;
}BLV_COMM_RECORD_G;
typedef struct{
uint8_t type;
uint8_t addr;
uint8_t port;
uint32_t baud;
uint8_t check;
uint16_t data_len;
uint8_t retry_num;
uint16_t wait_time;
uint8_t Protocol; //Э<><D0AD>
uint16_t DevCoord; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
uint16_t ActionCoord; //<2F><>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
uint32_t polling_cf; //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
uint32_t processing_cf; //<2F><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Struct_Dev_Fun_Info DevFunInfo; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ṹ<EFBFBD><E1B9B9>
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
}Device_Public_Information_G;
typedef struct{
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:͸<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
uint8_t pass_state; //͸<><CDB8>״̬<D7B4><CCAC>
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
uint32_t pass_tick; //͸<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t pass_outtime; //͸<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
}BLV_BUS_Manage_G;
typedef struct{
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:͸<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
uint8_t pass_state; //͸<><CDB8>״̬<D7B4><CCAC>
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
uint32_t pass_tick; //͸<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t pass_outtime; //͸<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
uint8_t POLL_Start; //POLL״̬<D7B4><CCAC>
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
}BLV_POLL_Manage_G;
typedef struct{
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:͸<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
uint8_t pass_state; //͸<><CDB8>״̬<D7B4><CCAC>
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
uint32_t pass_tick; //͸<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t pass_outtime; //͸<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
uint8_t Act_Start; //Active״̬<D7B4><CCAC>
uint8_t device_num; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t process_num; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint32_t list_read_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t Send_Flag; //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
}BLV_ACTIVE_Manage_G;
typedef struct{
uint8_t NorDeviceNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint8_t NorDevicei; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD>IJ<EFBFBD><C4B2><EFBFBD>
}BLV_NORDEV_Manage_G;
extern BLV_BUS_Manage_G BUS485_Info;
extern BLV_POLL_Manage_G Poll485_Info;
extern BLV_ACTIVE_Manage_G Act485_Info;
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
uint8_t Device_Data_Check(uint32_t sram_addr);
void BLV_BUS_Polling_Task(void);
void BUS485Port_Passthrough_Task(void);
void BLV_BUS485Port_ModeTask(void);
void BLV_PollPort_Task(void);
void Poll485Port_Passthrough_Task(void);
void BLV_PollPort_ModeTask(void);
void BLV_ActivePort_Task(void);
void Act485Port_Passthrough_Task(void);
void BLV_ActivePort_ModeTask(void);
void BLV_Active_Set_List_Addr(uint32_t addr);
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);
uint32_t Find_AllDevice_List_Information2(uint8_t Port, uint8_t dev_type,uint8_t addr);
uint8_t Find_The_Number_Of_Device_In_The_List(void);
uint8_t Gets_the_state_of_all_devices(uint8_t *data_buff,uint8_t num);
void Write_Device_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state);
void Write_Device_Loop_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state,uint16_t loop);
void BLV_Communication_Record(BLV_COMM_RECORD_G *dev_record,uint8_t option,uint8_t state);
uint16_t Get_BLV_Communication_Fail_Rate(BLV_COMM_RECORD_G *dev_record);
#endif /* MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_ */

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/*
* check_fun.h
*
* Created on: Nov 8, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_CHECK_FUN_H_
#define MCU_DRIVER_INC_CHECK_FUN_H_
#include <stdint.h>
uint8_t Log_CheckSum(uint32_t addr,uint8_t len);
uint8_t Data_CheckSum(uint8_t* data,uint16_t len);
uint8_t CheckSum_Overlook_Check(uint8_t *data, uint16_t len, uint16_t check_id);
void NetCRC16(uint8_t *aStr ,uint16_t len);
uint16_t NetCRC16_2(uint8_t *aStr ,uint16_t len);
uint16_t NetCRC16_Data(uint8_t *aStr ,uint16_t len,uint16_t crc_id);
uint8_t DoubleData_CheckSum(uint8_t *Data1, uint16_t Data1Len, uint8_t *Data2, uint16_t Data2Len);
uint8_t SOR_CRC(uint8_t *Data, uint8_t DataLen);
uint8_t DeAction_Data_Check(uint32_t sram_addr);
uint8_t DevAction_CheckSum(uint32_t addr,uint16_t len);
#endif /* MCU_DRIVER_INC_CHECK_FUN_H_ */

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/*
* debug.h
*
* Created on: May 14, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_DEBUG_H_
#define MCU_DRIVER_DEBUG_H_
#include "ch564.h"
#include <stdio.h>
/* UART Printf Definition */
#define DEBUG_UART0 1
#define DEBUG_UART1 2
#define DEBUG_UART2 3
#define DEBUG_UART3 4
/* DEBUG log function. DEBUG printf() <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
#ifndef DBG_LOG_EN
#define DBG_LOG_EN 1 //DEBUG LOG <20><><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF><EFBFBD>
#endif
#define DBG_Particular_EN 1 //<2F><>ϸ<EFBFBD><CFB8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD> -- <20><><EFBFBD>嵽<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
#define DBG_NET_LOG_EN 1 //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ״̬*/
#define DBG_OPT_ActCond_STATUS 1 //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_MQTT_STATUS 1 //MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_Debug_STATUS 1 //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_LOGIC_STATUS 1 //<2F>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_DEVICE_STATUS 1 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_NET_STATUS 1 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
#define DBG_OPT_SYS_STATUS 1 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ*/
#define DBG_BIT_ActCond_STATUS_bit 6
#define DBG_BIT_MQTT_STATUS_bit 5
#define DBG_BIT_Debug_STATUS_bit 4
#define DBG_BIT_LOGIC_STATUS_bit 3
#define DBG_BIT_DEVICE_STATUS_bit 2
#define DBG_BIT_NET_STATUS_bit 1
#define DBG_BIT_SYS_STATUS_bit 0
#ifdef DBG_LOG_EN
#define DBG_Printf(...) printf(__VA_ARGS__)
#else
#define DBG_Printf(...)
#endif
#ifdef DBG_Particular_EN
#define DBG_log(...) {DBG_Printf("%s %s-%d :",__FILE__,__func__,__LINE__);DBG_Printf(__VA_ARGS__);}
#else
#define DBG_log(...) DBG_Printf(__VA_ARGS__)
#endif
#define DBG_INFO(msg) DBG_Printf("%s %s-%d :%s",__FILE__,__func__,__LINE__,msg)
#ifdef DBG_NET_LOG_EN
#define DBG_NET_log(...) DBG_Printf(__VA_ARGS__)
#else
#define DBG_NET_log(...)
#endif
extern uint32_t Dbg_Switch;
extern volatile uint32_t SysTick_100us;
extern volatile uint32_t SysTick_1ms;
extern volatile uint32_t SysTick_1s;
void Systick_Init(void);
void Delay_Us(uint32_t n);
void Delay_Ms(uint32_t n);
void Dbg_NoTick_Print(int DbgOptBit ,const char *cmd, ...);
void Dbg_Print(int DbgOptBit ,const char *cmd, ...);
void Dbg_Println(int DbgOptBit ,const char *cmd, ...);
void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len);
#endif /* MCU_DRIVER_DEBUG_H_ */

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/*
* flash_mem_addr.h
*
* Created on: Oct 30, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
#define MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ʼ*/
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
#define SPIFLASH_APP_Start_Addr 0x00000000
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
#define SPIFLASH_APP_End_Addr 0x0006FFFF
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
#define FLASH_Register_Start_ADDRESS 0x00088000 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><>ʼ<EFBFBD><CABC>ַ
#define FLASH_Register_End_ADDRESS 0x000887FF //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define FLASH_MCU_Model_Revision_ADDRESS 0x0008A000 //MCU<43>汾<EFBFBD>ͺ<EFBFBD> 64Byte
#define FLASH_MCU_Control_Revision_ADDRESS 0x0008A040 //MCU<43>пذ汾<D8B0>ͺ<EFBFBD> 64Byte
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define SPIFLASH_LOGIC_FILE_Start_Addr 0x00090000
#define SPIFLASH_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SPIFLASH_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SPIFLASH_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SPIFLASH_LOGIC_DataStart_ADDRESS 0x00090200 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SPIFLASH_LOGIC_FILE_End_Addr 0x000FFFFF
#endif /* MCU_DRIVER_INC_FLASH_MEM_ADDR_H_ */

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/*
* led.h
*
* Created on: May 15, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_LED_H_
#define MCU_DRIVER_INC_LED_H_
#include "ch564.h"
#define SYS_LED_ON GPIOB_ResetBits(GPIO_Pin_12)
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)
void SYS_LED_Init(void);
void SYS_LED_Task(void);
#endif /* MCU_DRIVER_INC_LED_H_ */

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/*
* log_api.h
*
* Created on: Jul 29, 2025
* Author: cc
*/
#ifndef _LOG_API_H_
#define _LOG_API_H_
#include "ch564.h"
#include <stdint.h>
#define LogType_Enable 1 //LOGʹ<47><CAB9>
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD>*/
#define LogType_Launcher 0x01 //Launcher<65><72>Ϣ<EFBFBD><CFA2>¼
#define LogType_SYS_Record 0x02 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼
#define LogType_Device_COMM 0x03 //<2F>豸ͨѶ<CDA8><D1B6>¼
#define LogType_Device_Online 0x04 //<2F>豸ͨѶ״̬<D7B4><CCAC>¼
#define LogType_Global_Parameters 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼
#define LogType_Net_COMM 0x06 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
#define LogType_Logic_Record 0x07 //<2F>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD> - <20><>ʼ״̬*/
#define LogType_Launcher_SWITCH 1
#define LogType_SYS_Record_SWITCH 1
#define LogType_Device_COMM_SWITCH 1
#define LogType_Device_Online_SWITCH 1
#define LogType_Global_Parameters_SWITCH 1
#define LogType_Net_COMM_SWITCH 1
#define LogType_Logic_Record_SWITCH 1
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>λ*/
#define LogType_Launcher_bit 0
#define LogType_SYS_Record_bit 1
#define LogType_Device_COMM_bit 2
#define LogType_Device_Online_bit 3
#define LogType_Global_Parameters_bit 4
#define LogType_Net_COMM_bit 5
#define LogType_Logic_Record_bit 6
extern uint32_t SYS_Log_Switch;
/*<2A><>־<EFBFBD><D6BE><EFBFBD>ز<EFBFBD><D8B2><EFBFBD>*/
#define LogInfo_Device_Online 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define LogInfo_Device_Offline 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
typedef enum{
LLauncher_App_Check = 0x01, //У<><D0A3>APP
LLauncher_Read_App, //<2F><>ȡAPP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>д<EFBFBD>뵽MCU FLash<73><68>
LLauncher_Write_Flash, //дFlash
LLauncher_Factory_Reset, //<2F>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
LLauncher_Reset_Source, //<2F><>λԴ
LLauncher_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
}LOGTYPE_Launcher_E;
typedef enum {
LSYS_PHY_Change = 0x01, //PHY״̬<D7B4>仯<EFBFBD><E4BBAF>¼
LSYS_DevInfo_Error, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
LSYS_API_State, //<2F><><EFBFBD><EFBFBD>״̬
LSYS_NET_ARGC, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
LSYS_MQTT_ARGC, //MQTT<54><54><EFBFBD><EFBFBD>
LSYS_Server_Comm_State, //<2F>ƶ<EFBFBD>ͨѶ״̬<D7B4><CCAC>¼
LSYS_NET_DefaultARGC, //<2F><><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD>
LSYS_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
}LOGTYPR_SYSRecord;
typedef enum {
LCOMM_ASK_TO_Reply = 0x01, //<2F><>ѯ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
LCOMM_Send_Control, //RCU<43>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
LCOMM_Control_Reply, //RCU<43><55><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD><EFBFBD><EFBFBD>
LCOMM_Adjust_Baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}LOGTYPE_DEV_COMM;
typedef enum {
LGlobal_Para = 0x01, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
LGlobal_Dev, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
}LOGTYPE_Global_E;
typedef enum {
LNetComm_Send = 0x01, //<2F><><EFBFBD>緢<EFBFBD><E7B7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
LNetComm_Recv, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}LOGTYPE_NET_COMM_E;
typedef enum {
LLogic_DebugString = 0x01, //<2F>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD> - <20>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
}LOGTYPE_LOGICRecord_E;
/*Launcher<65><72>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_Launcher_APP_Check_Record(uint8_t state);
void LOG_Launcher_Read_App_Record(uint8_t state);
void LOG_Launcher_Write_Flash_Record(uint32_t addr,uint16_t len);
void LOG_Launcher_Factory_Reset_Record(void);
/*ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_SYS_PHY_Change_Record(uint8_t state);
void LOG_SYS_DevInfo_Error_Record(uint8_t dev,uint8_t addr,uint32_t info_addr);
void LOG_SYS_API_State_Record(uint8_t API_way,uint8_t state);
void LOG_SYS_NET_Argc_Record(uint8_t *IP,uint8_t *MAC,uint8_t *DNS_IP1,uint8_t *DNS_IP2,uint8_t *DNS_IP3);
void LOG_SYS_MQTT_Argc_Record(uint8_t *productkey,uint8_t *devname,uint8_t *devsecret,uint8_t *publish,uint8_t *sublish);
void LOG_SYS_Server_Comm_State_Record(uint8_t state);
void LOG_SYS_NET_Argc_Init_Record(uint8_t *IP,uint8_t *Gateway,uint8_t *IP_Mask,uint8_t *DNS_Add,uint8_t ArgcFlag,uint8_t DHCPFlag,uint8_t ServerFlag);
void LOG_SYS_RCUKey_State_Record(uint8_t state);
/*<2A>豸ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_Device_COMM_ASK_TO_Reply_Record(uint8_t port,uint32_t baud,uint32_t data_tick,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_ASK_TO_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint32_t data_tick,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_Send_Control_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_Send_Control_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_Control_Reply_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_Control_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
void LOG_Device_COMM_Control_Reply_Record3(uint32_t port_addr,uint32_t baud_addr,uint32_t buff_addr,uint16_t len);
void LOG_Device_COMM_Adjust_Baud_Record(uint8_t dev_type,uint8_t dev_addr,uint32_t baud,uint8_t way,uint8_t fail_num,uint8_t sum,uint8_t num);
void LOG_Device_COMM_Adjust_Baud_Record2(uint32_t dev_type,uint32_t dev_addr,uint32_t baud_addr);
/*<2A>豸ͨѶ״̬<D7B4><CCAC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_Device_Online_Record(uint8_t dev,uint8_t addr,uint8_t state);
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_Global_ParaInfo_Record(uint8_t *buff,uint16_t len);
void LOG_Global_DevInfo_Record(uint8_t *buff,uint16_t len);
/*<2A><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_NET_COMM_Send_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
void LOG_NET_COMM_Recv_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
/*<2A>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
void LOG_LogicInfo_DebugRecord(char *fmt,...);
#endif /* MCU_DRIVER_INC_LOG_API_H_ */

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/*
* logic_file_function.h
*
* Created on: Nov 11, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
#define MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
#include <stdint.h>
typedef enum
{
ENUM_RS485_DEV_PRO_00, //0<><30>Э<EFBFBD><D0AD> //0
ENUM_RS485_DEV_PRO_01, //1<><31>Э<EFBFBD><D0AD> //1
ENUM_RS485_DEV_PRO_02, //2<><32>Э<EFBFBD><D0AD> //2
ENUM_RS485_DEV_PRO_03, //3<><33>Э<EFBFBD><D0AD> //3
ENUM_RS485_DEV_PRO_04, //4<><34>Э<EFBFBD><D0AD> //4
ENUM_RS485_DEV_PRO_05, //5<><35>Э<EFBFBD><D0AD> //5
ENUM_RS485_DEV_PRO_06, //6<><36>Э<EFBFBD><D0AD> //6
ENUM_RS485_DEV_PRO_07, //7<><37>Э<EFBFBD><D0AD> //7
ENUM_RS485_DEV_PRO_08, //8<><38>Э<EFBFBD><D0AD> //8
ENUM_RS485_DEV_PRO_09, //9<><39>Э<EFBFBD><D0AD> //9
ENUM_RS485_DEV_PRO_10, //10<31><30>Э<EFBFBD><D0AD> //10
ENUM_RS485_DEV_PRO_11, //11<31><31>Э<EFBFBD><D0AD> //11
ENUM_RS485_DEV_PRO_12, //12<31><32>Э<EFBFBD><D0AD> //12
ENUM_RS485_DEV_PRO_13, //13<31><33>Э<EFBFBD><D0AD> //13
ENUM_RS485_DEV_PRO_14, //14<31><34>Э<EFBFBD><D0AD> //14
ENUM_RS485_DEV_PRO_15, //15<31><35>Э<EFBFBD><D0AD> //15
ENUM_RS485_DEV_PRO_16, //16<31><36>Э<EFBFBD><D0AD> //16
ENUM_RS485_DEV_PRO_17, //17<31><37>Э<EFBFBD><D0AD> //17
ENUM_RS485_DEV_PRO_18, //18<31><38>Э<EFBFBD><D0AD> //18
ENUM_RS485_DEV_PRO_19, //19<31><39>Э<EFBFBD><D0AD> //19
// ENUM_RS485_DEV_PRO_20, //<2F><>ǰЭ<C7B0><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ //20
}enum_RS485Protocol; //ͬ<><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>԰<EFBFBD><D4B0><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD>з<EFBFBD><D0B7><EFBFBD>
#define LOGIC_DataFlag 0xCC060001 //<2F>߼<EFBFBD><DFBC><EFBFBD>־
#define Logic_FrameType_LogicInfo 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define Logic_FrameType_Global 0x02 //ȫ<><C8AB><EFBFBD><EFBFBD>Ϣ
#define Logic_FrameType_DeviceExist 0x03 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define Logic_FrameType_DeviceAction 0x04 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define Logic_FrameType_VoiceMap 0x05 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>Ϣ
#define Logic_FrameType_DevCheckMap 0x07 //<2F>豸Ѳ<E8B1B8><D1B2><EFBFBD><EFBFBD>·<EFBFBD><C2B7>Ϣ
#define Logic_FrameType_VCCondition 0x08 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define Logic_FrameType_VCPortInfor 0x09 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1>ӳ<EFBFBD><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ
#define Logic_FrameType_VCProperty 0x0B //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define Logic_FrameType_ColorTempMap 0x0A //ɫ<>µ<EFBFBD><C2B5>ڶ˿<DAB6>ӳ<EFBFBD><D3B3>
#define LogicFile_DeviceInfo_InputSet 79 //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2022-05-30 <20><><EFBFBD><EFBFBD><EFBFBD>ֽڴ<D6BD>32->64
typedef enum{
Logic_D_Hear_L,
Logic_D_Hear_H,
Logic_D_Len_L,
Logic_D_Len_H,
Logic_D_CRC_L,
Logic_D_CRC_H,
Logic_D_Frame_L,
Logic_D_Frame_H,
Logic_D_FrameNum_L,
Logic_D_FrameNum_H,
Logic_D_FrameType,
Logic_D_Para,
}LOGIC_INFO_E;
typedef struct {
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
uint16_t writ_time; //ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint8_t parent_port; //<2F><><EFBFBD>豸<EFBFBD>˿<EFBFBD>
uint8_t lin[5]; //<2F>޿<EFBFBD><DEBF>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
uint8_t priproperty[10]; //˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
}LOGICFILE_DEVICE_INFO; //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ
typedef struct{
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
uint64_t RoomState:3; //<2F><>̬
uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint64_t EleState:3; //ȡ<><C8A1>״̬
uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t WashState:3; //ϴ<><CFB4>״̬
uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬
uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬
uint64_t SosState:3; //SOS״̬
uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬
uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬
uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬
uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬
uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD>
uint64_t TimeState:3; //ʱ<><CAB1>
uint64_t NeightState:3; //<2F><>ҹ״̬
uint64_t RcuLockState:3; //1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
}LOGIC_ACTIVE_CONDITION_G; //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
typedef struct {
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
}LOGIC_DEVICE_ACTIVE_G; //<2F>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
#if C8_TYPE
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define PollingDevice_NumMax 15 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define ActiveDevice_NumMax 20 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define NorDevice_NumMax 34 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#else
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define PollingDevice_NumMax 20 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define ActiveDevice_NumMax 34 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#define NorDevice_NumMax 15 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
#endif
typedef struct {
uint8_t Bus_device_num;
uint8_t Active_device_num;
uint8_t Polling_device_num;
uint8_t Nor_device_num;
uint16_t device_num;
uint16_t active_num;
uint16_t voicemap_num;
uint16_t devcheckmap_num; //2023-11-27
uint32_t Bus_device_addr[BusDevice_NumMax];
uint32_t Polling_device_addr[PollingDevice_NumMax];
uint32_t Active_device_addr[ActiveDevice_NumMax];
uint32_t Nor_device_addr[NorDevice_NumMax];
uint32_t ColorTemp_Map_Addr; //ɫ<><C9AB>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>ַ
}LOGICFILE_Content_Of_Statistical; //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
void BLV_DevAction_AllData_Init(void);
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
uint8_t LOGIC_FILE_Check(void);
#endif /* MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_ */

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/*
* md5.h
*
* Created on: Nov 12, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_MD5_H_
#define MCU_DRIVER_INC_MD5_H_
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
void MD5Digest(char *pszInput, unsigned int nInputSize, char *pszOutPut);
void MD5Digest_SRAM(uint32_t add, unsigned int nInputSize, char *pszOutPut);
void MD5Digest_FLASH(uint32_t add, unsigned int nInputSize, char *pszOutPut);
#endif /* MCU_DRIVER_INC_MD5_H_ */

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/*
* rtc.h
*
* Created on: Jul 29, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_RTC_H_
#define MCU_DRIVER_INC_RTC_H_
#include <stdint.h>
#include "ch564.h"
typedef struct{
uint8_t second;
uint8_t minute;
uint8_t hour;
uint8_t week;
uint8_t day;
uint8_t month;
uint8_t year;
}S_RTC;
typedef struct{
uint32_t hour;
uint16_t minute;
uint16_t second;
}G_CORE_RTC;
typedef struct{
uint8_t time_select; //<2F><>ǰʱ<C7B0><CAB1>ѡ<EFBFBD><D1A1> 0x00:<3A><>ǰδѡ<CEB4><D1A1><EFBFBD><EFBFBD>0x01: ѡ<>񱾵ض<F1B1BEB5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:Ӳ<><D3B2>CSIO RTCʱ<43><CAB1>
uint8_t csio_rtc_cnt; //CSIO RTCʱ<43>Ӽ<EFBFBD><D3BC><EFBFBD>
int16_t timezone; //ʱ<><CAB1>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
uint32_t Mcu_GetTime_tick;
}TIME_INFO_T;
extern S_RTC RTC_Raw_Data;
extern S_RTC MCU_RTC_Data;
extern S_RTC Net_RTC_Data;
extern TIME_INFO_T g_time_info;
extern uint32_t Log_Time_ms;
void RTC_Init(void);
uint8_t HEX_Conversion_To_DEC(uint8_t c_num);
uint8_t DEV_Conversion_To_HEX(uint8_t c_num);
uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time);
void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick);
uint8_t RTC_ReadDate(S_RTC *psRTC);
uint8_t RTC_WriteDate(S_RTC SetRTC);
void RTC_TASK(void);
uint8_t RTC_TimeDate_Correct_Figure(uint8_t data);
#endif /* MCU_DRIVER_INC_RTC_H_ */

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/*
* rw_logging.h
*
* Created on: Jul 29, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_RW_LOGGING_H_
#define MCU_DRIVER_INC_RW_LOGGING_H_
#include "ch564.h"
#include <stdint.h>
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
//<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>
#define LOG_Data_Hand 0xA5 //LOG<4F><47><EFBFBD><EFBFBD>ͷ
#define Log_Data_End 0x5A //LOG<4F><47><EFBFBD><EFBFBD>β
#define Log_Data_Len_MAX 512 //<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>512Byte
/*<2A><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>ʽ*/
typedef enum{
S_Log_Hand,
S_Log_SN, //<2F><>־ÿ<D6BE><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
S_Log_Len,
S_Log_Len_8,
S_Log_Check,
S_Log_Date_H, //<2F>꣺5bit <20>£<EFBFBD>5bit <20>գ<EFBFBD>5bit
S_Log_Date_L,
S_Log_Type,
S_Log_Time8B, //Сʱʱ<CAB1><CAB1><EFBFBD><EFBFBD>
S_Log_Time16B,
S_Log_Time24B,
S_Log_Time32B,
S_Log_Data,
}Sram_Log_Data_Format;
uint8_t Log_write_sram(uint8_t data_type,uint8_t *buff,uint16_t len);
void Retain_Flash_Register_Data(void);
void Read_Flash_Register_Data(void);
void LOG_Save_Global_Parameters(void);
uint8_t SRAM_PowerOn_Restore_ParaInfo(void);
#endif /* MCU_DRIVER_INC_RW_LOGGING_H_ */

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/*
* spi_flash.h
*
* Created on: May 20, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_SPI_FLASH_H_
#define MCU_DRIVER_INC_SPI_FLASH_H_
#include "ch564.h"
#define Flash_CS_H GPIOA_SetBits(GPIO_Pin_11)
#define Flash_CS_L GPIOA_ResetBits(GPIO_Pin_11)
#define Flash_ADDRESS_MAX 0x00200000
/***********ָ<><D6B8><EFBFBD><EFBFBD>**********/
//Read
#define P24Q40H_ReadData 0x03
#define P24Q40H_FastReadData 0x0B
#define P24Q40H_FastReadDual 0x3B
//Program and Erase
#define P24Q40H_PageErase 0x81
#define P24Q40H_SectorErase 0x20
#define P24Q40H_BlockErase 0xD8
#define P24Q40H_ChipErase 0xC7
#define P24Q40H_PageProgram 0x02
//Protection
#define P24Q40H_WriteEnable 0x06
#define P24Q40H_WriteDisable 0x04
//Status Register
#define P24Q40H_ReadStatusReg 0x05
#define P24Q40H_WriteStatusReg 0x01
//Other Commands
#define P24Q40H_PowerDown 0xB9
#define P24Q40H_ReleasePowerDown 0xAB
#define P24Q40H_ReadManufactureID 0x90
#define P24Q40H_ReadDeviceID 0x9F
#define P24Q40H_ResetEnable 0x66
#define P24Q40H_Reset 0x99
extern uint8_t Temp_Flash_Buff[4100];
void SPI_FLASH_Init(void);
uint8_t Flash_ReadSR(void);
void Flash_WriteSR(uint8_t sr_val);
void Flash_Write_Enable(void);
void Flash_Write_Disable(void);
uint16_t Flash_ReadID(void);
uint8_t Flash_Wait_Busy(void);
void Flash_PowerDown(void);
void Flash_Wakeup(void);
void Flash_Erase_Chip(void);
void Flash_Erase_Block(uint32_t BLK_ID);
void Flash_Erase_Sector(uint32_t DST_ID);
void Flash_Erase_Page(uint32_t Page_ID);
void Flash_Erase_Pageaddr(uint32_t Page_addr);
void Flash_Read(uint8_t* pBuffer,uint16_t NumByteToRead,uint32_t ReadAddr);
void Flash_Write_Page(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr);
#endif /* MCU_DRIVER_INC_SPI_FLASH_H_ */

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/*
* spi_sram.h
*
* Created on: May 16, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_SPI_SRAM_H_
#define MCU_DRIVER_INC_SPI_SRAM_H_
#include "ch564.h"
#define SRAM_CE_H GPIOA_ResetBits(GPIO_Pin_11)
#define SRAM_CE_L GPIOA_SetBits(GPIO_Pin_11)
#define SRAM_CMD_Read 0x03
#define SRAM_CMD_Fast_Read 0x0B
#define SRAM_CMD_Fast_Read_Quad 0xEB
#define SRAM_CMD_Write 0x02
#define SRAM_CMD_Quad_Write 0x38
#define SRAM_CMD_Enter_Quad_Mode 0x35
#define SRAM_CMD_Exit_Quad_Mode 0xF5
#define SRAM_CMD_Reset_Enable 0x66
#define SRAM_CMD_Reset 0x99
#define SRAM_CMD_Wrap_Boundary_Toggle 0xC0
#define SRAM_CMD_Read_ID 0x9F
#define SRAM_ADDRESS_MAX 0x00800000
void SPI_SRAM_Init(void);
void SRAM_Write_Byte(uint8_t wdate,uint32_t add);
uint8_t SRAM_Read_Byte(uint32_t add);
void SRAM_Write_Word(uint16_t wdate,uint32_t add);
uint16_t SRAM_Read_Word(uint32_t add);
void SRAM_Write_DW(uint32_t wdate,uint32_t add);
uint32_t SRAM_Read_DW(uint32_t add);
uint8_t SRAM_Read_ID_Opeartion(void);
void SRAM_Reset_Operation(void);
void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add);
void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add);
#endif /* MCU_DRIVER_INC_SPI_SRAM_H_ */

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/*
* sram_mem_addr.h
* <20>ⲿSRAM<41><4D>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00000000 ~ 0x007FFFF
*
* Created on: Oct 30, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
#define MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ
***********************************************************
//SRAM<41>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ -
<20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ -
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַΪ0x000100
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ洢<C8B4><E6B4A2><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_BUS_Device_List_Addr
<20>ڴ<EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>Ǵ洢<C7B4><E6B4A2><EFBFBD><EFBFBD>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_POLL_Device_List_Addr
Ȼ<><C8BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_ACTIVE_Device_List_Addr
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>豸˳<E8B1B8><CBB3><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*****************************************************************************************
| | <20><>ʼ<EFBFBD><CABC>ַ | <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ |
| BUS<55>豸<EFBFBD><E8B1B8>Ϣ | SRAM_Device_List_Start_Addr | SRAM_BUS_Device_List_Addr |
| <20><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_BUS_Device_List_Addr | SRAM_POLL_Device_List_Addr |
| <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_POLL_Device_List_Addr | SRAM_ACTIVE_Device_List_Addr |
| <20><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_ACTIVE_Device_List_Addr| SRAM_Device_List_End_Addr |
*****************************************************************************************
* */
#define SRAM_Device_List_Size 0x00000200 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ܴ<EFBFBD>С
#define SRAM_BUS_Device_List_Addr 0x00000000 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ - 4Byte
#define SRAM_POLL_Device_List_Addr 0x00000004 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
#define SRAM_ACTIVE_Device_List_Addr 0x00000008 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
#define SRAM_NORMAL_Device_List_Addr 0x0000000C //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
#define SRAM_Device_List_Start_Addr 0x00000100 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SRAM_Device_List_End_Addr 0x00009FFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - LOGȫ<47><C8AB>
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00B000 - 0x00BFFF*/
#define SRAM_LOG_Device_C5IO_Relay_Status 0x0000B000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
#define SRAM_LOG_Device_C5IO_DO_Status 0x0000B003 //DO״̬ - 1byte
#define SRAM_LOG_Device_C5IO_DI_Status 0x0000B004 //DI״̬ - 2Byte
#define SRAM_LOG_Device_C5MUSIC_Playback_Status 0x0000B006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
#define SRAM_LOG_Device_C5MUSIC_Volume_Status 0x0000B007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
#define SRAM_LOG_Device_C5MUSIC_idx_Status 0x0000B008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
#define SRAM_LOG_Device_Card_Status 0x0000B00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte 2025-09-03 <20><>ûʹ<C3BB><CAB9>
#define SRAM_LOG_Device_Temp_Status 0x0000B00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
/**/
#define SRAM_LOG_Device_Switch_Type 0x0000B00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
#define SRAM_LOG_Device_Switch_Num 0x0000B00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
#define SRAM_LOG_Device_Switch1_Status 0x0000B00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_LOG_Device_Switch2_Status 0x0000B011 //<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_LOG_Device_Switch3_Status 0x0000B013 //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_LOG_RCU_Reboot_Reason 0x0000B015 //RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> 2025-09-27
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - UDPȫ<50><C8AB>
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00C000 - 0x00CFFF*/
#define SRAM_UDP_Device_C5IO_Relay_Status 0x0000C000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
#define SRAM_UDP_Device_C5IO_DO_Status 0x0000C003 //DO״̬ - 1byte
#define SRAM_UDP_Device_C5IO_DI_Status 0x0000C004 //DI״̬ - 2Byte
#define SRAM_UDP_Device_C5MUSIC_Playback_Status 0x0000C006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
#define SRAM_UDP_Device_C5MUSIC_Volume_Status 0x0000C007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
#define SRAM_UDP_Device_C5MUSIC_idx_Status 0x0000C008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
#define SRAM_UDP_Device_Card_Status 0x0000C00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte
#define SRAM_UDP_Device_Temp_Status 0x0000C00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
/**/
#define SRAM_UDP_Device_Switch_Type 0x0000C00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
#define SRAM_UDP_Device_Switch_Num 0x0000C00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
#define SRAM_UDP_Device_Switch1_Status 0x0000C00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_UDP_ELEReport_Action 0x0000C011 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
#define SRAM_UDP_ELEReport_EleState 0x0000C012 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
#define SRAM_UDP_ELEReport_EleState_Last 0x0000C013
#define SRAM_UDP_ELEReport_CardState 0x0000C014 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
#define SRAM_UDP_ELEReport_CardState_Last 0x0000C015
#define SRAM_UDP_ELEReport_CardType 0x0000C016 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
#define SRAM_UDP_ELEReport_CardType_Last 0x0000C017
#define SRAM_UDP_ELEReport_VirtualCard 0x0000C018 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
#define SRAM_UDP_ELEReport_VirtualCard_Last 0x0000C019
#define SRAM_UDP_Report_CarbonSatet 0x0000C01A //UDP <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>̼<EFBFBD><CCBC><EFBFBD>˵<EFBFBD>״̬
/*SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>豸<EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ƻ<EFBFBD><C6BB><EFBFBD><EFBFBD><EFBFBD>
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00D000 - 0x00DFFF*/
#define SRAM_UDP_SendData_Writeaddr 0x0000D000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
#define SRAM_UDP_SendData_Readaddr 0x0000D004 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
#define SRAM_UDP_SendData_Tempaddr 0x0000D008 //
#define SRAM_UDP_SendData_Startaddr 0x0000D010 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SRAM_UDP_SendData_Endaddr 0x0000D7EA //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define SRAM_UDP_SendData_Size 0x9C //һ<>η<EFBFBD><CEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_UDP_RecvData_Writeaddr 0x0000D800 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
#define SRAM_UDP_RecvData_Readaddr 0x0000D804 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
#define SRAM_UDP_RecvData_Tempaddr 0x0000D808 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ַ
#define SRAM_UDP_RecvData_ControlNum 0x0000D80C //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>
#define SRAM_UDP_RecvData_Startaddr 0x0000D810 //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define SRAM_UDP_RecvData_Endaddr 0x0000DFEA //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
/*<2A>ϵ<EFBFBD><CFB5>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><>ַ<EFBFBD><D6B7>Χ:0x0x00E100 ~ 0x00E1FF */
#define SRAM_PowerOn_Restore_StartAddr 0x0000E100
#define SRAM_PowerOn_Restore_Flag 0x0000E100
#define SRAM_PowerOn_Restore_Len 0x0000E101
#define SRAM_PowerOn_Restore_Check 0x0000E102
#define SRAM_PowerOn_Restore_Param 0x0000E103
#define SRAM_PowerOn_Restore_EndAddr 0x0000E1FF
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼Boot<6F><74><EFBFBD><EFBFBD> дMCU Flash<73><68><EFBFBD><EFBFBD> <20><>С<EFBFBD><D0A1>0x200 2025-04-28*/
#define SRAM_APP_FEATURE_2_CHECK_Addr 0x0000E600
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
#define SRAM_UART0_RecvBuffer_Start_Addr 0x00010000
#define SRAM_UART0_RecvBuffer_End_Addr 0x00010FFF
#define SRAM_UART0_SendBuffer_Start_Addr 0x00011000
#define SRAM_UART0_SendBuffer_End_Addr 0x00011FFF
#define SRAM_UART1_RecvBuffer_Start_Addr 0x00012000
#define SRAM_UART1_RecvBuffer_End_Addr 0x00012FFF
#define SRAM_UART1_SendBuffer_Start_Addr 0x00013000
#define SRAM_UART1_SendBuffer_End_Addr 0x00013FFF
#define SRAM_UART2_RecvBuffer_Start_Addr 0x00014000
#define SRAM_UART2_RecvBuffer_End_Addr 0x00014FFF
#define SRAM_UART2_SendBuffer_Start_Addr 0x00015000
#define SRAM_UART2_SendBuffer_End_Addr 0x00015FFF
#define SRAM_UART3_RecvBuffer_Start_Addr 0x00016000
#define SRAM_UART3_RecvBuffer_End_Addr 0x00016FFF
#define SRAM_UART3_SendBuffer_Start_Addr 0x00017000
#define SRAM_UART3_SendBuffer_End_Addr 0x00017FFF
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>޸Ŀ<DEB8>ʼ -- <20><>Ҫ<EFBFBD>޸<EFBFBD> */
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>¼ 0x031400~0x031FFF 3K<33><4B>ÿ<EFBFBD><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>6<EFBFBD>ֽڣ<D6BD>һ<EFBFBD><D2BB><EFBFBD>ܹ<EFBFBD><DCB9>ܴ<EFBFBD>509<30><39><EFBFBD>豸<EFBFBD><E8B1B8>*/
#define SRAM_DEVICE_ONLINE_STATE_WRITE_ADDR 0x00031400 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬д<CCAC><D0B4><EFBFBD><EFBFBD>ַ
#define SRAM_DEVICE_ONLINE_STATE_READ_ADDR 0x00031404 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1>ַ
#define SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR 0x00031408 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>м<EFBFBD><D0BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><D6B7>
#define SRAM_DEVICE_ONLINE_STATE_START_ADDR 0x00031410 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʿ<EFBFBD>ʼд<CABC><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
//#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031500 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7> - <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031FFE //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>޸Ľ<DEB8><C4BD><EFBFBD>*/
#define SRAM_CheckMap_List_Start_Addr 0x0003A800 //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>10K
#define SRAM_CheckMap_List_End_Addr 0x0003CFFF //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_VCard_PortInf_Start_Addr 0x0003D000 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>2K
#define SRAM_VCard_PortInf_End_Addr 0x0003D7FF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
#define SRAM_VCard_ConNToS_Start_Addr 0x0003D800 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
#define SRAM_VCard_ConNToS_End_Addr 0x0003DBFF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
#define SRAM_VCard_ConSToN_Start_Addr 0x0003DC00 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
#define SRAM_VCard_Con_End_Addr 0x0003DFFF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
#define SRAM_VCard_DetectWin_Start_Addr 0x0003E000 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>60K
#define SRAM_VCard_DetectWin_End_Addr 0x0004CFFF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_Register_Start_ADDRESS 0x0008E900
#define SRAM_Register_End_ADDRESS 0x0008EFFF
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
#define Register_NetIP_OFFSET 0x0000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - DHCP<43><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>֮<EFBFBD>󣬻<EFBFBD>DHCPʧ<50><CAA7>֮<EFBFBD><D6AE> ʹ<>õ<EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD><EFBFBD>MCUĬ<55><C4AC>IP
#define Register_NetPort_OFFSET 0x0004 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
#define Register_NetMask_OFFSET 0x0008 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
#define Register_NetGateway_OFFSET 0x000C //<2F><><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
#define Register_DNSServerIP_OFFSET 0x0010 //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
#define Register_NETMACKADDR_OFFSET 0x0014 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MACK<43><4B>ַ
#define Register_WebServerIP_OFFSET 0x0018 //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD>õ<EFBFBD><C3B5>ƶ<EFBFBD>IP<49><50>ַ
#define Register_WebServerPort_OFFSET 0x001C //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - 2025-10-11 <20><><EFBFBD><EFBFBD>
#define Register_MandateExpiresTime_OFFSET 0x0020 //MCU<43><55>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
#define Register_CurrentUsageTime_OFFSET 0x0024 //MCU<43><55>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define Register_MandateUTC_OFFSET 0x0028 //<2F><>Ȩʱ<C8A8><CAB1> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȩʱ<C8A8>ĵ<EFBFBD>ǰUTCʱ<43><CAB1>
#define Register_MandateLock_OFFSET 0x002C //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
#define Register_NetInfo_EN_OFFSET 0x0030 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD>DHCPʹ<50><CAB9> - 1Byte<74><65><EFBFBD><EFBFBD>ʾDHCPʹ<50><CAB9> 1Byte<74>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ΪĬ<CEAA><C4AC>IP<49><50>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
#define Register_NetOfflineTime_OFFSET 0x0034 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1> - 4Byte <20><>λ<EFBFBD><CEBB>ms
#define Register_ProjectCode_OFFSET 0x0038 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
#define Register_SoftwareVersion_OFFSET 0x003C //<2F><><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> - <20>̼<EFBFBD><CCBC>汾<EFBFBD><E6B1BE>
#define Register_ConfigVersion_OFFSET 0x0040 //<2F><><EFBFBD>ð汾<C3B0><E6B1BE>
#define Register_RoomNumber_OFFSET 0x0044 //<2F><><EFBFBD><EFBFBD>
#define Register_HouseType_OFFSET 0x0048 //<2F><><EFBFBD><EFBFBD>
#define Register_RoomRent_OFFSET 0x004C //<2F><>̬<EFBFBD><CCAC>Ϣ - <20><><EFBFBD><EFBFBD>״̬
#define Register_SeasonStatus_OFFSET 0x0050 //<2F><><EFBFBD><EFBFBD>״̬
#define Register_TFTPStatus_OFFSET 0x0054 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD> 4Byte
#define Register_TFTPUploadTime_OFFSET 0x0058 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> 4Byte
#define Register_BLVServerDmLen_OFFSET 0x005C //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte
#define Register_BLVServerDmName_OFFSET 0x0060 //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 64Byte
#define Register_UDPPeriodicTime_OFFSET 0x00A0 //UDPͨѶ <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte <20><>λ:ms
#define Register_RoomNumNote_OFFSET 0x0100 //<2F><><EFBFBD>ű<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
#define Register_RoomTypeNote_OFFSET 0x0110 //<2F><><EFBFBD>ͱ<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
#define Register_RoomNote_OFFSET 0x0120 //<2F><><EFBFBD>䱸ע<E4B1B8><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 96Byte
#define Register_TFTPLOGPort_OFFSET 0x0180 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - 2Byte
#define Register_TFTPLOGTime_OFFSET 0x0182 //TFTP<54><50>־<EFBFBD>ϴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
#define Register_TFTPDmLens_OFFSET 0x0184 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD>߼<EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ*********
*
* 2025-07-29 <20>޸<EFBFBD>SRAM<41>洢<EFBFBD><E6B4A2>ַ 0x00400000 ~ 0x007FFFFF SIZE:4MByte
* 1<><31><EFBFBD>޸ĶԿռ<D4BF><D5BC><EFBFBD>ַУ<D6B7>飬<EFBFBD><E9A3AC>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>쳣
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5>û<EFBFBD><C3BB>ʹ<EFBFBD>õı<C3B5><C4B1><EFBFBD>
* */
#define SRAM_LOG_Start_Address 0x00400000 //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>ʼ<EFBFBD><CABC>ַ - <20><>ǰSRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ - 4Byte
#define SRAM_TFTP_LOG_READ_Address 0x00400004 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
#define SRAM_FLASH_LOG_READ_Address 0x00400008 //Flash<73><68>־д<D6BE><D0B4><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
#define SRAM_SD_LOG_READ_Start_Address 0x0040000C //SD<53><44>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ - <20><>TFTP<54><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ʱ<EFBFBD><CAB1>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ֵ<EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDд<44><D0B4>LOGʹ<47><CAB9> - 4Byte
#define SRAM_SD_LOG_READ_End_Address 0x00400010 //SD<53><44>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 4Byte
#define SRAM_Flash_Serial_Number 0x00400014 //<2F><>־<EFBFBD><D6BE><EFBFBD>ű<EFBFBD><C5B1><EFBFBD><EFBFBD><EFBFBD>ַ - 1Byte
#define SRAM_LOGFlag_Reset_Source 0x00400018 //Launcher<65><72><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD> - <20><>APPʹ<50><CAB9>
#define SRAM_LOGFlag_Addr_INIT 0x00400019 //Launcher<65><72>¼<EFBFBD><C2BC>ַSRAM<41><4D>ʼ<EFBFBD><CABC>״̬<D7B4><CCAC>־λ - <20><>APPʹ<50><CAB9>
#define SRAM_LOGFlag_Debug_Switch 0x0040001A //Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ 4Byte - <20><>APPʹ<50><CAB9>
#define SRAM_APPFlag_Reset_Source 0x0040001E //App<70><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ 2Byte - <20><>Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣʹ<CFA2><CAB9> 0xBBC1
#define SRAM_LOG_DATA_Address 0x00400100 //<2F><>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>ַ
#define SRAM_LOG_End_Address 0x007FFFFF //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 0x007FFFFF
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
#endif /* MCU_DRIVER_INC_SRAM_MEM_ADDR_H_ */

20
MCU_Driver/inc/timer.h Normal file
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@@ -0,0 +1,20 @@
/*
* timer.h
*
* Created on: May 16, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_TIMER_H_
#define MCU_DRIVER_INC_TIMER_H_
#include "ch564.h"
extern volatile uint32_t Time0_100us;
extern volatile uint32_t Time0_1ms;
void TIMER0_Init(void);
void Timer0_Task(void);
#endif /* MCU_DRIVER_INC_TIMER_H_ */

82
MCU_Driver/inc/uart.h Normal file
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/*
* uart.h
*
* Created on: May 14, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_UART_H_
#define MCU_DRIVER_INC_UART_H_
#include "ch564.h"
#define Recv_2400_TimeOut 10 //ms
#define Recv_9600_TimeOut 5 //ms
#define Recv_115200_TimeOut 3 //ms
#define USART_BUFFER_NUM 3
#define USART_BUFFER_SIZE 100
#define MCU485_EN1_H
#define MCU485_EN1_L
#define MCU485_EN2_H
#define MCU485_EN2_L
#define MCU485_EN3_H
#define MCU485_EN3_L
typedef uint8_t (*Uart_prt)(uint8_t *,uint16_t);
typedef enum
{
UART_0,
UART_1,
UART_2,
UART_3,
UART_MAX,
}UART_IDX;
typedef struct{
uint8_t RecvBuffer[USART_BUFFER_SIZE];
uint8_t Receiving;
uint16_t RecvLen;
uint32_t RecvTimeout;
uint32_t RecvIdleTiming;
uint32_t TX_Buffer_WriteAddr;
uint32_t TX_Buffer_ReadAddr;
uint32_t RX_Buffer_WriteAddr;
uint32_t RX_Buffer_ReadAddr;
}__attribute__((packed)) UART_t;
extern UART_t g_uart[UART_MAX];
void UARTx_Init(UART_IDX uart_id, uint32_t buad);
void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud);
void UART0_RECEIVE(void);
void UART1_RECEIVE(void);
void UART2_RECEIVE(void);
void UART3_RECEIVE(void);
uint8_t UART0_ChangeBaud(uint32_t baudrate);
uint8_t UART1_ChangeBaud(uint32_t baudrate);
uint8_t UART2_ChangeBaud(uint32_t baudrate);
uint8_t UART3_ChangeBaud(uint32_t baudrate);
void Uart0_Flush(uint16_t over_time);
void Uart1_Flush(uint16_t over_time);
void Uart2_Flush(uint16_t over_time);
void Uart3_Flush(uint16_t over_time);
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
void MCU485_SendString_1(uint8_t *buf, uint16_t len);
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len);
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len);
#endif /* MCU_DRIVER_INC_UART_H_ */

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MCU_Driver/inc/watchdog.h Normal file
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/*
* watchdog.h
*
* Created on: Nov 12, 2025
* Author: cc
*/
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
#define MCU_DRIVER_INC_WATCHDOG_H_
void WDT_Init(void);
void WDT_Feed(void);
void WDT_Reinit(void);
#endif /* MCU_DRIVER_INC_WATCHDOG_H_ */

33
MCU_Driver/led.c Normal file
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/*
* led.c
*
* Created on: 2025<32><35>5<EFBFBD><35>15<31><35>
* Author: cc
*/
#include "led.h"
#include "debug.h"
#include <stdio.h>
#include <string.h>
__attribute__((section(".non_0_wait"))) void SYS_LED_Init(void)
{
GPIOA_ModeCfg(GPIO_Pin_12,GPIO_ModeOut_PP); //LED
SYS_LED_ON;
}
__attribute__((section(".non_0_wait"))) void SYS_LED_Task(void)
{
static uint32_t led_tick = 0;
if(SysTick_1ms - led_tick >= 1000 ){
led_tick = SysTick_1ms;
SYS_LED_FLIP;
}
}

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MCU_Driver/log_api.c Normal file
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/***********************************<2A><><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݴ洢<DDB4><E6B4A2><EFBFBD><EFBFBD> - <20>ṩ<EFBFBD><E1B9A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>***************************************/
#include "rw_logging.h"
#include "SPI_SRAM.h"
#include "Log_api.h"
#include "string.h"
#include "spi_flash.h"
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <stdarg.h>
uint32_t SYS_Log_Switch = (LogType_Launcher_SWITCH << LogType_Launcher_bit) + \
(LogType_SYS_Record_SWITCH << LogType_SYS_Record_bit) + \
(LogType_Device_COMM_SWITCH << LogType_Device_COMM_bit) + \
(LogType_Device_Online_SWITCH << LogType_Device_Online_bit) + \
(LogType_Global_Parameters_SWITCH << LogType_Global_Parameters_bit) + \
(LogType_Net_COMM_SWITCH << LogType_Net_COMM_bit) + \
(LogType_Logic_Record_SWITCH << LogType_Logic_Record_bit);
/*******************************************************************************
* Function Name : LOG_Launcher_APP_Check_Record
* Description : Launcher<65><72><EFBFBD><EFBFBD> - У<><D0A3>APP
* Input :
state :״̬
0x00:<3A><>ͬ
0x01:<3A><>ͬ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Launcher_APP_Check_Record(uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
{
uint8_t temp_buff[3] = {0};
temp_buff[0] = LLauncher_App_Check;
temp_buff[1] = state;
Log_write_sram(LogType_Launcher,temp_buff,2);
}
}
/*******************************************************************************
* Function Name : LOG_Launcher_APP_Check_Record
* Description : Launcher<65><72><EFBFBD><EFBFBD> - У<><D0A3>APP
* Input :
state :״̬
0x00:<3A>ɹ<EFBFBD>
0x01:ʧ<><CAA7>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Read_App_Record(uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
{
uint8_t temp_buff[3] = {0};
temp_buff[0] = LLauncher_Read_App;
temp_buff[1] = state;
Log_write_sram(LogType_Launcher,temp_buff,2);
}
}
/*******************************************************************************
* Function Name : LOG_Launcher_Write_Flash_Record
* Description : Launcher<65><72><EFBFBD><EFBFBD> - Flashд<68><D0B4>
* Input :
addr :д<><D0B4><EFBFBD><EFBFBD>ַ
len :д<>볤<EFBFBD><EBB3A4>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Write_Flash_Record(uint32_t addr,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
{
uint8_t temp_buff[7] = {0};
temp_buff[0] = LLauncher_Write_Flash;
temp_buff[1] = addr & 0xFF;
temp_buff[2] = (addr >> 8) & 0xFF;
temp_buff[3] = (addr >> 16) & 0xFF;
temp_buff[4] = (addr >> 24) & 0xFF;
temp_buff[5] = len & 0xFF;
temp_buff[6] = (len >> 8) & 0xFF;
Log_write_sram(LogType_Launcher,temp_buff,7);
}
}
/*******************************************************************************
* Function Name : LOG_Launcher_Factory_Reset_Record
* Description : Launcher<65><72><EFBFBD><EFBFBD> - <20>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Factory_Reset_Record(void)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
{
uint8_t temp_buff[3] = {0};
temp_buff[0] = LLauncher_Factory_Reset;
temp_buff[1] = 0x00;
Log_write_sram(LogType_Launcher,temp_buff,2);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_PHY_Change_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - PHY״̬<D7B4><CCAC>¼
* Input :
state :״̬
0x00:<3A>γ<EFBFBD>
0x01:<3A><><EFBFBD><EFBFBD>
0x02:TCP<43><50>ʱ
0x03:TCP<43>Ͽ<EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_PHY_Change_Record(uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[3] = {0};
temp_buff[0] = LSYS_PHY_Change;
temp_buff[1] = state;
Log_write_sram(LogType_SYS_Record,temp_buff,2);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_DevInfo_Error_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
* Input :
dev :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
addr :<3A>豸<EFBFBD><E8B1B8>ַ
info_addr :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_DevInfo_Error_Record(uint8_t dev,uint8_t addr,uint32_t info_addr)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[8] = {0};
temp_buff[0] = LSYS_DevInfo_Error;
temp_buff[1] = dev;
temp_buff[2] = addr;
temp_buff[3] = info_addr & 0xFF;
temp_buff[4] = (info_addr >> 8) & 0xFF;
temp_buff[5] = (info_addr >> 16) & 0xFF;
temp_buff[6] = (info_addr >> 24) & 0xFF;
Log_write_sram(LogType_SYS_Record,temp_buff,7);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_API_State_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - API״̬<D7B4><CCAC>¼
* Input :
API_way :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
0x01:<3A><><EFBFBD><EFBFBD>
0x02:<3A><><EFBFBD><EFBFBD>
state :״̬
0x01:д<><D0B4><EFBFBD>ɹ<EFBFBD>
0x02:д<><D0B4>ʧ<EFBFBD><CAA7>
0x03:<3A>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
0x04:MD5У<35><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
0x05:CRCУ<43><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
0x06:<3A><>תLauncher
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_API_State_Record(uint8_t API_way,uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[8] = {0};
uint8_t temp_len = 0;
temp_buff[temp_len++] = LSYS_API_State;
temp_buff[temp_len++] = API_way;
temp_buff[temp_len++] = state;
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_NET_Argc_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
* Input :
IP :<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>IP<49><50>ַ - 4Byte
MAC :<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>MAC<41><43>ַ - 4Byte
DNS_IP1 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP1 - <20>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD> - 4Byte
DNS_IP2 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP2 - TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
DNS_IP3 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP3 - MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_NET_Argc_Record(uint8_t *IP,uint8_t *MAC,uint8_t *DNS_IP1,uint8_t *DNS_IP2,uint8_t *DNS_IP3)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[40] = {0};
uint8_t temp_len = 0;
temp_buff[temp_len++] = LSYS_NET_ARGC;
temp_buff[temp_len++] = IP[0];
temp_buff[temp_len++] = IP[1];
temp_buff[temp_len++] = IP[2];
temp_buff[temp_len++] = IP[3];
temp_buff[temp_len++] = MAC[0];
temp_buff[temp_len++] = MAC[1];
temp_buff[temp_len++] = MAC[2];
temp_buff[temp_len++] = MAC[3];
temp_buff[temp_len++] = MAC[4];
temp_buff[temp_len++] = MAC[5];
temp_buff[temp_len++] = DNS_IP1[0];
temp_buff[temp_len++] = DNS_IP1[1];
temp_buff[temp_len++] = DNS_IP1[2];
temp_buff[temp_len++] = DNS_IP1[3];
temp_buff[temp_len++] = DNS_IP2[0];
temp_buff[temp_len++] = DNS_IP2[1];
temp_buff[temp_len++] = DNS_IP2[2];
temp_buff[temp_len++] = DNS_IP2[3];
temp_buff[temp_len++] = DNS_IP3[0];
temp_buff[temp_len++] = DNS_IP3[1];
temp_buff[temp_len++] = DNS_IP3[2];
temp_buff[temp_len++] = DNS_IP3[3];
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_MQTT_Argc_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
* Input :
productkey :<3A><>Ʒ<EFBFBD><C6B7>Կ - 12Byte
devname :<3A>豸<EFBFBD><E8B1B8> - 65Byte
devsecret :<3A>豸<EFBFBD><E8B1B8>Կ - 33Byte
publish :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 65Byte
sublish :<3A><><EFBFBD>ĵ<EFBFBD>ַ - 65Byte
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_MQTT_Argc_Record(uint8_t *productkey,uint8_t *devname,uint8_t *devsecret,uint8_t *publish,uint8_t *sublish)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LSYS_MQTT_ARGC;
for(uint8_t i=0;i<12;i++)
{
Temp_Flash_Buff[temp_len++] = productkey[i];
}
for(uint8_t i=0;i<65;i++)
{
Temp_Flash_Buff[temp_len++] = devname[i];
}
for(uint8_t i=0;i<33;i++)
{
Temp_Flash_Buff[temp_len++] = devsecret[i];
}
for(uint8_t i=0;i<65;i++)
{
Temp_Flash_Buff[temp_len++] = publish[i];
}
for(uint8_t i=0;i<65;i++)
{
Temp_Flash_Buff[temp_len++] = sublish[i];
}
Log_write_sram(LogType_SYS_Record,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_Server_Comm_State_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20>ƶ<EFBFBD>ͨѶ״̬<D7B4><CCAC>¼
* Input :
state :״̬
0x00:<3A><><EFBFBD><EFBFBD>
0x01:<3A><><EFBFBD><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_Server_Comm_State_Record(uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[8] = {0};
uint8_t temp_len = 0;
temp_buff[temp_len++] = LSYS_Server_Comm_State;
temp_buff[temp_len++] = state;
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_NET_Argc_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
* Input :
IP :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - 4Byte
Gateway :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַ - 4Byte
IP_Mask :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
DNS_Add :DNS<4E><53>ַ - 4Byte
ArgcFlag :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ - 1Byte
DHCPFlag :DHCPʹ<50>ܱ<EFBFBD>־ - 1Byte
ServerFlag :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ - 1Byte
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_NET_Argc_Init_Record(uint8_t *IP,uint8_t *Gateway,uint8_t *IP_Mask,uint8_t *DNS_Add,uint8_t ArgcFlag,uint8_t DHCPFlag,uint8_t ServerFlag)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[40] = {0};
uint8_t temp_len = 0;
temp_buff[temp_len++] = LSYS_NET_DefaultARGC;
temp_buff[temp_len++] = IP[0];
temp_buff[temp_len++] = IP[1];
temp_buff[temp_len++] = IP[2];
temp_buff[temp_len++] = IP[3];
temp_buff[temp_len++] = Gateway[0];
temp_buff[temp_len++] = Gateway[1];
temp_buff[temp_len++] = Gateway[2];
temp_buff[temp_len++] = Gateway[3];
temp_buff[temp_len++] = IP_Mask[0];
temp_buff[temp_len++] = IP_Mask[1];
temp_buff[temp_len++] = IP_Mask[2];
temp_buff[temp_len++] = IP_Mask[3];
temp_buff[temp_len++] = DNS_Add[0];
temp_buff[temp_len++] = DNS_Add[1];
temp_buff[temp_len++] = DNS_Add[2];
temp_buff[temp_len++] = DNS_Add[3];
temp_buff[temp_len++] = ArgcFlag;
temp_buff[temp_len++] = DHCPFlag;
temp_buff[temp_len++] = ServerFlag;
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_SYS_NET_Argc_Record
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
* Input :
state<74><65>״̬
0x01<30><31><EFBFBD>㰴
0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
0x03<30><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿ<EFBFBD>
0x04<30><34><EFBFBD>ﵽ<EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_SYS_RCUKey_State_Record(uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
{
uint8_t temp_buff[5] = {0};
uint8_t temp_len = 0;
temp_buff[temp_len++] = LSYS_RCUKey_State;
temp_buff[temp_len++] = state;
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Device_COMM_ASK_TO_Reply_Record
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCU<43><55>ѯ<EFBFBD>ظ<EFBFBD><D8B8>仯<EFBFBD><E4BBAF><EFBFBD>ݼ<EFBFBD>¼
* Input :
port :<3A>˿ں<CBBF>
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
data_tick :ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
buff :<3A><><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_ASK_TO_Reply_Record(uint8_t port,uint32_t baud,uint32_t data_tick,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_ASK_TO_Reply;
Temp_Flash_Buff[temp_len++] = port;
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_ASK_TO_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint32_t data_tick,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_ASK_TO_Reply;
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Device_COMM_Send_Control_Record
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCU<43>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼ<EFBFBD>¼
* Input :
port :<3A>˿ں<CBBF>
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
buff :<3A><><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Send_Control_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_Send_Control;
Temp_Flash_Buff[temp_len++] = port;
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Send_Control_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_Send_Control;
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Device_COMM_Control_Reply_Record
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCY<43><59><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD><EFBFBD>ݼ<EFBFBD>¼
* Input :
port :<3A>˿ں<CBBF>
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
buff :<3A><><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
Temp_Flash_Buff[temp_len++] = port;
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record3(uint32_t port_addr,uint32_t baud_addr,uint32_t buff_addr,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(buff_addr + i);
}
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Device_COMM_Adjust_Baud_Record
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD>
* Input :
dev_type :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
dev_addr :<3A>豸<EFBFBD><E8B1B8>ַ
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
way :<3A>ı䷽ʽ<E4B7BD><CABD>0x01:<3A><><EFBFBD><EFBFBD>ͨѶʧ<D1B6>ܴﵽ<DCB4><EFB5BD><EFBFBD><EFBFBD>,0x02:ͨѶʧ<D1B6>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD>ﵽ<EFBFBD>ٷֱ<D9B7><D6B1><EFBFBD><EFBFBD><EFBFBD>
fail_num :ʧ<>ܴ<EFBFBD><DCB4><EFBFBD>
sum :<3A>ܰ<EFBFBD><DCB0><EFBFBD>
num :<3A><>ǰͨѶ<CDA8>±<EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Adjust_Baud_Record(uint8_t dev_type,uint8_t dev_addr,uint32_t baud,uint8_t way,uint8_t fail_num,uint8_t sum,uint8_t num)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint8_t temp_buff[12];
uint16_t temp_len = 0;
memset(temp_buff,0,sizeof(temp_buff));
temp_buff[temp_len++] = LCOMM_Adjust_Baud;
temp_buff[temp_len++] = dev_type;
temp_buff[temp_len++] = dev_addr;
temp_buff[temp_len++] = baud & 0xFF;
temp_buff[temp_len++] = (baud >> 8) & 0xFF;
temp_buff[temp_len++] = (baud >> 16) & 0xFF;
temp_buff[temp_len++] = (baud >> 24) & 0xFF;
temp_buff[temp_len++] = way;
temp_buff[temp_len++] = fail_num;
temp_buff[temp_len++] = sum;
temp_buff[temp_len++] = num;
Log_write_sram(LogType_Device_COMM,temp_buff,temp_len);
}
}
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Adjust_Baud_Record2(uint32_t dev_type,uint32_t dev_addr,uint32_t baud_addr)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
{
uint8_t temp_buff[8];
uint16_t temp_len = 0;
memset(temp_buff,0,sizeof(temp_buff));
temp_buff[temp_len++] = LCOMM_Adjust_Baud;
temp_buff[temp_len++] = SRAM_Read_Byte(dev_type);
temp_buff[temp_len++] = SRAM_Read_Byte(dev_addr);
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr);
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
Log_write_sram(LogType_Device_COMM,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Device_Online_Record
* Description : Device_Online<6E><65><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD>߼<EFBFBD>¼
* Input :
dev :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
addr :<3A>豸<EFBFBD><E8B1B8>ַ
state :<3A>豸״̬ - 0x00<30><30><EFBFBD><EFBFBD><EFBFBD>ߣ<EFBFBD>0x01<30><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Device_Online_Record(uint8_t dev,uint8_t addr,uint8_t state)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_Online_bit )) )
{
uint8_t temp_buff[6];
uint16_t temp_len = 0;
memset(temp_buff,0,sizeof(temp_buff));
temp_buff[temp_len++] = dev;
temp_buff[temp_len++] = addr;
temp_buff[temp_len++] = state;
Log_write_sram(LogType_Device_Online,temp_buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Global_ParaInfo_Record
* Description : Global_Parameters<72><73><EFBFBD><EFBFBD> - ȫ<>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>¼ <20><><EFBFBD><EFBFBD>10<31><30><EFBFBD>Ӽ<EFBFBD>¼
* Input :
buff :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
len :<3A>豸<EFBFBD><E8B1B8>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Global_ParaInfo_Record(uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Global_Parameters_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LGlobal_Para;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Global_Parameters,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_Global_ParaInfo_Record
* Description : Global_Parameters<72><73><EFBFBD><EFBFBD> - ȫ<>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>¼ <20><><EFBFBD><EFBFBD>10<31><30><EFBFBD>Ӽ<EFBFBD>¼
* Input :
buff :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
len :<3A>豸<EFBFBD><E8B1B8>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Global_DevInfo_Record(uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Global_Parameters_bit )) )
{
uint16_t buff_len = len ;
uint16_t temp_len = 0;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LGlobal_Dev;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Global_Parameters,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_NET_COMM_Record
* Description : Net_COMM<4D><4D><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
* Input :
SocketId:<3A>׽<EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(1~4)
ip :<3A><><EFBFBD>յ<EFBFBD>IP<49><50>ַ
port :<3A><><EFBFBD>յ<EFBFBD>Port
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_NET_COMM_Send_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Net_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LNetComm_Send;
Temp_Flash_Buff[temp_len++] = SocketId;
Temp_Flash_Buff[temp_len++] = ip[0];
Temp_Flash_Buff[temp_len++] = ip[1];
Temp_Flash_Buff[temp_len++] = ip[2];
Temp_Flash_Buff[temp_len++] = ip[3];
Temp_Flash_Buff[temp_len++] = (port) & 0xFF;
Temp_Flash_Buff[temp_len++] = (port >> 8) & 0xFF;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Net_COMM,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_NET_COMM_Record
* Description : Net_COMM<4D><4D><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
* Input :
SocketId:<3A>׽<EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(1~4)
ip :<3A><><EFBFBD>յ<EFBFBD>IP<49><50>ַ
port :<3A><><EFBFBD>յ<EFBFBD>Port
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_NET_COMM_Recv_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Net_COMM_bit )) )
{
uint16_t buff_len = len ;
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LNetComm_Recv;
Temp_Flash_Buff[temp_len++] = SocketId;
Temp_Flash_Buff[temp_len++] = ip[0];
Temp_Flash_Buff[temp_len++] = ip[1];
Temp_Flash_Buff[temp_len++] = ip[2];
Temp_Flash_Buff[temp_len++] = ip[3];
Temp_Flash_Buff[temp_len++] = (port) & 0xFF;
Temp_Flash_Buff[temp_len++] = (port >> 8) & 0xFF;
for(uint16_t i=0;i<buff_len;i++)
{
Temp_Flash_Buff[temp_len++] = buff[i];
}
Log_write_sram(LogType_Net_COMM,Temp_Flash_Buff,temp_len);
}
}
/*******************************************************************************
* Function Name : LOG_LogicInfo_DebugRecord
* Description : Logic_Rec<65><63><EFBFBD><EFBFBD> - <20>߼<EFBFBD><DFBC><EFBFBD>Ϣ <20><><EFBFBD>Լ<EFBFBD>¼
* Input :
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_LogicInfo_DebugRecord(char *fmt,...)
{
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Logic_Record_bit )) )
{
uint16_t temp_len = 0;
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
Temp_Flash_Buff[temp_len++] = LLogic_DebugString;
va_list ap; //<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>char<61><72><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
va_start(ap, fmt); //ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ֵ--<2D><>ʼ<EFBFBD><CABC>
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ո<EFBFBD>ʽ<EFBFBD><CABD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>-<2D><><EFBFBD>ŵ<EFBFBD>strָ<72><D6B8><EFBFBD>Ŀռ<C4BF>
temp_len += vsnprintf((char *)&Temp_Flash_Buff[1],512,fmt,ap);
va_end(ap); //<2F><>apָ<70><D6B8><EFBFBD><EFBFBD>ΪNULL
Log_write_sram(LogType_Logic_Record,(uint8_t *)Temp_Flash_Buff,temp_len);
}
}

3931
MCU_Driver/logic_file_function.c Normal file
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294
MCU_Driver/md5.c Normal file
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@@ -0,0 +1,294 @@
/*
* md5.c
*
* Created on: Nov 12, 2025
* Author: cc
*/
#include "md5.h"
#include "spi_flash.h"
#include "spi_sram.h"
#include "watchdog.h"
typedef unsigned char *POINTER;
typedef unsigned short int UINT2;
typedef unsigned int UINT4;
typedef struct
{
UINT4 state[4];
UINT4 count[2];
unsigned char buffer[64];
}MD5_CTX;
#define S11 7
#define S12 12
#define S13 17
#define S14 22
#define S21 5
#define S22 9
#define S23 14
#define S24 20
#define S31 4
#define S32 11
#define S33 16
#define S34 23
#define S41 6
#define S42 10
#define S43 15
#define S44 21
static unsigned char PADDING[64] = {
0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
#define F(x, y, z) (((x) & (y)) | ((~x) & (z)))
#define G(x, y, z) (((x) & (z)) | ((y) & (~z)))
#define H(x, y, z) ((x) ^ (y) ^ (z))
#define I(x, y, z) ((y) ^ ((x) | (~z)))
#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32-(n))))
#define FF(a, b, c, d, x, s, ac) { (a) += F ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
#define GG(a, b, c, d, x, s, ac) { (a) += G ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
#define HH(a, b, c, d, x, s, ac) { (a) += H ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
#define II(a, b, c, d, x, s, ac) { (a) += I ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
void Encode(unsigned char *output, UINT4 *input, unsigned int len)
{
unsigned int i, j;
for (i = 0, j = 0; j < len; i++, j += 4) {
output[j] = (unsigned char)(input[i] & 0xff);
output[j+1] = (unsigned char)((input[i] >> 8) & 0xff);
output[j+2] = (unsigned char)((input[i] >> 16) & 0xff);
output[j+3] = (unsigned char)((input[i] >> 24) & 0xff);
}
}
void MD5Init(MD5_CTX *context)
{
context->count[0] = context->count[1] = 0;
context->state[0] = 0x67452301;
context->state[1] = 0xefcdab89;
context->state[2] = 0x98badcfe;
context->state[3] = 0x10325476;
}
void Decode(UINT4 *output, unsigned char *input, unsigned int len)
{
unsigned int i, j;
for (i = 0, j = 0; j < len; i++, j += 4) {
output[i] = ((UINT4)input[j]) | (((UINT4)input[j+1]) << 8) | (((UINT4)input[j+2]) << 16) | (((UINT4)input[j+3]) << 24);
}
}
void MD5Transform (UINT4 state[4], unsigned char block[64])
{
UINT4 a = state[0], b = state[1], c = state[2], d = state[3], x[16];
Decode (x, block, 64);
FF (a, b, c, d, x[ 0], S11, 0xd76aa478); /* 1 */
FF (d, a, b, c, x[ 1], S12, 0xe8c7b756); /* 2 */
FF (c, d, a, b, x[ 2], S13, 0x242070db); /* 3 */
FF (b, c, d, a, x[ 3], S14, 0xc1bdceee); /* 4 */
FF (a, b, c, d, x[ 4], S11, 0xf57c0faf); /* 5 */
FF (d, a, b, c, x[ 5], S12, 0x4787c62a); /* 6 */
FF (c, d, a, b, x[ 6], S13, 0xa8304613); /* 7 */
FF (b, c, d, a, x[ 7], S14, 0xfd469501); /* 8 */
FF (a, b, c, d, x[ 8], S11, 0x698098d8); /* 9 */
FF (d, a, b, c, x[ 9], S12, 0x8b44f7af); /* 10 */
FF (c, d, a, b, x[10], S13, 0xffff5bb1); /* 11 */
FF (b, c, d, a, x[11], S14, 0x895cd7be); /* 12 */
FF (a, b, c, d, x[12], S11, 0x6b901122); /* 13 */
FF (d, a, b, c, x[13], S12, 0xfd987193); /* 14 */
FF (c, d, a, b, x[14], S13, 0xa679438e); /* 15 */
FF (b, c, d, a, x[15], S14, 0x49b40821); /* 16 */
GG (a, b, c, d, x[ 1], S21, 0xf61e2562); /* 17 */
GG (d, a, b, c, x[ 6], S22, 0xc040b340); /* 18 */
GG (c, d, a, b, x[11], S23, 0x265e5a51); /* 19 */
GG (b, c, d, a, x[ 0], S24, 0xe9b6c7aa); /* 20 */
GG (a, b, c, d, x[ 5], S21, 0xd62f105d); /* 21 */
GG (d, a, b, c, x[10], S22, 0x2441453); /* 22 */
GG (c, d, a, b, x[15], S23, 0xd8a1e681); /* 23 */
GG (b, c, d, a, x[ 4], S24, 0xe7d3fbc8); /* 24 */
GG (a, b, c, d, x[ 9], S21, 0x21e1cde6); /* 25 */
GG (d, a, b, c, x[14], S22, 0xc33707d6); /* 26 */
GG (c, d, a, b, x[ 3], S23, 0xf4d50d87); /* 27 */
GG (b, c, d, a, x[ 8], S24, 0x455a14ed); /* 28 */
GG (a, b, c, d, x[13], S21, 0xa9e3e905); /* 29 */
GG (d, a, b, c, x[ 2], S22, 0xfcefa3f8); /* 30 */
GG (c, d, a, b, x[ 7], S23, 0x676f02d9); /* 31 */
GG (b, c, d, a, x[12], S24, 0x8d2a4c8a); /* 32 */
HH (a, b, c, d, x[ 5], S31, 0xfffa3942); /* 33 */
HH (d, a, b, c, x[ 8], S32, 0x8771f681); /* 34 */
HH (c, d, a, b, x[11], S33, 0x6d9d6122); /* 35 */
HH (b, c, d, a, x[14], S34, 0xfde5380c); /* 36 */
HH (a, b, c, d, x[ 1], S31, 0xa4beea44); /* 37 */
HH (d, a, b, c, x[ 4], S32, 0x4bdecfa9); /* 38 */
HH (c, d, a, b, x[ 7], S33, 0xf6bb4b60); /* 39 */
HH (b, c, d, a, x[10], S34, 0xbebfbc70); /* 40 */
HH (a, b, c, d, x[13], S31, 0x289b7ec6); /* 41 */
HH (d, a, b, c, x[ 0], S32, 0xeaa127fa); /* 42 */
HH (c, d, a, b, x[ 3], S33, 0xd4ef3085); /* 43 */
HH (b, c, d, a, x[ 6], S34, 0x4881d05); /* 44 */
HH (a, b, c, d, x[ 9], S31, 0xd9d4d039); /* 45 */
HH (d, a, b, c, x[12], S32, 0xe6db99e5); /* 46 */
HH (c, d, a, b, x[15], S33, 0x1fa27cf8); /* 47 */
HH (b, c, d, a, x[ 2], S34, 0xc4ac5665); /* 48 */
II (a, b, c, d, x[ 0], S41, 0xf4292244); /* 49 */
II (d, a, b, c, x[ 7], S42, 0x432aff97); /* 50 */
II (c, d, a, b, x[14], S43, 0xab9423a7); /* 51 */
II (b, c, d, a, x[ 5], S44, 0xfc93a039); /* 52 */
II (a, b, c, d, x[12], S41, 0x655b59c3); /* 53 */
II (d, a, b, c, x[ 3], S42, 0x8f0ccc92); /* 54 */
II (c, d, a, b, x[10], S43, 0xffeff47d); /* 55 */
II (b, c, d, a, x[ 1], S44, 0x85845dd1); /* 56 */
II (a, b, c, d, x[ 8], S41, 0x6fa87e4f); /* 57 */
II (d, a, b, c, x[15], S42, 0xfe2ce6e0); /* 58 */
II (c, d, a, b, x[ 6], S43, 0xa3014314); /* 59 */
II (b, c, d, a, x[13], S44, 0x4e0811a1); /* 60 */
II (a, b, c, d, x[ 4], S41, 0xf7537e82); /* 61 */
II (d, a, b, c, x[11], S42, 0xbd3af235); /* 62 */
II (c, d, a, b, x[ 2], S43, 0x2ad7d2bb); /* 63 */
II (b, c, d, a, x[ 9], S44, 0xeb86d391); /* 64 */
state[0] += a;
state[1] += b;
state[2] += c;
state[3] += d;
memset ((POINTER)x, 0, sizeof (x));
}
void MD5Update(MD5_CTX *context, unsigned char *input, unsigned int inputLen)
{
unsigned int i, index, partLen;
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
context->count[1] += ((UINT4)inputLen >> 29);
partLen = 64 - index;
if (inputLen >= partLen) {
memcpy((POINTER)&context->buffer[index], (POINTER)input, partLen);
MD5Transform(context->state, context->buffer);
for (i = partLen; i + 63 < inputLen; i += 64)
MD5Transform (context->state, &input[i]);
index = 0;
} else i = 0;
memcpy((POINTER)&context->buffer[index], (POINTER)&input[i], inputLen-i);
}
void MD5_SRAM_Update(MD5_CTX *context, uint32_t add, unsigned int inputLen)
{
unsigned int i, index, partLen;
uint32_t addr = add;
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
context->count[1] += ((UINT4)inputLen >> 29);
partLen = 64 - index;
if (inputLen >= partLen) {
// memcpy((POINTER)&context->buffer[index], (POINTER)input, partLen);
SRAM_DMA_Read_Buff((POINTER)&context->buffer[index], partLen, addr);
addr += partLen;
MD5Transform(context->state, context->buffer);
unsigned char block[64];
for (i = partLen; i + 63 < inputLen; i += 64)
{
WDT_Feed(); //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>Ź<EFBFBD>
SRAM_DMA_Read_Buff(block, 64, addr);
addr += 64;
MD5Transform (context->state, block);
}
index = 0;
} else i = 0;
// memcpy((POINTER)&context->buffer[index], (POINTER)&input[i], inputLen-i);
SRAM_DMA_Read_Buff((POINTER)&context->buffer[index], inputLen-i, addr);
}
void MD5_FLASH_Update(MD5_CTX *context, uint32_t add, unsigned int inputLen)
{
unsigned int i, index, partLen;
uint32_t addr = add;
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
context->count[1] += ((UINT4)inputLen >> 29);
partLen = 64 - index;
if (inputLen >= partLen)
{
Flash_Read((POINTER)&context->buffer[index], partLen, addr);
addr += partLen;
MD5Transform(context->state, context->buffer);
unsigned char block[64];
for (i = partLen; i + 63 < inputLen; i += 64)
{
WDT_Feed(); //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>Ź<EFBFBD>
Flash_Read(block, 64, addr);
addr += 64;
MD5Transform (context->state, block);
}
index = 0;
} else i = 0;
Flash_Read((POINTER)&context->buffer[index], inputLen-i, addr);
}
void MD5Final(unsigned char digest[16], MD5_CTX *context)
{
unsigned char bits[8];
unsigned int index, padLen;
Encode (bits, context->count, 8);
index = (unsigned int)((context->count[0] >> 3) & 0x3f);
padLen = (index < 56) ? (56 - index) : (120 - index);
MD5Update (context, PADDING, padLen);
MD5Update (context, bits, 8);
Encode (digest, context->state, 16);
memset ((POINTER)context, 0, sizeof (*context));
}
void MD5Digest(char *pszInput, unsigned int nInputSize, char *pszOutPut)
{
MD5_CTX context;
//unsigned int len = strlen (pszInput);
unsigned int len = nInputSize;
MD5Init (&context);
MD5Update (&context, (unsigned char *)pszInput, len);
MD5Final ((unsigned char *)pszOutPut, &context);
}
void MD5Digest_SRAM(uint32_t add, unsigned int nInputSize, char *pszOutPut)
{
MD5_CTX context;
//unsigned int len = strlen (pszInput);
unsigned int len = nInputSize;
MD5Init(&context);
MD5_SRAM_Update(&context, add, len);
MD5Final((unsigned char *)pszOutPut, &context);
}
void MD5Digest_FLASH(uint32_t add, unsigned int nInputSize, char *pszOutPut)
{
MD5_CTX context;
unsigned int len = nInputSize;
MD5Init(&context);
MD5_FLASH_Update(&context, add, len);
MD5Final((unsigned char *)pszOutPut, &context);
}

292
MCU_Driver/rtc.c Normal file
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/*
* rtc.c
*
* Created on: Jul 29, 2025
* Author: cc
*/
#include "includes.h"
#include <string.h>
#include <time.h>
S_RTC RTC_Raw_Data = {
.year = 0,
.month = 1,
.day = 1,
.week = 0,
.hour = 0,
.minute = 0,
.second = 0,
};
S_RTC MCU_RTC_Data = {
.year = 0,
.month = 1,
.day = 1,
.week = 0,
.hour = 0,
.minute = 0,
.second = 0,
};
S_RTC Net_RTC_Data; //2024-08-03 <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
TIME_INFO_T g_time_info;
uint32_t Mcu_GetTime_tick = 0;
uint32_t Log_Time_ms = 0;
/*******************************************************************************
* Function Name : RTC_Init
* Description : RTC<54><43>ʼ<EFBFBD><CABC> - ע<><D7A2>BLV-C1Pû<50><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB>ʹ<EFBFBD><CAB9>ϵͳ<CFB5><CDB3>ʱ<EFBFBD><CAB1>ģ<EFBFBD><C4A3>RTC<54><43>ʱ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void RTC_Init(void)
{
memset(&RTC_Raw_Data,0,sizeof(S_RTC));
memset(&MCU_RTC_Data,0,sizeof(S_RTC));
memset(&Net_RTC_Data,0,sizeof(S_RTC));
memset(&g_time_info,0,sizeof(TIME_INFO_T));
RTC_Raw_Data.year = 0x00;
RTC_Raw_Data.month = 0x01;
RTC_Raw_Data.day = 0x01;
RTC_Raw_Data.week = 0x00;
RTC_Raw_Data.hour = 0x00;
RTC_Raw_Data.minute = 0x00;
RTC_Raw_Data.second = 0x00;
MCU_RTC_Data.year = 0x00;
MCU_RTC_Data.month = 0x01;
MCU_RTC_Data.day = 0x01;
MCU_RTC_Data.week = 0x00;
MCU_RTC_Data.hour = 0x00;
MCU_RTC_Data.minute = 0x00;
MCU_RTC_Data.second = 0x00;
}
/*******************************************************************************
* Function Name : HEX_data_conversion_to_DEC
* Description : <20><>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊʵ<CEAA>ʵ<EFBFBD>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x20 -> 20
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t HEX_Conversion_To_DEC(uint8_t c_num)
{
uint8_t rev_num = 0;
rev_num = (c_num/16)*10 + (c_num%16);
return rev_num;
}
/*******************************************************************************
* Function Name : HEX_data_conversion_to_DEC
* Description : <20><>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊʮ<CEAA><CAAE><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 20 -> 0x20
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t DEV_Conversion_To_HEX(uint8_t c_num)
{
uint8_t rev_num = 0;
rev_num = (c_num/10)*16 + (c_num%10);
return rev_num;
}
/*******************************************************************************
* Function Name : RTC_Conversion_To_UTC
* Description : <20><>RTCʱ<43><CAB1>ת<EFBFBD><D7AA>ΪUTCʱ<43><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time)
{
// uint32_t timestamp = 0;
// struct tm test_time;
//
// test_time.tm_year = HEX_Conversion_To_DEC(rtc_time->year) + 2000 - 1900;
// if(rtc_time->month != 0x00)
// {
// test_time.tm_mon = HEX_Conversion_To_DEC(rtc_time->month) - 1;
// }else {
// test_time.tm_mon = 1;
// }
//
// test_time.tm_mday = HEX_Conversion_To_DEC(rtc_time->day);
// test_time.tm_hour = HEX_Conversion_To_DEC(rtc_time->hour);
// test_time.tm_min = HEX_Conversion_To_DEC(rtc_time->minute);
// test_time.tm_sec = HEX_Conversion_To_DEC(rtc_time->second);
// test_time.tm_isdst = -1;
//
// timestamp = mktime(&test_time); //<2F><>ת<EFBFBD><D7AA><EFBFBD>ı<EFBFBD>־<EFBFBD><D6BE>UTCʱ<43><CAB1><EFBFBD><EFBFBD>
//
// /*<2A><><EFBFBD><EFBFBD>ʱ<EFBFBD>仹<EFBFBD><E4BBB9>Ҫ<EFBFBD><D2AA>ȥ8Сʱ*/
// timestamp -= 8*3600;
//
// return timestamp;
return 0x00;
}
/*******************************************************************************
* Function Name : UTC_Conversion_To_RTC
* Description : <20><>UTCʱ<43><CAB1>ת<EFBFBD><D7AA>ΪRTCʱ<43><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick)
{
// uint8_t temp = 0;
// time_t temp_tick = utc_tick + 8*3600; /*<2A><><EFBFBD><EFBFBD>ʱ<EFBFBD>任<EFBFBD><E4BBBB><EFBFBD>ɱ<EFBFBD>׼<EFBFBD><D7BC><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>8Сʱ*/
// struct tm *test_time;
//
// test_time = localtime(&temp_tick);
//
// temp = ( 1900 + test_time->tm_year ) - 2000;
// rtc_time->year = DEV_Conversion_To_HEX(temp);
// temp = 1 + test_time->tm_mon;
// rtc_time->month = DEV_Conversion_To_HEX(temp);
// temp = test_time->tm_mday;
// rtc_time->day = DEV_Conversion_To_HEX(temp);
//
// temp = test_time->tm_hour;
// rtc_time->hour = DEV_Conversion_To_HEX(temp);
// temp = test_time->tm_min;
// rtc_time->minute = DEV_Conversion_To_HEX(temp);
// temp = test_time->tm_sec;
// rtc_time->second = DEV_Conversion_To_HEX(temp);
//
// temp = test_time->tm_wday;
// rtc_time->week = DEV_Conversion_To_HEX(temp);
}
/*******************************************************************************
* Function Name : RTC_ReadDate
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD>ȡ - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t RTC_ReadDate(S_RTC *psRTC)
{
if(g_time_info.time_select == 0x02){
/* CSIOʱ<4F><CAB1><EFBFBD><EFBFBD>ȡ <20><>ʼ*/
psRTC->year = MCU_RTC_Data.year;
psRTC->month = MCU_RTC_Data.month;
psRTC->day = MCU_RTC_Data.day;
psRTC->hour = MCU_RTC_Data.hour;
psRTC->minute = MCU_RTC_Data.minute;
psRTC->second = MCU_RTC_Data.second;
psRTC->week = MCU_RTC_Data.week;
/* CSIOʱ<4F><CAB1><EFBFBD><EFBFBD>ȡ <20><><EFBFBD><EFBFBD>*/
}else{
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ <20><>ʼ */
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ǰʱ<C7B0><CAB1>+<2B><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>
uint32_t rtc_tick = 0;
rtc_tick = RTC_Conversion_To_Unix(&MCU_RTC_Data);
//rtc_tick += rtc_hour*3600+rtc_min*60+rtc_sec;
rtc_tick += SysTick_1s - Mcu_GetTime_tick;
Unix_Conversion_To_RTC(psRTC,rtc_tick);
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ <20><><EFBFBD><EFBFBD> */
}
return 0;
}
/*******************************************************************************
* Function Name : RTC_WriteDate
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t RTC_WriteDate(S_RTC SetRTC)
{
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>Сʱ<D0A1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>ʵĵ<CAB5>ǰʱ<C7B0>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
MCU_RTC_Data.year = SetRTC.year;
MCU_RTC_Data.month = SetRTC.month;
MCU_RTC_Data.day = SetRTC.day;
MCU_RTC_Data.hour = SetRTC.hour;
MCU_RTC_Data.minute = SetRTC.minute;
MCU_RTC_Data.second = SetRTC.second;
Mcu_GetTime_tick = SysTick_1s; //<2F><>¼<EFBFBD><C2BC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
return 0;
}
/*******************************************************************************
* Function Name : NetRTC_WriteDate
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> RTCʱ<43><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t NetRTC_WriteDate(S_RTC SetRTC)
{
Net_RTC_Data.year = SetRTC.year;
Net_RTC_Data.month = SetRTC.month;
Net_RTC_Data.day = SetRTC.day;
Net_RTC_Data.hour = SetRTC.hour;
Net_RTC_Data.minute = SetRTC.minute;
Net_RTC_Data.second = SetRTC.second;
Net_RTC_Data.week = SetRTC.week;
g_time_info.Mcu_GetTime_tick = SysTick_1s; //<2F><>¼<EFBFBD><C2BC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
return 0;
}
/*******************************************************************************
* Function Name : RTC_TASK
* Description : RTC<54><43><EFBFBD><EFBFBD> - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void RTC_TASK(void)
{
static uint32_t RTC_Tick = 0;
uint8_t r_minute = 0;
if(SysTick_1ms - RTC_Tick >= 1000)
{
r_minute = RTC_Raw_Data.minute;
RTC_Tick = SysTick_1ms;
RTC_ReadDate(&RTC_Raw_Data);
if(r_minute != RTC_Raw_Data.minute)
{
Log_Time_ms = SysTick_1ms; //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
}
if(server_info.sync_tick==0x01)
{
server_info.sync_tick = 0x02;
}
}
}
/*******************************************************************************
* Function Name : RTC_TimeDate_Correct_Figure
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>Ϊ<EFBFBD><CEAA>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> A~F
* Return : 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD>ȷ
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t RTC_TimeDate_Correct_Figure(uint8_t data)
{
uint8_t temp_num = data;
if( ((temp_num & 0x0F) < 0x0A) ){
temp_num >>= 4;
if( ((temp_num & 0x0F) < 0x0A) ){
return 0x00;
}
}
return 0x01;
}

340
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/*
* rw_logging.c
*
* Created on: Jul 29, 2025
* Author: cc
*/
#include "includes.h"
#include <string.h>
/*<2A><>ȡSRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ǰд<C7B0><D0B4><EFBFBD><EFBFBD>ַ*/
__attribute__((section(".non_0_wait"))) uint32_t Get_Log_Current_Address(void)
{
uint32_t Last_addr = 0;
uint8_t temp_d = 0;
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+3);
Last_addr = temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+2);
Last_addr |= temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+1);
Last_addr |= temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address);
Last_addr |= temp_d;
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
return Last_addr;
}
/*<2A><><EFBFBD><EFBFBD>SRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ǰд<C7B0><D0B4><EFBFBD><EFBFBD>ַ*/
__attribute__((section(".non_0_wait"))) void Set_Log_Current_Address(uint32_t W_addr)
{
uint32_t Last_addr = W_addr;
uint8_t temp = 0;
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
temp = Last_addr & 0xFF;
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address);
temp = (Last_addr >> 8) & 0xFF;
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+1);
temp = (Last_addr >> 16) & 0xFF;
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+2);
temp = (Last_addr >> 24) & 0xFF;
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+3);
}
/*<2A><><EFBFBD><EFBFBD>SRAM<41><4D>TFTP<54><50>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ַ*/
__attribute__((section(".non_0_wait"))) void SRAM_Set_TFTP_READ_LOG_Address(uint32_t r_addr)
{
uint32_t Last_addr = r_addr;
uint8_t temp = 0;
/*<2A>жϵ<D0B6>ַ<EFBFBD>Ƿ<EFBFBD><C7B7>Ϸ<EFBFBD>*/
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
temp = Last_addr & 0xFF;
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address);
temp = (Last_addr >> 8) & 0xFF;
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+1);
temp = (Last_addr >> 16) & 0xFF;
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+2);
temp = (Last_addr >> 24) & 0xFF;
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+3);
}
/*<2A><>ȡSRAM<41><4D>TFTP<54><50>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ַ*/
__attribute__((section(".non_0_wait"))) uint32_t SRAM_Get_TFTP_READ_Log_Address(void)
{
uint32_t Last_addr = 0;
uint8_t temp_d = 0;
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+3);
Last_addr = temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+2);
Last_addr |= temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+1);
Last_addr |= temp_d;
Last_addr <<= 8;
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address);
Last_addr |= temp_d;
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
return Last_addr;
}
/*******************************************************************************
* Function Name : <20><>־<EFBFBD><D6BE><EFBFBD>湦<EFBFBD><E6B9A6>
* Description : <20><>־ÿһ<C3BF><D2BB>Сʱ<D0A1><CAB1>SRAM<41>е<EFBFBD><D0B5><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݽ<EFBFBD><DDBD>з<EFBFBD>װ<EFBFBD><D7B0>
<20><>װ<EFBFBD><D7B0>ֻ<EFBFBD>Ǽ<EFBFBD><C7BC>ϰ<EFBFBD>ͷ<EFBFBD><CDB7>β<EFBFBD><CEB2><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Log_write_sram(uint8_t data_type,uint8_t *buff,uint16_t len)
{
uint16_t temp_date = 0;
uint32_t Last_add = 0;
uint32_t Log_Hour_Tick = SysTick_1ms - Log_Time_ms; //2021-09-23 Log_Time_ms<6D>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>н<EFBFBD><D0BD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹȫ<D6B9>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>while<6C><65>ͬʱ<CDAC><CAB1>д
Log_Hour_Tick += HEX_Conversion_To_DEC(RTC_Raw_Data.minute)*60000;
Log_Hour_Tick += HEX_Conversion_To_DEC(RTC_Raw_Data.hour)*3600000;
uint8_t temp = 0;
uint16_t data_len = len;
if(data_len >= Log_Data_Len_MAX) data_len = Log_Data_Len_MAX; //<2F>޶<EFBFBD><DEB6><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
uint16_t write_len = S_Log_Data + data_len + 1;
/*<2A><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־д<D6BE><D0B4><EFBFBD><EFBFBD>ַ*/
Last_add = Get_Log_Current_Address();
//<2F><>ǰ<EFBFBD><C7B0>ַ<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ҿ<EFBFBD><D2BF>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
if((Last_add + write_len) >= SRAM_LOG_End_Address)
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit," SRAM Space is not enough");
Last_add = SRAM_LOG_DATA_Address;
}
/*<2A>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־*/
SRAM_Write_Byte(LOG_Data_Hand,Last_add + S_Log_Hand); //<2F><><EFBFBD><EFBFBD>ͷ
temp = SRAM_Read_Byte(SRAM_Flash_Serial_Number);
SRAM_Write_Byte(temp,Last_add + S_Log_SN); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
temp++;
SRAM_Write_Byte(temp,SRAM_Flash_Serial_Number); //<2F><><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>ˢ<EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_Write_Word(write_len,Last_add + S_Log_Len); //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> 2Byte
SRAM_Write_Byte(0x00,Last_add + S_Log_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>
temp_date = (HEX_Conversion_To_DEC(RTC_Raw_Data.year) << 10) + (HEX_Conversion_To_DEC(RTC_Raw_Data.month) << 5) + HEX_Conversion_To_DEC(RTC_Raw_Data.day);
temp = (temp_date >> 8) & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Date_H); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>H - <20>꣺4bit <20>£<EFBFBD>4bit
temp = temp_date & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Date_L); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>L - <20>գ<EFBFBD>4bit ʱ<><CAB1>4bit
SRAM_Write_Byte(data_type,Last_add + S_Log_Type); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
temp = Log_Hour_Tick & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Time8B); //ʱ<><CAB1><EFBFBD><EFBFBD>
temp = (Log_Hour_Tick >> 8) & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Time16B);
temp = (Log_Hour_Tick >> 16) & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Time24B);
temp = (Log_Hour_Tick >> 24) & 0xFF;
SRAM_Write_Byte(temp,Last_add + S_Log_Time32B);
SRAM_DMA_Write_Buff(buff,data_len,Last_add + S_Log_Data); //<2F><><EFBFBD><EFBFBD>
SRAM_Write_Byte(Log_Data_End,Last_add + S_Log_Data + data_len); //<2F><><EFBFBD><EFBFBD>β
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>*/
temp = Log_CheckSum(Last_add,write_len);
SRAM_Write_Byte(temp,Last_add + S_Log_Check); //У<><D0A3>ֵ
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD>־д<D6BE><D0B4><EFBFBD><EFBFBD>ַ*/
Last_add = Last_add + write_len;
Set_Log_Current_Address(Last_add);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SRAM LOG Addr : %08X",Last_add);
return 0;
}
/*******************************************************************************
* Function Name : Retain_Flash_Register_Data
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Retain_Flash_Register_Data(void)
{
uint8_t temp = 0,temp1 = 0;
uint16_t i = 0;
memset(Global_Large_Buff,0,Register_OFFSET_LEN);
Flash_Read(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
for(i = 0;i<Register_OFFSET_LEN;i++)
{
temp1 = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS+i);
if(temp1 != Global_Large_Buff[i])
{
Global_Large_Buff[i] = temp1;
temp++;
}
}
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽Flash<73><68>*/
if(temp != 0x00)
{
Flash_Write(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
}
}
/*******************************************************************************
* Function Name : Read_Flash_Register_Data
* Description : <20><>ȡ<EFBFBD><C8A1>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Read_Flash_Register_Data(void)
{
memset(Global_Large_Buff,0,Register_OFFSET_LEN);
Flash_Read(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
SRAM_DMA_Write_Buff(Global_Large_Buff,Register_OFFSET_LEN,SRAM_Register_Start_ADDRESS);
}
/*******************************************************************************
* Function Name : LOG_Save_Global_Parameters
* Description : <20><><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void LOG_Save_Global_Parameters(void)
{
static uint32_t polling_tick = 0;
uint8_t log_len = 0;
uint8_t log_buff[22];
memset(log_buff,0,22);
/*2025-09-08 <20>޸<EFBFBD>
ȫ<>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ鿴<DAB2><E9BFB4><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>仯
ȡ<><C8A1>״̬<D7B4><CCAC>˯<EFBFBD><CBAF>ģʽ״̬<D7B4><CCAC>ȫ<EFBFBD><C8AB>ɫ<EFBFBD>¡<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
*/
if(SysTick_1ms - polling_tick >= 2000)
{
polling_tick = SysTick_1ms;
if( (DevActionGlobal.DevActionU64Cond.EleState != DevActionGlobal.Last_EleState)
|| (DevActionGlobal.DimGlobalValue != DevActionGlobal.Last_DimGlobalValue)
|| (DevActionGlobal.CCTValue != DevActionGlobal.Last_CCTValue)
|| (DevActionGlobal.SleepMode_State != DevActionGlobal.Last_SleepMode_State)
|| (DevActionGlobal.SleepLight_State != DevActionGlobal.Last_SleepLight_State)
|| (DevActionGlobal.Person_Detected != DevActionGlobal.Last_Person_Detected)
|| (DevActionGlobal.CardState != DevActionGlobal.Last_CardState)
|| (DevActionGlobal.Rs485CardType != DevActionGlobal.Last_Rs485CardType)
|| (DevActionGlobal.DevActionU64Cond.NeightState != DevActionGlobal.Last_NeightState) )
{
DevActionGlobal.Last_EleState = DevActionGlobal.DevActionU64Cond.EleState;
DevActionGlobal.Last_DimGlobalValue = DevActionGlobal.DimGlobalValue ;
DevActionGlobal.Last_CCTValue = DevActionGlobal.CCTValue;
DevActionGlobal.Last_SleepMode_State = DevActionGlobal.SleepMode_State;
DevActionGlobal.Last_SleepLight_State = DevActionGlobal.SleepLight_State;
DevActionGlobal.Last_Person_Detected = DevActionGlobal.Person_Detected;
DevActionGlobal.Last_CardState = DevActionGlobal.CardState;
DevActionGlobal.Last_Rs485CardType = DevActionGlobal.Rs485CardType;
log_len = 0x00;
log_buff[log_len++] = 0xA8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
log_buff[log_len++] = 0x00; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
log_buff[log_len++] = 0x00; //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>λ
log_buff[log_len++] = DevActionGlobal.Last_EleState; //ȡ<><C8A1>״̬
log_buff[log_len++] = (DevActionGlobal.Last_DimGlobalValue & 0xFF); //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
log_buff[log_len++] = ((DevActionGlobal.Last_DimGlobalValue >> 8) & 0xFF); //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
log_buff[log_len++] = (DevActionGlobal.Last_CCTValue & 0xFF); //ȫ<><C8AB>ɫ<EFBFBD><C9AB>
log_buff[log_len++] = ((DevActionGlobal.Last_CCTValue >> 8) & 0xFF); //ȫ<><C8AB>ɫ<EFBFBD><C9AB>
log_buff[log_len++] = DevActionGlobal.Last_SleepMode_State; //˯<><CBAF>ģʽ
log_buff[log_len++] = DevActionGlobal.Last_SleepLight_State; //˯<>ߵƹ<DFB5>״̬
log_buff[log_len++] = DevActionGlobal.Last_Person_Detected; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
log_buff[log_len++] = DevActionGlobal.Last_CardState;
log_buff[log_len++] = DevActionGlobal.Last_Rs485CardType;
log_buff[log_len++] = DevActionGlobal.Last_NeightState;
log_buff[1] = log_len; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
log_buff[2] = Data_CheckSum(log_buff,log_len); //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %d",__func__,DevActionGlobal.Last_Person_Detected);
SRAM_DMA_Write_Buff(log_buff,log_len,SRAM_PowerOn_Restore_StartAddr );
}
}
}
/*<2A>ϵ<EFBFBD><CFB5>󣬶<EFBFBD>ȡ<EFBFBD>ⲿSRAM<41>еIJ<D0B5><C4B2><EFBFBD><EFBFBD><EFBFBD>Ϣ */
__attribute__((section(".non_0_wait"))) uint8_t SRAM_PowerOn_Restore_ParaInfo(void)
{
uint8_t log_len = 0;
uint8_t log_buff[22];
uint16_t temp_val = 0;
memset(log_buff,0,22);
SRAM_DMA_Read_Buff(log_buff,20,SRAM_PowerOn_Restore_StartAddr );
if(log_buff[0] == 0xA8) //У<><D0A3><EFBFBD><EFBFBD>־λ
{
if(log_buff[1] == 0x0E) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
{
if(Data_CheckSum(log_buff,0x0E) == 0x00)
{
log_len = 0x03;
DevActionGlobal.Last_EleState = log_buff[log_len++];
temp_val = log_buff[log_len++];
temp_val <<= 8;
temp_val |= log_buff[log_len++];
DevActionGlobal.Last_DimGlobalValue = temp_val;
temp_val = log_buff[log_len++];
temp_val <<= 8;
temp_val |= log_buff[log_len++];
DevActionGlobal.Last_CCTValue = temp_val;
DevActionGlobal.Last_SleepMode_State = log_buff[log_len++];
DevActionGlobal.Last_SleepLight_State = log_buff[log_len++];
DevActionGlobal.Last_Person_Detected = log_buff[log_len++];
DevActionGlobal.Last_CardState = log_buff[log_len++];
DevActionGlobal.Last_Rs485CardType = log_buff[log_len++];
DevActionGlobal.Last_NeightState = log_buff[log_len++];
DevActionGlobal.DevActionU64Cond.EleState = DevActionGlobal.Last_EleState;
DevActionGlobal.DimGlobalValue = DevActionGlobal.Last_DimGlobalValue;
DevActionGlobal.CCTValue = DevActionGlobal.Last_CCTValue;
DevActionGlobal.SleepMode_State = DevActionGlobal.Last_SleepMode_State;
DevActionGlobal.SleepLight_State = DevActionGlobal.Last_SleepLight_State;
DevActionGlobal.Person_Detected = DevActionGlobal.Last_Person_Detected;
DevActionGlobal.CardState= DevActionGlobal.Last_CardState;
DevActionGlobal.Rs485CardType= DevActionGlobal.Last_Rs485CardType;
DevActionGlobal.DevActionU64Cond.NeightState = DevActionGlobal.Last_NeightState;
DevActionGlobal.sram_save_flag = 0xA8;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_EleState:%d ",DevActionGlobal.Last_EleState);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_DimGlobalValue:%d ",DevActionGlobal.Last_DimGlobalValue);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_CCTValue:%d ",DevActionGlobal.Last_CCTValue);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_SleepMode_State:%d ",DevActionGlobal.Last_SleepMode_State);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_SleepLight_State:%d ",DevActionGlobal.Last_SleepLight_State);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_Person_Detected:%d ",DevActionGlobal.Last_Person_Detected);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_CardState:%d ",DevActionGlobal.Last_CardState);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_NeightState:%d ",DevActionGlobal.Last_NeightState);
return 0x00;
}
}
}
return 0x01;
}

496
MCU_Driver/spi_flash.c Normal file
View File

@@ -0,0 +1,496 @@
/*
* spi_flash.c
*
* Created on: May 20, 2025
* Author: cc
*/
#include "spi_flash.h"
#include "debug.h"
uint8_t Temp_Flash_Buff[4100]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
__attribute__((section(".non_0_wait"))) void SPI_FLASH_Init(void)
{
/* SPI Flash <20><> SPI SRAM <20><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
* <20><><EFBFBD><EFBFBD> SPI Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC>
* */
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SPI Flash ID:0x%04x\r\n",Flash_ReadID());
}
/*******************************************************************************
* Function Name : Flash_ReadSR
* Description : P25Q40H Flash<73><68>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
* Input : None
* Return : P25Q40H Flash״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
BIT7 6 5 4 3 2 1 0
SPR0 BP4 BP3 BP2 BP1 BP0 WEL WIP
SPR:Ĭ<><C4AC>0,״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ,<2C><><EFBFBD><EFBFBD>WPʹ<50><CAB9>
BP4,BP3,BP2,BP1,BP0:FLASH<53><48><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
WEL:дʹ<D0B4><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BUSY:æ<><C3A6><EFBFBD><EFBFBD>λ(1,æ;0,<2C><><EFBFBD><EFBFBD>)
Ĭ<><C4AC>:0x00
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Flash_ReadSR(void)
{
uint8_t byte = 0;
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_ReadStatusReg); //<2F><><EFBFBD>Ͷ<EFBFBD>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
byte = SPI0_MasterRecvByte();
Flash_CS_H;
return byte;
}
/*******************************************************************************
* Function Name : Flash_WriteSR
* Description : P25Q40H Flashд״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
* Input :
sr_val:д<><D0B4>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
BIT7 6 5 4 3 2 1 0
SPR0 BP4 BP3 BP2 BP1 BP0 WEL WIP
ֻ<><D6BB>SPR0,BP3,BP2,BP1,BP0(bit 7,5,4,3,2)<29><><EFBFBD><EFBFBD>д!!!
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_WriteSR(uint8_t sr_val)
{
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_WriteStatusReg);
SPI0_MasterSendByte(sr_val);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_Write_Enable
* Description : P25Q40H дʹ<D0B4><CAB9> -- <20><>WEL<45><4C>λ
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Write_Enable(void)
{
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_WriteEnable);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_Write_Disable
* Description : P25Q40H д<><D0B4>ֹ -- <20><>WEL<45><4C><EFBFBD><EFBFBD>
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Write_Disable(void)
{
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_WriteDisable);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_ReadID
* Description : P25Q40H Flash <20><>ȡоƬID
* Input : None
* Return : <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD>£<EFBFBD>
0x8512:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q40H
0x8511:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q20H
0x8510:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q10H
0x8509:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q05H
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint16_t Flash_ReadID(void)
{
uint16_t temp=0;
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_ReadManufactureID);
SPI0_MasterRecvByte();
SPI0_MasterRecvByte();
SPI0_MasterRecvByte();
temp |= SPI0_MasterRecvByte()<<8;
temp |= SPI0_MasterRecvByte();
Flash_CS_H;
return temp;
}
/*******************************************************************************
* Function Name : Flash_Wait_Busy
* Description : <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>
* Input : None
* Return : 1<><31><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>æ״̬
0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t Flash_Wait_Busy(void)
{
uint8_t temp=0;
uint16_t i=0;
temp = Flash_ReadSR();
while((temp&0x01)==0x01)
{
FEED_DOG(); //ι<><CEB9>
Delay_Us(100);
temp = Flash_ReadSR();
i++;
if(i>3000) return 1;
};
return 0;
}
/*******************************************************************************
* Function Name : Flash_PowerDown
* Description : Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_PowerDown(void)
{
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_PowerDown);
Delay_Us(3);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_PowerDown
* Description : Flash <20><><EFBFBD>ѵ<EFBFBD><D1B5><EFBFBD>ģʽ
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Wakeup(void)
{
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_ReleasePowerDown);
Delay_Us(3);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_Erase_Chip
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>оƬ
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Erase_Chip(void)
{
Flash_Write_Enable();
Flash_Wait_Busy();
Flash_CS_L;
SPI0_MasterSendByte(P24Q40H_ChipErase);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Erase_Block
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : BLK_ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0~31) 2M
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Erase_Block(uint32_t BLK_ID)
{
uint8_t flash_buff[5];
BLK_ID*=0x10000; //64K
flash_buff[0] = P24Q40H_BlockErase;
flash_buff[1] = (uint8_t)((BLK_ID >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((BLK_ID >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((BLK_ID) & 0xFF);
flash_buff[4] = 0x00;
Flash_Write_Enable();
Flash_Wait_Busy();
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Erase_Sector
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : DST_Addr<64><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0~511) 2M
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Erase_Sector(uint32_t DST_ID)
{
uint8_t flash_buff[5];
DST_ID*=4096;
flash_buff[0] = P24Q40H_SectorErase;
flash_buff[1] = (uint8_t)((DST_ID >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((DST_ID >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((DST_ID) & 0xFF);
flash_buff[4] = 0x00;
Flash_Write_Enable();
Flash_Wait_Busy();
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Erase_Page
* Description : <20><><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
* Input : Page_ID<49><44>ҳ<EFBFBD><D2B3>(0~8191)
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Erase_Page(uint32_t Page_ID)
{
uint8_t flash_buff[5];
Page_ID*=256;
flash_buff[0] = P24Q40H_PageErase;
flash_buff[1] = (uint8_t)((Page_ID >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((Page_ID >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((Page_ID) & 0xFF);
flash_buff[4] = 0x00;
Flash_Write_Enable();
Flash_Wait_Busy();
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Erase_Page
* Description : <20><><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
* Input : Page_addr:<3A><>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Erase_Pageaddr(uint32_t Page_addr)
{
uint8_t flash_buff[5];
flash_buff[0] = P24Q40H_PageErase;
flash_buff[1] = (uint8_t)((Page_addr >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((Page_addr >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((Page_addr) & 0xFF);
flash_buff[4] = 0x00;
Flash_Write_Enable();
Flash_Wait_Busy();
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Read
* Description : P25Q40H Flash ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼ<EFBFBD><CABC>ȡָ<C8A1><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
* Input :
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
NumByteToRead<61><64>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Read(uint8_t* pBuffer,uint16_t NumByteToRead,uint32_t ReadAddr)
{
uint8_t flash_buff[5];
flash_buff[0] = P24Q40H_ReadData;
flash_buff[1] = (uint8_t)((ReadAddr >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((ReadAddr >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((ReadAddr) & 0xFF);
flash_buff[4] = 0x00;
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
SPI0_DMARecv(pBuffer,NumByteToRead);
Flash_CS_H;
}
/*******************************************************************************
* Function Name : Flash_Write_Page
* Description : P25Q40H Flash ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼдָ<D0B4><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
* Input :
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>256),<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ʣ<EFBFBD><CAA3><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>!!!
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Write_Page(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr)
{
uint8_t flash_buff[5];
flash_buff[0] = P24Q40H_PageProgram;
flash_buff[1] = (uint8_t)((writeAddr >> 16) & 0xFF);
flash_buff[2] = (uint8_t)((writeAddr >> 8) & 0xFF);
flash_buff[3] = (uint8_t)((writeAddr) & 0xFF);
flash_buff[4] = 0x00;
Flash_Write_Enable();
Flash_CS_L;
SPI0_DMATrans(flash_buff,0x04);
SPI0_DMATrans(pBuffer,NumByteToWrite);
Flash_CS_H;
Flash_Wait_Busy();
}
/*******************************************************************************
* Function Name : Flash_Write_NoCheck
* Description : <20>޼<EFBFBD><DEBC><EFBFBD>дP25Q40H FLASH
ע<EFBFBD>⣺<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD>ڵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD>Ϊ0XFF,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>0XFF<46><46>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ʧ<EFBFBD><CAA7>!
<20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD>
<20><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼд<CABC><D0B4>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫȷ<D2AA><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Խ<EFBFBD><D4BD>!
* Input :
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr)
{
uint16_t pageremain;
pageremain=256-writeAddr%256; //<2F><>ҳʣ<D2B3><CAA3><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
if(NumByteToWrite<=pageremain) pageremain=NumByteToWrite;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>256<35><36><EFBFBD>ֽ<EFBFBD>
while(1)
{
FEED_DOG(); //ι<><CEB9>
Flash_Write_Page(pBuffer,pageremain,writeAddr);
if(pageremain == NumByteToWrite) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
else {
pBuffer+=pageremain;
writeAddr+=pageremain;
NumByteToWrite-=pageremain;
if(NumByteToWrite>256) pageremain=256;
else pageremain=NumByteToWrite;
}
};
}
/*******************************************************************************
* Function Name : Flash_Write
* Description : <20>޼<EFBFBD><DEBC><EFBFBD>дP25Q40H FLASH
ע<EFBFBD>⣺<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD>ڵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD>Ϊ0XFF,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>0XFF<46><46>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ʧ<EFBFBD><CAA7>!
<20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD>
<20><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼд<CABC><D0B4>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫȷ<D2AA><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Խ<EFBFBD><D4BD>!
* Input :
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr)
{
uint32_t secpos;
uint16_t secoff,secremain,i;
uint8_t* Write_Buff;
if(NumByteToWrite <= 256*2)
{
Write_Buff = Temp_Flash_Buff;
secpos = WriteAddr/256; //ҳ<><D2B3><EFBFBD><EFBFBD>ַ
secoff = WriteAddr%256; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ƫ<EFBFBD><C6AB>
secremain = 256 - secoff; //<2F><><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD>
if(NumByteToWrite<=secremain) secremain = NumByteToWrite; //<2F><>ǰҳ<C7B0><D2B3>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
while(1)
{
FEED_DOG(); //ι<><CEB9>
Flash_Read(Write_Buff,256,secpos*256); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(i=0;i<secremain;i++) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
if(Write_Buff[secoff+i]!=0xFF) break;
}
if(i<secremain) //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
{
Flash_Erase_Page(secpos); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
for(i=0;i<secremain;i++) //<2F><><EFBFBD><EFBFBD>
{
Write_Buff[i+secoff]=pBuffer[i];
}
Flash_Write_NoCheck(Write_Buff,256,secpos*256); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
}else {
if(secremain == 256)
{
Flash_Write_NoCheck(pBuffer,256,secpos*256); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
}else if(secremain < 256){
Flash_Write_NoCheck(pBuffer,secremain,WriteAddr); //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ӣ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
}
}
if(NumByteToWrite == secremain) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
else //д<><D0B4>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
{
secpos++; //ҳ<><D2B3><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>1
secoff = 0; //ҳ<><D2B3>ƫ<EFBFBD><C6AB>λ<EFBFBD>ù<EFBFBD><C3B9><EFBFBD>
pBuffer += secremain; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ƫ<EFBFBD><C6AB>
WriteAddr += secremain; //<2F><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>
NumByteToWrite -= secremain; //ʣ<><CAA3>д<EFBFBD><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݼ<EFBFBD>
if(NumByteToWrite > 256) secremain = 256; //<2F><>һ<EFBFBD><D2BB>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
else secremain = NumByteToWrite; //<2F><>һ<EFBFBD><D2BB>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
}
}
}
else
{
Write_Buff = Temp_Flash_Buff;
secpos = WriteAddr/4096; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
secoff = WriteAddr%4096; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ƫ<EFBFBD><C6AB>
secremain = 4096 - secoff; //<2F><><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD>
if(NumByteToWrite<=secremain) secremain = NumByteToWrite; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
while(1)
{
FEED_DOG(); //ι<><CEB9>
Flash_Read(Write_Buff,2048,secpos*4096); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Flash_Read(Write_Buff+2048,2048,secpos*4096+2048); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(i=0;i<secremain;i++) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
if(Write_Buff[secoff+i]!=0xFF)break;
}
if(i<secremain) //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
Flash_Erase_Sector(secpos); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(i=0;i<secremain;i++) //<2F><><EFBFBD><EFBFBD>
{
Write_Buff[i+secoff]=pBuffer[i];
}
Flash_Write_NoCheck(Write_Buff,2048,secpos*4096); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Flash_Write_NoCheck(Write_Buff+2048,2048,secpos*4096+2048); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}else {
if(secremain == 4096)
{
Flash_Write_NoCheck(pBuffer,2048,secpos*4096); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Flash_Write_NoCheck(pBuffer+2048,2048,secpos*4096+2048); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}else if(secremain < 4096){
Flash_Write_NoCheck(pBuffer,secremain,WriteAddr); //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ӣ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
if(NumByteToWrite == secremain) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
else //д<><D0B4>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
{
secpos++; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>1
secoff = 0; //<2F><><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>λ<EFBFBD>ù<EFBFBD><C3B9><EFBFBD>
pBuffer += secremain; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ƫ<EFBFBD><C6AB>
WriteAddr += secremain; //<2F><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>
NumByteToWrite -= secremain; //ʣ<><CAA3>д<EFBFBD><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݼ<EFBFBD>
if(NumByteToWrite > 4096) secremain = 4096; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
else secremain = NumByteToWrite; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
}
}
}
}

258
MCU_Driver/spi_sram.c Normal file
View File

@@ -0,0 +1,258 @@
/*
* spi.c
*
* Created on: May 16, 2025
* Author: cc
*/
#include "spi_sram.h"
#include "debug.h"
#include <string.h>
__attribute__((section(".non_0_wait"))) void SPI_SRAM_Init(void)
{
GPIOA_ModeCfg(GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_11, GPIO_ModeOut_PP);
GPIOA_ModeCfg(GPIO_Pin_5, GPIO_ModeIN_Floating);
GPIO_PinRemapConfig(GPIO_PartialRemap2_SPI0,ENABLE);
/*<2A><><EFBFBD><EFBFBD><EFBFBD>Եó<D4B5><C3B3><EFBFBD><EFBFBD><EFBFBD> SPI<50><49><EFBFBD>߲<EFBFBD><DFB2><EFBFBD><EFBFBD><EFBFBD>30MHZ <20>ֲ<EFBFBD><D6B2><EFBFBD>д<EFBFBD><D0B4>SPI<50><49><EFBFBD><EFBFBD>ͨѶΪ50MHZ 24MHZ*/
SPI0_MasterInit(24000000);
SPI0_DataMode(Mode0_HighBitINFront);
SRAM_CE_H;
/*<2A><>ȡSRAMоƬID*/
SRAM_Read_ID_Opeartion();
}
/*******************************************************************************
* Function Name : SRAM_Write_Byte
* Description : SRAMд<4D>ֽ<EFBFBD>
* Input :
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_Write_Byte(uint8_t wdate,uint32_t add)
{
uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
Ladd=add;
Hadd8=add>>8;
Hadd16=add>>16;
if(add >= SRAM_ADDRESS_MAX) return ;
SRAM_CE_L;
SPI0_MasterSendByte(SRAM_CMD_Write);
SPI0_MasterSendByte(Hadd16);
SPI0_MasterSendByte(Hadd8);
SPI0_MasterSendByte(Ladd);
SPI0_MasterSendByte(wdate);
SRAM_CE_H;
}
/*******************************************************************************
* Function Name : SRAM_Read_Byte
* Description : SRAM<41><4D><EFBFBD>ֽ<EFBFBD>
* Input :
add <20><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֽڵĵ<DAB5>ַ
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t SRAM_Read_Byte(uint32_t add)
{
uint8_t Hadd8=0x00,Hadd16=0x00,Ladd=0x00,rdate=0x00;
Ladd=add;
Hadd8=add>>8;
Hadd16=add>>16;
if(add >= SRAM_ADDRESS_MAX) return 0x00;
SRAM_CE_L;
SPI0_MasterSendByte(SRAM_CMD_Read);
SPI0_MasterSendByte(Hadd16);
SPI0_MasterSendByte(Hadd8);
SPI0_MasterSendByte(Ladd);
rdate = SPI0_MasterRecvByte();
SRAM_CE_H;
return rdate;
}
/*******************************************************************************
* Function Name : SRAM_Write_Word
* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_Write_Word(uint16_t wdate,uint32_t add)
{
SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
}
/*******************************************************************************
* Function Name : SRAM_Read_Word
* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
add <20><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֵĵ<D6B5>ַ
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint16_t SRAM_Read_Word(uint32_t add)
{
uint16_t rev = 0;
rev = SRAM_Read_Byte(add + 1);
rev <<= 8;
rev |= SRAM_Read_Byte(add);
return rev;
}
/*******************************************************************************
* Function Name : SRAM_Write_DW
* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD>˫<EFBFBD><CBAB>
add <20><>˫<EFBFBD><CBAB>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_Write_DW(uint32_t wdate,uint32_t add)
{
SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
SRAM_Write_Byte((uint8_t)((wdate >> 16) & 0xFF),add + 2);
SRAM_Write_Byte((uint8_t)((wdate >> 24) & 0xFF),add + 3);
}
/*******************************************************************************
* Function Name : SRAM_Read_DW
* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
add <20><><EFBFBD><EFBFBD>ȡ˫<C8A1>ֵĵ<D6B5>ַ
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint32_t SRAM_Read_DW(uint32_t add)
{
uint32_t rev = 0;
rev = SRAM_Read_Byte(add + 3);
rev <<= 8;
rev |= SRAM_Read_Byte(add + 2);
rev <<= 8;
rev |= SRAM_Read_Byte(add + 1);
rev <<= 8;
rev |= SRAM_Read_Byte(add);
return rev;
}
/*******************************************************************************
* Function Name : SRAM_Read_ID_Opeartion
* Description : SRAM <20><>ȡоƬID
* Input : NULL
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t SRAM_Read_ID_Opeartion(void)
{
uint8_t spi_addr[5];
uint8_t read_id[9];
memset(spi_addr,0,0x05);
memset(read_id,0,0x04);
spi_addr[0] = SRAM_CMD_Read_ID;
spi_addr[1] = 0x00 ;
spi_addr[2] = 0x00 ;
spi_addr[3] = 0x00 ;
SRAM_CE_L;
SPI0_DMATrans(spi_addr,0x04);
SPI0_DMARecv(read_id,0x08);
SRAM_CE_H;
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM MFID:%02X",read_id[0]);
if(read_id[1] == 0x5D)
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM KGD:%02X - Known Good Die PASS",read_id[1]);
}else {
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM KGD:%02X - Known Good Die FAIL",read_id[1]);
}
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit, "SRAM EID:",&read_id[2],0x06);
return 0;
}
/*******************************************************************************
* Function Name : SRAM_Reset_Operation
* Description : SRAM <20><>λ - ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD>λ
* Input : NULL
* Return : NULL
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_Reset_Operation(void)
{
SRAM_CE_L;
SPI0_MasterSendByte(SRAM_CMD_Reset_Enable);
SRAM_CE_H;
//Delay_Ms(2);
SRAM_CE_L;
SPI0_MasterSendByte(SRAM_CMD_Reset);
SRAM_CE_H;
}
/*******************************************************************************
* Function Name : SRAM_DMA_Write_Buff
* Description : SRAM DMA<4D><41>ʽд<CABD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
wbuff : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len : д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add)
{
uint8_t spi_addr[5];
if(add + len >= SRAM_ADDRESS_MAX) return ;
memset(spi_addr,0,0x05);
spi_addr[0] = SRAM_CMD_Write;
spi_addr[1] = (add >> 16) & 0xFF ;
spi_addr[2] = (add >> 8) & 0xFF ;
spi_addr[3] = (add) & 0xFF ;
SRAM_CE_L;
SPI0_DMATrans(spi_addr,0x04);
SPI0_DMATrans(wbuff,len);
SRAM_CE_H;
}
/*******************************************************************************
* Function Name : SRAM_DMA_Read_Buff
* Description : SRAM DMA<4D><41>ʽ<EFBFBD><CABD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
* Input :
rbuff : <20><>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len : <20><>ȡ<EFBFBD><C8A1><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add)
{
uint8_t spi_addr[5];
if(add + len >= SRAM_ADDRESS_MAX) return ;
memset(spi_addr,0,0x05);
spi_addr[0] = SRAM_CMD_Read;
spi_addr[1] = (add >> 16) & 0xFF ;
spi_addr[2] = (add >> 8) & 0xFF ;
spi_addr[3] = (add) & 0xFF ;
SRAM_CE_L;
SPI0_DMATrans(spi_addr,0x04);
SPI0_DMARecv(rbuff,len);
SRAM_CE_H;
}

51
MCU_Driver/timer.c Normal file
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/*
* timer.c
*
* Created on: May 16, 2025
* Author: cc
*/
#include "timer.h"
#include <stdio.h>
#include <string.h>
void TIMER0_Init(void)
{
TMR0_DeInit();
TMR0_TimerInit(SystemCoreClock / 10000);
TMR0_ITCfg(RB_TMR_IF_CYC_END, ENABLE);
NVIC_EnableIRQ(TIM0_IRQn);
TMR0_Enable();
}
volatile uint32_t Time0_100us = 0;
volatile uint32_t Time0_1ms = 0;
void __attribute__((interrupt("WCH-Interrupt-fast"))) TIM0_IRQHandler()
{
static uint8_t NUM_1 = 0;
TMR0_ClearITFlag(RB_TMR_IF_CYC_END);
Time0_100us++;
NUM_1++;
if(NUM_1 >= 10){
NUM_1 = 0;
Time0_1ms++;
}
}
void Timer0_Task(void)
{
static uint32_t timer0_tick = 0;
if(Time0_1ms - timer0_tick >= 1000 ){
timer0_tick = Time0_1ms;
printf("Run:%d ..",timer0_tick);
}
}

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MCU_Driver/uart.c Normal file
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/*
* uart.c
*
* Created on: May 14, 2025
* Author: cc
*/
#include "uart.h"
#include "debug.h"
#include "watchdog.h"
#include "blv_rs485_protocol.h"
#include "sram_mem_addr.h"
#include "spi_sram.h"
#include <string.h>
UART_t g_uart[UART_MAX];
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void UART3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn UARTx_Init
* @brief UART<52><54>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD>⴮<EFBFBD><E2B4AE>2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PB22,PB23 - Boot,RST<53><54><EFBFBD><EFBFBD>
* @param uart_id - <20><><EFBFBD><EFBFBD>ID
* @param buad - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param prt_cf - <20><><EFBFBD>ڽ<EFBFBD><DABD>ջص<D5BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
* @return none
*/
__attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
switch (uart_id) {
case UART_0:
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
UART0_BaudRateCfg(buad);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
memset(&g_uart[UART_0],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
break;
case UART_1:
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
UART1_BaudRateCfg(buad);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
memset(&g_uart[UART_1],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
break;
case UART_2:
UART2_BaudRateCfg(buad);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART2_IRQn);
memset(&g_uart[UART_2],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
break;
case UART_3:
UART3_BaudRateCfg(buad);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART3_IRQn);
memset(&g_uart[UART_3],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
break;
}
}
__attribute__((section(".non_0_wait"))) void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud)
{
if(baud == 115200)
{
set_uart->RecvTimeout = Recv_115200_TimeOut;
}else if(baud == 9600)
{
set_uart->RecvTimeout = Recv_9600_TimeOut;
}else if(baud == 2400)
{
set_uart->RecvTimeout = Recv_2400_TimeOut;
}else
{
set_uart->RecvTimeout = 20;
}
}
/*********************************************************************
* @fn USART1_IRQHandler
*
* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
*
* @return none
*/
void UART0_IRQHandler(void)
{
switch( UART0_GetITFlag() )
{
case UART_II_THR_EMPTY:
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart[UART_0].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_0].RecvLen = 0x00;
g_uart[UART_0].RecvBuffer[g_uart[UART_0].RecvLen] = UART0_RecvByte();
g_uart[UART_0].RecvLen += 1;
g_uart[UART_0].Receiving = 0x01;
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
break;
}
}
/*********************************************************************
* @fn USART1_IRQHandler
*
* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
*
* @return none
*/
void UART1_IRQHandler(void)
{
switch( UART1_GetITFlag() )
{
case UART_II_THR_EMPTY:
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
g_uart[UART_1].RecvLen += 1;
g_uart[UART_1].Receiving = 0x01;
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
break;
}
}
/*********************************************************************
* @fn UART2_IRQHandler
*
* @brief USART2<54>жϺ<D0B6><CFBA><EFBFBD>
*
* @return none
*/
void UART2_IRQHandler(void)
{
switch( UART2_GetITFlag() )
{
case UART_II_THR_EMPTY:
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart[UART_2].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_2].RecvLen = 0x00;
g_uart[UART_2].RecvBuffer[g_uart[UART_2].RecvLen] = UART2_RecvByte();
g_uart[UART_2].RecvLen += 1;
g_uart[UART_2].Receiving = 0x01;
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
break;
}
}
/*********************************************************************
* @fn USART3_IRQHandler
*
* @brief USART3<54>жϺ<D0B6><CFBA><EFBFBD>
*
* @return none
*/
void UART3_IRQHandler(void)
{
switch( UART3_GetITFlag() )
{
case UART_II_THR_EMPTY:
break;
case UART_II_RECV_RDY:
case UART_II_RECV_TOUT:
if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
g_uart[UART_3].RecvLen += 1;
g_uart[UART_3].Receiving = 0x01;
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
break;
}
}
/*********************************************************************
* @fn USART1_RECEIVE
*
* @brief USART1
*
* @return none
*/
__attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
{
if(g_uart[UART_0].Receiving == 0x01)
{
if(SysTick_1ms - g_uart[UART_0].RecvIdleTiming >= g_uart[UART_0].RecvTimeout)
{
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
g_uart[UART_0].RecvLen = 0;
g_uart[UART_0].Receiving = 0;
}
}
}
/*********************************************************************
* @fn USART1_RECEIVE
*
* @brief USART1
*
* @return none
*/
__attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
{
if(g_uart[UART_1].Receiving == 0x01)
{
if(SysTick_1ms - g_uart[UART_1].RecvIdleTiming >= g_uart[UART_1].RecvTimeout)
{
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
g_uart[UART_1].RecvLen = 0;
g_uart[UART_1].Receiving = 0;
}
}
}
/*********************************************************************
* @fn UART2_RECEIVE
*
* @brief USART2
*
* @return none
*/
__attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
{
if(g_uart[UART_2].Receiving == 1)
{
if(SysTick_1ms - g_uart[UART_2].RecvIdleTiming > g_uart[UART_2].RecvTimeout)
{
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
g_uart[UART_2].RecvLen = 0;
g_uart[UART_2].Receiving = 0;
}
}
}
/*********************************************************************
* @fn USART3_RECEIVE
*
* @brief UART3
*
* @return none
*/
__attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
{
if(g_uart[UART_3].Receiving == 1)
{
if(SysTick_1ms - g_uart[UART_3].RecvIdleTiming > g_uart[UART_3].RecvTimeout)
{
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
g_uart[UART_3].RecvLen = 0;
g_uart[UART_3].Receiving = 0;
}
}
}
/*********************************************************************
* @fn UART0_ChangeBaud
*
* @brief UART0<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @return none
*/
uint8_t UART0_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART0_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
UART0_BaudRateCfg(baudrate);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
UART0_CLR_RXFIFO();
UART0_CLR_TXFIFO();
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART0_IRQn);
Set_Uart_recvTimeout(&g_uart[UART_0],baudrate);
__enable_irq();
return 0;
}
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
return 1;
}
/*********************************************************************
* @fn UART1_ChangeBaud
*
* @brief UART1<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @return none
*/
uint8_t UART1_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART1_Reset();
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_BaudRateCfg(baudrate);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART1_IRQn);
Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
__enable_irq();
return 0;
}
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
return 1;
}
/*********************************************************************
* @fn UART2_ChangeBaud
*
* @brief UART2<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @return none
*/
uint8_t UART2_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART2_Reset();
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
UART2_BaudRateCfg(baudrate);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART2_IRQn);
Set_Uart_recvTimeout(&g_uart[UART_2],baudrate);
__enable_irq();
return 0;
}
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
return 1;
}
/*********************************************************************
* @fn UART3_ChangeBaud
*
* @brief UART3<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* @return none
*/
uint8_t UART3_ChangeBaud(uint32_t baudrate)
{
uint16_t delay_num = 0;
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
UART3_Reset();
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_BaudRateCfg(baudrate);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_EnableIRQ(UART3_IRQn);
Set_Uart_recvTimeout(&g_uart[UART_3],baudrate);
__enable_irq();
return 0;
}
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
return 1;
}
/*******************************************************************************
* Function Name : Uart0_Flush
* Description : <20><><EFBFBD><EFBFBD>0<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
* Return : None
*******************************************************************************/
void Uart0_Flush(uint16_t over_time)
{
uint16_t delay_num = 0;
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
if( (R8_UART0_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > over_time) break;
}
}
/*******************************************************************************
* Function Name : Uart1_Flush
* Description : <20><><EFBFBD><EFBFBD>1<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
* Return : None
*******************************************************************************/
void Uart1_Flush(uint16_t over_time)
{
uint16_t delay_num = 0;
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > over_time) break;
}
}
/*******************************************************************************
* Function Name : Uart2_Flush
* Description : <20><><EFBFBD><EFBFBD>2<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
* Return : None
*******************************************************************************/
void Uart2_Flush(uint16_t over_time)
{
uint16_t delay_num = 0;
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > over_time) break;
}
}
/*******************************************************************************
* Function Name : Uart3_Flush
* Description : <20><><EFBFBD><EFBFBD>3<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
* Return : None
*******************************************************************************/
void Uart3_Flush(uint16_t over_time)
{
uint16_t delay_num = 0;
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > over_time) break;
}
}
/*******************************************************************************
* Function Name : Uart_SendString
* Description : <20><><EFBFBD>ڷ<EFBFBD><DAB7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
* uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
* buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
{
switch(uart_id)
{
case UART_0:
UART0_SendString(buff,len);
break;
case UART_1:
UART1_SendString(buff,len);
break;
case UART_2:
UART2_SendString(buff,len);
break;
case UART_3:
UART3_SendString(buff,len);
break;
default:
break;
}
}
/*******************************************************************************
* Function Name : MCU485_SendString_1
* Description : 485_1 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
* Input :
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void MCU485_SendString_1(uint8_t *buf, uint16_t len)
{
uint16_t delay_num = 0;
MCU485_EN1_H;
UART1_SendString(buf,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed();
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
MCU485_EN1_L;
}
/*******************************************************************************
* Function Name : MCU485_SendString_2
* Description : 485_2 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
* Input :
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void MCU485_SendString_2(uint8_t *buf, uint16_t len)
{
uint16_t delay_num = 0;
MCU485_EN2_H;
UART2_SendString(buf,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed();
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
MCU485_EN2_L;
}
/*******************************************************************************
* Function Name : MCU485_SendString_3
* Description : 485_3 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
* Input :
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void MCU485_SendString_3(uint8_t *buf, uint16_t len)
{
uint16_t delay_num = 0;
MCU485_EN3_H;
UART3_SendString(buf,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed();
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
}
MCU485_EN3_L;
}
/*******************************************************************************
* Function Name : MCU485_SendString
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
{
switch(uart_id)
{
case UART_1:
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
}
MCU485_SendString_1(buff,len);
break;
case UART_2:
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
}
MCU485_SendString_2(buff,len);
break;
case UART_3:
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);
}
MCU485_SendString_3(buff,len);
break;
}
}
/*******************************************************************************
* Function Name : MCU485_SendString
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
data_addr - SRAM<41>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len)
{
uint16_t buff_len = len;
uint8_t send_buff[buff_len];
memset(send_buff,0,sizeof(send_buff));
SRAM_DMA_Read_Buff(send_buff,buff_len,data_addr); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
MCU485_SendString(uart_id,send_buff,buff_len);
}
/*******************************************************************************
* Function Name : Write_Uart_SendBuff
* Description : дuart<72><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
uart_baud - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
*******************************************************************************/
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len)
{
switch(uart_id)
{
case Polling_Port: //<2F><>ѯ
uart_id = UART_0;
break;
case Active_Port: //<2F><><EFBFBD><EFBFBD>
uart_id = UART_2;
break;
case Bus_port: //bus<75><73><EFBFBD><EFBFBD>
uart_id = UART_3;
break;
}
switch(uart_id)
{
case UART_0:
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
SRAM_Write_Word(len,g_uart[UART_0].TX_Buffer_WriteAddr);
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
SRAM_Write_Byte(uart_outime,g_uart[UART_0].TX_Buffer_WriteAddr+2);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_0].TX_Buffer_WriteAddr+3);
g_uart[UART_0].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_0].TX_Buffer_WriteAddr > SRAM_UART0_SendBuffer_End_Addr) g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
break;
case UART_1:
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
SRAM_Write_Word(len,g_uart[UART_1].TX_Buffer_WriteAddr);
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
SRAM_Write_Byte(uart_outime,g_uart[UART_1].TX_Buffer_WriteAddr+2);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_1].TX_Buffer_WriteAddr+3);
g_uart[UART_1].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_1].TX_Buffer_WriteAddr > SRAM_UART1_SendBuffer_End_Addr) g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
break;
case UART_2:
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
SRAM_Write_Word(len,g_uart[UART_2].TX_Buffer_WriteAddr);
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
SRAM_Write_Byte(uart_outime,g_uart[UART_2].TX_Buffer_WriteAddr+2);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_2].TX_Buffer_WriteAddr+3);
g_uart[UART_2].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_2].TX_Buffer_WriteAddr > SRAM_UART2_SendBuffer_End_Addr) g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
break;
case UART_3:
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
SRAM_Write_Word(len,g_uart[UART_3].TX_Buffer_WriteAddr);
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
SRAM_Write_Byte(uart_outime,g_uart[UART_3].TX_Buffer_WriteAddr+2);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_3].TX_Buffer_WriteAddr+3);
g_uart[UART_3].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_3].TX_Buffer_WriteAddr > SRAM_UART3_SendBuffer_End_Addr) g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
break;
default:
break;
}
}

42
MCU_Driver/watchdog.c Normal file
View File

@@ -0,0 +1,42 @@
/*
* watchdog.c
*
* Created on: Nov 12, 2025
* Author: cc
*/
#include "watchdog.h"
/*******************************************************************************
* Function Name : WDT_Init
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Init(void)
{
// WWDG_ResetCfg(ENABLE);
// WWDG_SetCounter(WDT_NUM);
}
/*******************************************************************************
* Function Name : WDT_Feed
* Description : <20><><EFBFBD>Ź<EFBFBD>ι<EFBFBD><CEB9>
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Feed(void)
{
//WWDG_ClearFlag();
// WWDG_SetCounter(WDT_NUM);
}
/*******************************************************************************
* Function Name : WDT_Reinit
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Reinit(void)
{
}