feat:新建项目文件
BLV主机C1P模块
This commit is contained in:
28
MCU_Driver/inc/blv_authorize.h
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28
MCU_Driver/inc/blv_authorize.h
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/*
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* blv_authorize.h
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*
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* Created on: Nov 8, 2025
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* Author: cc
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*/
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#ifndef _BLV_AUTHORIZE_H_
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#define _BLV_AUTHORIZE_H_
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#include "ch564.h"
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#include <stdint.h>
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typedef struct
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{
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uint8_t lock_status; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
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uint8_t last_status;
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uint32_t expires_time; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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}BLV_AUTHORIZE;
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void BLV_Set_Authorize_Status(uint32_t Expires_time,uint8_t lock);
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void BLV_Authorize_Processing(uint32_t utc_time);
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void Set_Authorize_Lock_Status(uint8_t state);
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uint8_t Get_Authorize_Lock_Status(void);
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uint32_t Get_Authorize_UnixTime(void);
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#endif /* MCU_DRIVER_INC_BLV_AUTHORIZE_H_ */
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304
MCU_Driver/inc/blv_dev_action.h
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304
MCU_Driver/inc/blv_dev_action.h
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/*
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* blv_dev_action.h
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*
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* Created on: Nov 11, 2025
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* Author: cc
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*/
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#ifndef MCU_DRIVER_INC_BLV_DEV_ACTION_H_
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#define MCU_DRIVER_INC_BLV_DEV_ACTION_H_
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#include <stdint.h>
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#include "ch564.h"
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#define DevActionNameLenMax 0x20 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define DevCtrlNumMax 50 //<2F><>չ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>50
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#define CtrlValid 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
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#define CtrlInvalid 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
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#define CondIsPass 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>
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#define CondIsNotPass 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϲ<D0B6><CFB2><EFBFBD><EFBFBD><EFBFBD>
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#define DEV_STATE_OPEN 0x01 //<2F>豸״̬Ϊ<CCAC><CEAA>
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#define DEV_STATE_CLOSE 0x02 //<2F>豸״̬Ϊ<CCAC><CEAA>
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#define SCENE_MODE_CTRL 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
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#define LIGHT_MODE_CTRL 0x02 //<2F>ƹ<EFBFBD><C6B9><EFBFBD><EFBFBD><EFBFBD>ģʽ
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#define NOR_MODE_CTRL 0x01 //<2F><>ͨģʽ<C4A3><CABD><EFBFBD><EFBFBD>
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#define SLEEP_MODE_CTRL 0x02 //˯<><CBAF>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
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#define DEV_CTRLWAY_INVALID 0x00 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><CABD>Ч
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#define DEV_CTRLWAY_OPEN 0x01 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
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#define DEV_CTRLWAY_CLOSE 0x02 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
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#define DEV_CTRLWAY_RELATESCENE 0x03 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define DEV_CTRLWAY_STOP 0x06 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪͣ
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#define Season_Spring 0x01 //<2F><><EFBFBD><EFBFBD>
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#define Season_Summer 0x02 //<2F>ļ<EFBFBD>
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#define Season_Winter 0x03 //<2F><><EFBFBD><EFBFBD>
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#define Season_Autumn 0x00 //<2F>^
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#define ACTION_SCENE_ONE 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
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#define ACTION_SCENE_TWO 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
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#define ACTION_SCENE_SLEEP 0x04 //˯<><CBAF>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
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#define ACTION_SCENE_MAINSWITCH 0x05 //<2F>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָʾ<D6B8>ƾͿ<C6BE><CDBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еƹأ<C6B9>ָʾ<D6B8>ƲŹ<C6B2>
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#define ACTION_SCENE_HELPSLEEP 0x06 //<2F><><EFBFBD><EFBFBD>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
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#define ACTION_SCENE_MULTI 0x0B //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define ACTION_SCENE_Rotary 0x0C //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD>
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#define ACTION_SCENE_SLEEP_UNRELATED 0x0E //<2F><>˯<EFBFBD><CBAF><EFBFBD>صij<D8B5><C4B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᴥ<EFBFBD><E1B4A5><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD><EFBFBD>
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#define NightModeStart 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹģʽ
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#define NightModeOpen 0x02 //<2F><><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9>
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#define NightModeClose 0x00 //<2F>ر<EFBFBD>ҹ<EFBFBD><D2B9>
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#define DevCtrlLen 0x06 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȹ̶<C8B9>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
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#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
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#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
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typedef struct
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{
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uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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char DevActionName[DevActionNameLenMax]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32<33><32><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>÷ָ<C3B7><D6B8><EFBFBD>
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}Dev_Action_Core; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
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typedef struct
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{
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uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
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uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
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uint16_t inAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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uint16_t inType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
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typedef struct
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{
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uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
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uint64_t RoomState:3; //<2F><>̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<>˷<EFBFBD> 3<><33><EFBFBD><EFBFBD> 4<>շ<EFBFBD>
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uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint64_t EleState:3; //ȡ<><C8A1>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t WashState:3; //ϴ<><CFB4>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t SosState:3; //SOS״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
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uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32> 3<><33> 4<><34> <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB>1<EFBFBD><31> 2<><32> 3<><33> 0<><30>
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uint64_t TimeState:3; //ʱ<><CAB1> 1ȫ<31><C8AB> 2<><32><EFBFBD><EFBFBD> 3<><33>ҹ
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uint64_t NeightFlag:1; //<2F><>ҹ<EFBFBD><D2B9><EFBFBD>й<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD>й<EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD><EFBFBD>
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uint64_t NeightState:2; //<2F><>ҹ״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ 2<><32>ҹ<EFBFBD><D2B9> 0<>˳<EFBFBD><CBB3><EFBFBD>ҹ
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uint64_t RcuLockState:3; //RCU<43><55><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<><32><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
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uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
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}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
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typedef struct{
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Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
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}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
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typedef struct
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{
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uint8_t DelayCont; //<2F><>ʱʱ<CAB1><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱִ<CAB1><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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uint8_t DelayWeight; //<2F><>ʱ<EFBFBD><CAB1>λ
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}Dev_Dly_Value; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
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typedef struct
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{
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/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
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uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
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uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
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uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
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uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬
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Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
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/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
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}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
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#define DEVACTIONOUTCFGLEN sizeof(Dev_Action_OutCfg) //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
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typedef struct
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{
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Dev_Action_OutCfg DevActionOutCfg; // <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
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uint32_t DevActionOutAddr; //ÿ<><C3BF><EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
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uint32_t DevDlyAddr; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
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}Dev_Action_Output; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
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typedef struct
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{
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uint8_t SceneState; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬ Ŀǰ<C4BF><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߹<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD>Ƶı<C6B5>־ ˯<>߽ڵ<DFBD><DAB5>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ݱȽ<DDB1><C8BD><EFBFBD><EFBFBD>⣬ȫ<E2A3AC><C8AB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
uint8_t SceneStateLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬<D7B4><CCAC><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ <20><><EFBFBD><EFBFBD>ָʾ<D6B8>ƿ<EFBFBD><C6BF><EFBFBD>
|
||||
uint8_t SceneReuseFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ȫһ<C8AB><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҷ<EFBFBD><D2B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><D6BE>һ Ϊ1<CEAA><31>ɨ<EFBFBD>趯<EFBFBD><E8B6AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t MultiSetFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><C2B1><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD> 2024-05-23
|
||||
uint8_t MultiNumber; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2024-05-23
|
||||
uint8_t MultiValidNo; //<2F><>Ч<EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2024-05-23
|
||||
uint8_t SceneTypeFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־ 1<><31><EFBFBD><EFBFBD>Ҫ<EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ 0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>˯<EFBFBD>ߣ<EFBFBD><DFA3>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 2<><32><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 0<><30><EFBFBD><EFBFBD>ʾδ<CABE><CEB4><EFBFBD>峡<EFBFBD><E5B3A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶƹ<C6B5>һ<EFBFBD>࣬һ·<D2BB>Ƽ<EFBFBD><C6BC>ǵ<EFBFBD><C7B5>أ<EFBFBD><D8A3><EFBFBD>·<EFBFBD>Ƽ<EFBFBD><C6BC>Ƕ<EFBFBD><C7B6>ء<EFBFBD><D8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t DevAddrIn; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
}Dev_Action_State; //<2F>豸״̬ һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct CFG_Action_Add
|
||||
{
|
||||
Dev_Action_Core DevActionCore; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Input DevActionInput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
|
||||
|
||||
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
||||
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
|
||||
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
|
||||
uint8_t DevCtrlNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Output DevActionOutput[DevCtrlNumMax]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16N <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>28<32><38>
|
||||
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
|
||||
|
||||
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
|
||||
uint8_t BlwMapDevi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
|
||||
uint8_t DevNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevBusNum; //Bus<75><73><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevPollNum; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
|
||||
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
|
||||
uint8_t TimeGetFlag; //ʱ<><CAB1><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1>
|
||||
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
|
||||
uint16_t SleepActionNo; //˯<>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
uint32_t DevLockAddr; //<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t Lock485Addr; //<><CEA2><EFBFBD><EFBFBD>485<38><35>ַ
|
||||
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
|
||||
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CheckTypeNum; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CheckMapList[4]; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
|
||||
|
||||
uint8_t OffLineDevType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
|
||||
uint8_t OffLineDevAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
||||
uint8_t InputType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
|
||||
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
||||
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
|
||||
|
||||
uint8_t People_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 2024-03-01
|
||||
uint8_t ServerCtrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CardInFlag; //<2F><>ס<EFBFBD><D7A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD> 2024-04-29
|
||||
|
||||
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t TimeSyncFlag; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
|
||||
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t VC_ConNToSGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t VC_ConNToSSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t VC_ConSToNGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t VC_ConSToNSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t VC_PortNum; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
|
||||
|
||||
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
|
||||
|
||||
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
|
||||
uint8_t SleepMode_State;
|
||||
uint8_t Last_SleepMode_State;
|
||||
uint8_t SleepLight_State;
|
||||
uint8_t Last_SleepLight_State;
|
||||
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
|
||||
uint8_t Last_Person_Detected;
|
||||
|
||||
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
|
||||
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||
|
||||
uint8_t CardState; //<2F>忨״̬
|
||||
uint8_t Last_CardState;
|
||||
|
||||
uint8_t Rs485CardType; //<2F>忨<EFBFBD><E5BFA8><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD> <20><><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -> "<22><><EFBFBD><EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"<22>¼<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Last_Rs485CardType;
|
||||
uint8_t Last_NeightState;
|
||||
|
||||
}BLV_DevAction_Manage_G;
|
||||
|
||||
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
|
||||
#define DevDlyNumMax ((SRAM_DevDly_List_End_Addr - SRAM_DevDly_List_Start_Addr) / DevDlyStructLen) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define DELAY_TIME_MS 0x01 //<2F><><EFBFBD><EFBFBD>
|
||||
#define DELAY_TIME_S 0x02 //<2F><>
|
||||
#define DELAY_TIME_MIN 0x03 //<2F><><EFBFBD><EFBFBD>
|
||||
#define DELAY_TIME_HOUR 0x04 //Сʱ
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0Ϊ<30><CEAA><EFBFBD><EFBFBD>
|
||||
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>· Ϊ<><CEAA><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>˱<EFBFBD><CBB1><EFBFBD>û<EFBFBD><C3BB>
|
||||
uint32_t DevDlyAddr; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ڵ<EFBFBD> <20>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Χ<EFBFBD><CEA7><EFBFBD><EFBFBD><EFBFBD>߶<EFBFBD><DFB6><EFBFBD><EFBFBD><EFBFBD>Χ
|
||||
}Struct_Dev_Dly_Core; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ 7<><37><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
||||
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t DlyExcuteTime; //<2F><>ʱִ<CAB1><D6B4>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ʱ<EFBFBD>䱻<EFBFBD><E4B1BB>ֵ
|
||||
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
|
||||
|
||||
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
|
||||
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint8_t Addr;
|
||||
uint32_t ExpandReadFlag;
|
||||
uint16_t ExpandReadState[32];
|
||||
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||
|
||||
typedef struct{
|
||||
uint8_t Addr;
|
||||
uint32_t DimmReadFlag;
|
||||
uint16_t DimmReadState[32];
|
||||
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern BLV_DevAction_Manage_G DevActionGlobal;
|
||||
|
||||
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
||||
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
|
||||
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
||||
93
MCU_Driver/inc/blv_netcomm_function.h
Normal file
93
MCU_Driver/inc/blv_netcomm_function.h
Normal file
@@ -0,0 +1,93 @@
|
||||
/*
|
||||
* BLV_NETCOMM_Function.h
|
||||
*
|
||||
* Created on: Nov 3, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef _BLV_NETCOMM_FUNCTION_H_
|
||||
#define _BLV_NETCOMM_FUNCTION_H_
|
||||
|
||||
#define FRAME_HEAD_OFFSET 0 //ͷλ<CDB7><CEBB> 0
|
||||
#define FRAME_LEN_OFFSET 2 //֡<><D6A1>λ<EFBFBD><CEBB> 2
|
||||
#define SYSTEM_ID_OFFSET 4 //ϵͳIDλ<44><CEBB> 4
|
||||
#define CMD_OFFSET 8 //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 8
|
||||
#define FRAME_NO_OFFSET 9 //֡<><D6A1>λ<EFBFBD><CEBB> 9
|
||||
#define FLOOR_NUM_OFFSET 11 //¥<><C2A5><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 11
|
||||
#define BLV_UDP_HEAD_LEN 15 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
|
||||
#define BLV_UDP_PACK_LEN 17 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SeriaNet_Cmd_Send_Len 19 //<2F><>ͷ<EFBFBD><CDB7>15Byte+<2B><><EFBFBD>ݣ<EFBFBD>2Byte+CRC<52><43>2Byte
|
||||
|
||||
#define Search_Cmd 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Heart_Cmd 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_QueryTime_Cmd 0x08 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define In_RoomState_Cmd 0x0E //״̬<D7B4>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 ȡ<><C8A1>
|
||||
#define In_DevCtr_Cmd 0x0F //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ͵<C6BA><CDB5><EFBFBD>
|
||||
#define In_SingleAirCtrl_Cmd 0x13 //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_Sys_Key_Cmd 0x24 //һ<><D2BB><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define In_SetSecretKey_Cmd 0x28 //<2F><><EFBFBD><EFBFBD>MQTT<54><54>Կ
|
||||
#define In_ReadSecretKey_Cmd 0x29 //<2F><>ȡMQTT<54><54>Կ
|
||||
#define In_ReadRegister_Cmd 0x30 //<2F><>ȡӳ<C8A1><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_WriteRegister_Cmd 0x31 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_Get_RoomRent_Cmd 0x32 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ 2025-09-09
|
||||
#define In_Reboot_Reason_Cmd 0x33 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_PeriodicReport_Cmd 0x34 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define In_SeriaNet_Cmd 0x70 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
|
||||
#define In_SeriaNetReported_Cmd 0x71 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
||||
|
||||
#define In_Read_MCUSystem_Cmd 0xB1 //<2F><>ȡϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define In_BLVIAP_Cmd 0xB2 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ִ<EFBFBD>е<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPCheck_Cmd 0xB3 //BLV_Cx<43><78><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPJump_Cmd 0xB4 //BLV_Cx<43><78>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPLogic_Cmd 0xB5 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
#define In_BLVIAPPlan_Cmd 0xB6 //BLV_Cx<43>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ϱ<EFBFBD>
|
||||
#define In_BLVPCTest_Cmd 0xD1 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬ 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVConfig_Cmd 0xD2 //BLV-C1<43><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>·<EFBFBD> 2025-10-09 ȡ<><C8A1>ʹ<EFBFBD><CAB9>
|
||||
#define In_BLVPCTestDevice_Cmd 0xD3 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-10-26 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVFlashInfoWrite_CMD 0xD4 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVFlashInfoRead_CMD 0xD5 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVQueryTFTPIP_CMD 0xD6 //<2F>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP
|
||||
#define In_BLVRpDomainCtrl_Cmd 0xD7 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
#define In_BLVQueryCommonState_Cmd 0xD8 //ѯ<>ʹ<EFBFBD><CAB9><EFBFBD>״̬
|
||||
|
||||
#define In_BLVTFTPDomainName_Cmd 0xD9 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>RCU-TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVTFTPDataRead_Cmd 0xDA //TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ȡ
|
||||
#define In_BLVDayNightTimeSet_Cmd 0xDB //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD>䷶Χ<E4B7B6><CEA7><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
#define UDP_ActSend_PowerChange_Flag 0x01 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ȡ<><C8A1>״̬<D7B4>仯 <20><>־λ
|
||||
#define UDP_ActSend_DevState_Flag 0x02 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20>豸״̬<D7B4>仯 <20><>־λ
|
||||
#define UDP_ActSend_Periodic_Flag 0x04 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> <20><>־λ
|
||||
#define UDP_ActSend_Reboot_Flag 0x08 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> <20><>־λ
|
||||
#define UDP_ActSend_RoomState_Flag 0x10 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ <20><>־λ
|
||||
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
|
||||
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
|
||||
|
||||
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
|
||||
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
|
||||
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
||||
#define USER_NET_Send_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RCU_SoftwareVer 20 //RCU<43>̼<EFBFBD><CCBC>汾
|
||||
#define RCU_ConfigVer 3 //RCU<43><55><EFBFBD>ð汾<C3B0><E6B1BE>
|
||||
|
||||
|
||||
|
||||
extern uint8_t Global_Large_Buff[1100];
|
||||
|
||||
void Udp_Addtion_Roomstate(uint8_t type,uint8_t addr,uint16_t loop,uint16_t start);
|
||||
|
||||
uint8_t Udp_Internal_PC_Testing_Reported(uint8_t *reply_data,uint16_t reply_len,uint8_t *ip,uint16_t port);
|
||||
uint8_t Udp_Internal_BLVPCTestDevice_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
|
||||
|
||||
uint8_t Udp_Internal_SeriaNet_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
|
||||
uint8_t Udp_Internal_SeriaNet_Uploading(uint8_t port,uint32_t baud,uint32_t data_addr);
|
||||
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
|
||||
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */
|
||||
355
MCU_Driver/inc/blv_rs485_protocol.h
Normal file
355
MCU_Driver/inc/blv_rs485_protocol.h
Normal file
@@ -0,0 +1,355 @@
|
||||
/*
|
||||
* blv_rs485_protocol.h
|
||||
*
|
||||
* Created on: Nov 10, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
|
||||
#define MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define Polling_Port 0x01 //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
#define Active_Port 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#define Bus_port 0x03 //BUS<55>˿<EFBFBD>
|
||||
|
||||
#define Active_Baud 9600 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Polling_Baud 9600 //<2F><>ѯ<EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Bus_Baud 115200 //BUS<55>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define RS485OCCUPYTIME 0x01 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
|
||||
#define RS485OCCUPYNOTIME 0x00 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>洢<EFBFBD>ṹ*/
|
||||
typedef enum{
|
||||
Dev_Type = 0x00, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
|
||||
Dev_Addr, //<2F>豸<EFBFBD><E8B1B8>ַ - 1Byte
|
||||
Dev_port, //<2F>豸<EFBFBD>˿<EFBFBD> - 1Byte
|
||||
Dev_baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_baud_8,
|
||||
Dev_baud_16,
|
||||
Dev_baud_24,
|
||||
Dev_Check, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> - 1Byte
|
||||
Dev_DataLen, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> - 2Byte
|
||||
Dev_DataLen_H, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
Dev_Retrynum, //<2F>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
Dev_WaitTime, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1> - 2Byte
|
||||
Dev_WaitTime_8,
|
||||
Dev_Protocol, //<2F>豸Э<E8B1B8><D0AD>
|
||||
Dev_Coord, //<2F>豸<EFBFBD>±<EFBFBD>
|
||||
Dev_Coord_8,
|
||||
Dev_ActionCoord, //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
Dev_ActionCoord_8,
|
||||
Dev_Polling_CF, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Polling_CF_8,
|
||||
Dev_Polling_CF_16,
|
||||
Dev_Polling_CF_24,
|
||||
Dev_Processing_CF, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Processing_CF_8,
|
||||
Dev_Processing_CF_16,
|
||||
Dev_Processing_CF_24,
|
||||
Dev_Data_Process_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte Ҳ<>Ǻ<EFBFBD><C7BA><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Dev_Data_Process_8,
|
||||
Dev_Data_Process_16,
|
||||
Dev_Data_Process_24,
|
||||
Dev_Input_Type_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Input_Type_Get_8,
|
||||
Dev_Input_Type_Get_16,
|
||||
Dev_Input_Type_Get_24,
|
||||
Dev_Output_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƻص<C6BB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Ctrl_8,
|
||||
Dev_Output_Ctrl_16,
|
||||
Dev_Output_Ctrl_24,
|
||||
Dev_Output_Loop_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Loop_State_Get_8,
|
||||
Dev_Output_Loop_State_Get_16,
|
||||
Dev_Output_Loop_State_Get_24,
|
||||
Dev_Output_Group_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD>Ƶõ<C6B5><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Group_Ctrl_8,
|
||||
Dev_Output_Group_Ctrl_16,
|
||||
Dev_Output_Group_Ctrl_24,
|
||||
Dev_Output_Loop_Group_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Loop_Group_State_Get_8,
|
||||
Dev_Output_Loop_Group_State_Get_16,
|
||||
Dev_Output_Loop_Group_State_Get_24,
|
||||
Dev_Privately, //<2F>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD> -- <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
}Device_Attribute_E;
|
||||
|
||||
/*485<38>豸״̬<D7B4><CCAC><EFBFBD>忪ʼ*/
|
||||
#define DEV_IS_ONLINE 0x00 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define DEV_IS_OFFLINE 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define DEV_IS_LINEUNINIT 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δȷ<CEB4><C8B7>
|
||||
|
||||
#define Port_Normal_Mode 0x01 //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
#define Port_Passthrough_mode 0x02 //<><CDB8>ģʽ
|
||||
#define Port_Monitoring_mode 0x03 //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
|
||||
#define In_ErrFun_LineState 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
#define In_ErrFun_ELEPercent 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>
|
||||
#define In_ErrFun_CurValue 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ֵ
|
||||
#define In_ErrFun_ResetTime 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1901<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_ErrFun_LoopState 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8>·״̬
|
||||
|
||||
#define Passthrough_DataLen_Max 0x01E0 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ480Byte
|
||||
|
||||
#define BLV_BUS485_WaitLdle_Time 20 //<2F><>λ:ms
|
||||
#define BUS_Retry_Flag 0x40 //<2F>ط<EFBFBD><D8B7><EFBFBD>־
|
||||
#define BLV_BUS485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
#define BLV_BUS485_ChangeBaudSendWaitTime 20 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
#define BLV_POLL485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
|
||||
/* BLV_BUS 485<38><35><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD>ʽ
|
||||
<EFBFBD><EFBFBD> PKT_ADD_FM<46><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>ַ
|
||||
<EFBFBD><EFBFBD> PKT_TYPE<50><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
<20><> bit 7 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>ǵ<EFBFBD><C7B5><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>
|
||||
bit 7 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
bit 7 = 1 <20><> Ⱥ<><C8BA><EFBFBD><EFBFBD>ַ
|
||||
<20><> bit 6 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7B7><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݡ<EFBFBD>
|
||||
bit 6 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
bit 6 = 1 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
<20><> bit 3<><33>0 <20><><EFBFBD><EFBFBD><EFBFBD>кš<D0BA>
|
||||
<20><><EFBFBD>кŷ<D0BA>Χ<EFBFBD><CEA7>0~15ѭ<35><D1AD><EFBFBD>ۼӣ<DBBC>ÿ<EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>μ<EFBFBD>1<EFBFBD><31>
|
||||
<EFBFBD><EFBFBD> PKT_DevType<70><65><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
<EFBFBD><EFBFBD> PKT_ADD_TO<54><4F><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪȺ<CEAA><C8BA>ʱ<EFBFBD><CAB1>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ΪȫԱ<C8AB>㲥<EFBFBD><E3B2A5>Ϣ<EFBFBD><CFA2>
|
||||
<EFBFBD><EFBFBD> PKT_LEN<45><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD>50<35><30>
|
||||
<EFBFBD><EFBFBD> PKT_CHKSUM<55><4D>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD>1Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>PKT_CHKSUM<55>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ࡣ
|
||||
<EFBFBD><EFBFBD> PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3>̶<EFBFBD><CCB6><EFBFBD><EFBFBD><EFBFBD> 1Byte
|
||||
<EFBFBD><EFBFBD> PKT_PARA<52><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><C8B2>̶<EFBFBD>
|
||||
*/
|
||||
typedef enum{
|
||||
PKT_ADD_FM,
|
||||
PKT_TYPE,
|
||||
PKT_DevType,
|
||||
PKT_ADD_TO,
|
||||
PKT_LEN,
|
||||
PKT_CHKSUM,
|
||||
PKT_CMD,
|
||||
PKT_PARA,
|
||||
}BLV_BUS_PKT_E;
|
||||
|
||||
/*BUS<55><53><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD>2 - <20><><EFBFBD>ȸ<EFBFBD>Ϊuint16_t<5F><74><EFBFBD><EFBFBD>*/
|
||||
typedef enum{
|
||||
PKT2_ADD_FM,
|
||||
PKT2_TYPE,
|
||||
PKT2_DevType,
|
||||
PKT2_ADD_TO,
|
||||
PKT2_LEN,
|
||||
PKT2_LEN_8,
|
||||
PKT2_CHKSUM,
|
||||
PKT2_CMD,
|
||||
PKT2_PARA,
|
||||
}BLV_BUS_PKT2_E;
|
||||
|
||||
typedef enum{
|
||||
B_IDLE, //<2F><><EFBFBD><EFBFBD>
|
||||
B_Polling, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||
B_Send, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||
Change_Dev, //<2F>л<EFBFBD><D0BB>豸
|
||||
Read_Dev, //<2F><><EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
|
||||
B_Retry, //<2F><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
Wait_Reply, //<2F>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
|
||||
B_Wait, //BUS<55><53><EFBFBD>ߵȴ<DFB5>
|
||||
Baud_Wait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>
|
||||
Baud_Comm, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA>ȷ<EFBFBD><C8B7><EFBFBD>һ<EFBFBD><D2BB>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ
|
||||
Baud_SendWait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA><EFBFBD><EFBFBD>͵ȴ<CDB5>
|
||||
}G_BLV_BUS;
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6>忪ʼ*/
|
||||
typedef void (*fun_prt)(uint32_t );
|
||||
typedef uint8_t (*fun2_prt)(uint32_t ,uint32_t ,uint16_t );
|
||||
typedef void (*fun3_prt)(unsigned long);
|
||||
typedef uint8_t (*fun4_prt)(uint32_t );
|
||||
|
||||
|
||||
typedef void (*Dev_Dev_Data_Process_ptr)(uint32_t CfgDevAdd); //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||
typedef uint8_t (*Dev_Dev_Input_Type_Get_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputLoop, uint16_t DevInputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
typedef void (*Dev_Output_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t CfgDevAddOut, uint16_t DevOutputLoop, uint16_t DevOutputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD>ɿ<EFBFBD><C9BF><EFBFBD><EFBFBD>豸
|
||||
typedef uint16_t (*Dev_Output_Loop_State_Get_ptr)(uint32_t CfgDevAddOut, uint16_t DevOutputLoop); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·״̬<D7B4>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱLED<45><44>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>Ϊ50<35><30> <20><>ôӦ<C3B4>÷<EFBFBD><C3B7><EFBFBD>50
|
||||
|
||||
typedef void (*Dev_Output_Group_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start);
|
||||
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
#define Dev_Fun_Ptr_Len sizeof(Struct_Dev_Fun_Info) //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸<EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> һ<><D2BB>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Dev_Dev_Data_Process_ptr Dev_Data_Process; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
|
||||
Dev_Dev_Input_Type_Get_ptr Dev_Input_Type_Get; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Dev_Output_Ctrl_ptr Dev_Output_Ctrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Dev_Output_Loop_State_Get_ptr Dev_Output_Loop_State_Get; //<2F><><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD>
|
||||
Dev_Output_Group_Ctrl_ptr Dev_Output_Group_Ctrl; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD>
|
||||
Dev_Output_Loop_Group_State_Get_ptr Dev_Output_Loop_Group_State_Get_ptr; //<2F><><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD>
|
||||
|
||||
}Struct_Dev_Fun_Info; //<2F>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC>ͬ<EFBFBD><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD>ͬ<EFBFBD>ĺ<EFBFBD><C4BA><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD>Ǵ<EFBFBD><C7B4>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
|
||||
|
||||
/*ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
|
||||
#define BLV_COMM_RecordNum 30
|
||||
#define BLV_CONTINUE_FAIL_MAX 20 //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_COMM_Fail_Precent_Max 30 //ʧ<><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٷֱ<D9B7>
|
||||
#define BLV_COMM_Precent_Num 100 //ͨѶ<CDA8>ٷֱȿ<D6B1>ʼ<EFBFBD><CABC>¼<EFBFBD><C2BC>
|
||||
#define BLV_BUS_BAUD_ADJUST_SIZE 1000 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>115200*1%
|
||||
#define BLV_BUS_BAUD_ADJUST_MIN 103200
|
||||
#define BLV_BUS_BAUD_ADJUST_MAX 126200
|
||||
|
||||
typedef struct{
|
||||
uint8_t record[BLV_COMM_RecordNum]; //ͨѶ<CDA8><D1B6>¼BUFF
|
||||
uint8_t num; //<2F><>ǰд<C7B0><D0B4><EFBFBD>±<EFBFBD>
|
||||
uint8_t continue_fail_num; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܼ<EFBFBD><DCBC><EFBFBD>
|
||||
uint8_t comm_percent; //ͨѶ<CDA8>ٷֱ<D9B7>
|
||||
uint8_t full_flag; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t remian1;
|
||||
uint8_t remian2;
|
||||
}BLV_COMM_RECORD_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t type;
|
||||
uint8_t addr;
|
||||
uint8_t port;
|
||||
uint32_t baud;
|
||||
uint8_t check;
|
||||
uint16_t data_len;
|
||||
uint8_t retry_num;
|
||||
uint16_t wait_time;
|
||||
uint8_t Protocol; //Э<><D0AD>
|
||||
uint16_t DevCoord; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
uint16_t ActionCoord; //<2F><>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
|
||||
uint32_t polling_cf; //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
uint32_t processing_cf; //<2F><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Struct_Dev_Fun_Info DevFunInfo; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ṹ<EFBFBD><E1B9B9>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}Device_Public_Information_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_BUS_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t POLL_Start; //POLL״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_POLL_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Act_Start; //Active״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t process_num; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint32_t list_read_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Send_Flag; //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_ACTIVE_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t NorDeviceNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint8_t NorDevicei; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD>IJ<EFBFBD><C4B2><EFBFBD>
|
||||
}BLV_NORDEV_Manage_G;
|
||||
|
||||
extern BLV_BUS_Manage_G BUS485_Info;
|
||||
extern BLV_POLL_Manage_G Poll485_Info;
|
||||
extern BLV_ACTIVE_Manage_G Act485_Info;
|
||||
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
|
||||
|
||||
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
uint8_t Device_Data_Check(uint32_t sram_addr);
|
||||
void BLV_BUS_Polling_Task(void);
|
||||
void BUS485Port_Passthrough_Task(void);
|
||||
void BLV_BUS485Port_ModeTask(void);
|
||||
void BLV_PollPort_Task(void);
|
||||
void Poll485Port_Passthrough_Task(void);
|
||||
void BLV_PollPort_ModeTask(void);
|
||||
void BLV_ActivePort_Task(void);
|
||||
void Act485Port_Passthrough_Task(void);
|
||||
void BLV_ActivePort_ModeTask(void);
|
||||
void BLV_Active_Set_List_Addr(uint32_t addr);
|
||||
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
|
||||
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);
|
||||
uint32_t Find_AllDevice_List_Information2(uint8_t Port, uint8_t dev_type,uint8_t addr);
|
||||
uint8_t Find_The_Number_Of_Device_In_The_List(void);
|
||||
uint8_t Gets_the_state_of_all_devices(uint8_t *data_buff,uint8_t num);
|
||||
void Write_Device_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state);
|
||||
void Write_Device_Loop_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state,uint16_t loop);
|
||||
void BLV_Communication_Record(BLV_COMM_RECORD_G *dev_record,uint8_t option,uint8_t state);
|
||||
uint16_t Get_BLV_Communication_Fail_Rate(BLV_COMM_RECORD_G *dev_record);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_ */
|
||||
25
MCU_Driver/inc/check_fun.h
Normal file
25
MCU_Driver/inc/check_fun.h
Normal file
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* check_fun.h
|
||||
*
|
||||
* Created on: Nov 8, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_CHECK_FUN_H_
|
||||
#define MCU_DRIVER_INC_CHECK_FUN_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
uint8_t Log_CheckSum(uint32_t addr,uint8_t len);
|
||||
uint8_t Data_CheckSum(uint8_t* data,uint16_t len);
|
||||
uint8_t CheckSum_Overlook_Check(uint8_t *data, uint16_t len, uint16_t check_id);
|
||||
void NetCRC16(uint8_t *aStr ,uint16_t len);
|
||||
uint16_t NetCRC16_2(uint8_t *aStr ,uint16_t len);
|
||||
uint16_t NetCRC16_Data(uint8_t *aStr ,uint16_t len,uint16_t crc_id);
|
||||
uint8_t DoubleData_CheckSum(uint8_t *Data1, uint16_t Data1Len, uint8_t *Data2, uint16_t Data2Len);
|
||||
uint8_t SOR_CRC(uint8_t *Data, uint8_t DataLen);
|
||||
uint8_t DeAction_Data_Check(uint32_t sram_addr);
|
||||
uint8_t DevAction_CheckSum(uint32_t addr,uint16_t len);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_CHECK_FUN_H_ */
|
||||
83
MCU_Driver/inc/debug.h
Normal file
83
MCU_Driver/inc/debug.h
Normal file
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* debug.h
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_DEBUG_H_
|
||||
#define MCU_DRIVER_DEBUG_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdio.h>
|
||||
|
||||
/* UART Printf Definition */
|
||||
#define DEBUG_UART0 1
|
||||
#define DEBUG_UART1 2
|
||||
#define DEBUG_UART2 3
|
||||
#define DEBUG_UART3 4
|
||||
|
||||
/* DEBUG log function. DEBUG printf() <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
|
||||
#ifndef DBG_LOG_EN
|
||||
#define DBG_LOG_EN 1 //DEBUG LOG <20><><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF><EFBFBD>
|
||||
#endif
|
||||
|
||||
#define DBG_Particular_EN 1 //<2F><>ϸ<EFBFBD><CFB8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD> -- <20><><EFBFBD>嵽<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
|
||||
#define DBG_NET_LOG_EN 1 //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ״̬*/
|
||||
#define DBG_OPT_ActCond_STATUS 1 //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_MQTT_STATUS 1 //MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_Debug_STATUS 1 //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_LOGIC_STATUS 1 //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_DEVICE_STATUS 1 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_NET_STATUS 1 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_SYS_STATUS 1 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ*/
|
||||
#define DBG_BIT_ActCond_STATUS_bit 6
|
||||
#define DBG_BIT_MQTT_STATUS_bit 5
|
||||
#define DBG_BIT_Debug_STATUS_bit 4
|
||||
#define DBG_BIT_LOGIC_STATUS_bit 3
|
||||
#define DBG_BIT_DEVICE_STATUS_bit 2
|
||||
#define DBG_BIT_NET_STATUS_bit 1
|
||||
#define DBG_BIT_SYS_STATUS_bit 0
|
||||
|
||||
|
||||
#ifdef DBG_LOG_EN
|
||||
#define DBG_Printf(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define DBG_Printf(...)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_Particular_EN
|
||||
#define DBG_log(...) {DBG_Printf("%s %s-%d :",__FILE__,__func__,__LINE__);DBG_Printf(__VA_ARGS__);}
|
||||
#else
|
||||
#define DBG_log(...) DBG_Printf(__VA_ARGS__)
|
||||
#endif
|
||||
|
||||
#define DBG_INFO(msg) DBG_Printf("%s %s-%d :%s",__FILE__,__func__,__LINE__,msg)
|
||||
|
||||
#ifdef DBG_NET_LOG_EN
|
||||
#define DBG_NET_log(...) DBG_Printf(__VA_ARGS__)
|
||||
#else
|
||||
#define DBG_NET_log(...)
|
||||
#endif
|
||||
|
||||
extern uint32_t Dbg_Switch;
|
||||
|
||||
|
||||
extern volatile uint32_t SysTick_100us;
|
||||
extern volatile uint32_t SysTick_1ms;
|
||||
extern volatile uint32_t SysTick_1s;
|
||||
|
||||
void Systick_Init(void);
|
||||
void Delay_Us(uint32_t n);
|
||||
void Delay_Ms(uint32_t n);
|
||||
|
||||
void Dbg_NoTick_Print(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Print(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Println(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len);
|
||||
|
||||
#endif /* MCU_DRIVER_DEBUG_H_ */
|
||||
43
MCU_Driver/inc/flash_mem_addr.h
Normal file
43
MCU_Driver/inc/flash_mem_addr.h
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* flash_mem_addr.h
|
||||
*
|
||||
* Created on: Oct 30, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
|
||||
#define MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
|
||||
|
||||
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ʼ*/
|
||||
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
#define SPIFLASH_APP_Start_Addr 0x00000000
|
||||
|
||||
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
||||
|
||||
|
||||
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
|
||||
|
||||
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
|
||||
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
|
||||
|
||||
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
||||
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
|
||||
|
||||
|
||||
#define FLASH_Register_Start_ADDRESS 0x00088000 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><>ʼ<EFBFBD><CABC>ַ
|
||||
#define FLASH_Register_End_ADDRESS 0x000887FF //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
#define FLASH_MCU_Model_Revision_ADDRESS 0x0008A000 //MCU<43>汾<EFBFBD>ͺ<EFBFBD> 64Byte
|
||||
#define FLASH_MCU_Control_Revision_ADDRESS 0x0008A040 //MCU<43>пذ汾<D8B0>ͺ<EFBFBD> 64Byte
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
#define SPIFLASH_LOGIC_FILE_Start_Addr 0x00090000
|
||||
#define SPIFLASH_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||
#define SPIFLASH_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
#define SPIFLASH_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||
#define SPIFLASH_LOGIC_DataStart_ADDRESS 0x00090200 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SPIFLASH_LOGIC_FILE_End_Addr 0x000FFFFF
|
||||
|
||||
#endif /* MCU_DRIVER_INC_FLASH_MEM_ADDR_H_ */
|
||||
20
MCU_Driver/inc/led.h
Normal file
20
MCU_Driver/inc/led.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* led.h
|
||||
*
|
||||
* Created on: May 15, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_LED_H_
|
||||
#define MCU_DRIVER_INC_LED_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define SYS_LED_ON GPIOB_ResetBits(GPIO_Pin_12)
|
||||
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
|
||||
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)
|
||||
|
||||
void SYS_LED_Init(void);
|
||||
void SYS_LED_Task(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LED_H_ */
|
||||
126
MCU_Driver/inc/log_api.h
Normal file
126
MCU_Driver/inc/log_api.h
Normal file
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
* log_api.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef _LOG_API_H_
|
||||
#define _LOG_API_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define LogType_Enable 1 //LOGʹ<47><CAB9>
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD>*/
|
||||
#define LogType_Launcher 0x01 //Launcher<65><72>Ϣ<EFBFBD><CFA2>¼
|
||||
#define LogType_SYS_Record 0x02 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼
|
||||
#define LogType_Device_COMM 0x03 //<2F>豸ͨѶ<CDA8><D1B6>¼
|
||||
#define LogType_Device_Online 0x04 //<2F>豸ͨѶ״̬<D7B4><CCAC>¼
|
||||
#define LogType_Global_Parameters 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼
|
||||
#define LogType_Net_COMM 0x06 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
|
||||
#define LogType_Logic_Record 0x07 //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD> - <20><>ʼ״̬*/
|
||||
#define LogType_Launcher_SWITCH 1
|
||||
#define LogType_SYS_Record_SWITCH 1
|
||||
#define LogType_Device_COMM_SWITCH 1
|
||||
#define LogType_Device_Online_SWITCH 1
|
||||
#define LogType_Global_Parameters_SWITCH 1
|
||||
#define LogType_Net_COMM_SWITCH 1
|
||||
#define LogType_Logic_Record_SWITCH 1
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>λ*/
|
||||
#define LogType_Launcher_bit 0
|
||||
#define LogType_SYS_Record_bit 1
|
||||
#define LogType_Device_COMM_bit 2
|
||||
#define LogType_Device_Online_bit 3
|
||||
#define LogType_Global_Parameters_bit 4
|
||||
#define LogType_Net_COMM_bit 5
|
||||
#define LogType_Logic_Record_bit 6
|
||||
|
||||
extern uint32_t SYS_Log_Switch;
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE><EFBFBD>ز<EFBFBD><D8B2><EFBFBD>*/
|
||||
#define LogInfo_Device_Online 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define LogInfo_Device_Offline 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
typedef enum{
|
||||
LLauncher_App_Check = 0x01, //У<><D0A3>APP
|
||||
LLauncher_Read_App, //<2F><>ȡAPP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>д<EFBFBD>뵽MCU FLash<73><68>
|
||||
LLauncher_Write_Flash, //дFlash
|
||||
LLauncher_Factory_Reset, //<2F>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LLauncher_Reset_Source, //<2F><>λԴ
|
||||
LLauncher_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
|
||||
}LOGTYPE_Launcher_E;
|
||||
|
||||
typedef enum {
|
||||
LSYS_PHY_Change = 0x01, //PHY״̬<D7B4>仯<EFBFBD><E4BBAF>¼
|
||||
LSYS_DevInfo_Error, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
|
||||
LSYS_API_State, //<2F><><EFBFBD><EFBFBD>״̬
|
||||
LSYS_NET_ARGC, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LSYS_MQTT_ARGC, //MQTT<54><54><EFBFBD><EFBFBD>
|
||||
LSYS_Server_Comm_State, //<2F>ƶ<EFBFBD>ͨѶ״̬<D7B4><CCAC>¼
|
||||
LSYS_NET_DefaultARGC, //<2F><><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD>
|
||||
LSYS_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
|
||||
}LOGTYPR_SYSRecord;
|
||||
|
||||
typedef enum {
|
||||
LCOMM_ASK_TO_Reply = 0x01, //<2F><>ѯ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Send_Control, //RCU<43>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Control_Reply, //RCU<43><55><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Adjust_Baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_DEV_COMM;
|
||||
|
||||
typedef enum {
|
||||
LGlobal_Para = 0x01, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LGlobal_Dev, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_Global_E;
|
||||
|
||||
typedef enum {
|
||||
LNetComm_Send = 0x01, //<2F><><EFBFBD>緢<EFBFBD><E7B7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LNetComm_Recv, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_NET_COMM_E;
|
||||
|
||||
typedef enum {
|
||||
LLogic_DebugString = 0x01, //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD> - <20>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
|
||||
}LOGTYPE_LOGICRecord_E;
|
||||
|
||||
/*Launcher<65><72>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Launcher_APP_Check_Record(uint8_t state);
|
||||
void LOG_Launcher_Read_App_Record(uint8_t state);
|
||||
void LOG_Launcher_Write_Flash_Record(uint32_t addr,uint16_t len);
|
||||
void LOG_Launcher_Factory_Reset_Record(void);
|
||||
/*ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_SYS_PHY_Change_Record(uint8_t state);
|
||||
void LOG_SYS_DevInfo_Error_Record(uint8_t dev,uint8_t addr,uint32_t info_addr);
|
||||
void LOG_SYS_API_State_Record(uint8_t API_way,uint8_t state);
|
||||
void LOG_SYS_NET_Argc_Record(uint8_t *IP,uint8_t *MAC,uint8_t *DNS_IP1,uint8_t *DNS_IP2,uint8_t *DNS_IP3);
|
||||
void LOG_SYS_MQTT_Argc_Record(uint8_t *productkey,uint8_t *devname,uint8_t *devsecret,uint8_t *publish,uint8_t *sublish);
|
||||
void LOG_SYS_Server_Comm_State_Record(uint8_t state);
|
||||
void LOG_SYS_NET_Argc_Init_Record(uint8_t *IP,uint8_t *Gateway,uint8_t *IP_Mask,uint8_t *DNS_Add,uint8_t ArgcFlag,uint8_t DHCPFlag,uint8_t ServerFlag);
|
||||
void LOG_SYS_RCUKey_State_Record(uint8_t state);
|
||||
/*<2A>豸ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Device_COMM_ASK_TO_Reply_Record(uint8_t port,uint32_t baud,uint32_t data_tick,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_ASK_TO_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint32_t data_tick,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Send_Control_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Send_Control_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record3(uint32_t port_addr,uint32_t baud_addr,uint32_t buff_addr,uint16_t len);
|
||||
void LOG_Device_COMM_Adjust_Baud_Record(uint8_t dev_type,uint8_t dev_addr,uint32_t baud,uint8_t way,uint8_t fail_num,uint8_t sum,uint8_t num);
|
||||
void LOG_Device_COMM_Adjust_Baud_Record2(uint32_t dev_type,uint32_t dev_addr,uint32_t baud_addr);
|
||||
/*<2A>豸ͨѶ״̬<D7B4><CCAC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Device_Online_Record(uint8_t dev,uint8_t addr,uint8_t state);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Global_ParaInfo_Record(uint8_t *buff,uint16_t len);
|
||||
void LOG_Global_DevInfo_Record(uint8_t *buff,uint16_t len);
|
||||
/*<2A><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_NET_COMM_Send_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
|
||||
void LOG_NET_COMM_Recv_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
|
||||
/*<2A><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_LogicInfo_DebugRecord(char *fmt,...);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LOG_API_H_ */
|
||||
171
MCU_Driver/inc/logic_file_function.h
Normal file
171
MCU_Driver/inc/logic_file_function.h
Normal file
@@ -0,0 +1,171 @@
|
||||
/*
|
||||
* logic_file_function.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
|
||||
#define MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ENUM_RS485_DEV_PRO_00, //0<><30>Э<EFBFBD><D0AD> //0
|
||||
ENUM_RS485_DEV_PRO_01, //1<><31>Э<EFBFBD><D0AD> //1
|
||||
ENUM_RS485_DEV_PRO_02, //2<><32>Э<EFBFBD><D0AD> //2
|
||||
ENUM_RS485_DEV_PRO_03, //3<><33>Э<EFBFBD><D0AD> //3
|
||||
ENUM_RS485_DEV_PRO_04, //4<><34>Э<EFBFBD><D0AD> //4
|
||||
ENUM_RS485_DEV_PRO_05, //5<><35>Э<EFBFBD><D0AD> //5
|
||||
ENUM_RS485_DEV_PRO_06, //6<><36>Э<EFBFBD><D0AD> //6
|
||||
ENUM_RS485_DEV_PRO_07, //7<><37>Э<EFBFBD><D0AD> //7
|
||||
ENUM_RS485_DEV_PRO_08, //8<><38>Э<EFBFBD><D0AD> //8
|
||||
ENUM_RS485_DEV_PRO_09, //9<><39>Э<EFBFBD><D0AD> //9
|
||||
ENUM_RS485_DEV_PRO_10, //10<31><30>Э<EFBFBD><D0AD> //10
|
||||
ENUM_RS485_DEV_PRO_11, //11<31><31>Э<EFBFBD><D0AD> //11
|
||||
ENUM_RS485_DEV_PRO_12, //12<31><32>Э<EFBFBD><D0AD> //12
|
||||
ENUM_RS485_DEV_PRO_13, //13<31><33>Э<EFBFBD><D0AD> //13
|
||||
ENUM_RS485_DEV_PRO_14, //14<31><34>Э<EFBFBD><D0AD> //14
|
||||
ENUM_RS485_DEV_PRO_15, //15<31><35>Э<EFBFBD><D0AD> //15
|
||||
ENUM_RS485_DEV_PRO_16, //16<31><36>Э<EFBFBD><D0AD> //16
|
||||
ENUM_RS485_DEV_PRO_17, //17<31><37>Э<EFBFBD><D0AD> //17
|
||||
ENUM_RS485_DEV_PRO_18, //18<31><38>Э<EFBFBD><D0AD> //18
|
||||
ENUM_RS485_DEV_PRO_19, //19<31><39>Э<EFBFBD><D0AD> //19
|
||||
// ENUM_RS485_DEV_PRO_20, //<2F><>ǰЭ<C7B0><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ //20
|
||||
|
||||
}enum_RS485Protocol; //ͬ<><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><D4B0><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD>з<EFBFBD><D0B7><EFBFBD>
|
||||
|
||||
#define LOGIC_DataFlag 0xCC060001 //<2F><EFBFBD><DFBC><EFBFBD>־
|
||||
#define Logic_FrameType_LogicInfo 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_Global 0x02 //ȫ<><C8AB><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_DeviceExist 0x03 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define Logic_FrameType_DeviceAction 0x04 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define Logic_FrameType_VoiceMap 0x05 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>Ϣ
|
||||
|
||||
#define Logic_FrameType_DevCheckMap 0x07 //<2F>豸Ѳ<E8B1B8><D1B2><EFBFBD><EFBFBD>·<EFBFBD><C2B7>Ϣ
|
||||
|
||||
#define Logic_FrameType_VCCondition 0x08 //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_VCPortInfor 0x09 //<2F><EFBFBD>ȡ<EFBFBD><C8A1>ӳ<EFBFBD><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_VCProperty 0x0B //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#define Logic_FrameType_ColorTempMap 0x0A //ɫ<>µ<EFBFBD><C2B5>ڶ˿<DAB6>ӳ<EFBFBD><D3B3>
|
||||
|
||||
#define LogicFile_DeviceInfo_InputSet 79 //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2022-05-30 <20><><EFBFBD><EFBFBD><EFBFBD>ֽڴ<D6BD>32->64
|
||||
|
||||
typedef enum{
|
||||
Logic_D_Hear_L,
|
||||
Logic_D_Hear_H,
|
||||
Logic_D_Len_L,
|
||||
Logic_D_Len_H,
|
||||
Logic_D_CRC_L,
|
||||
Logic_D_CRC_H,
|
||||
Logic_D_Frame_L,
|
||||
Logic_D_Frame_H,
|
||||
Logic_D_FrameNum_L,
|
||||
Logic_D_FrameNum_H,
|
||||
Logic_D_FrameType,
|
||||
Logic_D_Para,
|
||||
}LOGIC_INFO_E;
|
||||
|
||||
typedef struct {
|
||||
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
|
||||
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
|
||||
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t writ_time; //ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t parent_port; //<2F><><EFBFBD>豸<EFBFBD>˿<EFBFBD>
|
||||
uint8_t lin[5]; //<2F><EFBFBD><DEBF>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
uint8_t priproperty[10]; //˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
}LOGICFILE_DEVICE_INFO; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ
|
||||
|
||||
typedef struct{
|
||||
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
uint64_t RoomState:3; //<2F><>̬
|
||||
uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint64_t EleState:3; //ȡ<><C8A1>״̬
|
||||
uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t WashState:3; //ϴ<><CFB4>״̬
|
||||
uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬
|
||||
uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬
|
||||
uint64_t SosState:3; //SOS״̬
|
||||
uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬
|
||||
uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬
|
||||
uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬
|
||||
uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD>
|
||||
uint64_t TimeState:3; //ʱ<><CAB1>
|
||||
uint64_t NeightState:3; //<2F><>ҹ״̬
|
||||
uint64_t RcuLockState:3; //1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
|
||||
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
|
||||
}LOGIC_ACTIVE_CONDITION_G; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
|
||||
|
||||
typedef struct {
|
||||
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
|
||||
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
|
||||
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
|
||||
}LOGIC_DEVICE_ACTIVE_G; //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
|
||||
|
||||
#if C8_TYPE
|
||||
|
||||
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define PollingDevice_NumMax 15 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define ActiveDevice_NumMax 20 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define NorDevice_NumMax 34 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#else
|
||||
|
||||
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define PollingDevice_NumMax 20 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define ActiveDevice_NumMax 34 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define NorDevice_NumMax 15 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
uint8_t Bus_device_num;
|
||||
uint8_t Active_device_num;
|
||||
uint8_t Polling_device_num;
|
||||
uint8_t Nor_device_num;
|
||||
|
||||
uint16_t device_num;
|
||||
uint16_t active_num;
|
||||
uint16_t voicemap_num;
|
||||
uint16_t devcheckmap_num; //2023-11-27
|
||||
|
||||
uint32_t Bus_device_addr[BusDevice_NumMax];
|
||||
uint32_t Polling_device_addr[PollingDevice_NumMax];
|
||||
uint32_t Active_device_addr[ActiveDevice_NumMax];
|
||||
uint32_t Nor_device_addr[NorDevice_NumMax];
|
||||
|
||||
uint32_t ColorTemp_Map_Addr; //ɫ<><C9AB>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>ַ
|
||||
}LOGICFILE_Content_Of_Statistical; //<2F><EFBFBD><DFBC>ļ<EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
|
||||
|
||||
void BLV_DevAction_AllData_Init(void);
|
||||
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
|
||||
uint8_t LOGIC_FILE_Check(void);
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_ */
|
||||
20
MCU_Driver/inc/md5.h
Normal file
20
MCU_Driver/inc/md5.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* md5.h
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_MD5_H_
|
||||
#define MCU_DRIVER_INC_MD5_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
void MD5Digest(char *pszInput, unsigned int nInputSize, char *pszOutPut);
|
||||
void MD5Digest_SRAM(uint32_t add, unsigned int nInputSize, char *pszOutPut);
|
||||
void MD5Digest_FLASH(uint32_t add, unsigned int nInputSize, char *pszOutPut);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_MD5_H_ */
|
||||
55
MCU_Driver/inc/rtc.h
Normal file
55
MCU_Driver/inc/rtc.h
Normal file
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* rtc.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_RTC_H_
|
||||
#define MCU_DRIVER_INC_RTC_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "ch564.h"
|
||||
|
||||
typedef struct{
|
||||
uint8_t second;
|
||||
uint8_t minute;
|
||||
uint8_t hour;
|
||||
uint8_t week;
|
||||
uint8_t day;
|
||||
uint8_t month;
|
||||
uint8_t year;
|
||||
}S_RTC;
|
||||
|
||||
typedef struct{
|
||||
uint32_t hour;
|
||||
uint16_t minute;
|
||||
uint16_t second;
|
||||
}G_CORE_RTC;
|
||||
|
||||
typedef struct{
|
||||
uint8_t time_select; //<2F><>ǰʱ<C7B0><CAB1>ѡ<EFBFBD><D1A1> 0x00:<3A><>ǰδѡ<CEB4><D1A1><EFBFBD><EFBFBD>0x01: ѡ<>ض<F1B1BEB5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:Ӳ<><D3B2>CSIO RTCʱ<43><CAB1>
|
||||
uint8_t csio_rtc_cnt; //CSIO RTCʱ<43>Ӽ<EFBFBD><D3BC><EFBFBD>
|
||||
|
||||
int16_t timezone; //ʱ<><CAB1>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
uint32_t Mcu_GetTime_tick;
|
||||
}TIME_INFO_T;
|
||||
|
||||
extern S_RTC RTC_Raw_Data;
|
||||
extern S_RTC MCU_RTC_Data;
|
||||
extern S_RTC Net_RTC_Data;
|
||||
extern TIME_INFO_T g_time_info;
|
||||
extern uint32_t Log_Time_ms;
|
||||
|
||||
void RTC_Init(void);
|
||||
uint8_t HEX_Conversion_To_DEC(uint8_t c_num);
|
||||
uint8_t DEV_Conversion_To_HEX(uint8_t c_num);
|
||||
uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time);
|
||||
void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick);
|
||||
uint8_t RTC_ReadDate(S_RTC *psRTC);
|
||||
uint8_t RTC_WriteDate(S_RTC SetRTC);
|
||||
void RTC_TASK(void);
|
||||
uint8_t RTC_TimeDate_Correct_Figure(uint8_t data);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_RTC_H_ */
|
||||
49
MCU_Driver/inc/rw_logging.h
Normal file
49
MCU_Driver/inc/rw_logging.h
Normal file
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* rw_logging.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_RW_LOGGING_H_
|
||||
#define MCU_DRIVER_INC_RW_LOGGING_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
//<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>
|
||||
#define LOG_Data_Hand 0xA5 //LOG<4F><47><EFBFBD><EFBFBD>ͷ
|
||||
#define Log_Data_End 0x5A //LOG<4F><47><EFBFBD><EFBFBD>β
|
||||
#define Log_Data_Len_MAX 512 //<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>ʽ*/
|
||||
typedef enum{
|
||||
S_Log_Hand,
|
||||
S_Log_SN, //<2F><>־ÿ<D6BE><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
|
||||
S_Log_Len,
|
||||
S_Log_Len_8,
|
||||
S_Log_Check,
|
||||
S_Log_Date_H, //<2F>꣺5bit <20>£<EFBFBD>5bit <20>գ<EFBFBD>5bit
|
||||
S_Log_Date_L,
|
||||
S_Log_Type,
|
||||
S_Log_Time8B, //Сʱʱ<CAB1><CAB1><EFBFBD><EFBFBD>
|
||||
S_Log_Time16B,
|
||||
S_Log_Time24B,
|
||||
S_Log_Time32B,
|
||||
S_Log_Data,
|
||||
}Sram_Log_Data_Format;
|
||||
|
||||
|
||||
uint8_t Log_write_sram(uint8_t data_type,uint8_t *buff,uint16_t len);
|
||||
void Retain_Flash_Register_Data(void);
|
||||
void Read_Flash_Register_Data(void);
|
||||
void LOG_Save_Global_Parameters(void);
|
||||
uint8_t SRAM_PowerOn_Restore_ParaInfo(void);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_RW_LOGGING_H_ */
|
||||
65
MCU_Driver/inc/spi_flash.h
Normal file
65
MCU_Driver/inc/spi_flash.h
Normal file
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* spi_flash.h
|
||||
*
|
||||
* Created on: May 20, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SPI_FLASH_H_
|
||||
#define MCU_DRIVER_INC_SPI_FLASH_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define Flash_CS_H GPIOA_SetBits(GPIO_Pin_11)
|
||||
#define Flash_CS_L GPIOA_ResetBits(GPIO_Pin_11)
|
||||
|
||||
#define Flash_ADDRESS_MAX 0x00200000
|
||||
|
||||
/***********ָ<><D6B8><EFBFBD><EFBFBD>**********/
|
||||
//Read
|
||||
#define P24Q40H_ReadData 0x03
|
||||
#define P24Q40H_FastReadData 0x0B
|
||||
#define P24Q40H_FastReadDual 0x3B
|
||||
//Program and Erase
|
||||
#define P24Q40H_PageErase 0x81
|
||||
#define P24Q40H_SectorErase 0x20
|
||||
#define P24Q40H_BlockErase 0xD8
|
||||
#define P24Q40H_ChipErase 0xC7
|
||||
#define P24Q40H_PageProgram 0x02
|
||||
//Protection
|
||||
#define P24Q40H_WriteEnable 0x06
|
||||
#define P24Q40H_WriteDisable 0x04
|
||||
//Status Register
|
||||
#define P24Q40H_ReadStatusReg 0x05
|
||||
#define P24Q40H_WriteStatusReg 0x01
|
||||
//Other Commands
|
||||
#define P24Q40H_PowerDown 0xB9
|
||||
#define P24Q40H_ReleasePowerDown 0xAB
|
||||
#define P24Q40H_ReadManufactureID 0x90
|
||||
#define P24Q40H_ReadDeviceID 0x9F
|
||||
#define P24Q40H_ResetEnable 0x66
|
||||
#define P24Q40H_Reset 0x99
|
||||
|
||||
extern uint8_t Temp_Flash_Buff[4100];
|
||||
|
||||
void SPI_FLASH_Init(void);
|
||||
uint8_t Flash_ReadSR(void);
|
||||
void Flash_WriteSR(uint8_t sr_val);
|
||||
void Flash_Write_Enable(void);
|
||||
void Flash_Write_Disable(void);
|
||||
uint16_t Flash_ReadID(void);
|
||||
uint8_t Flash_Wait_Busy(void);
|
||||
void Flash_PowerDown(void);
|
||||
void Flash_Wakeup(void);
|
||||
void Flash_Erase_Chip(void);
|
||||
void Flash_Erase_Block(uint32_t BLK_ID);
|
||||
void Flash_Erase_Sector(uint32_t DST_ID);
|
||||
void Flash_Erase_Page(uint32_t Page_ID);
|
||||
void Flash_Erase_Pageaddr(uint32_t Page_addr);
|
||||
void Flash_Read(uint8_t* pBuffer,uint16_t NumByteToRead,uint32_t ReadAddr);
|
||||
void Flash_Write_Page(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
|
||||
void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
|
||||
void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SPI_FLASH_H_ */
|
||||
46
MCU_Driver/inc/spi_sram.h
Normal file
46
MCU_Driver/inc/spi_sram.h
Normal file
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* spi_sram.h
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SPI_SRAM_H_
|
||||
#define MCU_DRIVER_INC_SPI_SRAM_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define SRAM_CE_H GPIOA_ResetBits(GPIO_Pin_11)
|
||||
#define SRAM_CE_L GPIOA_SetBits(GPIO_Pin_11)
|
||||
|
||||
#define SRAM_CMD_Read 0x03
|
||||
#define SRAM_CMD_Fast_Read 0x0B
|
||||
#define SRAM_CMD_Fast_Read_Quad 0xEB
|
||||
#define SRAM_CMD_Write 0x02
|
||||
#define SRAM_CMD_Quad_Write 0x38
|
||||
#define SRAM_CMD_Enter_Quad_Mode 0x35
|
||||
#define SRAM_CMD_Exit_Quad_Mode 0xF5
|
||||
#define SRAM_CMD_Reset_Enable 0x66
|
||||
#define SRAM_CMD_Reset 0x99
|
||||
#define SRAM_CMD_Wrap_Boundary_Toggle 0xC0
|
||||
#define SRAM_CMD_Read_ID 0x9F
|
||||
|
||||
#define SRAM_ADDRESS_MAX 0x00800000
|
||||
|
||||
|
||||
void SPI_SRAM_Init(void);
|
||||
void SRAM_Write_Byte(uint8_t wdate,uint32_t add);
|
||||
uint8_t SRAM_Read_Byte(uint32_t add);
|
||||
void SRAM_Write_Word(uint16_t wdate,uint32_t add);
|
||||
uint16_t SRAM_Read_Word(uint32_t add);
|
||||
void SRAM_Write_DW(uint32_t wdate,uint32_t add);
|
||||
uint32_t SRAM_Read_DW(uint32_t add);
|
||||
uint8_t SRAM_Read_ID_Opeartion(void);
|
||||
void SRAM_Reset_Operation(void);
|
||||
|
||||
void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add);
|
||||
void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add);
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SPI_SRAM_H_ */
|
||||
272
MCU_Driver/inc/sram_mem_addr.h
Normal file
272
MCU_Driver/inc/sram_mem_addr.h
Normal file
@@ -0,0 +1,272 @@
|
||||
/*
|
||||
* sram_mem_addr.h
|
||||
* <20>ⲿSRAM<41><4D>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00000000 ~ 0x007FFFF
|
||||
*
|
||||
* Created on: Oct 30, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
|
||||
#define MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ
|
||||
***********************************************************
|
||||
//SRAM<41>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ -
|
||||
<20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ -
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַΪ0x000100
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ洢<C8B4><E6B4A2><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_BUS_Device_List_Addr
|
||||
<20>ڴ<EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>Ǵ洢<C7B4><E6B4A2><EFBFBD><EFBFBD>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_POLL_Device_List_Addr
|
||||
Ȼ<><C8BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_ACTIVE_Device_List_Addr
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E>
|
||||
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>豸˳<E8B1B8><CBB3><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
*****************************************************************************************
|
||||
| | <20><>ʼ<EFBFBD><CABC>ַ | <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ |
|
||||
| BUS<55>豸<EFBFBD><E8B1B8>Ϣ | SRAM_Device_List_Start_Addr | SRAM_BUS_Device_List_Addr |
|
||||
| <20><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_BUS_Device_List_Addr | SRAM_POLL_Device_List_Addr |
|
||||
| <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_POLL_Device_List_Addr | SRAM_ACTIVE_Device_List_Addr |
|
||||
| <20><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_ACTIVE_Device_List_Addr| SRAM_Device_List_End_Addr |
|
||||
*****************************************************************************************
|
||||
* */
|
||||
#define SRAM_Device_List_Size 0x00000200 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ܴ<EFBFBD>С
|
||||
#define SRAM_BUS_Device_List_Addr 0x00000000 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ - 4Byte
|
||||
#define SRAM_POLL_Device_List_Addr 0x00000004 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define SRAM_ACTIVE_Device_List_Addr 0x00000008 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define SRAM_NORMAL_Device_List_Addr 0x0000000C //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
|
||||
#define SRAM_Device_List_Start_Addr 0x00000100 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_Device_List_End_Addr 0x00009FFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - LOGȫ<47><C8AB>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00B000 - 0x00BFFF*/
|
||||
#define SRAM_LOG_Device_C5IO_Relay_Status 0x0000B000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||
#define SRAM_LOG_Device_C5IO_DO_Status 0x0000B003 //DO״̬ - 1byte
|
||||
#define SRAM_LOG_Device_C5IO_DI_Status 0x0000B004 //DI״̬ - 2Byte
|
||||
#define SRAM_LOG_Device_C5MUSIC_Playback_Status 0x0000B006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||
#define SRAM_LOG_Device_C5MUSIC_Volume_Status 0x0000B007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||
#define SRAM_LOG_Device_C5MUSIC_idx_Status 0x0000B008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||
#define SRAM_LOG_Device_Card_Status 0x0000B00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte 2025-09-03 <20><>ûʹ<C3BB><CAB9>
|
||||
#define SRAM_LOG_Device_Temp_Status 0x0000B00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||
|
||||
/**/
|
||||
#define SRAM_LOG_Device_Switch_Type 0x0000B00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define SRAM_LOG_Device_Switch_Num 0x0000B00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||
#define SRAM_LOG_Device_Switch1_Status 0x0000B00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_Device_Switch2_Status 0x0000B011 //<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_Device_Switch3_Status 0x0000B013 //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_RCU_Reboot_Reason 0x0000B015 //RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> 2025-09-27
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - UDPȫ<50><C8AB>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00C000 - 0x00CFFF*/
|
||||
#define SRAM_UDP_Device_C5IO_Relay_Status 0x0000C000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||
#define SRAM_UDP_Device_C5IO_DO_Status 0x0000C003 //DO״̬ - 1byte
|
||||
#define SRAM_UDP_Device_C5IO_DI_Status 0x0000C004 //DI״̬ - 2Byte
|
||||
#define SRAM_UDP_Device_C5MUSIC_Playback_Status 0x0000C006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||
#define SRAM_UDP_Device_C5MUSIC_Volume_Status 0x0000C007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||
#define SRAM_UDP_Device_C5MUSIC_idx_Status 0x0000C008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||
#define SRAM_UDP_Device_Card_Status 0x0000C00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte
|
||||
#define SRAM_UDP_Device_Temp_Status 0x0000C00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||
/**/
|
||||
#define SRAM_UDP_Device_Switch_Type 0x0000C00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define SRAM_UDP_Device_Switch_Num 0x0000C00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||
#define SRAM_UDP_Device_Switch1_Status 0x0000C00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_UDP_ELEReport_Action 0x0000C011 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_EleState 0x0000C012 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_EleState_Last 0x0000C013
|
||||
#define SRAM_UDP_ELEReport_CardState 0x0000C014 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_CardState_Last 0x0000C015
|
||||
#define SRAM_UDP_ELEReport_CardType 0x0000C016 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_CardType_Last 0x0000C017
|
||||
#define SRAM_UDP_ELEReport_VirtualCard 0x0000C018 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_VirtualCard_Last 0x0000C019
|
||||
#define SRAM_UDP_Report_CarbonSatet 0x0000C01A //UDP <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>̼<EFBFBD><CCBC><EFBFBD>˵<EFBFBD>״̬
|
||||
|
||||
/*SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>豸<EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ƻ<EFBFBD><C6BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00D000 - 0x00DFFF*/
|
||||
#define SRAM_UDP_SendData_Writeaddr 0x0000D000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_SendData_Readaddr 0x0000D004 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_UDP_SendData_Tempaddr 0x0000D008 //
|
||||
|
||||
#define SRAM_UDP_SendData_Startaddr 0x0000D010 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_UDP_SendData_Endaddr 0x0000D7EA //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_SendData_Size 0x9C //һ<>η<EFBFBD><CEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_UDP_RecvData_Writeaddr 0x0000D800 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_RecvData_Readaddr 0x0000D804 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_UDP_RecvData_Tempaddr 0x0000D808 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ַ
|
||||
#define SRAM_UDP_RecvData_ControlNum 0x0000D80C //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>
|
||||
#define SRAM_UDP_RecvData_Startaddr 0x0000D810 //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_UDP_RecvData_Endaddr 0x0000DFEA //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
/*<2A>ϵ<EFBFBD><CFB5>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><>ַ<EFBFBD><D6B7>Χ:0x0x00E100 ~ 0x00E1FF */
|
||||
#define SRAM_PowerOn_Restore_StartAddr 0x0000E100
|
||||
#define SRAM_PowerOn_Restore_Flag 0x0000E100
|
||||
#define SRAM_PowerOn_Restore_Len 0x0000E101
|
||||
#define SRAM_PowerOn_Restore_Check 0x0000E102
|
||||
#define SRAM_PowerOn_Restore_Param 0x0000E103
|
||||
#define SRAM_PowerOn_Restore_EndAddr 0x0000E1FF
|
||||
|
||||
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼Boot<6F><74><EFBFBD><EFBFBD> дMCU Flash<73><68><EFBFBD><EFBFBD> <20><>С<EFBFBD><D0A1>0x200 2025-04-28*/
|
||||
#define SRAM_APP_FEATURE_2_CHECK_Addr 0x0000E600
|
||||
|
||||
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
|
||||
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
|
||||
|
||||
|
||||
|
||||
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
|
||||
|
||||
#define SRAM_UART0_RecvBuffer_Start_Addr 0x00010000
|
||||
#define SRAM_UART0_RecvBuffer_End_Addr 0x00010FFF
|
||||
#define SRAM_UART0_SendBuffer_Start_Addr 0x00011000
|
||||
#define SRAM_UART0_SendBuffer_End_Addr 0x00011FFF
|
||||
|
||||
#define SRAM_UART1_RecvBuffer_Start_Addr 0x00012000
|
||||
#define SRAM_UART1_RecvBuffer_End_Addr 0x00012FFF
|
||||
#define SRAM_UART1_SendBuffer_Start_Addr 0x00013000
|
||||
#define SRAM_UART1_SendBuffer_End_Addr 0x00013FFF
|
||||
|
||||
#define SRAM_UART2_RecvBuffer_Start_Addr 0x00014000
|
||||
#define SRAM_UART2_RecvBuffer_End_Addr 0x00014FFF
|
||||
#define SRAM_UART2_SendBuffer_Start_Addr 0x00015000
|
||||
#define SRAM_UART2_SendBuffer_End_Addr 0x00015FFF
|
||||
|
||||
#define SRAM_UART3_RecvBuffer_Start_Addr 0x00016000
|
||||
#define SRAM_UART3_RecvBuffer_End_Addr 0x00016FFF
|
||||
#define SRAM_UART3_SendBuffer_Start_Addr 0x00017000
|
||||
#define SRAM_UART3_SendBuffer_End_Addr 0x00017FFF
|
||||
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ŀ<DEB8>ʼ -- <20><>Ҫ<EFBFBD><EFBFBD> */
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>¼ 0x031400~0x031FFF 3K<33><4B>ÿ<EFBFBD><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>6<EFBFBD>ֽڣ<D6BD>һ<EFBFBD><D2BB><EFBFBD>ܹ<EFBFBD><DCB9>ܴ<EFBFBD>509<30><39><EFBFBD>豸<EFBFBD><E8B1B8>*/
|
||||
#define SRAM_DEVICE_ONLINE_STATE_WRITE_ADDR 0x00031400 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬д<CCAC><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_DEVICE_ONLINE_STATE_READ_ADDR 0x00031404 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR 0x00031408 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>м<EFBFBD><D0BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
#define SRAM_DEVICE_ONLINE_STATE_START_ADDR 0x00031410 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʿ<EFBFBD>ʼд<CABC><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
//#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031500 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7> - <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031FFE //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ľ<DEB8><C4BD><EFBFBD>*/
|
||||
|
||||
#define SRAM_CheckMap_List_Start_Addr 0x0003A800 //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>10K
|
||||
#define SRAM_CheckMap_List_End_Addr 0x0003CFFF //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_PortInf_Start_Addr 0x0003D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>2K
|
||||
#define SRAM_VCard_PortInf_End_Addr 0x0003D7FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_ConNToS_Start_Addr 0x0003D800 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_ConNToS_End_Addr 0x0003DBFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_ConSToN_Start_Addr 0x0003DC00 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_Con_End_Addr 0x0003DFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_DetectWin_Start_Addr 0x0003E000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>60K
|
||||
#define SRAM_VCard_DetectWin_End_Addr 0x0004CFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
|
||||
|
||||
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
|
||||
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_Register_Start_ADDRESS 0x0008E900
|
||||
#define SRAM_Register_End_ADDRESS 0x0008EFFF
|
||||
|
||||
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
|
||||
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define Register_NetIP_OFFSET 0x0000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - DHCP<43><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>֮<EFBFBD><EFBFBD>DHCPʧ<50><CAA7>֮<EFBFBD><D6AE> ʹ<>õ<EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD><EFBFBD>MCUĬ<55><C4AC>IP
|
||||
#define Register_NetPort_OFFSET 0x0004 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetMask_OFFSET 0x0008 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetGateway_OFFSET 0x000C //<2F><><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_DNSServerIP_OFFSET 0x0010 //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NETMACKADDR_OFFSET 0x0014 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MACK<43><4B>ַ
|
||||
#define Register_WebServerIP_OFFSET 0x0018 //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD>õ<EFBFBD><C3B5>ƶ<EFBFBD>IP<49><50>ַ
|
||||
#define Register_WebServerPort_OFFSET 0x001C //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - 2025-10-11 <20><><EFBFBD><EFBFBD>
|
||||
#define Register_MandateExpiresTime_OFFSET 0x0020 //MCU<43><55>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
#define Register_CurrentUsageTime_OFFSET 0x0024 //MCU<43><55>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Register_MandateUTC_OFFSET 0x0028 //<2F><>Ȩʱ<C8A8><CAB1> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȩʱ<C8A8>ĵ<EFBFBD>ǰUTCʱ<43><CAB1>
|
||||
#define Register_MandateLock_OFFSET 0x002C //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
#define Register_NetInfo_EN_OFFSET 0x0030 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD>DHCPʹ<50><CAB9> - 1Byte<74><65><EFBFBD><EFBFBD>ʾDHCPʹ<50><CAB9> 1Byte<74>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ΪĬ<CEAA><C4AC>IP<49><50>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetOfflineTime_OFFSET 0x0034 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1> - 4Byte <20><>λ<EFBFBD><CEBB>ms
|
||||
#define Register_ProjectCode_OFFSET 0x0038 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
||||
#define Register_SoftwareVersion_OFFSET 0x003C //<2F><><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> - <20>̼<EFBFBD><CCBC>汾<EFBFBD><E6B1BE>
|
||||
#define Register_ConfigVersion_OFFSET 0x0040 //<2F><><EFBFBD>ð汾<C3B0><E6B1BE>
|
||||
#define Register_RoomNumber_OFFSET 0x0044 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Register_HouseType_OFFSET 0x0048 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Register_RoomRent_OFFSET 0x004C //<2F><>̬<EFBFBD><CCAC>Ϣ - <20><><EFBFBD><EFBFBD>״̬
|
||||
#define Register_SeasonStatus_OFFSET 0x0050 //<2F><><EFBFBD><EFBFBD>״̬
|
||||
#define Register_TFTPStatus_OFFSET 0x0054 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD> 4Byte
|
||||
#define Register_TFTPUploadTime_OFFSET 0x0058 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> 4Byte
|
||||
#define Register_BLVServerDmLen_OFFSET 0x005C //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte
|
||||
#define Register_BLVServerDmName_OFFSET 0x0060 //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 64Byte
|
||||
#define Register_UDPPeriodicTime_OFFSET 0x00A0 //UDPͨѶ <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte <20><>λ:ms
|
||||
|
||||
#define Register_RoomNumNote_OFFSET 0x0100 //<2F><><EFBFBD>ű<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||
#define Register_RoomTypeNote_OFFSET 0x0110 //<2F><><EFBFBD>ͱ<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||
#define Register_RoomNote_OFFSET 0x0120 //<2F><><EFBFBD>䱸ע<E4B1B8><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 96Byte
|
||||
#define Register_TFTPLOGPort_OFFSET 0x0180 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - 2Byte
|
||||
#define Register_TFTPLOGTime_OFFSET 0x0182 //TFTP<54><50>־<EFBFBD>ϴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
|
||||
#define Register_TFTPDmLens_OFFSET 0x0184 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
|
||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD><EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||
|
||||
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
|
||||
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
||||
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
||||
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
|
||||
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
|
||||
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ*********
|
||||
*
|
||||
* 2025-07-29 <20><EFBFBD>SRAM<41>洢<EFBFBD><E6B4A2>ַ 0x00400000 ~ 0x007FFFFF SIZE:4MByte
|
||||
* 1<><31><EFBFBD>ĶԿռ<D4BF><D5BC><EFBFBD>ַУ<D6B7>飬<EFBFBD><E9A3AC>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>쳣
|
||||
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5>û<EFBFBD><C3BB>ʹ<EFBFBD>õı<C3B5><C4B1><EFBFBD>
|
||||
* */
|
||||
#define SRAM_LOG_Start_Address 0x00400000 //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>ʼ<EFBFBD><CABC>ַ - <20><>ǰSRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ - 4Byte
|
||||
#define SRAM_TFTP_LOG_READ_Address 0x00400004 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
|
||||
#define SRAM_FLASH_LOG_READ_Address 0x00400008 //Flash<73><68>־д<D6BE><D0B4><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
|
||||
#define SRAM_SD_LOG_READ_Start_Address 0x0040000C //SD<53><44>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ - <20><>TFTP<54><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ʱ<EFBFBD><CAB1>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ֵ<EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDд<44><D0B4>LOGʹ<47><CAB9> - 4Byte
|
||||
#define SRAM_SD_LOG_READ_End_Address 0x00400010 //SD<53><44>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 4Byte
|
||||
#define SRAM_Flash_Serial_Number 0x00400014 //<2F><>־<EFBFBD><D6BE><EFBFBD>ű<EFBFBD><C5B1><EFBFBD><EFBFBD><EFBFBD>ַ - 1Byte
|
||||
#define SRAM_LOGFlag_Reset_Source 0x00400018 //Launcher<65><72><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD> - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_LOGFlag_Addr_INIT 0x00400019 //Launcher<65><72>¼<EFBFBD><C2BC>ַSRAM<41><4D>ʼ<EFBFBD><CABC>״̬<D7B4><CCAC>־λ - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_LOGFlag_Debug_Switch 0x0040001A //Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ 4Byte - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_APPFlag_Reset_Source 0x0040001E //App<70><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ 2Byte - <20><>Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣʹ<CFA2><CAB9> 0xBBC1
|
||||
#define SRAM_LOG_DATA_Address 0x00400100 //<2F><>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define SRAM_LOG_End_Address 0x007FFFFF //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 0x007FFFFF
|
||||
|
||||
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SRAM_MEM_ADDR_H_ */
|
||||
20
MCU_Driver/inc/timer.h
Normal file
20
MCU_Driver/inc/timer.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* timer.h
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_TIMER_H_
|
||||
#define MCU_DRIVER_INC_TIMER_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
|
||||
extern volatile uint32_t Time0_100us;
|
||||
extern volatile uint32_t Time0_1ms;
|
||||
|
||||
void TIMER0_Init(void);
|
||||
void Timer0_Task(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_TIMER_H_ */
|
||||
82
MCU_Driver/inc/uart.h
Normal file
82
MCU_Driver/inc/uart.h
Normal file
@@ -0,0 +1,82 @@
|
||||
/*
|
||||
* uart.h
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_UART_H_
|
||||
#define MCU_DRIVER_INC_UART_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define Recv_2400_TimeOut 10 //ms
|
||||
#define Recv_9600_TimeOut 5 //ms
|
||||
#define Recv_115200_TimeOut 3 //ms
|
||||
|
||||
#define USART_BUFFER_NUM 3
|
||||
#define USART_BUFFER_SIZE 100
|
||||
|
||||
#define MCU485_EN1_H
|
||||
#define MCU485_EN1_L
|
||||
#define MCU485_EN2_H
|
||||
#define MCU485_EN2_L
|
||||
#define MCU485_EN3_H
|
||||
#define MCU485_EN3_L
|
||||
|
||||
typedef uint8_t (*Uart_prt)(uint8_t *,uint16_t);
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UART_0,
|
||||
UART_1,
|
||||
UART_2,
|
||||
UART_3,
|
||||
UART_MAX,
|
||||
}UART_IDX;
|
||||
|
||||
typedef struct{
|
||||
uint8_t RecvBuffer[USART_BUFFER_SIZE];
|
||||
uint8_t Receiving;
|
||||
uint16_t RecvLen;
|
||||
|
||||
uint32_t RecvTimeout;
|
||||
uint32_t RecvIdleTiming;
|
||||
|
||||
uint32_t TX_Buffer_WriteAddr;
|
||||
uint32_t TX_Buffer_ReadAddr;
|
||||
uint32_t RX_Buffer_WriteAddr;
|
||||
uint32_t RX_Buffer_ReadAddr;
|
||||
}__attribute__((packed)) UART_t;
|
||||
|
||||
extern UART_t g_uart[UART_MAX];
|
||||
|
||||
void UARTx_Init(UART_IDX uart_id, uint32_t buad);
|
||||
void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud);
|
||||
|
||||
void UART0_RECEIVE(void);
|
||||
void UART1_RECEIVE(void);
|
||||
void UART2_RECEIVE(void);
|
||||
void UART3_RECEIVE(void);
|
||||
|
||||
uint8_t UART0_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART1_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART2_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART3_ChangeBaud(uint32_t baudrate);
|
||||
|
||||
void Uart0_Flush(uint16_t over_time);
|
||||
void Uart1_Flush(uint16_t over_time);
|
||||
void Uart2_Flush(uint16_t over_time);
|
||||
void Uart3_Flush(uint16_t over_time);
|
||||
|
||||
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||
void MCU485_SendString_1(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len);
|
||||
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len);
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_UART_H_ */
|
||||
15
MCU_Driver/inc/watchdog.h
Normal file
15
MCU_Driver/inc/watchdog.h
Normal file
@@ -0,0 +1,15 @@
|
||||
/*
|
||||
* watchdog.h
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
|
||||
#define MCU_DRIVER_INC_WATCHDOG_H_
|
||||
|
||||
void WDT_Init(void);
|
||||
void WDT_Feed(void);
|
||||
void WDT_Reinit(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_WATCHDOG_H_ */
|
||||
Reference in New Issue
Block a user