feat:新建项目文件
BLV主机C1P模块
This commit is contained in:
caocong
878
MCU_Driver/uart.c
Normal file
878
MCU_Driver/uart.c
Normal file
@@ -0,0 +1,878 @@
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/*
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* uart.c
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*
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* Created on: May 14, 2025
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* Author: cc
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*/
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#include "uart.h"
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#include "debug.h"
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#include "watchdog.h"
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#include "blv_rs485_protocol.h"
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#include "sram_mem_addr.h"
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#include "spi_sram.h"
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#include <string.h>
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UART_t g_uart[UART_MAX];
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void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void UART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void UART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void UART3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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/*********************************************************************
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* @fn UARTx_Init
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* @brief UART<52><54>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><E2B4AE>2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PB22,PB23 - Boot,RST<53><54><EFBFBD><EFBFBD>
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* @param uart_id - <20><><EFBFBD><EFBFBD>ID
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* @param buad - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param prt_cf - <20><><EFBFBD>ڽ<EFBFBD><DABD>ջص<D5BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
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* @return none
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*/
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__attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
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switch (uart_id) {
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case UART_0:
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/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
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UART0_BaudRateCfg(buad);
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R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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R8_UART0_LCR = RB_LCR_WORD_SZ;
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R8_UART0_IER = RB_IER_TXD_EN;
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GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
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UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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NVIC_EnableIRQ(UART0_IRQn);
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memset(&g_uart[UART_0],0,sizeof(UART_t));
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Set_Uart_recvTimeout(&g_uart[UART_0],buad);
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break;
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case UART_1:
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/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
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UART1_BaudRateCfg(buad);
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R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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R8_UART1_LCR = RB_LCR_WORD_SZ;
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R8_UART1_IER = RB_IER_TXD_EN;
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GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
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UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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NVIC_EnableIRQ(UART1_IRQn);
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memset(&g_uart[UART_1],0,sizeof(UART_t));
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Set_Uart_recvTimeout(&g_uart[UART_1],buad);
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break;
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case UART_2:
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UART2_BaudRateCfg(buad);
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R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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R8_UART2_LCR = RB_LCR_WORD_SZ;
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R8_UART2_IER = RB_IER_TXD_EN;
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GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
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UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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NVIC_EnableIRQ(UART2_IRQn);
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memset(&g_uart[UART_2],0,sizeof(UART_t));
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Set_Uart_recvTimeout(&g_uart[UART_2],buad);
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break;
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case UART_3:
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UART3_BaudRateCfg(buad);
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R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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R8_UART3_LCR = RB_LCR_WORD_SZ;
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R8_UART3_IER = RB_IER_TXD_EN;
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GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
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UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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NVIC_EnableIRQ(UART3_IRQn);
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memset(&g_uart[UART_3],0,sizeof(UART_t));
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Set_Uart_recvTimeout(&g_uart[UART_3],buad);
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break;
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}
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}
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__attribute__((section(".non_0_wait"))) void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud)
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{
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if(baud == 115200)
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{
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set_uart->RecvTimeout = Recv_115200_TimeOut;
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}else if(baud == 9600)
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{
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set_uart->RecvTimeout = Recv_9600_TimeOut;
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}else if(baud == 2400)
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{
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set_uart->RecvTimeout = Recv_2400_TimeOut;
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}else
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{
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set_uart->RecvTimeout = 20;
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}
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}
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/*********************************************************************
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* @fn USART1_IRQHandler
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*
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* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
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*
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* @return none
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*/
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void UART0_IRQHandler(void)
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{
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switch( UART0_GetITFlag() )
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{
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case UART_II_THR_EMPTY:
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break;
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case UART_II_RECV_RDY:
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case UART_II_RECV_TOUT:
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if( (g_uart[UART_0].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_0].RecvLen = 0x00;
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g_uart[UART_0].RecvBuffer[g_uart[UART_0].RecvLen] = UART0_RecvByte();
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g_uart[UART_0].RecvLen += 1;
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g_uart[UART_0].Receiving = 0x01;
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g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
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break;
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}
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}
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/*********************************************************************
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* @fn USART1_IRQHandler
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*
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* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
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*
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* @return none
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*/
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void UART1_IRQHandler(void)
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{
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switch( UART1_GetITFlag() )
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{
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case UART_II_THR_EMPTY:
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break;
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case UART_II_RECV_RDY:
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case UART_II_RECV_TOUT:
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if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
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g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
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g_uart[UART_1].RecvLen += 1;
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g_uart[UART_1].Receiving = 0x01;
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g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
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break;
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}
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}
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/*********************************************************************
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* @fn UART2_IRQHandler
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*
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* @brief USART2<54>жϺ<D0B6><CFBA><EFBFBD>
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*
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* @return none
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*/
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void UART2_IRQHandler(void)
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{
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switch( UART2_GetITFlag() )
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{
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case UART_II_THR_EMPTY:
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break;
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case UART_II_RECV_RDY:
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case UART_II_RECV_TOUT:
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if( (g_uart[UART_2].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_2].RecvLen = 0x00;
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g_uart[UART_2].RecvBuffer[g_uart[UART_2].RecvLen] = UART2_RecvByte();
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g_uart[UART_2].RecvLen += 1;
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g_uart[UART_2].Receiving = 0x01;
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g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
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break;
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}
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}
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/*********************************************************************
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* @fn USART3_IRQHandler
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*
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* @brief USART3<54>жϺ<D0B6><CFBA><EFBFBD>
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*
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* @return none
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*/
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void UART3_IRQHandler(void)
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{
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switch( UART3_GetITFlag() )
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{
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case UART_II_THR_EMPTY:
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break;
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case UART_II_RECV_RDY:
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case UART_II_RECV_TOUT:
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if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
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g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
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g_uart[UART_3].RecvLen += 1;
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g_uart[UART_3].Receiving = 0x01;
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g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
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break;
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}
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}
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/*********************************************************************
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* @fn USART1_RECEIVE
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*
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* @brief USART1
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*
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* @return none
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*/
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__attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
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{
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if(g_uart[UART_0].Receiving == 0x01)
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{
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if(SysTick_1ms - g_uart[UART_0].RecvIdleTiming >= g_uart[UART_0].RecvTimeout)
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{
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g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
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Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
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Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
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g_uart[UART_0].RecvLen = 0;
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g_uart[UART_0].Receiving = 0;
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}
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}
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}
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/*********************************************************************
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* @fn USART1_RECEIVE
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*
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* @brief USART1
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*
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* @return none
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*/
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__attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
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{
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if(g_uart[UART_1].Receiving == 0x01)
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{
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if(SysTick_1ms - g_uart[UART_1].RecvIdleTiming >= g_uart[UART_1].RecvTimeout)
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{
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g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
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Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
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Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
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g_uart[UART_1].RecvLen = 0;
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g_uart[UART_1].Receiving = 0;
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}
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}
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}
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/*********************************************************************
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* @fn UART2_RECEIVE
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*
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* @brief USART2
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*
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* @return none
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*/
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__attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
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{
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if(g_uart[UART_2].Receiving == 1)
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{
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if(SysTick_1ms - g_uart[UART_2].RecvIdleTiming > g_uart[UART_2].RecvTimeout)
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{
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g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
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Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
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Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
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g_uart[UART_2].RecvLen = 0;
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g_uart[UART_2].Receiving = 0;
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}
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}
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}
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/*********************************************************************
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* @fn USART3_RECEIVE
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*
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* @brief UART3
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*
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* @return none
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*/
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__attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
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{
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if(g_uart[UART_3].Receiving == 1)
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{
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if(SysTick_1ms - g_uart[UART_3].RecvIdleTiming > g_uart[UART_3].RecvTimeout)
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{
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g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
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Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
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Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
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g_uart[UART_3].RecvLen = 0;
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g_uart[UART_3].Receiving = 0;
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}
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}
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}
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/*********************************************************************
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* @fn UART0_ChangeBaud
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*
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* @brief UART0<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @return none
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*/
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uint8_t UART0_ChangeBaud(uint32_t baudrate)
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{
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uint16_t delay_num = 0;
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while(1)
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{
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if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
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{
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/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
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__disable_irq();
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UART0_Reset();
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GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
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UART0_BaudRateCfg(baudrate);
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R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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R8_UART0_LCR = RB_LCR_WORD_SZ;
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R8_UART0_IER = RB_IER_TXD_EN;
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UART0_CLR_RXFIFO();
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UART0_CLR_TXFIFO();
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UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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NVIC_EnableIRQ(UART0_IRQn);
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Set_Uart_recvTimeout(&g_uart[UART_0],baudrate);
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__enable_irq();
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return 0;
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}
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Delay_Us(100);
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delay_num++;
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if(delay_num > 500) break;
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}
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return 1;
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}
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/*********************************************************************
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* @fn UART1_ChangeBaud
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*
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* @brief UART1<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*
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* @return none
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*/
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uint8_t UART1_ChangeBaud(uint32_t baudrate)
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{
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uint16_t delay_num = 0;
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while(1)
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{
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if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
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{
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/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
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__disable_irq();
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UART1_Reset();
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GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
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GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
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GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
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UART1_BaudRateCfg(baudrate);
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R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
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// FIFO open, trigger point 14 bytes
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||||
R8_UART1_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART1_IER = RB_IER_TXD_EN;
|
||||
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||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
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||||
NVIC_EnableIRQ(UART1_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
|
||||
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||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART2_ChangeBaud
|
||||
*
|
||||
* @brief UART2<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART2_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART2_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
|
||||
|
||||
UART2_BaudRateCfg(baudrate);
|
||||
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART2_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART2_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART2_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_2],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART3_ChangeBaud
|
||||
*
|
||||
* @brief UART3<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART3_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART3_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
|
||||
|
||||
UART3_BaudRateCfg(baudrate);
|
||||
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART3_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART3_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART3_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_3],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart0_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>0<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart0_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART0_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart1_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>1<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart1_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart2_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>2<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart2_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart3_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>3<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart3_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart_SendString
|
||||
* Description : <20><><EFBFBD>ڷ<EFBFBD><DAB7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
* uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
* buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_0:
|
||||
UART0_SendString(buff,len);
|
||||
break;
|
||||
case UART_1:
|
||||
UART1_SendString(buff,len);
|
||||
break;
|
||||
case UART_2:
|
||||
UART2_SendString(buff,len);
|
||||
break;
|
||||
case UART_3:
|
||||
UART3_SendString(buff,len);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_1
|
||||
* Description : 485_1 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_1(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN1_H;
|
||||
|
||||
UART1_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN1_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_2
|
||||
* Description : 485_2 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_2(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN2_H;
|
||||
|
||||
UART2_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN2_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_3
|
||||
* Description : 485_3 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_3(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN3_H;
|
||||
|
||||
UART3_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN3_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString
|
||||
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_1:
|
||||
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_1(buff,len);
|
||||
break;
|
||||
case UART_2:
|
||||
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_2(buff,len);
|
||||
break;
|
||||
case UART_3:
|
||||
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_3(buff,len);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString
|
||||
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
data_addr - SRAM<41>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint16_t buff_len = len;
|
||||
uint8_t send_buff[buff_len];
|
||||
|
||||
memset(send_buff,0,sizeof(send_buff));
|
||||
|
||||
SRAM_DMA_Read_Buff(send_buff,buff_len,data_addr); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
MCU485_SendString(uart_id,send_buff,buff_len);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Write_Uart_SendBuff
|
||||
* Description : дuart<72><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
uart_baud - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
*******************************************************************************/
|
||||
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case Polling_Port: //<2F><>ѯ
|
||||
uart_id = UART_0;
|
||||
break;
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD>
|
||||
uart_id = UART_2;
|
||||
break;
|
||||
case Bus_port: //bus<75><73><EFBFBD><EFBFBD>
|
||||
uart_id = UART_3;
|
||||
break;
|
||||
}
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_0:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_0].TX_Buffer_WriteAddr);
|
||||
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_0].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_0].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_0].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_0].TX_Buffer_WriteAddr > SRAM_UART0_SendBuffer_End_Addr) g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_1:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_1].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_1].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_1].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_1].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_1].TX_Buffer_WriteAddr > SRAM_UART1_SendBuffer_End_Addr) g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_2:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_2].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_2].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_2].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_2].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_2].TX_Buffer_WriteAddr > SRAM_UART2_SendBuffer_End_Addr) g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_3:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_3].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_3].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_3].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_3].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_3].TX_Buffer_WriteAddr > SRAM_UART3_SendBuffer_End_Addr) g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user