feat:新建项目文件
BLV主机C1P模块
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caocong
420
User/system_ch564.c
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420
User/system_ch564.c
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/********************************** (C) COPYRIGHT *******************************
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* File Name : system_ch564.c
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* Author : WCH
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* Version : V1.0.0
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* Date : 2024/05/05
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* Description : CH564 Device Peripheral Access Layer System Source File.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#include "ch564.h"
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#include "debug.h"
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/*
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* Uncomment the line corresponding to the desired System clock (SYSCLK)
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* frequency (after reset the HSI is used as SYSCLK source).
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*/
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//#define SYSCLK_FREQ_120MHz_HSI 120000000
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//#define SYSCLK_FREQ_80MHz_HSI 80000000
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//#define SYSCLK_FREQ_60MHz_HSI 60000000
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//#define SYSCLK_FREQ_40MHz_HSI 40000000
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//#define SYSCLK_FREQ_20MHz_HSI HSI_VALUE
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#define SYSCLK_FREQ_120MHz_HSE 120000000
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//#define SYSCLK_FREQ_80MHz_HSE 80000000
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//#define SYSCLK_FREQ_60MHz_HSE 60000000
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//#define SYSCLK_FREQ_40MHz_HSE 40000000
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//#define SYSCLK_FREQ_25MHz_HSE HSE_VALUE
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/* Clock Definitions */
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#ifdef SYSCLK_FREQ_120MHz_HSI
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uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSI; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_80MHz_HSI
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uint32_t SystemCoreClock = SYSCLK_FREQ_80MHz_HSI; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_60MHz_HSI
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uint32_t SystemCoreClock = SYSCLK_FREQ_60MHz_HSI; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_40MHz_HSI
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uint32_t SystemCoreClock = SYSCLK_FREQ_40MHz_HSI; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_20MHz_HSI
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uint32_t SystemCoreClock = SYSCLK_FREQ_20MHz_HSI; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_120MHz_HSE
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uint32_t SystemCoreClock = SYSCLK_FREQ_120MHz_HSE; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_80MHz_HSE
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uint32_t SystemCoreClock = SYSCLK_FREQ_80MHz_HSE; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_60MHz_HSE
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uint32_t SystemCoreClock = SYSCLK_FREQ_60MHz_HSE; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_40MHz_HSE
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uint32_t SystemCoreClock = SYSCLK_FREQ_40MHz_HSE; /* System Clock Frequency (Core Clock) */
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#elif defined SYSCLK_FREQ_25MHz_HSE
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uint32_t SystemCoreClock = SYSCLK_FREQ_25MHz_HSE; /* System Clock Frequency (Core Clock) */
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#endif
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/* system_private_function_proto_types */
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static void SetSysClock(void);
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#ifdef SYSCLK_FREQ_120MHz_HSI
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static void SetSysClockTo120_HSI(void);
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#elif defined SYSCLK_FREQ_80MHz_HSI
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static void SetSysClockTo80_HSI(void);
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#elif defined SYSCLK_FREQ_60MHz_HSI
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static void SetSysClockTo60_HSI(void);
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#elif defined SYSCLK_FREQ_40MHz_HSI
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static void SetSysClockTo40_HSI(void);
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#elif defined SYSCLK_FREQ_20MHz_HSI
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static void SetSysClockTo20_HSI(void);
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#elif defined SYSCLK_FREQ_120MHz_HSE
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static void SetSysClockTo120_HSE(void);
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#elif defined SYSCLK_FREQ_80MHz_HSE
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static void SetSysClockTo80_HSE(void);
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#elif defined SYSCLK_FREQ_60MHz_HSE
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static void SetSysClockTo60_HSE(void);
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#elif defined SYSCLK_FREQ_40MHz_HSE
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static void SetSysClockTo40_HSE(void);
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#elif defined SYSCLK_FREQ_25MHz_HSE
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static void SetSysClockTo25_HSE(void);
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#endif
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/*********************************************************************
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* @fn SystemInit
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*
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* @brief Setup the microcontroller system Initialize the Embedded Flash
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* Interface, update the SystemCoreClock variable.
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*
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* @return none
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*/
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void SystemInit(void)
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{
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if ( SystemCoreClock >= 60000000 )
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{
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RCC_UNLOCK_SAFE_ACCESS();
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BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
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BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
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RCC_LOCK_SAFE_ACCESS();
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}
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else
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{
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RCC_UNLOCK_SAFE_ACCESS();
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BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
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BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
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RCC_LOCK_SAFE_ACCESS();
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}
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SystemCoreClockUpdate();
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HSI_ON();
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/* Close ETH PHY */
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RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
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Delay_Us( PLL_STARTUP_TIME );
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ETH->PHY_CR |= ( 1 << 31 );
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ETH->PHY_CR &= ~( 1 << 30 );
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ETH->PHY_CR |= ( 1 << 30 );
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Delay_Us( HSI_STARTUP_TIME );
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RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
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CLKSEL_HSI();
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SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
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USB_PLL_OFF();
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SetSysClock();
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}
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/*********************************************************************
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* @fn SystemCoreClockUpdate
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*
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* @brief Update SystemCoreClock variable according to Clock Register Values.
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*
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* @return none
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*/
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void SystemCoreClockUpdate(void)
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{
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uint32_t tmp = 0;
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if ( R32_EXTEN_CTLR0 & RB_SW )
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{
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if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
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{
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tmp = HSE_Value;
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}
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else
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{
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tmp = HSI_Value;
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}
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}
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else
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{
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switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
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{
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case 0x60:
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tmp = HSI_Value;
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break;
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case 0x20:
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tmp = HSE_Value;
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break;
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default:
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tmp = HSE_Value * 20 / 25;
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break;
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}
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switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
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{
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case 0x0:
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tmp *= 24;
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break;
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case 0x4000:
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tmp *= 20;
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break;
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case 0x8000:
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tmp *= 16;
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break;
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case 0xC000:
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tmp *= 15;
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break;
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default:
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break;
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}
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tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
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}
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SystemCoreClock = tmp;
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}
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/*********************************************************************
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* @fn SetSysClock
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*
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* @brief Configures the System clock frequency, HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClock(void)
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{
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SystemCoreClockUpdate();
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GPIO_IPD_Unused();
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#ifdef SYSCLK_FREQ_120MHz_HSI
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SetSysClockTo120_HSI();
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#elif defined SYSCLK_FREQ_80MHz_HSI
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SetSysClockTo80_HSI();
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#elif defined SYSCLK_FREQ_60MHz_HSI
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SetSysClockTo60_HSI();
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#elif defined SYSCLK_FREQ_40MHz_HSI
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SetSysClockTo40_HSI();
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#elif defined SYSCLK_FREQ_20MHz_HSI
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SetSysClockTo20_HSI();
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#elif defined SYSCLK_FREQ_120MHz_HSE
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SetSysClockTo120_HSE();
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#elif defined SYSCLK_FREQ_80MHz_HSE
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SetSysClockTo80_HSE();
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#elif defined SYSCLK_FREQ_60MHz_HSE
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SetSysClockTo60_HSE();
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#elif defined SYSCLK_FREQ_40MHz_HSE
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SetSysClockTo40_HSE();
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#elif defined SYSCLK_FREQ_25MHz_HSE
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SetSysClockTo25_HSE();
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#endif
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}
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#ifdef SYSCLK_FREQ_120MHz_HSI
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/*********************************************************************
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* @fn SetSysClockTo120_HSI
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*
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* @brief Sets System clock frequency to 120MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo120_HSI(void)
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{
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RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
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USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
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USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
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USB_PLL_ON();
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Delay_Us( PLL_STARTUP_TIME );
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SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
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}
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#elif defined SYSCLK_FREQ_80MHz_HSI
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/*********************************************************************
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* @fn SetSysClockTo80_HSI
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*
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* @brief Sets System clock frequency to 80MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo80_HSI(void)
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{
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RCC_SET_PLL_SYS_OUT_DIV(0x5);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_60MHz_HSI
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/*********************************************************************
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* @fn SetSysClockTo60_HSI
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*
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* @brief Sets System clock frequency to 60MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo60_HSI(void)
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{
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RCC_SET_PLL_SYS_OUT_DIV(0x7);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_40MHz_HSI
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/*********************************************************************
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* @fn SetSysClockTo8_HSI
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*
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* @brief Sets System clock frequency to 40MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo40_HSI(void)
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{
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RCC_SET_PLL_SYS_OUT_DIV( 0xB );
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USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
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USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
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USB_PLL_ON();
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Delay_Us( PLL_STARTUP_TIME );
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SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
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}
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#elif defined SYSCLK_FREQ_20MHz_HSI
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/*********************************************************************
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* @fn SetSysClockTo20_HSI
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*
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* @brief Sets System clock frequency to 20MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo20_HSI(void)
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{
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CLKSEL_HSI();
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
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}
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#elif defined SYSCLK_FREQ_120MHz_HSE
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/*********************************************************************
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* @fn SetSysClockTo120_HSE
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*
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* @brief Sets System clock frequency to 24MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo120_HSE(void)
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{
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HSE_ON();
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Delay_Us(HSE_STARTUP_TIME);
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RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
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RCC_SET_PLL_SYS_OUT_DIV(0x3);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_80MHz_HSE
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/*********************************************************************
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* @fn SetSysClockTo80_HSE
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*
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* @brief Sets System clock frequency to 80MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo80_HSE(void)
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{
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HSE_ON();
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Delay_Us(HSE_STARTUP_TIME);
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RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
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RCC_SET_PLL_SYS_OUT_DIV(0x5);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_60MHz_HSE
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/*********************************************************************
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* @fn SetSysClockTo60_HSE
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*
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* @brief Sets System clock frequency to 60MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo60_HSE(void)
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{
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HSE_ON();
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Delay_Us(HSE_STARTUP_TIME);
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RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
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RCC_SET_PLL_SYS_OUT_DIV(0x7);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_40MHz_HSE
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/*********************************************************************
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* @fn SetSysClockTo40_HSE
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*
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* @brief Sets System clock frequency to 40MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo40_HSE(void)
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{
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HSE_ON();
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Delay_Us(HSE_STARTUP_TIME);
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RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
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RCC_SET_PLL_SYS_OUT_DIV(0xB);
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USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
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USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
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USB_PLL_ON();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
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}
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#elif defined SYSCLK_FREQ_25MHz_HSE
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/*********************************************************************
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* @fn SetSysClockTo25_HSE
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*
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* @brief Sets System clock frequency to 25MHz and configure HCLK prescalers.
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*
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* @return none
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*/
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static void SetSysClockTo25_HSE(void)
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{
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HSE_ON();
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Delay_Us(HSE_STARTUP_TIME);
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CLKSEL_HSE();
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SystemCoreClock = HSE_VALUE;
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Delay_Init();
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Delay_Us(PLL_STARTUP_TIME);
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SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
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}
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#endif
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