feat:新建项目文件
BLV主机C1P模块
This commit is contained in:
caocong
162
.cproject
Normal file
162
.cproject
Normal file
@@ -0,0 +1,162 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
|
||||
<storageModule moduleId="org.eclipse.cdt.core.settings">
|
||||
<cconfiguration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" moduleId="org.eclipse.cdt.core.settings" name="obj">
|
||||
<externalSettings/>
|
||||
<extensions>
|
||||
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
|
||||
</extensions>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
|
||||
<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074." name="/" resourcePath="">
|
||||
<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.231146001" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1311852988" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting.1983282875" name="Create extended listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createlisting" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize.1000761142" name="Print size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.printsize" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.514997414" name="Optimization Level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.level.size" valueType="enumerated"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength.1008570639" name="Message length (-fmessage-length=0)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.messagelength" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar.467272439" name="'char' is signed (-fsigned-char)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.signedchar" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections.2047756949" name="Function sections (-ffunction-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections.207613650" name="Data sections (-fdata-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.datasections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level.1204865254" name="Debug level" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.level" useByScannerDiscovery="true"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format.867779652" name="Debug format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.debugging.format" useByScannerDiscovery="true"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base.1900297968" name="Architecture" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.base" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.arch.rv32i" valueType="enumerated"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer.387605487" name="Integer ABI" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.abi.integer" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.abi.integer.ilp32" valueType="enumerated"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply.1509705449" name="Multiply extension (RVM)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.multiply" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed.1038505275" name="Compressed extension (RVC)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.compressed" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name.1218760634" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.name" useByScannerDiscovery="false" value="GNU MCU RISC-V GCC" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix.103341323" name="Prefix" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.prefix" useByScannerDiscovery="false" value="riscv-none-embed-" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c.487601824" name="C compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.c" useByScannerDiscovery="false" value="gcc" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp.1062130429" name="C++ compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.cpp" useByScannerDiscovery="false" value="g++" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar.1194282993" name="Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.ar" useByScannerDiscovery="false" value="ar" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy.1529355265" name="Hex/Bin converter" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objcopy" useByScannerDiscovery="false" value="objcopy" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump.1053750745" name="Listing generator" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.objdump" useByScannerDiscovery="false" value="objdump" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size.1441326233" name="Size command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.size" useByScannerDiscovery="false" value="size" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make.550105535" name="Build command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.make" useByScannerDiscovery="false" value="make" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm.719280496" name="Remove command" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.command.rm" useByScannerDiscovery="false" value="rm" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.id.226017994" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.toolchain.id" useByScannerDiscovery="false" value="512258282" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic.1590833110" name="Atomic extension (RVA)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.atomic" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.warnings.unused.1961191588" name="Warn on various unused elements (-Wunused)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.warnings.unused" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.warnings.uninitialized.929829166" name="Warn on uninitialized variables (-Wuninitialized)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.warnings.uninitialized" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.nocommon.1225539165" name="No common unitialized (-fno-common)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.nocommon" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.xw.944577914" name="Extra Compressed extension (RVXW)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.isa.xw" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.smalldatalimit.1567611014" name="Small data limit" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.smalldatalimit" useByScannerDiscovery="false" value="8" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.saverestore.1020286369" name="Small prologue/epilogue (-msave-restore)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.saverestore" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.rvGcc.733884889" name="RISC-V Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.rvGcc" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.target.rvGcc.12" valueType="enumerated"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.mrs.highcode.651455843" name="Optimize unused sections declared as high code (--param=highcode-gen-section-name=1)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.optimization.mrs.highcode" useByScannerDiscovery="true" value="true" valueType="boolean"/>
|
||||
<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform.1944008784" isAbstract="false" osList="all" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.targetPlatform"/>
|
||||
<builder buildPath="${workspace_loc:/${ProjName}}/obj" id="ilg.gnumcueclipse.managedbuild.cross.riscv.builder.1421508906" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.builder"/>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.1244756189" name="GNU RISC-V Cross Assembler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor.1692176068" name="Use preprocessor" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths.1034038285" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Startup}""/>
|
||||
</option>
|
||||
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input.126366858" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.assembler.input"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1731377187" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1567947810" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Flashlib}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/NetLib}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Core}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/User}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Peripheral/inc}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/MCU_Driver/inc}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/BLV_485_Driver/inc}""/>
|
||||
</option>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.2020844713" name="Language standard" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.gnu99" valueType="enumerated"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.177116515" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
|
||||
<listOptionValue builtIn="false" value="DEBUG=1"/>
|
||||
</option>
|
||||
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2036806839" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler.1610882921" name="GNU RISC-V Cross C++ Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.compiler"/>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.1620074387" name="GNU RISC-V Cross C Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections.194760422" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.gcsections" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths.2057340378" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.paths" useByScannerDiscovery="false" valueType="libPaths">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Flashlib}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/NetLib}""/>
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile.1390103472" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/Ld/Link.ld}""/>
|
||||
</option>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart.913830613" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano.239404511" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys.351964161" name="Do not use syscalls (--specs=nosys.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.usenewlibnosys" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs.16994550" name="Other objects" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.otherobjs" useByScannerDiscovery="false" valueType="userObjs"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags.1125808200" name="Linker flags (-Xlinker [option])" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.flags" useByScannerDiscovery="false" valueType="stringList"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.iqmath.514344306" name="Use iqmath(-lIQmath_RV32)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.iqmath" useByScannerDiscovery="false" value="false" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.printf.1018325233" name="Use wchprintf(-lprintf)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.printf" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs.836070313" name="Libraries (-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.libs" useByScannerDiscovery="false" valueType="libs">
|
||||
<listOptionValue builtIn="false" value="ISP564"/>
|
||||
<listOptionValue builtIn="false" value="CH56xNET"/>
|
||||
</option>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other.1680109458" name="Other linker flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.linker.other" useByScannerDiscovery="false" value="-Wl,--print-memory-usage" valueType="string"/>
|
||||
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input.1859223768" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker.1947503520" name="GNU RISC-V Cross C++ Linker" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.cpp.linker">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections.1689063433" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.paths.1029177148" name="Library search path (-L)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.paths" valueType="libPaths">
|
||||
<listOptionValue builtIn="false" value=""../LD""/>
|
||||
</option>
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.scriptfile.1751226764" name="Script files (-T)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.scriptfile" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value="Link.ld"/>
|
||||
</option>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.nostart.642896175" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.nostart" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnano.1540675679" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.cpp.linker.usenewlibnano" value="true" valueType="boolean"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1292785366" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1801165667" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other.406870191" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other" useByScannerDiscovery="false" value="" valueType="string"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1719943455" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.ihex" valueType="enumerated"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1356766765" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2052761852" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="false" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders.439659821" name="Display all headers (--all-headers|-x)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.allheaders" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle.67111865" name="Demangle names (--demangle|-C)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.demangle" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers.1549373929" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.linenumbers" useByScannerDiscovery="false" value="false" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide.1298918921" name="Wide lines (--wide|-w)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.wide" useByScannerDiscovery="false" value="false" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.disassemble.1859590835" name="Disassemble (--disassemble|-d)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.disassemble" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.other.251302860" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.other" useByScannerDiscovery="false" value="" valueType="string"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize.712424314" name="GNU RISC-V Cross Print Size" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.printsize">
|
||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format.1404031980" name="Size format" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.printsize.format" useByScannerDiscovery="false"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="Ld|Debug|Startup" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Ld"/>
|
||||
<entry excluding="startup_ch564_ram_128k.S|startup_ch564_ram_96k.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="Startup"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
<storageModule moduleId="ilg.gnumcueclipse.managedbuild.packs"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="999.ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf.275846018" name="Executable file" projectType="ilg.gnumcueclipse.managedbuild.cross.riscv.target.elf"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.767917625;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.debug.767917625.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1375371130;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.1473381709">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074;ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074.;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.1731377187;ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2036806839">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
|
||||
</cproject>
|
||||
1
.gitignore
vendored
Normal file
1
.gitignore
vendored
Normal file
@@ -0,0 +1 @@
|
||||
obj
|
||||
37
.project
Normal file
37
.project
Normal file
@@ -0,0 +1,37 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<projectDescription>
|
||||
<name>BLV_C1P_20251107</name>
|
||||
<comment/>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<filteredResources>
|
||||
<filter>
|
||||
<id>1692846627047</id>
|
||||
<name/>
|
||||
<type>22</type>
|
||||
<matcher>
|
||||
<id>org.eclipse.ui.ide.multiFilter</id>
|
||||
<arguments>1.0-name-matches-false-false-*.wvproj</arguments>
|
||||
</matcher>
|
||||
</filter>
|
||||
</filteredResources>
|
||||
</projectDescription>
|
||||
2
.settings/com.googlecode.cppcheclipse.core.prefs
Normal file
2
.settings/com.googlecode.cppcheclipse.core.prefs
Normal file
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
suppressions=rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;102\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEk1DVV9Ecml2ZXJcZGVidWcuY3cCAFx4;comparePointers;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAE05ldExpYlxldGhfZHJpdmVyLmN3AgBceA\=\=;integerOverflow;500\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAE1VzZXJcc3lzdGVtX2NoNTY0LmN3AgBceA\=\=;integerOverflow;113\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;73\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;131\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;uninitvar;2147483647\!rO0ABXNyAAxqYXZhLmlvLkZpbGUELaRFDg3k/wMAAUwABHBhdGh0ABJMamF2YS9sYW5nL1N0cmluZzt4cHQAEUNvcmVcY29yZV9yaXNjdi5jdwIAXHg\=;legacyUninitvar;2147483647\!
|
||||
14
.settings/language.settings.xml
Normal file
14
.settings/language.settings.xml
Normal file
@@ -0,0 +1,14 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="118538494119411315" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
11
.settings/org.eclipse.cdt.managedbuilder.core.prefs
Normal file
11
.settings/org.eclipse.cdt.managedbuilder.core.prefs
Normal file
@@ -0,0 +1,11 @@
|
||||
eclipse.preferences.version=1
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/CPATH/delimiter=;
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/CPATH/operation=remove
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/C_INCLUDE_PATH/delimiter=;
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/C_INCLUDE_PATH/operation=remove
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/append=true
|
||||
environment/buildEnvironmentInclude/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/appendContributed=true
|
||||
environment/buildEnvironmentLibrary/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/LIBRARY_PATH/delimiter=;
|
||||
environment/buildEnvironmentLibrary/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/LIBRARY_PATH/operation=remove
|
||||
environment/buildEnvironmentLibrary/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/append=true
|
||||
environment/buildEnvironmentLibrary/ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074/appendContributed=true
|
||||
3
.settings/org.eclipse.core.resources.prefs
Normal file
3
.settings/org.eclipse.core.resources.prefs
Normal file
@@ -0,0 +1,3 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/.cproject=GBK
|
||||
encoding//Peripheral/inc/ch564.h=UTF-8
|
||||
18
.template
Normal file
18
.template
Normal file
@@ -0,0 +1,18 @@
|
||||
Vendor=WCH
|
||||
Toolchain=RISC-V
|
||||
Series=CH564
|
||||
RTOS=NoneOS
|
||||
MCU=CH564F
|
||||
Link=WCH-Link
|
||||
PeripheralVersion=====1.2
|
||||
Description=====CH564 is an industrial-grade microcontroller based on barley RISC-V core design. CH564 built-in USBHS PHY and PD PHY, support for USB Host host and USB Device device functions, PDUSB and Type-C fast charging; built-in Ethernet controller MAC and 10 megabits/100 megabits physical layer transceiver; provides an external bus interface XBUS, 8-bit passive parallel port SLV, 12-bit analogue-to-digital converter ADC, multi-group timer, 4-group UART serial port, I2C interface, 2 SPI interface and other rich peripheral resources.
|
||||
Mcu Type=CH564
|
||||
Address=0x00000000
|
||||
Target Path=obj\BLV_C1P_20250514.hex
|
||||
CLKSpeed=1
|
||||
DebugInterfaceMode=1
|
||||
Erase All=true
|
||||
Program=true
|
||||
Verify=true
|
||||
Reset=true
|
||||
SDIPrintf=false
|
||||
1493
BLV_485_Driver/blv_bus_dev_c5iofun.c
Normal file
1493
BLV_485_Driver/blv_bus_dev_c5iofun.c
Normal file
File diff suppressed because it is too large
Load Diff
2451
BLV_485_Driver/blv_bus_dev_c5music.c
Normal file
2451
BLV_485_Driver/blv_bus_dev_c5music.c
Normal file
File diff suppressed because it is too large
Load Diff
392
BLV_485_Driver/blv_nor_dev_hvoutfun.c
Normal file
392
BLV_485_Driver/blv_nor_dev_hvoutfun.c
Normal file
@@ -0,0 +1,392 @@
|
||||
/*
|
||||
* blv_nor_dev_hvoutfun.c
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_nor_dev_hvoutfun.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "debug.h"
|
||||
|
||||
#include "blv_bus_dev_c5iofun.h"
|
||||
|
||||
#include <string.h>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_DEV_PRO_FUN_01 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) //((DevFunP)NULL) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_A9RELAY_Flag, BLW_RS485_A9RELAY_Data_Init) //((DevFunP)NULL) //A9IO<49>̵<EFBFBD><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_SwiRELAY_Flag, BLW_RS485_SwiRELAY_Data_Init) //((DevFunP)NULL) //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL) //
|
||||
#define RS485_DEV_PRO_FUN_05 ((DevFunP)NULL) //
|
||||
#define RS485_DEV_PRO_FUN_06 ((DevFunP)NULL)
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Nor_Dev_HVout_For_Logic_Init
|
||||
* Description : <20>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
|
||||
LOGICFILE_DEVICE_INFO *dev_info,
|
||||
uint8_t *data,
|
||||
uint16_t data_len)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&DevHVoutInfo,0,sizeof(NOR_HVOUT_INFO)); //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
BUS_Public.baud = dev_info->baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>9600
|
||||
BUS_Public.Protocol = dev_info->version;
|
||||
|
||||
if(ENUM_RS485_DEV_PRO_01 == dev_info->version)
|
||||
{
|
||||
BUS_Public.retry_num = C5IO_REPEATSENDTIMEMAX; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = C5IO_SEND_WAIT_TIME; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||
}else{
|
||||
BUS_Public.retry_num = 0x03; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = 0x0064; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||
}
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_HVout_Control_State; //
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = HVout_Loop_State; //
|
||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl = BLW_HVout_Group_Ctrl; //
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr = BLW_HVout_Group_Read; //
|
||||
|
||||
if(dev_info->output_num > C1_HVOUTNUMMAX)
|
||||
{
|
||||
DevHVoutInfo.HVoutLoopValidNum = C1_HVOUTNUMMAX;
|
||||
}else if(0x00 == dev_info->output_num)
|
||||
{
|
||||
DevHVoutInfo.HVoutLoopValidNum = 0x01; //<2F><>·Ϊ0<CEAA><30><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>·
|
||||
}else{
|
||||
DevHVoutInfo.HVoutLoopValidNum = dev_info->output_num;
|
||||
}
|
||||
|
||||
switch(BUS_Public.Protocol)
|
||||
{
|
||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &DevHVoutInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_02: if(NULL!=RS485_DEV_PRO_FUN_02) RS485_DEV_PRO_FUN_02(&BUS_Public, &DevHVoutInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_03: if(NULL!=RS485_DEV_PRO_FUN_03) RS485_DEV_PRO_FUN_03(&BUS_Public, &DevHVoutInfo);break; //3
|
||||
case ENUM_RS485_DEV_PRO_04: if(NULL!=RS485_DEV_PRO_FUN_04) RS485_DEV_PRO_FUN_04(&BUS_Public, &DevHVoutInfo);break;
|
||||
case ENUM_RS485_DEV_PRO_05: if(NULL!=RS485_DEV_PRO_FUN_05) RS485_DEV_PRO_FUN_05(&BUS_Public, &DevHVoutInfo);break;
|
||||
case ENUM_RS485_DEV_PRO_06: if(NULL!=RS485_DEV_PRO_FUN_06) RS485_DEV_PRO_FUN_06(&BUS_Public, &DevHVoutInfo);break;
|
||||
}
|
||||
|
||||
switch(dev_info->port)
|
||||
{
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_ACT_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
Act485_Info.device_num += 1;
|
||||
break;
|
||||
case Polling_Port: //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Polling_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_POLL_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
Poll485_Info.device_num += 1;
|
||||
break;
|
||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||
BUS485_Info.device_num += 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : HVout_Loop_State
|
||||
* Description : ָ<><D6B8><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>·״̬<D7B4>õ<EFBFBD>
|
||||
* Input :
|
||||
* devaddr - <20><>ǰ<EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
|
||||
* DevOutputLoop - <20><>Ҫ<EFBFBD><D2AA><EFBFBD>ҵļ̵<C4BC><CCB5><EFBFBD><EFBFBD><EFBFBD>·
|
||||
* Return :
|
||||
* <20><>·״̬<D7B4><CCAC><EFBFBD>أ<EFBFBD> 0x01 <20><> ,0x02<30><32>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t HVout_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||
{
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= DevHVoutInfo.HVoutLoopValidNum)
|
||||
{
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
if(DevHVoutInfo.DevHVoutState[DevOutputLoop] == 0x01) //
|
||||
{
|
||||
return 0x01;
|
||||
}else{
|
||||
return 0x02;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_HVout_Control_State
|
||||
* Description : BLW<4C>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
|
||||
uint32_t CfgDevAddIn,
|
||||
uint16_t DevInputAddr,
|
||||
uint32_t devaddr,
|
||||
uint16_t DevOutputLoop,
|
||||
uint16_t start)
|
||||
{
|
||||
uint8_t temp1 = 0;
|
||||
uint8_t state; //0<><30> 1<><31>
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
switch(start)
|
||||
{
|
||||
case 0x01:state = HVout_State_Open;break;
|
||||
case 0x02:state = HVout_State_Close;break;
|
||||
default:return;
|
||||
}
|
||||
|
||||
if(DevOutputLoop >= DevHVoutInfo.HVoutLoopValidNum) return ;
|
||||
|
||||
if( DevHVoutInfo.DevHVoutState[DevOutputLoop] != state )
|
||||
{
|
||||
switch(state)
|
||||
{
|
||||
case 0x00: //ָ<><D6B8>λ<EFBFBD><CEBB>0
|
||||
DevHVoutInfo.DevHVoutState[DevOutputLoop] = 0x00;
|
||||
break;
|
||||
case 0x01: //ָ<><D6B8>λ<EFBFBD><CEBB>һ
|
||||
DevHVoutInfo.DevHVoutState[DevOutputLoop] = 0x01;
|
||||
break;
|
||||
}
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"HVOUT loop:%d,start:%d",DevOutputLoop,start);
|
||||
temp1++;
|
||||
}
|
||||
else if(0x01 == DevHVoutInfo.HVSwitchFlag) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>б仯 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD>翪<EFBFBD><E7BFAA>
|
||||
{
|
||||
temp1 = 0x01;
|
||||
DevHVoutInfo.HVSwitchCtrlFlag = 0x01; //<2F><>Ȼ<EFBFBD><C8BB>һ
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"HVDevSendBuf loop:%d,start:%d",DevOutputLoop,start);
|
||||
}
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
if(Active_Port == BUS_Public.port)
|
||||
{
|
||||
BLV_Active_Set_List_Addr(devaddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_HVout_Group_Ctrl
|
||||
* Description : BLW<4C>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
CtrlFlag<61><67><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־ <20><><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32·
|
||||
CtrlNum : <20><><EFBFBD>Ƶ<EFBFBD><C6B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
|
||||
uint32_t CfgDevAddIn,
|
||||
uint16_t DevInputAddr,
|
||||
uint32_t devaddr,
|
||||
uint32_t CtrlFlag,
|
||||
uint8_t CtrlNum,
|
||||
uint16_t *start)
|
||||
{
|
||||
uint8_t temp1 = 0;
|
||||
uint8_t i = 0;
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(CtrlNum >= DevHVoutInfo.HVoutLoopValidNum)
|
||||
{
|
||||
CtrlNum = DevHVoutInfo.HVoutLoopValidNum;
|
||||
}
|
||||
for(i = 0; i < CtrlNum; i++)
|
||||
{
|
||||
if(CtrlFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA><EFBFBD><EFBFBD>
|
||||
{
|
||||
switch(start[i])
|
||||
{
|
||||
case 0x01: //<2F><><EFBFBD>ƿ<EFBFBD>
|
||||
if(DevHVoutInfo.DevHVoutState[i] != 0x01) //<2F><>Ϊ1
|
||||
{
|
||||
temp1++;
|
||||
DevHVoutInfo.DevHVoutState[i] = 0x01;
|
||||
}
|
||||
break;
|
||||
case 0x02: //<2F><><EFBFBD>ƹ<EFBFBD>
|
||||
if(DevHVoutInfo.DevHVoutState[i] != 0x00) //<2F><>Ϊ0
|
||||
{
|
||||
temp1++;
|
||||
DevHVoutInfo.DevHVoutState[i] = 0x00;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if((0x00 == temp1) && (0x01 == DevHVoutInfo.HVSwitchFlag)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>б仯 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD>翪<EFBFBD><E7BFAA>
|
||||
{
|
||||
if(0x00 == DevHVoutInfo.HVSwitchCtrlFlag) //Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><C2B1><EFBFBD>Ϊ1
|
||||
{
|
||||
temp1 = 0x01;
|
||||
DevHVoutInfo.HVSwitchCtrlFlag = 0x01; //<2F><>Ȼ<EFBFBD><C8BB>һ
|
||||
}
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"HVDevSendBuf loopCtrl");
|
||||
}
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
if(Active_Port == BUS_Public.port)
|
||||
{
|
||||
BLV_Active_Set_List_Addr(devaddr);
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_HVout_Group_Ctrl
|
||||
* Description : BLW<4C>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
CtrlFlag<61><67><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־ <20><><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32·
|
||||
CtrlNum : <20><><EFBFBD>Ƶ<EFBFBD><C6B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> <20><><EFBFBD>ؿ<EFBFBD> <20><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ع<EFBFBD>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t BLW_HVout_Group_Read(
|
||||
uint32_t devaddr,
|
||||
uint8_t SceneType,
|
||||
uint32_t ReadFlag,
|
||||
uint8_t ReadNum,
|
||||
uint16_t *start)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t Ret = 0x00;
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22>̵<EFBFBD><CCB5><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>·<EFBFBD><C2B7>־:%08X ", ReadFlag);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(ReadNum >= DevHVoutInfo.HVoutLoopValidNum)
|
||||
{
|
||||
ReadNum = DevHVoutInfo.HVoutLoopValidNum;
|
||||
}
|
||||
switch(SceneType)
|
||||
{
|
||||
case 0x01:
|
||||
for(i = 0; i < ReadNum; i++)
|
||||
{
|
||||
if(ReadFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA>ȡ<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
switch(start[i])
|
||||
{
|
||||
case 0x01: //״̬<D7B4><CCAC>
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22>̵<EFBFBD><CCB5><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7><EFBFBD><EFBFBD>:%04X ", start[i]);
|
||||
if( DevHVoutInfo.DevHVoutState[i] != 0x01 ) //<2F><>Ϊ1
|
||||
{
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
}
|
||||
break;
|
||||
case 0x02: //״̬<D7B4><CCAC>
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22>̵<EFBFBD><CCB5><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7><EFBFBD><EFBFBD>:%04X ", start[i]);
|
||||
if(DevHVoutInfo.DevHVoutState[i] != 0x00 ) //<2F><>Ϊ0
|
||||
{
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0x02:
|
||||
for(i = 0; i < ReadNum; i++)
|
||||
{
|
||||
if(ReadFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA>ȡ<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
if(0x01 == start[i])//״̬<D7B4><CCAC>
|
||||
{
|
||||
if( DevHVoutInfo.DevHVoutState[i] != 0x01 ) //<2F><>Ϊ1
|
||||
{
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22><><EFBFBD>ⳡ<EFBFBD><E2B3A1><EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>%d״̬:%04X ", i, start[i]);
|
||||
Ret = DEV_STATE_OPEN;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if(0x00 == Ret)
|
||||
{
|
||||
switch(SceneType)
|
||||
{
|
||||
case 0x01:
|
||||
Ret = DEV_STATE_OPEN;
|
||||
break;
|
||||
case 0x02:
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
return Ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_BLV485_Expand_Online_Status
|
||||
* Description : <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
* Return : <20><><EFBFBD><EFBFBD>״̬
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Get_BLV485_Expand_Online_Status(uint32_t devaddr)
|
||||
{
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevHVoutInfo.DevOffline == DEV_IS_ONLINE)
|
||||
{
|
||||
return 0x01;
|
||||
}
|
||||
return 0x02;
|
||||
}
|
||||
|
||||
|
||||
1339
BLV_485_Driver/blv_nor_dev_virtualcard.c
Normal file
1339
BLV_485_Driver/blv_nor_dev_virtualcard.c
Normal file
File diff suppressed because it is too large
Load Diff
256
BLV_485_Driver/blv_not_dev_lvinput.c
Normal file
256
BLV_485_Driver/blv_not_dev_lvinput.c
Normal file
@@ -0,0 +1,256 @@
|
||||
/*
|
||||
* blv_not_dev_lvinput.c
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "blv_nor_dev_lvinput.h"
|
||||
#include "blv_bus_dev_c5iofun.h"
|
||||
#include "blv_rs485_dev_switchctrl.h"
|
||||
#include "pc_devicetest_fun.h"
|
||||
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include "blv_netcomm_function.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Nor_Dev_LVinput_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_LVinput_Init(uint8_t devaddr, uint16_t LoopMax)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&DevLVinputInfo,0,sizeof(NOR_LVINPUT_INFO));
|
||||
|
||||
BUS_Public.addr = devaddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = Dev_Host_LVinput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_LVinput_Dis;
|
||||
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_LVinput_InType_Get;
|
||||
|
||||
if(LoopMax > LVINPUTNUMMAX)
|
||||
{
|
||||
DevLVinputInfo.LVinputValidNum = LVINPUTNUMMAX;
|
||||
}else{
|
||||
DevLVinputInfo.LVinputValidNum = LoopMax;
|
||||
}
|
||||
|
||||
DevLVinputInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00);
|
||||
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_LVinput_InType_Get
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||
* Input :
|
||||
DevAddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||
DevInputLoop : <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
DevInputType <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevInputLoop >= DevLVinputInfo.LVinputValidNum)
|
||||
{
|
||||
return Ret;
|
||||
}
|
||||
|
||||
if(DevInputType == DevLVinputInfo.DevReadBuf[DevInputLoop]) //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevLVinputInfo.DevReadBuf[DevInputLoop] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Ret = CtrlValid;
|
||||
}
|
||||
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d: %d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>",__func__,DevInputLoop, DevInputType);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_LVinput_Dis
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɨ<EFBFBD>躯<EFBFBD><E8BAAF>
|
||||
* Input :
|
||||
DevAddr : <20>豸<EFBFBD><E8B1B8>ַ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
|
||||
{
|
||||
Device_Public_Information_G BUS_PublicLVinput; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
|
||||
BUS_C5IO_INFO C5IO_Info;
|
||||
uint8_t KeepFlag = 0x00;
|
||||
|
||||
if( (0x00000000 == DevAddr) || (0xFFFFFFFF == DevAddr) )
|
||||
{
|
||||
return ;
|
||||
}
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicLVinput,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if( (0x00000000 == DevLVinputInfo.DevC5IOAddr) || (0xFFFFFFFF == DevAddr) )
|
||||
{
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicC5IO,sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
||||
|
||||
for(uint8_t i = 0;i<C5IO_DI_CH_MAX;i++)
|
||||
{
|
||||
switch((C5IO_Info.DI_Type[i] & 0x0F))
|
||||
{
|
||||
case BUS_C5IO_DI_Key_Type:
|
||||
if(C5IO_Info.DI_Start[i] != 0x00) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
{
|
||||
KeepFlag = 0x01;
|
||||
DevActionGlobal.Devi = BUS_PublicLVinput.DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s Key_Type:%d <20><>·:%d ״̬:%d",__func__, (C5IO_Info.DI_Type[i] & 0x0F), i, C5IO_Info.DI_Start[i]);
|
||||
|
||||
DevLVinputInfo.DevReadBuf[i] = C5IO_Info.DI_Start[i];
|
||||
DevLVinputInfo.DevReadBufLast[i] = C5IO_Info.DI_Start[i];
|
||||
|
||||
if(C5IO_Info.DI_Start[i]==0x02) //2023-10-09
|
||||
{
|
||||
DevActionGlobal.InputType = BUS_PublicLVinput.type;
|
||||
DevActionGlobal.InputAddr = BUS_PublicLVinput.addr;
|
||||
DevActionGlobal.InputLoop = i;
|
||||
}else if(C5IO_Info.DI_Start[i]==0x03)
|
||||
{
|
||||
DevActionGlobal.InputType = 0xff;
|
||||
DevActionGlobal.InputAddr = 0x00;
|
||||
DevActionGlobal.InputLoop = 0x00;
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>״̬<D7B4>ϱ<EFBFBD>*/
|
||||
if(g_pc_test.test_flag == 0x01)
|
||||
{
|
||||
uint8_t ack_buff[5] = {0};
|
||||
|
||||
ack_buff[(i/4)] = (C5IO_Info.DI_Start[i]&0x03) << (i%4)*2;
|
||||
//Dbg_Print(DBG_BIT_LOGIC_STATUS_bit,"<22>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD>\r\n");
|
||||
BLV_PC_Testing_Data_Reported2(0x01,DEV_C5IO_Type,0x00,ack_buff,4);
|
||||
}else if(g_pc_test.test_flag == 0x11)
|
||||
{
|
||||
uint8_t ack_buff[8] = {0};
|
||||
ack_buff[0] = g_pc_test.test_flag;
|
||||
ack_buff[1] = DEV_C5IO_Type;
|
||||
ack_buff[2] = 0x00;
|
||||
ack_buff[3 + (i/4)] = (C5IO_Info.DI_Start[i]&0x03) << (i%4)*2;
|
||||
|
||||
//Dbg_Print(DBG_BIT_LOGIC_STATUS_bit,"<22>ϱ<EFBFBD>PC<50><43><EFBFBD><EFBFBD>\r\n");
|
||||
Udp_Internal_PC_Testing_Reported(ack_buff,0x07,g_pc_test.pc_ip,g_pc_test.pc_port);
|
||||
}
|
||||
C5IO_Info.DI_Start[i] = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
break;
|
||||
case BUS_C5IO_DI_Pir_Type:
|
||||
case BUS_C5IO_DI_Dry_Type:
|
||||
if(C5IO_Info.DI_Start[i] != C5IO_Info.DI_LastStart[i])
|
||||
{
|
||||
KeepFlag = 0x01;
|
||||
C5IO_Info.DI_LastStart[i] = C5IO_Info.DI_Start[i];
|
||||
switch(C5IO_Info.DI_Start[i])
|
||||
{
|
||||
case 0x00: //<2F>ͷ<EFBFBD>
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s,Loop:%d Release",__func__, i);
|
||||
DevActionGlobal.Devi = BUS_PublicLVinput.DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
|
||||
DevLVinputInfo.DevReadBuf[i] = KeyRelease;
|
||||
DevLVinputInfo.DevReadBufLast[i] = KeyRelease;
|
||||
DevActionGlobal.InputType = 0xff; //2023-10-09
|
||||
DevActionGlobal.InputAddr = 0x00; //2023-10-09
|
||||
DevActionGlobal.InputLoop = 0x00; //2023-10-09
|
||||
break;
|
||||
case 0x01: //<2F><><EFBFBD><EFBFBD>
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s,Loop:%d Press",__func__, i);
|
||||
DevActionGlobal.Devi = BUS_PublicLVinput.DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
|
||||
DevLVinputInfo.DevReadBuf[i] = KeyPress;
|
||||
DevLVinputInfo.DevReadBufLast[i] = KeyPress;
|
||||
DevLVinputInfo.HoldTick[i] = SysTick_1s;
|
||||
DevActionGlobal.InputType = BUS_PublicLVinput.type; //2023-10-09
|
||||
DevActionGlobal.InputAddr = BUS_PublicLVinput.addr; //2023-10-09
|
||||
DevActionGlobal.InputLoop = i; //2023-10-09
|
||||
break;
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>״̬<D7B4>ϱ<EFBFBD>*/
|
||||
if(g_pc_test.test_flag == 0x01)
|
||||
{
|
||||
uint8_t ack_buff[5] = {0};
|
||||
|
||||
ack_buff[(i/4)] = (C5IO_Info.DI_Start[i]&0x03) << (i%4)*2;
|
||||
|
||||
BLV_PC_Testing_Data_Reported2(0x01,DEV_C5IO_Type,0x00,ack_buff,4);
|
||||
}else if(g_pc_test.test_flag == 0x11)
|
||||
{
|
||||
uint8_t ack_buff[8] = {0};
|
||||
ack_buff[0] = g_pc_test.test_flag;
|
||||
ack_buff[1] = DEV_C5IO_Type;
|
||||
ack_buff[2] = 0x00;
|
||||
ack_buff[3 + (i/4)] = (C5IO_Info.DI_Start[i]&0x03) << (i%4)*2;
|
||||
|
||||
//Dbg_Print(DBG_BIT_LOGIC_STATUS_bit,"<22>ϱ<EFBFBD>PC<50><43><EFBFBD><EFBFBD>\r\n");
|
||||
Udp_Internal_PC_Testing_Reported(ack_buff,0x07,g_pc_test.pc_ip,g_pc_test.pc_port);
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
//2024-06-13 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ըɽӵ㴥<D3B5><E3B4A5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>1s<31><73><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>
|
||||
if( ( ( (C5IO_Info.DI_Type[i] & 0x0F) == BUS_C5IO_DI_Dry_Type ) && (DevLVinputInfo.DevReadBuf[i] == 0x00) \
|
||||
&& (SysTick_1s > DevLVinputInfo.HoldTick[i] + 1) && (DevLVinputInfo.DevReadBufLast[i] == KeyPress) ) )
|
||||
{
|
||||
DevLVinputInfo.HoldTick[i] = SysTick_1s;
|
||||
DevLVinputInfo.DevReadBuf[i] = KeyHold;
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s Loop:%d Hold",__func__,i);
|
||||
KeepFlag = 0x01;
|
||||
}
|
||||
}
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_PublicLVinput.check = 0x00;
|
||||
BUS_PublicLVinput.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G),DevAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
BUS_PublicC5IO.check = 0x00;
|
||||
BUS_PublicC5IO.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
468
BLV_485_Driver/blv_rs485_dev_c12dimming.c
Normal file
468
BLV_485_Driver/blv_rs485_dev_c12dimming.c
Normal file
@@ -0,0 +1,468 @@
|
||||
/*
|
||||
* blv_rs485_dev_c12dimming.c
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "blv_rs485_dev_c12dimming.h"
|
||||
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#define C12Rs485AddrDefault 0x01 //Ĭ<><C4AC>Ϊ1<CEAA><31>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>Ȼ<EFBFBD><C8BB>Ĭ<EFBFBD>ϵ<EFBFBD>ַ
|
||||
#define DEVC12DimTYPE 0x03 //C12DimͨѶЭ<D1B6><D0AD><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_RS485_C12Dim_Data_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
|
||||
* Input :
|
||||
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_RS485_C12Dim_Data_Init(Device_Public_Information_G *BUS_Public, RS485_LED_INFO *Rs485LED, uint16_t LoopNum)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLW_C12DimCycleCtrl;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLW_Rs485_C12Dim_Check;
|
||||
|
||||
if(LoopNum >= C12DIM_OUT_CH_MAX) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ
|
||||
{
|
||||
Rs485LED->LEDLoopValidNum = C12DIM_OUT_CH_MAX;
|
||||
}
|
||||
else if(0x00 == LoopNum)
|
||||
{
|
||||
Rs485LED->LEDLoopValidNum = 0x01;
|
||||
}
|
||||
else //δ<><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ
|
||||
{
|
||||
Rs485LED->LEDLoopValidNum = LoopNum;
|
||||
}
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>C12Dim<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d", Rs485LED->LEDLoopValidNum);
|
||||
|
||||
Rs485LED->LEDCtrlFlag = 0x01;
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LEDCycleCtrl
|
||||
* Description : BLWLED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev_addr)
|
||||
{
|
||||
uint8_t i; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>·
|
||||
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LEDInfo;
|
||||
uint8_t KeepFlag = 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
|
||||
{
|
||||
if(Rs485LEDInfo.DevSendBuf_last[i] != Rs485LEDInfo.DevSendBuf[i])
|
||||
{
|
||||
Rs485LEDInfo.LEDCtrlFlag = 0x01;
|
||||
Rs485LEDInfo.LEDCtrlCnt = BUS_Public.retry_num;
|
||||
Rs485LEDInfo.DevReadBuf[i] = 0x01; //״̬<D7B4>仯<EFBFBD><E4BBAF>һ
|
||||
memcpy(Rs485LEDInfo.DevSendBuf_last, Rs485LEDInfo.DevSendBuf, Rs485LEDInfo.LEDLoopValidNum); //ͬ<><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
|
||||
{
|
||||
if(Rs485LEDInfo.DevCtrlWayBuf_last[i] != Rs485LEDInfo.DevCtrlWayBuf[i]) // 0x00
|
||||
{
|
||||
Rs485LEDInfo.LEDWayCtrlFlag |=(0x01<<i); //<2F><>Ӧ<EFBFBD>ķ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><D6BE>һ
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><EFBFBD>λ:%d <20><>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>%d\r\n",Rs485LEDInfo.LEDWayCtrlFlag,Rs485LEDInfo.LEDLoopValidNum); //
|
||||
|
||||
Rs485LEDInfo.LEDWayCtrlCnt = BUS_Public.retry_num;
|
||||
Rs485LEDInfo.DevCtrlWayBuf_last[i] = Rs485LEDInfo.DevCtrlWayBuf[i];//<2F><>ʽ<EFBFBD><CABD><EFBFBD>ƣ<EFBFBD>ֻ<EFBFBD><D6BB>һ·һ·<D2BB><C2B7><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
|
||||
if(Rs485LEDInfo.Dim_Global_Value != DevActionGlobal.DimGlobalValue) //2025-07-15,YYW,ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD>ȱȽ<C8B1>
|
||||
{
|
||||
Rs485LEDInfo.Dim_Global_Value = DevActionGlobal.DimGlobalValue;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"C12DimFun--ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD>ȸı<C8B8>:",Rs485LEDInfo.Dim_Global_Value);
|
||||
}
|
||||
|
||||
if(Rs485LEDInfo.Dim_Global_Value_Last != Rs485LEDInfo.Dim_Global_Value) //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
Rs485LEDInfo.Dim_Global_Value_Last = Rs485LEDInfo.Dim_Global_Value;
|
||||
Rs485LEDInfo.Dim_GV_Flag |= (0x01<<7);
|
||||
}
|
||||
|
||||
if((Rs485LEDInfo.LEDUpLightLimitLast != Rs485LEDInfo.LEDUpLightLimit) || (Rs485LEDInfo.LEDDownLightLimitLast != Rs485LEDInfo.LEDDownLightLimit)) //<2F>ɵ<EFBFBD><C9B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
Rs485LEDInfo.LEDUpLightLimitLast = Rs485LEDInfo.LEDUpLightLimit;
|
||||
Rs485LEDInfo.Dim_GV_Flag |= (0x01<<6);
|
||||
|
||||
Rs485LEDInfo.LEDDownLightLimitLast = Rs485LEDInfo.LEDDownLightLimit;
|
||||
Rs485LEDInfo.Dim_GV_Flag |= (0x01<<5);
|
||||
}
|
||||
|
||||
if(0x00 != Rs485LEDInfo.Dim_GV_Flag) //2024-1-30
|
||||
{
|
||||
BLW_C12_GlobalValue_Set(&BUS_Public, &Rs485LEDInfo); //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Ret = RS485OCCUPYTIME;
|
||||
}
|
||||
else if(0x01 == Rs485LEDInfo.LEDCtrlFlag)
|
||||
{
|
||||
if(0x00 != Rs485LEDInfo.LEDCtrlCnt)
|
||||
{
|
||||
Rs485LEDInfo.LEDCtrlCnt--;
|
||||
}else{
|
||||
Rs485LEDInfo.LEDCtrlFlag = 0x00;
|
||||
}
|
||||
BLW_Rs485_C12Dim_Ctrl(&BUS_Public, &Rs485LEDInfo); //״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
Ret = RS485OCCUPYTIME;
|
||||
}
|
||||
else if(0x00 != Rs485LEDInfo.LEDWayCtrlFlag)
|
||||
{
|
||||
if(0x00 != Rs485LEDInfo.LEDWayCtrlCnt)
|
||||
{
|
||||
Rs485LEDInfo.LEDWayCtrlCnt--;
|
||||
}else{
|
||||
Rs485LEDInfo.LEDWayCtrlFlag = 0x00;
|
||||
}
|
||||
|
||||
if(0x00 != Rs485LEDInfo.LEDWayCtrlFlag)
|
||||
{
|
||||
BLW_Rs485_C12Dim_Way_Ctrl(&BUS_Public, &Rs485LEDInfo); //<2F><>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>
|
||||
Ret = RS485OCCUPYTIME; //<2F><>0<EFBFBD><30><EFBFBD><EFBFBD>
|
||||
}else{
|
||||
KeepFlag = 0x01; //Ϊ0<CEAA><30><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
}else {
|
||||
BLW_Rs485_C12Dim_Read(&BUS_Public, &Rs485LEDInfo); //<2F><>ȡ
|
||||
Ret = RS485OCCUPYTIME;
|
||||
}
|
||||
|
||||
if(RS485OCCUPYTIME == Ret)
|
||||
{
|
||||
KeepFlag = 0x01;
|
||||
if(Rs485LEDInfo.DevSendCnt > BUS_Public.retry_num)
|
||||
{
|
||||
if(Rs485LEDInfo.DevOffline != DEV_IS_OFFLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Rs485 C12 LED DEV_IS_OFFLINE");
|
||||
LOG_Device_Online_Record(DEV_RS485_PWM,BUS_Public.addr,LogInfo_Device_Offline); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
Rs485LEDInfo.DevOffline = DEV_IS_OFFLINE; //<2F><><EFBFBD><EFBFBD>
|
||||
if(Rs485LEDInfo.DevOffline != Rs485LEDInfo.DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485LEDInfo.DevOfflineLast = Rs485LEDInfo.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_OFFLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
|
||||
if(0x00 != Rs485LEDInfo.Dim_GV_Flag)
|
||||
{
|
||||
Rs485LEDInfo.Dim_GV_Flag = 0x00;
|
||||
}
|
||||
}else{
|
||||
Rs485LEDInfo.DevSendCnt++; //
|
||||
}
|
||||
Rs485LEDInfo.inquire_tick = SysTick_1ms;
|
||||
|
||||
/*ͨѶͳ<D1B6><CDB3>*/
|
||||
BLV_Communication_Record(&Rs485LEDInfo.comm_record,0x01,0x00);
|
||||
}
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Rs485_LED_Check
|
||||
* Description : BLWLED<45><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint8_t rev = 0x01;
|
||||
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LED;
|
||||
uint8_t data[0x20];
|
||||
|
||||
if(len > 0x20)
|
||||
{
|
||||
return rev; //<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
|
||||
if(( data[0] != C12Rs485AddrDefault ) || ( DEVC12DimTYPE != data[2] ) //
|
||||
|| ( len != (data[4] ) )
|
||||
) //<2F><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"C12Dim <20><>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>");
|
||||
return rev; //У<><D0A3><EFBFBD>ļ<EFBFBD>ͷ
|
||||
}
|
||||
|
||||
if(data[5] == CheckSum_Overlook_Check(data, len, 5)) //У<><D0A3>ͨ<EFBFBD><CDA8>
|
||||
{
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
switch(data[6])
|
||||
{
|
||||
case 0x30: //<2F><>ȡ<EFBFBD>ظ<EFBFBD>
|
||||
case 0x31: //<2F><><EFBFBD>ƻظ<C6BB>
|
||||
case 0x32: //<2F><>ʽ<EFBFBD>ظ<EFBFBD>
|
||||
case 0x33: //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ûظ<C3BB>
|
||||
rev = 0x00;
|
||||
|
||||
if(Rs485LED.DevOffline != DEV_IS_ONLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Rs485LED DEV_IS_ONLINE");
|
||||
LOG_Device_Online_Record(DEV_RS485_PWM,BUS_Public.addr,LogInfo_Device_Online); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
Rs485LED.DevSendCnt = 0x00;
|
||||
Rs485LED.DevOffline = DEV_IS_ONLINE; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
if(Rs485LED.DevOffline != Rs485LED.DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485LED.DevOfflineLast = Rs485LED.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
BLV_Communication_Record(&Rs485LED.comm_record,0x02,0x01); //<2F><>¼ͨѶ<CDA8>ɹ<EFBFBD>
|
||||
break;
|
||||
}
|
||||
switch(data[6])
|
||||
{
|
||||
case 0x31:
|
||||
Rs485LED.LEDCtrlFlag = 0x00;
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,len);
|
||||
break;
|
||||
case 0x32:
|
||||
Rs485LED.LEDWayCtrlFlag = 0x00;
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,len);
|
||||
break;
|
||||
case 0x30:
|
||||
/*<2A><><EFBFBD>״̬<D7B4>ı䣬<C4B1>ű<EFBFBD><C5B1><EFBFBD>*/
|
||||
Rs485LED.LEDLightnessReadFlag = 0x00;
|
||||
//Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"C12Dimming Recv:",data,len);
|
||||
if( Rs485LED.init_flag == 0x00)
|
||||
{
|
||||
/*<2A><>ȡ״̬ - <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>״̬*/
|
||||
for(uint8_t i = 0; i < Rs485LED.LEDLoopValidNum; i++)
|
||||
{
|
||||
Rs485LED.DevSendBuf[i] = data[8 + i] & 0x7F;
|
||||
Rs485LED.DevSendBuf[i] = 0x00; //2025-11-05 <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
Rs485LED.DevSendBuf_last[i] = Rs485LED.DevSendBuf[i];
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"C12Dimming CH%d Init State:%d",i,Rs485LED.DevSendBuf[i]);
|
||||
}
|
||||
Rs485LED.init_flag = 1;
|
||||
}
|
||||
break;
|
||||
case 0x33:
|
||||
Rs485LED.Dim_GV_Flag = 0x00;
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"C12 Global Set Ack:",data,len);
|
||||
break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
|
||||
}
|
||||
|
||||
return rev;
|
||||
}
|
||||
|
||||
#define C12DimCTRLSENDLEN 22 //C12<31><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
/**
|
||||
* @name BLW 12· <20><><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* @para
|
||||
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
|
||||
* @return <20><>
|
||||
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_Rs485_C12Dim_Ctrl(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo)
|
||||
{
|
||||
uint8_t i;
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>շ<EFBFBD><D5B7><EFBFBD>ַ LEN У<><D0A3><EFBFBD><EFBFBD> CMD <20><>4ͨ<34><CDA8> <20><><EFBFBD><EFBFBD>0.1s <20><><EFBFBD><EFBFBD> CH4 CH3 CH2 CH1
|
||||
uint8_t SendBuf[24];// = {0x00, 0x00, DEVC12DimTYPE, 0x01, C12DimCTRLSENDLEN, 0x18, 0x21, 0x0f, 0x64, 0x00, 0x50, 0x50, 0x50, 0x50};
|
||||
|
||||
SendBuf[0] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
SendBuf[1] = 0x00; //<2F><>0
|
||||
|
||||
if(Rs485LEDInfo->LEDSn > 0x0F) Rs485LEDInfo->LEDSn = 0x00;
|
||||
SendBuf[1] = Rs485LEDInfo->LEDSn;
|
||||
|
||||
SendBuf[2] = DEVC12DimTYPE; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
SendBuf[3] = C12Rs485AddrDefault; //Ĭ<><C4AC>1<EFBFBD><31>ַ
|
||||
SendBuf[4] = C12DimCTRLSENDLEN; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[6] = 0x21; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SendBuf[7] = 0xff; //<2F><><EFBFBD><EFBFBD>8ͨ<38><CDA8>
|
||||
SendBuf[8] = 0x0f; //<2F><><EFBFBD><EFBFBD>4ͨ<34><CDA8>
|
||||
|
||||
SendBuf[9] = Rs485LEDInfo->C12_Set_Time; //<2F><><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"C12<EFBFBD><EFBFBD><EFBFBD>⽥<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>:%d \r\n",Rs485LEDInfo->C12_Set_Time);
|
||||
for(i = 0; i < Rs485LEDInfo->LEDLoopValidNum; i++)
|
||||
{
|
||||
SendBuf[21-i] = Rs485LEDInfo->DevSendBuf[i] & 0x7F;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"C12Dimming CH%d:%d \r\n",i,Rs485LEDInfo->DevSendBuf[i]);
|
||||
}
|
||||
// memcpy(&SendBuf[14], &Rs485LEDInfo->DevSendBuf[0], Rs485LEDInfo->LEDLoopValidNum); //ָʾ<D6B8>ƿ<EFBFBD><C6BF><EFBFBD>
|
||||
SendBuf[5] = CheckSum_Overlook_Check(SendBuf, C12DimCTRLSENDLEN, 5);
|
||||
|
||||
MCU485_SendString(BUS_Public->port,SendBuf,C12DimCTRLSENDLEN);
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Send_Control_Record(BUS_Public->port,BUS_Public->baud,SendBuf,C12DimCTRLSENDLEN);
|
||||
}
|
||||
|
||||
#define C12DimWAYCTRLLEN 12
|
||||
/**
|
||||
* @name BLW 4· <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* @para
|
||||
* CfgDevAdd <20>豸<EFBFBD>ڵ<EFBFBD>
|
||||
* PBLEDLoop <20><>·<EFBFBD><C2B7>ַ 0~3
|
||||
* @return <20><>
|
||||
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>շ<EFBFBD><D5B7><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> У<><D0A3><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> mask
|
||||
* 00 09 03 01 0B 51 22 0F 01 00 64
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_Rs485_C12Dim_Way_Ctrl(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo)
|
||||
{
|
||||
uint8_t i;
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD> <20>շ<EFBFBD><D5B7><EFBFBD>ַ LEN У<><D0A3><EFBFBD><EFBFBD> CMD <20><>4ͨ<34><CDA8> ģʽ <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||
uint8_t SendBuf[C12DimWAYCTRLLEN];// = {0x00, 0x00, DEVC12DimTYPE, 0x01, C12DimWAYCTRLLEN, 0xBD, 0x24, 0x00, 0x01, 0x02, 0x01};
|
||||
|
||||
SendBuf[0] = 0x00;
|
||||
if(Rs485LEDInfo->LEDSn > 0x0F) Rs485LEDInfo->LEDSn = 0x00;
|
||||
SendBuf[1] = Rs485LEDInfo->LEDSn; //֡
|
||||
SendBuf[2] = DEVC12DimTYPE; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[3] = 0x01;
|
||||
SendBuf[4] = C12DimWAYCTRLLEN; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[6] = 0x22; //<2F><><EFBFBD><EFBFBD><EEA3AC>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SendBuf[7] = Rs485LEDInfo->LEDWayCtrlFlag&0xFF;
|
||||
SendBuf[8] = (Rs485LEDInfo->LEDWayCtrlFlag>>8)&0xFF;
|
||||
|
||||
for(i = 0; i < Rs485LEDInfo->LEDLoopValidNum; i++)
|
||||
{
|
||||
if((Rs485LEDInfo->LEDWayCtrlFlag>>i)&0x01)
|
||||
{
|
||||
switch(Rs485LEDInfo->DevCtrlWayBuf_last[i])
|
||||
{
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleUp: //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
SendBuf[9] = 0x01; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD>ʽ
|
||||
SendBuf[10] = 0x01;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleDown: //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
SendBuf[9] = 0x01;
|
||||
SendBuf[10] = 0x00;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up: //<2F><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>
|
||||
SendBuf[9] = 0x00;
|
||||
SendBuf[10] = 0x01;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down: //<2F><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD>
|
||||
SendBuf[9] = 0x00;
|
||||
SendBuf[10] = 0x00;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Stop: //ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD>
|
||||
SendBuf[9] = 0x02;
|
||||
SendBuf[10] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
break;
|
||||
}
|
||||
break; //ֻ<><D6BB><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
|
||||
}
|
||||
}
|
||||
SendBuf[11] = Rs485LEDInfo->DevCtrlWayContect[i]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SendBuf[5] = CheckSum_Overlook_Check(SendBuf, C12DimWAYCTRLLEN, 5);
|
||||
|
||||
MCU485_SendString(BUS_Public->port,SendBuf,C12DimWAYCTRLLEN);
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Send_Control_Record(BUS_Public->port,BUS_Public->baud,SendBuf,C12DimCTRLSENDLEN);
|
||||
}
|
||||
|
||||
#define C12DimREADLEN 7
|
||||
/**
|
||||
* @name BLW 4· <20><><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* @para
|
||||
* CfgDevAdd <20>豸<EFBFBD>ڵ<EFBFBD>
|
||||
* @return <20><>
|
||||
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_Rs485_C12Dim_Read(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo)
|
||||
{
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>շ<EFBFBD><D5B7><EFBFBD>ַ LEN У<><D0A3><EFBFBD><EFBFBD> CMD
|
||||
uint8_t SendBuf[C12DimREADLEN]; // = {0x00, 0x00, DEVC12DimTYPE, 0x01, C12DimREADLEN, 0xD8, 0x20};
|
||||
|
||||
SendBuf[0] = 0x00; //<2F>ѷ<EFBFBD><D1B7><EFBFBD>ַ
|
||||
if(Rs485LEDInfo->LEDSn > 0x0F) Rs485LEDInfo->LEDSn = 0x00;
|
||||
SendBuf[1] = Rs485LEDInfo->LEDSn; //֡
|
||||
SendBuf[2] = DEVC12DimTYPE; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[3] = C12Rs485AddrDefault;
|
||||
SendBuf[4] = C12DimREADLEN; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[6] = 0x20;
|
||||
|
||||
SendBuf[5] = CheckSum_Overlook_Check(SendBuf, C12DimREADLEN, 5);
|
||||
|
||||
MCU485_SendString(BUS_Public->port,SendBuf,C12DimREADLEN);
|
||||
}
|
||||
|
||||
//ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
__attribute__((section(".non_0_wait"))) void BLW_C12_GlobalValue_Set(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo)
|
||||
{
|
||||
uint8_t lens = 0x0B;
|
||||
uint8_t SendBuf[15];
|
||||
memset(SendBuf,0,sizeof(SendBuf));
|
||||
|
||||
SendBuf[0] = 0x00; //<2F>ѷ<EFBFBD><D1B7><EFBFBD>ַ
|
||||
if(Rs485LEDInfo->LEDSn > 0x0F) Rs485LEDInfo->LEDSn = 0x00;
|
||||
SendBuf[1] = Rs485LEDInfo->LEDSn; //֡
|
||||
SendBuf[2] = DEVC12DimTYPE; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[3] = C12Rs485AddrDefault;
|
||||
SendBuf[4] = lens; //<2F><><EFBFBD><EFBFBD>
|
||||
SendBuf[6] = 0x23; //Cmd
|
||||
|
||||
SendBuf[7] = Rs485LEDInfo->Dim_GV_Flag;
|
||||
SendBuf[8] = Rs485LEDInfo->Dim_Global_Value; //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SendBuf[9] = Rs485LEDInfo->LEDUpLightLimit; //<2F>ɵ<EFBFBD><C9B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
SendBuf[10] = Rs485LEDInfo->LEDDownLightLimit; //<2F>ɵ<EFBFBD><C9B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SendBuf[5] = CheckSum_Overlook_Check(SendBuf, lens, 5);
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"BLW_C12_GlobalValue_Set Buff",SendBuf,lens);
|
||||
MCU485_SendString(BUS_Public->port,SendBuf,lens);
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Send_Control_Record(BUS_Public->port,BUS_Public->baud,SendBuf,lens);
|
||||
}
|
||||
|
||||
|
||||
472
BLV_485_Driver/blv_rs485_dev_cardctrl.c
Normal file
472
BLV_485_Driver/blv_rs485_dev_cardctrl.c
Normal file
@@ -0,0 +1,472 @@
|
||||
/*
|
||||
* blv_rs485_dev_cardctrl.c
|
||||
*
|
||||
* Created on: Nov 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_rs485_dev_cardctrl.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "sram_mem_addr.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
||||
#define CARDACTIONCONVER(data) (*(uint16_t *)&data) //ʵ<><CAB5>u16<31><36>ֵ <20><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȽϺ<CFBA>ֵ
|
||||
|
||||
#define REPEATSENDTIMEMAX 0x03 //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define READ_LEN 0x09
|
||||
|
||||
#define Dev_Card_RecvData_Len_Max 0x20
|
||||
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo);
|
||||
|
||||
#define RS485_DEV_PRO_FUN_01 DevExistJudgge(Dev_485_Card_Polling_Flag,BLV_RS485_Card_Polling_Init) //<2F><>ѵ<EFBFBD>˿<EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_02 DevExistJudgge(Dev_485_Card_Active_Flag,BLV_RS485_Card_Active_Init) //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL)
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_Active_Init
|
||||
* Description : BLV<4C>忨ȡ<E5BFA8><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_RS485_Card_Active_Init(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLV_RS485_Card_Cycle_Dis;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLV_Rs485_Card_Check;
|
||||
|
||||
Rs485CardInfo->DevPort = Active_Port; //2025-08-21 <20><>Ŀ2164 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
//<2F>˿ڴ<CBBF><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF>£<EFBFBD>Ĭ<EFBFBD><C4AC>״̬Ϊ<CCAC>忨״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϢĬ<CFA2><C4AC>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
Rs485CardInfo->Rs485CardFlag = 0x01;
|
||||
Rs485CardInfo->Rs485CardType = CARD_Guest_Identity;
|
||||
Rs485CardInfo->Rs485CardFlagLast = Rs485CardInfo->Rs485CardFlag;
|
||||
Rs485CardInfo->Rs485CardTypeLast = Rs485CardInfo->Rs485CardType;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ڲ忨ȡ<EFBFBD><EFBFBD>:%d",Rs485CardInfo->DevPort);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_Polling_Init
|
||||
* Description : BLV<4C>忨ȡ<E5BFA8><C8A1> <20><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_RS485_Card_Polling_Init(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLV_RS485_Card_Cycle_Dis;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLV_Rs485_Card_Check;
|
||||
|
||||
Rs485CardInfo->DevPort = Polling_Port;
|
||||
Rs485CardInfo->DevInitFlag = 0x00;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѵ<EFBFBD>˿ڲ忨ȡ<EFBFBD><EFBFBD>:%d",Rs485CardInfo->DevPort);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_Data_For_Logic_Init
|
||||
* Description : <20>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_RS485_Card_Data_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_CARD_INFO Rs485CardInfo;
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&Rs485CardInfo,0,sizeof(RS485_CARD_INFO));
|
||||
|
||||
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
BUS_Public.port = dev_info->port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
BUS_Public.baud = 9600; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.retry_num = 0x03; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = 0x0064; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||
BUS_Public.Protocol = dev_info->version;
|
||||
Rs485CardInfo.DevOffline = Rs485CardInfo.DevOfflineLast = DEV_IS_LINEUNINIT; //<2F><><EFBFBD>߳<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_Rs485_Card_InType_Get;
|
||||
|
||||
switch(BUS_Public.Protocol)
|
||||
{
|
||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &Rs485CardInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_02: if(NULL!=RS485_DEV_PRO_FUN_02) RS485_DEV_PRO_FUN_02(&BUS_Public, &Rs485CardInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_03: if(NULL!=RS485_DEV_PRO_FUN_03) RS485_DEV_PRO_FUN_03(&BUS_Public, &Rs485CardInfo);break; //3
|
||||
case ENUM_RS485_DEV_PRO_04: if(NULL!=RS485_DEV_PRO_FUN_04) RS485_DEV_PRO_FUN_04(&BUS_Public, &Rs485CardInfo);break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ڲ忨ȡ<E5BFA8><C8A1>_111:%d",Rs485CardInfo.DevPort);
|
||||
|
||||
if((DevActionGlobal.sram_save_flag == 0xA8) && ((SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x05) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x01) ) )
|
||||
{
|
||||
Rs485CardInfo.Rs485CardFlag = DevActionGlobal.CardState;
|
||||
Rs485CardInfo.Rs485CardFlagLast = DevActionGlobal.CardState;
|
||||
Rs485CardInfo.Rs485CardType = DevActionGlobal.Rs485CardType;
|
||||
Rs485CardInfo.Rs485CardTypeLast = DevActionGlobal.Rs485CardType;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"card init");
|
||||
}
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"card init end");
|
||||
|
||||
//<2F><>ʼ<EFBFBD><CABC>
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardFlag,SRAM_UDP_ELEReport_CardState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardType,SRAM_UDP_ELEReport_CardType); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardFlag,SRAM_UDP_ELEReport_CardState_Last); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardType,SRAM_UDP_ELEReport_CardType_Last); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
|
||||
|
||||
switch(dev_info->port)
|
||||
{
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_ACT_Device_To_List(&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||
Act485_Info.device_num += 1;
|
||||
break;
|
||||
case Polling_Port: //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Polling_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_POLL_Device_To_List(&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
|
||||
Poll485_Info.device_num += 1;
|
||||
break;
|
||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_Polling_Send
|
||||
* Description : <20><>ѵ<EFBFBD>˿<EFBFBD><CBBF><EFBFBD>ѵ<EFBFBD><D1B5><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_RS485_Card_Polling_Send(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo)
|
||||
{
|
||||
uint8_t Cbuf[READ_LEN] = {0x55,0x55,0xee, 0x06, 0x07, 0x00, 0x01,0x00,0x00}; //0x18, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
|
||||
|
||||
Cbuf[5] = BUS_Public->addr;
|
||||
NetCRC16(&Cbuf[3],Cbuf[3]);
|
||||
|
||||
MCU485_SendString(BUS_Public->port,Cbuf,READ_LEN);
|
||||
|
||||
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
|
||||
Rs485CardInfo->inquire_tick = SysTick_1ms;
|
||||
BLV_Communication_Record(&Rs485CardInfo->comm_record,0x01,0x00);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_PortType_Send
|
||||
* Description : <20><><EFBFBD>ò忨ȡ<E5BFA8><C8A1><EFBFBD>Ķ˿<C4B6><CBBF><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_RS485_Card_PortType_Send(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo)
|
||||
{
|
||||
uint8_t lens = 0x0A;
|
||||
uint8_t data[10];
|
||||
|
||||
data[0] = 0x55;
|
||||
data[1] = 0x55;
|
||||
data[2] = 0xee;
|
||||
data[3] = lens - 3; //<2F><>ȥ<EFBFBD><C8A5>ͷ3<CDB7><33><EFBFBD>ֽ<EFBFBD>
|
||||
data[4] = 0x07; //Type
|
||||
data[5] = BUS_Public->addr;
|
||||
data[6] = 0x07; //CMD
|
||||
data[7] = Rs485CardInfo->DevPort;
|
||||
|
||||
NetCRC16(&data[3],data[3]);
|
||||
|
||||
MCU485_SendString(BUS_Public->port,data,lens);
|
||||
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"BLV_RS485_Card_PortType_Send:",data,lens);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_RS485_Card_Cycle_Dis
|
||||
* Description : <20>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30>û<EFBFBD><C3BB><EFBFBD><EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_t dev_addr)
|
||||
{
|
||||
uint8_t ret = RS485OCCUPYNOTIME;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_CARD_INFO Rs485CardInfo;
|
||||
|
||||
uint8_t keepflag = 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.DevPort != Rs485CardInfo.DevPort_Last)
|
||||
{
|
||||
Rs485CardInfo.DevPort_Last = Rs485CardInfo.DevPort;
|
||||
Rs485CardInfo.DevPort_Flag = 0x01;
|
||||
keepflag = 0x01;
|
||||
}
|
||||
|
||||
if(Rs485CardInfo.DevPort_Flag == 0x01)
|
||||
{
|
||||
BLV_RS485_Card_PortType_Send(&BUS_Public,&Rs485CardInfo);
|
||||
ret = RS485OCCUPYTIME;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(BUS_Public.port == Polling_Port)
|
||||
{
|
||||
BLV_RS485_Card_Polling_Send(&BUS_Public,&Rs485CardInfo);
|
||||
ret = RS485OCCUPYTIME;
|
||||
}
|
||||
}
|
||||
|
||||
if(ret == RS485OCCUPYTIME)
|
||||
{
|
||||
keepflag = 0x01;
|
||||
if(Rs485CardInfo.DevSendCnt > REPEATSENDTIMEMAX)
|
||||
{
|
||||
if(Rs485CardInfo.DevOffline != DEV_IS_OFFLINE) //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Dev_Card LogInfo_Device_Offline...........");
|
||||
LOG_Device_Online_Record(DEV_RS485_CARD,SRAM_Read_Byte(dev_addr+Dev_Addr),LogInfo_Device_Offline); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
Rs485CardInfo.DevOffline = DEV_IS_OFFLINE; //<2F><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
if(Rs485CardInfo.DevOffline != Rs485CardInfo.DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485CardInfo.DevOfflineLast = Rs485CardInfo.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_OFFLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
|
||||
Rs485CardInfo.DevPort_Flag = 0x00;
|
||||
}else{
|
||||
Rs485CardInfo.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||
}
|
||||
}
|
||||
|
||||
if(keepflag == 0x01)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Rs485_Card_Check
|
||||
* Description : BLV<4C>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
|
||||
ͷ LEN TYPE ADDR FUN <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>L <20><><EFBFBD><EFBFBD>H <20><> <20><>Ԫ ¥<><C2A5> <20><><EFBFBD><EFBFBD> У<><D0A3>
|
||||
55 55 EE 0E 07 01 01 01 00 00 00 00 00 00 00 0A 38
|
||||
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint8_t data[Dev_Card_RecvData_Len_Max];
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
RS485_CARD_INFO Rs485CardInfo;
|
||||
|
||||
if(len > Dev_Card_RecvData_Len_Max)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Dev_Card Check_Len Fail!");
|
||||
return 0x01; //<2F><>У<EFBFBD><D0A3>
|
||||
}
|
||||
|
||||
if(len < 0x07) {
|
||||
return 0x01;
|
||||
}
|
||||
|
||||
memset(data,0,sizeof(Dev_Card_RecvData_Len_Max));
|
||||
SRAM_DMA_Read_Buff(data, len, data_addr);
|
||||
|
||||
if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xEE) || ((data[3] + 0x03) != len) \
|
||||
|| (data[4] != 0x07) || (data[5] != 0x01) \
|
||||
|| ((data[len-2] + (data[len-1]<<8)) != NetCRC16_2(&data[3], len - 5))
|
||||
)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"У<EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ͷ<EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD>У<EFBFBD>鲻<EFBFBD><EFBFBD>!!");
|
||||
return 0x01;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.DevOffline == DEV_IS_OFFLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Dev_Card LogInfo_Device_Online...........");
|
||||
LOG_Device_Online_Record(DEV_RS485_CARD,BUS_Public.addr, LogInfo_Device_Online); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
BLV_Communication_Record(&Rs485CardInfo.comm_record,0x02,0x01); //<2F><>¼ͨѶ<CDA8>ɹ<EFBFBD>
|
||||
Rs485CardInfo.DevSendCnt = 0x00; //<2F>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Rs485CardInfo.DevOffline = DEV_IS_ONLINE; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
if(Rs485CardInfo.DevOffline != Rs485CardInfo.DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485CardInfo.DevOfflineLast = Rs485CardInfo.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
if(data[6] == 0x01)
|
||||
{
|
||||
if(len >= 8)
|
||||
{
|
||||
if(BUS_Public.port == Active_Port)
|
||||
{
|
||||
BLV_RS485_Card_Polling_Send(&BUS_Public,&Rs485CardInfo);
|
||||
}
|
||||
switch(data[7])
|
||||
{
|
||||
case 0x02: //<2F><><EFBFBD><EFBFBD> 2025-09-03 <20><>ȡ<EFBFBD><C8A1>M0<4D><30>
|
||||
Rs485CardInfo.Rs485CardFlag = 0x01;
|
||||
break;
|
||||
case 0x01: //<2F><><EFBFBD><EFBFBD> 2025-09-03 <20><>ȡ<EFBFBD><C8A1>M1<4D><31>
|
||||
Rs485CardInfo.Rs485CardFlag = 0x01;
|
||||
break;
|
||||
case 0x00: //<2F><><EFBFBD><EFBFBD>
|
||||
Rs485CardInfo.Rs485CardFlag = 0x00;
|
||||
break;
|
||||
default: //<2F><><EFBFBD><EFBFBD> 2025-09-26 <20>ϱ<EFBFBD>δ֪״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>仯
|
||||
//Rs485CardInfo.Rs485CardFlag = 0x00;
|
||||
break;
|
||||
}
|
||||
|
||||
Rs485CardInfo.Rs485CardType = data[8];
|
||||
|
||||
/*2025-08-04 <20>Ե<EFBFBD>һ<EFBFBD><D2BB>ͨѶ<CDA8><D1B6>ȡ״̬Ϊ<CCAC><CEAA>ʼ<EFBFBD><CABC>״̬<D7B4><CCAC><EFBFBD>Ҳ<EFBFBD>ִ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>*/
|
||||
if( (BUS_Public.port == Polling_Port) && (Rs485CardInfo.DevInitFlag == 0x00) )
|
||||
{
|
||||
Rs485CardInfo.DevInitFlag = 0x01;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD>ͨѶ %d %d %d",DevActionGlobal.DevActionU64Cond.EleState,Rs485CardInfo.Rs485CardType,Rs485CardInfo.Rs485CardTypeLast);
|
||||
|
||||
Rs485CardInfo.Rs485CardFlagLast = Rs485CardInfo.Rs485CardFlag;
|
||||
Rs485CardInfo.Rs485CardTypeLast = Rs485CardInfo.Rs485CardType;
|
||||
}
|
||||
}
|
||||
}
|
||||
else if(data[6] == 0x07)
|
||||
{
|
||||
Rs485CardInfo.DevPort_Flag = 0x00;
|
||||
}
|
||||
|
||||
/*<2A>忨ȡ<E5BFA8>綯<EFBFBD><E7B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
if( (Rs485CardInfo.DevInitFlag == 0x01)
|
||||
&& ( (Rs485CardInfo.Rs485CardFlag != Rs485CardInfo.Rs485CardFlagLast)
|
||||
|| (Rs485CardInfo.Rs485CardTypeLast != Rs485CardInfo.Rs485CardType) ) ) //<2F><>״̬<D7B4>Ƚ<EFBFBD>
|
||||
{
|
||||
Rs485CardInfo.Rs485CardFlagLast = Rs485CardInfo.Rs485CardFlag;
|
||||
Rs485CardInfo.Rs485CardTypeLast = Rs485CardInfo.Rs485CardType;
|
||||
|
||||
|
||||
DevActionGlobal.Rs485CardType = Rs485CardInfo.Rs485CardType;
|
||||
DevActionGlobal.CardState = Rs485CardInfo.Rs485CardFlag;
|
||||
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardFlag,SRAM_UDP_ELEReport_CardState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
SRAM_Write_Byte(Rs485CardInfo.Rs485CardType,SRAM_UDP_ELEReport_CardType); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
|
||||
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"485<EFBFBD>忨ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ仯<EFBFBD><EFBFBD>",data,len);
|
||||
|
||||
LOG_Device_COMM_ASK_TO_Reply_Record2(dev_addr+Dev_port,dev_addr+Dev_baud,(SysTick_1ms - Rs485CardInfo.inquire_tick),data,len);
|
||||
|
||||
DevActionGlobal.Devi = BUS_Public.DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
if(Rs485CardInfo.Rs485CardFlag == 0x01)
|
||||
{
|
||||
if(Rs485CardInfo.Rs485CardType != 0x00)
|
||||
{
|
||||
Rs485CardInfo.Rs485CardAction = 0x02 + Rs485CardInfo.Rs485CardType; //
|
||||
}else {
|
||||
Rs485CardInfo.Rs485CardAction = 0x01; //<2F>忨<EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}else {
|
||||
Rs485CardInfo.Rs485CardAction = 0x02; //<2F>ο<EFBFBD><CEBF>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>*/
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_BLV485_CARD_Online_Status
|
||||
* Description : <20><>ȡRS485<38>忨״̬
|
||||
* Input :
|
||||
* DevAddr - <20>豸<EFBFBD><E8B1B8>ַ
|
||||
* Return :
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Get_BLV485_CARD_Online_Status(uint32_t devaddr)
|
||||
{
|
||||
RS485_CARD_INFO Rs485CardInfo;
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.DevOffline == DEV_IS_ONLINE)
|
||||
{
|
||||
return 0x01;
|
||||
}
|
||||
return 0x02;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Rs485_Card_InType_Get
|
||||
* Description : <20>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||
* Input :
|
||||
* DevAddr - <20>豸<EFBFBD><E8B1B8>ַ
|
||||
* DevInputLoop - <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
* DevInputType - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
RS485_CARD_INFO Rs485CardInfo; //<2F>忨ȡ<E5BFA8><C8A1><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
||||
|
||||
if(Rs485CardInfo.Rs485CardAction == DevInputType)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",Rs485CardInfo.Rs485CardAction);
|
||||
Rs485CardInfo.Rs485CardAction = 0x00;
|
||||
Ret = CtrlValid;
|
||||
}
|
||||
|
||||
if(CtrlValid == Ret)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
561
BLV_485_Driver/blv_rs485_dev_ledctrl.c
Normal file
561
BLV_485_Driver/blv_rs485_dev_ledctrl.c
Normal file
@@ -0,0 +1,561 @@
|
||||
/*
|
||||
* blv_rs485_dev_ledctrl.c
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_rs485_dev_ledcrtl.h"
|
||||
#include "ch564.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include "blv_netcomm_function.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
|
||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, RS485_LED_INFO *Rs485LED, uint16_t LoopNum); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_DEV_PRO_FUN_01 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_05 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_06 ((DevFunP)NULL)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_RS485_LED_For_Logic_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_RS485_LED_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LED;
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&Rs485LED,0,sizeof(RS485_LED_INFO));
|
||||
|
||||
BUS_Public.addr = dev_info->addr; //<2F>豸485<38><35>ַ
|
||||
BUS_Public.type = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
BUS_Public.baud = dev_info->baud;; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>9600
|
||||
BUS_Public.retry_num = dev_info->retry; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = dev_info->writ_time; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
|
||||
BUS_Public.Protocol = dev_info->version;
|
||||
|
||||
Rs485LED.PWM_Set_Time=30;
|
||||
Rs485LED.RGB_Set_Time=30;
|
||||
Rs485LED.A8PB_Set_Time=30;
|
||||
Rs485LED.A9LD_Set_Time=30;
|
||||
Rs485LED.C12_Set_Time=30;
|
||||
|
||||
Rs485LED.Dim_Global_Value = 100;
|
||||
DevActionGlobal.DimGlobalValue = Rs485LED.Dim_Global_Value;
|
||||
DevActionGlobal.Dim_Upper_limit = 100;
|
||||
DevActionGlobal.Dim_Lower_limit = 0;
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_LED_Control_State;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = BLW_LED_Read_State;
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Output_Group_Ctrl = BLW_LED_Group_Ctrl;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr = BLW_LED_Group_Read;
|
||||
|
||||
Rs485LED.DevOffline = Rs485LED.DevOfflineLast = DEV_IS_LINEUNINIT; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>
|
||||
switch(BUS_Public.Protocol) //Э<><D0AD><EFBFBD>汾
|
||||
{
|
||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &Rs485LED, dev_info->output_num);break; //
|
||||
case ENUM_RS485_DEV_PRO_02: if(NULL!=RS485_DEV_PRO_FUN_02) RS485_DEV_PRO_FUN_02(&BUS_Public, &Rs485LED, dev_info->output_num);break; //
|
||||
case ENUM_RS485_DEV_PRO_03: if(NULL!=RS485_DEV_PRO_FUN_03) RS485_DEV_PRO_FUN_03(&BUS_Public, &Rs485LED, dev_info->output_num);break; //3
|
||||
case ENUM_RS485_DEV_PRO_04: if(NULL!=RS485_DEV_PRO_FUN_04) RS485_DEV_PRO_FUN_04(&BUS_Public, &Rs485LED, dev_info->output_num);break;
|
||||
case ENUM_RS485_DEV_PRO_05: if(NULL!=RS485_DEV_PRO_FUN_05) RS485_DEV_PRO_FUN_05(&BUS_Public, &Rs485LED, dev_info->output_num);break;
|
||||
case ENUM_RS485_DEV_PRO_06: if(NULL!=RS485_DEV_PRO_FUN_06) RS485_DEV_PRO_FUN_06(&BUS_Public, &Rs485LED, dev_info->output_num);break;
|
||||
default: return ; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD><EFBFBD>汾<EFBFBD>ڵ<EFBFBD><DAB5>豸ֱ<E8B1B8><D6B1><EFBFBD>˳<EFBFBD><CBB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
switch(dev_info->port)
|
||||
{
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_ACT_Device_To_List(&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||
Act485_Info.device_num += 1;
|
||||
break;
|
||||
case Polling_Port: //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Polling_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_POLL_Device_To_List(&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
Poll485_Info.device_num += 1;
|
||||
break;
|
||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
|
||||
BUS485_Info.device_num += 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LED_Control_State
|
||||
* Description : BLWLED<45><44><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>·
|
||||
start <20><>״̬
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t loop,uint16_t start)
|
||||
{
|
||||
uint8_t temp1 = 0;
|
||||
uint8_t CtrlMode; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t CtrlContect;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LED;
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(loop >= Rs485LED.LEDLoopValidNum) //<2F><>Ч<EFBFBD><D0A7>·
|
||||
{
|
||||
return ;
|
||||
}
|
||||
CtrlMode = start&0x00ff; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
CtrlContect = start>>8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
switch(CtrlMode)
|
||||
{
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Stop:
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up:
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down:
|
||||
Rs485LED.LEDLightnessReadFlag = 0x01; //Ψ<><CEA8>ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3>Żᷢ<C5BB>Ͷ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
Rs485LED.LEDLightnessReadCnt = BUS_Public.retry_num;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ:%d <20><>ȡ<EFBFBD><C8A1>־:%d", CtrlMode, Rs485LED.LEDLightnessReadFlag); //
|
||||
temp1++;
|
||||
break;
|
||||
}
|
||||
switch(CtrlMode)
|
||||
{
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleUp: //<2F><>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleDown:
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Stop:
|
||||
Rs485LED.DevCtrlWayBuf[loop] = CtrlMode; // - CFG_Dev_CtrlWay_Is_LED_START + 1
|
||||
Rs485LED.DevCtrlWayContect[loop] = CtrlContect; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
temp1++;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Open: //״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
case CFG_Dev_CtrlWay_Is_Close:
|
||||
|
||||
Rs485LED.DevSendBuf[loop] = CtrlContect; //<2F><><EFBFBD>ȸ<EFBFBD>ֵ
|
||||
temp1++;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Open: //<2F><><EFBFBD>俪
|
||||
if(0x00 != Rs485LED.LEDLightRelease[loop]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD>ֵ
|
||||
{
|
||||
CtrlContect = Rs485LED.LEDLightRelease[loop]; //<2F><> <20><>
|
||||
}else{
|
||||
CtrlContect = 0x64; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
Rs485LED.DevSendBuf[loop] = CtrlContect; //<2F><><EFBFBD>ȸ<EFBFBD>ֵ
|
||||
temp1++;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up: //<2F><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>
|
||||
if(Rs485LED.DevSendBuf[loop] + CtrlContect <= 100)
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] += CtrlContect;
|
||||
}
|
||||
else
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] = 100; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>100<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
temp1++;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down: //<2F><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD>
|
||||
if(Rs485LED.DevSendBuf[loop] >= CtrlContect)
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] -= CtrlContect;
|
||||
}
|
||||
else
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
}
|
||||
temp1++;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up_Limit: //<2F><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>
|
||||
if(0x00 != Rs485LED.DevSendBuf[loop])
|
||||
{
|
||||
if(Rs485LED.DevSendBuf[loop] + CtrlContect <= 100)
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] += CtrlContect;
|
||||
}
|
||||
else
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] = 100; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>100<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
temp1++;
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down_Limit: //<2F><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD>
|
||||
if(Rs485LED.DevSendBuf[loop] > CtrlContect)
|
||||
{
|
||||
Rs485LED.DevSendBuf[loop] -= CtrlContect;
|
||||
temp1++;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
if(temp1 != 0x00)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d",loop,start);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LED_Read_State
|
||||
* Description : BLWLED<45><44><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
loop <20><><EFBFBD><EFBFBD>·
|
||||
* Return : <20><>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Read_State(uint32_t devaddr,uint16_t loop)
|
||||
{
|
||||
if(devaddr == 0x00)
|
||||
return 0x00;
|
||||
|
||||
RS485_LED_INFO Rs485LED;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(loop >= Rs485LED.LEDLoopValidNum)
|
||||
{
|
||||
return 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ ֱ<>ӷ<EFBFBD><D3B7><EFBFBD>0
|
||||
}
|
||||
|
||||
return Rs485LED.DevSendBuf[loop];
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LED_Read_State
|
||||
* Description : BLWLED<45><44><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
* Return : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ - 0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Get_BLV485_LED_Online_Status(uint32_t devaddr)
|
||||
{
|
||||
RS485_LED_INFO Rs485LED;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(Rs485LED.DevOffline == DEV_IS_ONLINE)
|
||||
{
|
||||
return 0x01;
|
||||
}
|
||||
return 0x02;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_LED_Group_Ctrl
|
||||
* Description : BLW<4C>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
CtrlFlag<61><67><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־ <20><><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32·
|
||||
CtrlNum : <20><><EFBFBD>Ƶ<EFBFBD><C6B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start)
|
||||
{
|
||||
// uint8_t crc_val = 0;//,temp1 = 0;
|
||||
// uint1_t state; //0<><30> 1<><31>
|
||||
uint8_t i;
|
||||
uint8_t CtrlMode = 0,CtrlContect = 0;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LEDInfo;
|
||||
|
||||
if(devaddr == 0x00) return;
|
||||
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LED<45><44><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ؿ<EFBFBD><D8BF>ƿ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>־<EFBFBD><D6BE>%04X <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>%d ", CtrlFlag, CtrlNum);
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(CtrlNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||
{
|
||||
CtrlNum = Rs485LEDInfo.LEDLoopValidNum;
|
||||
}
|
||||
|
||||
for(i = 0; i < CtrlNum; i++)
|
||||
{
|
||||
if(CtrlFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA><EFBFBD><EFBFBD>
|
||||
{
|
||||
|
||||
CtrlMode = start[i]&0x00ff; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
CtrlContect = start[i]>>8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s <20><>·<EFBFBD><C2B7>%d<><64><EFBFBD><EFBFBD>:%04X ",__func__, i+1, start[i]);
|
||||
|
||||
switch(CtrlMode)
|
||||
{
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Stop: //Ψ<><CEA8>ֹͣ<CDA3><D6B9><EFBFBD>Żᷢ<C5BB>Ͷ<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
Rs485LEDInfo.LEDLightnessReadFlag = 0x01;
|
||||
Rs485LEDInfo.LEDLightnessReadCnt = BUS_Public.retry_num;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"ģʽ:%d<><64><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־:%d", CtrlMode, Rs485LEDInfo.LEDLightnessReadFlag); //
|
||||
break;
|
||||
}
|
||||
switch(CtrlMode)
|
||||
{
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleUp: //<2F><>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD>
|
||||
case CFG_Dev_CtrlWay_Is_Dim_CycleDown:
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Stop:
|
||||
Rs485LEDInfo.DevCtrlWayBuf[i] = CtrlMode;
|
||||
Rs485LEDInfo.DevCtrlWayContect[i] = CtrlContect; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Open: //״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
case CFG_Dev_CtrlWay_Is_Close:
|
||||
Rs485LEDInfo.DevSendBuf[i] = CtrlContect; //<2F><><EFBFBD>ȸ<EFBFBD>ֵ
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Open: //<2F><><EFBFBD>俪
|
||||
if(0x00 != Rs485LEDInfo.LEDLightRelease[i]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD>ֵ
|
||||
{
|
||||
CtrlContect = Rs485LEDInfo.LEDLightRelease[i]; //<2F><> <20><>
|
||||
}else{
|
||||
CtrlContect = 0x64; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
Rs485LEDInfo.DevSendBuf[i] = CtrlContect; //<2F><><EFBFBD>ȸ<EFBFBD>ֵ
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up: //<2F><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>
|
||||
if(Rs485LEDInfo.DevSendBuf[i] + CtrlContect <= 100)
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] += CtrlContect;
|
||||
}else
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] = 100; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>100<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down: //<2F><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD>
|
||||
if(Rs485LEDInfo.DevSendBuf[i] >= CtrlContect)
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] -= CtrlContect;
|
||||
}else{
|
||||
Rs485LEDInfo.DevSendBuf[i] = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up_Limit: //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD> <20><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(0x00 != Rs485LEDInfo.DevSendBuf[i])
|
||||
{
|
||||
if(Rs485LEDInfo.DevSendBuf[i] + CtrlContect <= 100)
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] += CtrlContect;
|
||||
}else{
|
||||
Rs485LEDInfo.DevSendBuf[i] = 100; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>100<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Down_Limit: //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD> <20><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(0x00 != Rs485LEDInfo.DevSendBuf[i])
|
||||
{
|
||||
if(Rs485LEDInfo.DevSendBuf[i] > CtrlContect)
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] -= CtrlContect;
|
||||
}else{
|
||||
Rs485LEDInfo.DevSendBuf[i] = 0x01; //2024-11-25
|
||||
}
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Up_Step_Cycle: //<2F>㰴ѭ<E3B0B4><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
switch(Rs485LEDInfo.LedUpDown[i])
|
||||
{
|
||||
case 0x00: //<2F><><EFBFBD><EFBFBD>
|
||||
if(Rs485LEDInfo.DevSendBuf[i] + CtrlContect < 100)
|
||||
{
|
||||
Rs485LEDInfo.DevSendBuf[i] += CtrlContect;
|
||||
}else{
|
||||
Rs485LEDInfo.LedUpDown[i] = 0x01;
|
||||
Rs485LEDInfo.DevSendBuf[i] = 100; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>100<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
break;
|
||||
case 0x01: //<2F><><EFBFBD><EFBFBD>
|
||||
Rs485LEDInfo.LedUpDown[i] = 0x00;
|
||||
Rs485LEDInfo.DevSendBuf[i] = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
break;
|
||||
default:
|
||||
Rs485LEDInfo.LedUpDown[i] = 0x00;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_PWM_Set_Time:
|
||||
Rs485LEDInfo.PWM_Set_Time=CtrlContect;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_A9LD_Set_Time:
|
||||
Rs485LEDInfo.A9LD_Set_Time=CtrlContect;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_A8PB_Set_Time:
|
||||
Rs485LEDInfo.A8PB_Set_Time=CtrlContect;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_C12_Set_Time:
|
||||
Rs485LEDInfo.C12_Set_Time=CtrlContect;
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_RGB_Set_Time:
|
||||
Rs485LEDInfo.RGB_Set_Time=CtrlContect;
|
||||
break;
|
||||
case Dim_Global_Value_Cmd:
|
||||
DevActionGlobal.DimGlobalValue = CtrlContect; //2025-08-22
|
||||
break;
|
||||
case Dim_UpLimit_Value_Cmd:
|
||||
DevActionGlobal.Dim_Upper_limit = CtrlContect; //2024-11-01 <20><><EFBFBD>ÿɵ<C3BF><C9B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ť<EFBFBD><C5A5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
|
||||
break;
|
||||
case Dim_DnLimit_Value_Cmd:
|
||||
DevActionGlobal.Dim_Lower_limit = CtrlContect; //2024-11-01 <20><><EFBFBD>ÿɵ<C3BF><C9B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ť<EFBFBD><C5A5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_C12Dimming_Group_Ctrl
|
||||
* Description : BLW<4C>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
* Input :
|
||||
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
CtrlFlag<61><67><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־ <20><><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>32·
|
||||
CtrlNum : <20><><EFBFBD>Ƶ<EFBFBD><C6B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ
|
||||
start <20><>״̬ 0x01<30><31> 0x02<30><32>
|
||||
* Return : <20><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> <20><><EFBFBD>ؿ<EFBFBD> <20><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ع<EFBFBD>
|
||||
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t Ret = 0x00;
|
||||
uint8_t CtrlMode = 0,CtrlContect = 0;
|
||||
uint8_t tempflag =0x00;
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_LED_INFO Rs485LEDInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(ReadNum >= Rs485LEDInfo.LEDLoopValidNum)
|
||||
{
|
||||
ReadNum = Rs485LEDInfo.LEDLoopValidNum;
|
||||
}
|
||||
|
||||
switch(SceneType)
|
||||
{
|
||||
case 0x01:
|
||||
for(i = 0; i < ReadNum; i++)
|
||||
{
|
||||
if(ReadFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA>ȡ<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
CtrlMode = start[i]&0x00ff; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
CtrlContect = start[i]>>8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22><><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>%d<><64><EFBFBD><EFBFBD>:%04X ", i+1, start[i]);
|
||||
|
||||
switch(CtrlMode)
|
||||
{
|
||||
case 0x01: //״̬<D7B4><CCAC>
|
||||
case 0x02: //״̬<D7B4><CCAC>
|
||||
if(Rs485LEDInfo.DevSendBuf[i] != CtrlContect)
|
||||
{
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
}
|
||||
break;
|
||||
case CFG_Dev_CtrlWay_Is_Dim_Open: //<2F><><EFBFBD>俪 <20><>ǰ״̬<D7B4>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if((0x00 != Rs485LEDInfo.LEDLightRelease[i]) && (Rs485LEDInfo.LEDLightRelease[i] != Rs485LEDInfo.DevSendBuf[i]))
|
||||
{
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
}
|
||||
else if((0x00 == Rs485LEDInfo.LEDLightRelease[i]) && (Rs485LEDInfo.DevSendBuf[i] != CtrlContect))
|
||||
{
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
case 0x02:
|
||||
for(i = 0; i < ReadNum; i++)
|
||||
{
|
||||
if(ReadFlag&(0x0001<<i)) //<2F><>0Ϊ<30><CEAA>ȡ<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
CtrlMode = start[i]&0x00ff; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
CtrlContect = start[i]>>8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<22><><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ض<EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>%d<><64><EFBFBD><EFBFBD>:%04X ", i+1, start[i]);
|
||||
|
||||
if(0x01 == CtrlMode) //״̬<D7B4><CCAC>
|
||||
{
|
||||
if(Rs485LEDInfo.DevSendBuf[i] == CtrlContect)
|
||||
{
|
||||
Ret = DEV_STATE_OPEN;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if(0x00 == Ret) //
|
||||
{
|
||||
switch(SceneType)
|
||||
{
|
||||
case 0x01:
|
||||
Ret = DEV_STATE_OPEN;
|
||||
break;
|
||||
case 0x02:
|
||||
Ret = DEV_STATE_CLOSE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
for(i = 0; i < ReadNum; i++)
|
||||
{
|
||||
if(Rs485LEDInfo.DevSaveBuf[i]!=Rs485LEDInfo.DevSendBuf[i])
|
||||
{
|
||||
Rs485LEDInfo.DevSaveBuf[i] = Rs485LEDInfo.DevSendBuf[i];
|
||||
if(Rs485LEDInfo.DevSendBuf[i]==0)
|
||||
{
|
||||
Udp_Addtion_Roomstate(DEV_RS485_PWM,BUS_Public.addr,i+1,((Rs485LEDInfo.DevSendBuf[i]<<8)|0x0002));
|
||||
}else{
|
||||
Udp_Addtion_Roomstate(DEV_RS485_PWM,BUS_Public.addr,i+1,((Rs485LEDInfo.DevSendBuf[i]<<8)|0x0001));
|
||||
}
|
||||
tempflag++;
|
||||
}
|
||||
}
|
||||
|
||||
if(tempflag!=0)
|
||||
{
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
|
||||
295
BLV_485_Driver/blv_rs485_dev_switchctrl.c
Normal file
295
BLV_485_Driver/blv_rs485_dev_switchctrl.c
Normal file
@@ -0,0 +1,295 @@
|
||||
/*
|
||||
* blv_rs485_dev_switchctrl.c
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_rs485_dev_switchctrl.h"
|
||||
#include "blv_rs485_dev_touchswitch.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, RS485_SWI_INFO *Rs485SwiInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
#define RS485_DEV_PRO_FUN_01 DevExistJudgge(RS485_Switch_Touch_Flag, BLV_485_Dev_Touch_Switch_Init) //((DevFunP)NULL) //T1<54><31><EFBFBD><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL)
|
||||
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_Switch_A9IO_Flag, BLV_485_Dev_A9IO_Switch_Init) //((DevFunP)NULL) //A9IO<49><4F><EFBFBD><EFBFBD>
|
||||
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL)
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_RS485_Switch_For_Logic_Init
|
||||
* Description : <20><><EFBFBD>س<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_RS485_Switch_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
|
||||
memset(&Rs485SwiInfo,0,sizeof(RS485_SWI_INFO));
|
||||
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s -%d",__func__,dev_info->addr);
|
||||
|
||||
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
BUS_Public.type = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
BUS_Public.baud = dev_info->baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.retry_num = 0x00; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUS_Public.wait_time = 100; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
// BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||
// BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||
|
||||
BUS_Public.Protocol = dev_info->version;
|
||||
|
||||
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_Swi_InType_Get;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Ctrl = Dev_Swi_Output_Ctrl;
|
||||
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = Dev_Swi_Loop_State;
|
||||
|
||||
if(dev_info->input_num >= Key_BUFF_Size) Rs485SwiInfo.SwtInputValidNum = Key_BUFF_Size;//<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
else Rs485SwiInfo.SwtInputValidNum = dev_info->input_num;
|
||||
|
||||
if(dev_info->output_num >= Key_BUFF_Size) Rs485SwiInfo.SwtOutputValidNum = Key_BUFF_Size;//<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
else Rs485SwiInfo.SwtOutputValidNum = dev_info->output_num;
|
||||
Rs485SwiInfo.DevOffline = Rs485SwiInfo.DevOfflineLast = DEV_IS_LINEUNINIT; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>
|
||||
switch(Rs485SwiInfo.SwtInputValidNum)
|
||||
{
|
||||
case 0x06: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ6
|
||||
Rs485SwiInfo.DevSendBuf[6] = 0x01; //<2F><EFBFBD><F2BFAAB1><EFBFBD>
|
||||
break;
|
||||
case 0x05:
|
||||
Rs485SwiInfo.DevSendBuf[5] = 0x01; //<2F><EFBFBD><F2BFAAB1><EFBFBD> /*5<><35><EFBFBD><EFBFBD><EFBFBD>أ<EFBFBD>6<EFBFBD><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>*/
|
||||
break;
|
||||
case 0x08: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8
|
||||
Rs485SwiInfo.DevSendBuf[8] = 0x01; //<2F><EFBFBD><F2BFAAB1><EFBFBD> /*8<><38><EFBFBD><EFBFBD><EFBFBD>أ<EFBFBD>9<EFBFBD><39><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>*/
|
||||
break;
|
||||
case 25: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ25
|
||||
Rs485SwiInfo.DevSendBuf[25] = 0x01; //<2F><EFBFBD><F2BFAAB1><EFBFBD>
|
||||
break;
|
||||
}
|
||||
|
||||
switch(BUS_Public.Protocol)
|
||||
{
|
||||
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &Rs485SwiInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_02: if(NULL!=RS485_DEV_PRO_FUN_02) RS485_DEV_PRO_FUN_02(&BUS_Public, &Rs485SwiInfo);break; //
|
||||
case ENUM_RS485_DEV_PRO_03: if(NULL!=RS485_DEV_PRO_FUN_03) RS485_DEV_PRO_FUN_03(&BUS_Public, &Rs485SwiInfo);break; //3
|
||||
case ENUM_RS485_DEV_PRO_04: if(NULL!=RS485_DEV_PRO_FUN_04) RS485_DEV_PRO_FUN_04(&BUS_Public, &Rs485SwiInfo);break;
|
||||
}
|
||||
|
||||
switch(dev_info->port)
|
||||
{
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_ACT_Device_To_List(&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||
Act485_Info.device_num += 1;
|
||||
break;
|
||||
case Polling_Port: //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
BUS_Public.port = Polling_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
|
||||
Add_POLL_Device_To_List(&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO)); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
Poll485_Info.device_num += 1;
|
||||
break;
|
||||
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_Switch_Online_Status
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Get_Switch_Online_Status(uint32_t devaddr)
|
||||
{
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(Rs485SwiInfo.DevOffline == DEV_IS_ONLINE)
|
||||
{
|
||||
return 0x01;
|
||||
}
|
||||
return 0x02;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Swi_InType_Get
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
* Input :
|
||||
* DevAddr - <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
* DevInputLoop - <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><>Χ1~RS_SWITCH_CH_MAX
|
||||
* DevInputType - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevInputLoop >= RS_SWITCH_CH_MAX)
|
||||
{
|
||||
return Ret;
|
||||
}
|
||||
|
||||
if((Rs485SwiInfo.MultiValidNo[DevInputLoop] > 0) && (Rs485SwiInfo.MultiValidNo[DevInputLoop] < 127)) //<2F><>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч 2024-05-23
|
||||
{
|
||||
Rs485SwiInfo.MultiNumber[DevInputLoop]++;
|
||||
|
||||
if(Rs485SwiInfo.MultiNumber[DevInputLoop] > Rs485SwiInfo.MultiValidNo[DevInputLoop]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
Rs485SwiInfo.MultiNumber[DevInputLoop] = 0x01;
|
||||
}
|
||||
}
|
||||
|
||||
if(DevInputType == Rs485SwiInfo.DevReadBuf[DevInputLoop])
|
||||
{
|
||||
Rs485SwiInfo.DevReadBuf[DevInputLoop] = KeyNoAction;
|
||||
|
||||
Ret = CtrlValid|(Rs485SwiInfo.MultiNumber[DevInputLoop]<<1);
|
||||
|
||||
if(Ret > 1)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",BUS_Public.addr,DevInputLoop,Rs485SwiInfo.MultiNumber[DevInputLoop]);
|
||||
}
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>%d",Ret);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Swi_Output_Ctrl
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
|
||||
* Input :
|
||||
* CfgDevAddIn -
|
||||
* DevInputAddr -
|
||||
* DevAddr -
|
||||
* DevOutputLoop
|
||||
* DevOutputType -
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t DevAddr, uint16_t DevOutputLoop, uint16_t DevOutputType)
|
||||
{
|
||||
uint8_t start = 0x00;
|
||||
uint8_t CtrlWay;
|
||||
// uint8_t val_check = 0;
|
||||
// uint16_t dev_datalen = 0x00;
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t KeepFlag = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
|
||||
if( (0x00000000 == DevAddr) || (0xFFFFFFFF == DevAddr) )
|
||||
{
|
||||
return ;
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
|
||||
{
|
||||
return ;
|
||||
}
|
||||
|
||||
CtrlWay = DevOutputType&0x00ff; //ȡ<><C8A1><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
switch(CtrlWay) //<2F><>Ϊ0
|
||||
{
|
||||
case 0x01:
|
||||
start = 0x01;
|
||||
if(DevOutputLoop == (Rs485SwiInfo.SwtOutputValidNum - 1))
|
||||
{
|
||||
DevActionGlobal.SleepMode_State = 0x00; //<2F>˳<EFBFBD>˯<EFBFBD><CBAF>ģʽ 2025-09-05
|
||||
DevActionGlobal.SleepLight_State = 0x01;
|
||||
}
|
||||
break;
|
||||
case 0x02:
|
||||
start = 0x00;
|
||||
if(DevOutputLoop == (Rs485SwiInfo.SwtOutputValidNum - 1))
|
||||
{
|
||||
DevActionGlobal.SleepMode_State = 0x01; //<2F><><EFBFBD><EFBFBD>˯<EFBFBD><CBAF>ģʽ 2025-09-05
|
||||
DevActionGlobal.SleepLight_State = 0x00;
|
||||
}
|
||||
break;
|
||||
case 0x04: //<2F><>˸
|
||||
start = Rs485SwiInfo.DevSendBuf[DevOutputLoop];
|
||||
if(0x01 == start)
|
||||
{
|
||||
start = 0x00;
|
||||
}
|
||||
else
|
||||
{
|
||||
start = 0x01;
|
||||
}
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD>ֵ,start:%d\r\n",start);
|
||||
break;
|
||||
default: return; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD>
|
||||
}
|
||||
|
||||
if(Rs485SwiInfo.DevSendBuf[DevOutputLoop] != start)//
|
||||
{
|
||||
Rs485SwiInfo.DevSendBuf[DevOutputLoop] = start;
|
||||
KeepFlag = 0x01;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d\r\n",DevOutputLoop,start);
|
||||
}
|
||||
|
||||
if(0x01 == KeepFlag)
|
||||
{
|
||||
if(Active_Port == BUS_Public.port)
|
||||
{
|
||||
BLV_Active_Set_List_Addr(DevAddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
|
||||
}
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
|
||||
}
|
||||
|
||||
// BLW_Touch_Switch_Feedback(DevAddr, DevOutputLoop, State);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_Swi_Loop_State
|
||||
* Description : ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·״̬<D7B4>õ<EFBFBD>
|
||||
* Input :
|
||||
* devaddr - <20><>ǰ<EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
|
||||
* DevOutputLoop - <20><>Ҫ<EFBFBD><D2AA><EFBFBD>ҵķ<D2B5><C4B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·
|
||||
* Return : <20><>·״̬<D7B4><CCAC><EFBFBD><EFBFBD> 1 <20><> 2<><32> 0Ϊ<30><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t Dev_Swi_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
|
||||
{
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(devaddr == 0x00) return 0x00;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),devaddr+Dev_Privately);
|
||||
|
||||
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
|
||||
{
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
if(Rs485SwiInfo.DevSendBuf[DevOutputLoop])
|
||||
{
|
||||
return 0x01;
|
||||
}else{
|
||||
return 0x02;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
1283
BLV_485_Driver/blv_rs485_dev_tempctrl.c
Normal file
1283
BLV_485_Driver/blv_rs485_dev_tempctrl.c
Normal file
File diff suppressed because it is too large
Load Diff
401
BLV_485_Driver/blv_rs485_dev_touchswitch.c
Normal file
401
BLV_485_Driver/blv_rs485_dev_touchswitch.c
Normal file
@@ -0,0 +1,401 @@
|
||||
/*
|
||||
* blv_rs485_dev_touchswitch.c
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "blv_rs485_dev_switchctrl.h" //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#include "blv_rs485_dev_touchswitch.h"
|
||||
#include "blv_nor_dev_hvoutfun.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "blv_netcomm_function.h"
|
||||
|
||||
#define RS485_TOUCH_INPUT_QUERY(data,x) (((data&(0x03<<((x%4)*2)))>>(x%4)*2)) //ÿ<><C3BF><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>λ
|
||||
|
||||
#define REPEATSENDTIMEMAX 0x03 //<2F><><EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLWTOUCHCTRLTIMEOUT 100 //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
#define BLWTOUCHASKTIMEOUT 10 //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
#define BLW_TOUCH_LOOPIN_NUM 26 //<2F><><EFBFBD>豸RS485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> 6
|
||||
#define BLW_TOUCH_LOOPOUT_NUM 26 //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> 7
|
||||
#define BLW_SWT_ASK_LEN_M 12 //(((BLW_TOUCH_LOOPOUT_NUM+7)/4)+3)
|
||||
#define BLW_SWT_BUF_LEN 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鳤<EFBFBD><E9B3A4>Ϊ5 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>16<31><36><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLW_SWT_BUF_LEN_M 8 //(((BLW_TOUCH_LOOPOUT_NUM+7)/8)+3)
|
||||
|
||||
#define Dev_TouchSwitch_RecvData_Len_Max 0x18
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BlwTouchSwtRecAsk
|
||||
* Description : 485<38>豸 - T1<54><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_485_Dev_Touch_Switch_Init(Device_Public_Information_G *BUS_Public, RS485_SWI_INFO *Rs485SwiInfo)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD>T1<EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ַ: %d",BUS_Public->addr);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BlwTouchSwtRecAsk
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
DevAdd : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
data : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
DataLen <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BlwRelaySwtRecAsk(uint8_t *data)
|
||||
{
|
||||
uint8_t SendBuf[5];
|
||||
uint32_t device_addr = 0x00;
|
||||
|
||||
device_addr = Find_AllDevice_List_Information2(Active_Port, 0x01, data[0]);
|
||||
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),device_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),device_addr+Dev_Privately);
|
||||
|
||||
if(DevHVoutInfo.HVSwitchFlag==0x01)
|
||||
{
|
||||
SendBuf[0] = data[0];
|
||||
SendBuf[1] = 0x04;
|
||||
SendBuf[2] = data[2];
|
||||
SendBuf[3] = data[3];
|
||||
SendBuf[4] = SOR_CRC(SendBuf,4);
|
||||
/*<2A><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
||||
MCU485_SendString(0x02,SendBuf,5);
|
||||
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"ǿ<>翪<EFBFBD>ػظ<D8BB><D8B8><EFBFBD><EFBFBD><EFBFBD>\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BlwTouchSwtRecAsk
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
DevAdd : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
data : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
DataLen <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BlwTouchSwtRecAsk(uint32_t DevAdd, uint8_t *data, uint16_t DataLen)
|
||||
{
|
||||
uint8_t SendBuf[BLW_SWT_ASK_LEN_M];
|
||||
uint8_t port_id = SRAM_Read_Byte(DevAdd+Dev_port);
|
||||
|
||||
if(DataLen > BLW_SWT_ASK_LEN_M)
|
||||
{
|
||||
return ;
|
||||
}
|
||||
memcpy(SendBuf, data, DataLen);
|
||||
|
||||
/*<2A><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
||||
MCU485_SendString(port_id,SendBuf,DataLen);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Touch_Rs485_Swi_Pro
|
||||
* Description : BLW_Touch<63><68><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
* Input :
|
||||
data_addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
Switch_Info : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLW_Touch_Rs485_Swi_Pro(Device_Public_Information_G* BUS_Public, uint8_t *data, RS485_SWI_INFO *Switch_Info, uint8_t lens)
|
||||
{
|
||||
uint8_t KeyValue = 0x00;
|
||||
uint8_t i;
|
||||
uint8_t temp = 0,temp2 = 0;
|
||||
uint8_t loopnum = 0x00;
|
||||
|
||||
if(Switch_Info->DevOffline == DEV_IS_OFFLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Dev_TouchSwitch LogInfo_Device_Online...........");
|
||||
LOG_Device_Online_Record(DEV_RS485_SWT,BUS_Public->addr,LogInfo_Device_Online); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
DevActionGlobal.OffLineDevType = 0xff;
|
||||
}
|
||||
|
||||
BLV_Communication_Record(&Switch_Info->comm_record,0x02,0x01); //<2F><>¼ͨѶ<CDA8>ɹ<EFBFBD>
|
||||
Switch_Info->DevSendCnt = 0x00; //<2F>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Switch_Info->DevOffline = DEV_IS_ONLINE; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
if(Switch_Info->DevOffline != Switch_Info->DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Switch_Info->DevOfflineLast = Switch_Info->DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public->type,BUS_Public->addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
|
||||
loopnum = (lens - 3) * 4; //<2F><>ȥ<EFBFBD><C8A5>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD> һ<><D2BB><EFBFBD>ֽڱ<D6BD>ʾ4<CABE><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 switch Input Num:%d",loopnum);
|
||||
|
||||
switch(data[1]) //<2F><>
|
||||
{
|
||||
case 0x03:
|
||||
for(i = 0; i < loopnum; i++) //6·<36><C2B7><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ֵ
|
||||
{
|
||||
temp = data[i/4+2]; //SRAM_Read_Byte(data_addr + (i/4+2));
|
||||
KeyValue = RS485_TOUCH_INPUT_QUERY(temp, i); //<2F>±<EFBFBD><C2B1><EFBFBD>2<EFBFBD><32>ʼ
|
||||
switch(KeyValue&0x03)
|
||||
{
|
||||
case 1:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"switch%d Dev%02X KeyPress Coord:%d",BUS_Public->addr, (i + 1), BUS_Public->DevCoord);
|
||||
Switch_Info->DevReadBuf[i] = KeyPress; //<2F><>ַ<EFBFBD><D6B7>1<EFBFBD><31>ʼ
|
||||
DevActionGlobal.Devi = BUS_Public->DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
temp2++;
|
||||
|
||||
Udp_Addtion_Roomstate(DEV_RS485_SWT,BUS_Public->addr,i,KeyPress);
|
||||
break;
|
||||
case 2:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"switch%d Dev%02X KeyRelease Coord:%d",BUS_Public->addr, (i + 1), BUS_Public->DevCoord);
|
||||
Switch_Info->DevReadBuf[i] = KeyRelease;
|
||||
DevActionGlobal.Devi = BUS_Public->DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
temp2++;
|
||||
|
||||
Udp_Addtion_Roomstate(DEV_RS485_SWT,BUS_Public->addr,i,KeyRelease);
|
||||
break;
|
||||
case 3:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"switch%d Dev%02X KeyHold Coord:%d",BUS_Public->addr, (i + 1), BUS_Public->DevCoord);
|
||||
Switch_Info->DevReadBuf[i] = KeyHold;
|
||||
DevActionGlobal.Devi = BUS_Public->DevCoord; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>
|
||||
temp2++;
|
||||
|
||||
Udp_Addtion_Roomstate(DEV_RS485_SWT,BUS_Public->addr,i,KeyHold);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
KeyValue = 0;
|
||||
}
|
||||
DevActionGlobal.People_Flag = 0x01;
|
||||
break;
|
||||
case 0x06:
|
||||
Switch_Info->SwtRelayLedCtrlFlag = 0x00;
|
||||
Switch_Info->SwtRelayLedCtrlCnt = REPEATSENDTIMEMAX;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#define RECDATALENMAX 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Rs485_Touch_Swi_Check
|
||||
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<38><35><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
* Return :
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32_t DevAdd ,uint32_t Data_addr, uint16_t DataLen)
|
||||
{
|
||||
uint8_t ret = 0x01;
|
||||
uint8_t data[RECDATALENMAX];
|
||||
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
if(DataLen > RECDATALENMAX)
|
||||
{
|
||||
//Dbg_Print(DBG_BIT_DEVICE_STATUS_bit,"Rs485_Touch<63><68><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!!\r\n");
|
||||
return ret; //<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff(data,DataLen,Data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||
|
||||
if((DataLen < 0x05)||((data[1] != 0x03)&&(data[1] != 0x06))||(data[DataLen - 1] != SOR_CRC(data, DataLen-1))) //ƥ<>俪<EFBFBD>ص<EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>Ǵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD>DevAdd:%d,len:%d",BUS_Public.addr,DataLen);
|
||||
return ret; //<2F><><EFBFBD>Ǿ<EFBFBD>ֱ<EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD>
|
||||
}
|
||||
|
||||
if(data[0] == SRAM_Read_Byte(DevAdd+Dev_Addr)) //<2F><>ַ<EFBFBD>պ<EFBFBD>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>BUS_Public.addr
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַƥ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> DevAdd:%d,len:%d",data[0],DataLen);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
}
|
||||
else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
|
||||
{
|
||||
DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
|
||||
if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
|
||||
{
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
}else{
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||
|
||||
if(data[1] == 0x03)
|
||||
{
|
||||
BlwRelaySwtRecAsk(data);
|
||||
}
|
||||
|
||||
if( (data[1] == 0x03) || (data[1] == 0x06) )
|
||||
{
|
||||
ret = 0x00;
|
||||
BLW_Touch_Rs485_Swi_Pro(&BUS_Public, data, &Rs485SwiInfo,DataLen);
|
||||
}
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,DataLen);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void BLW_Touch_Switch_ctrl(Device_Public_Information_G *BUS_Public, RS485_SWI_INFO *Rs485SwiInfo)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t SendLen;
|
||||
//<2F><>ַ <20><><EFBFBD><EFBFBD> <20>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
uint8_t BLW_swt_buf[BLW_SWT_BUF_LEN_M]; // = {0x01, 0x06, 0x00, 0x00, 0x00}; //<2F><><EFBFBD><EFBFBD>7<EFBFBD><37><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
BLW_swt_buf[0] = BUS_Public->addr;//SRAM_Read_Byte(DevAdd + Dev_Addr); //<2F><><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD>ص<EFBFBD>ת<EFBFBD><D7AA>
|
||||
BLW_swt_buf[1] = 0x06; //д
|
||||
BLW_swt_buf[2] = 0x00; //ָʾ<D6B8><CABE>
|
||||
BLW_swt_buf[3] = 0x00; //ָʾ<D6B8><CABE>
|
||||
|
||||
for(i = 0; i < Rs485SwiInfo->SwtOutputValidNum; i++)
|
||||
{
|
||||
if(0x00 != Rs485SwiInfo->DevSendBuf[i]) //<2F><>Ϊ0
|
||||
{
|
||||
BLW_swt_buf[2+i/8] |= 0x01<<(i%8);
|
||||
}else{
|
||||
BLW_swt_buf[2+i/8] &= ~(0x01<<(i%8));
|
||||
}
|
||||
}
|
||||
if(Rs485SwiInfo->SwtOutputValidNum <= 16)
|
||||
{
|
||||
SendLen = BLW_SWT_BUF_LEN;
|
||||
}else{
|
||||
SendLen = ((Rs485SwiInfo->SwtOutputValidNum+7)/8)+3; //<2F><><EFBFBD><EFBFBD>16·<36><C2B7><EFBFBD><EFBFBD>ʵ<EFBFBD>ʻ<EFBFBD>·<EFBFBD><C2B7>Ϊ
|
||||
}
|
||||
|
||||
BLW_swt_buf[SendLen-1] = SOR_CRC(BLW_swt_buf,SendLen-1);
|
||||
/*<2A><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
|
||||
//Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"switch send data---\r\n");
|
||||
MCU485_SendString(BUS_Public->port,BLW_swt_buf,SendLen);
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Send_Control_Record(BUS_Public->port,BUS_Public->baud,BLW_swt_buf,SendLen);
|
||||
|
||||
if(Rs485SwiInfo->DevSendCnt > REPEATSENDTIMEMAX)
|
||||
{
|
||||
if(Rs485SwiInfo->DevOffline != DEV_IS_OFFLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Dev_TouchSwitch LogInfo_Device_Offline.....");
|
||||
LOG_Device_Online_Record(DEV_RS485_SWT, BUS_Public->addr,LogInfo_Device_Offline); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
Rs485SwiInfo->DevOffline = DEV_IS_OFFLINE; //<2F><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
DevActionGlobal.OffLineDevType = BUS_Public->type; //2023-10-08
|
||||
DevActionGlobal.OffLineDevAddr = BUS_Public->addr; //2023-10-08
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"TouchSwitch Offline,type:%d addr:%d",BUS_Public->type,BUS_Public->addr);
|
||||
if(Rs485SwiInfo->DevOffline != Rs485SwiInfo->DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485SwiInfo->DevOfflineLast = Rs485SwiInfo->DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public->type,BUS_Public->addr,In_ErrFun_LineState,DEV_IS_OFFLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
}else{
|
||||
Rs485SwiInfo->DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLW_Touch_SwitchCycleDis
|
||||
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<38><35><EFBFBD>ݷ<EFBFBD><DDB7>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
|
||||
* Return :
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||
0x00<30><30>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_t DevAdd)
|
||||
{
|
||||
Device_Public_Information_G BUS_Public;
|
||||
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t i;
|
||||
uint8_t Ret = RS485OCCUPYNOTIME;
|
||||
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
|
||||
|
||||
if(DevActionGlobal.DevActionU64Cond.EleState==0x01)
|
||||
{
|
||||
if( DevActionGlobal.SleepMode_State == 0x01 )
|
||||
{
|
||||
Rs485SwiInfo.DevSendBuf[Rs485SwiInfo.SwtOutputValidNum-1] = 0x00; //˯<><CBAF>ģʽ<C4A3>ر<EFBFBD><D8B1><EFBFBD>
|
||||
}else{
|
||||
Rs485SwiInfo.DevSendBuf[Rs485SwiInfo.SwtOutputValidNum-1] = 0x01; //<2F>忨<EFBFBD><E5BFA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
else if(DevActionGlobal.DevActionU64Cond.EleState==0x02)
|
||||
{
|
||||
Rs485SwiInfo.DevSendBuf[Rs485SwiInfo.SwtOutputValidNum-1] = 0x00; //<2F>ο<EFBFBD><CEBF>ر<EFBFBD><D8B1><EFBFBD>
|
||||
}
|
||||
else
|
||||
{
|
||||
if( DevActionGlobal.SleepMode_State == 0x01 )
|
||||
{
|
||||
Rs485SwiInfo.DevSendBuf[Rs485SwiInfo.SwtOutputValidNum-1] = 0x00; //˯<><CBAF>ģʽ<C4A3>ر<EFBFBD><D8B1><EFBFBD>
|
||||
}else{
|
||||
Rs485SwiInfo.DevSendBuf[Rs485SwiInfo.SwtOutputValidNum-1] = 0x01;
|
||||
}
|
||||
}
|
||||
|
||||
/*<2A>ж<EFBFBD><D0B6>豸<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>*/
|
||||
for(i = 0; i < Rs485SwiInfo.SwtOutputValidNum; i++)
|
||||
{
|
||||
if(Rs485SwiInfo.DevSendBuf_last[i] != Rs485SwiInfo.DevSendBuf[i])
|
||||
{
|
||||
Rs485SwiInfo.SwtRelayLedCtrlFlag = 0x01;
|
||||
memcpy(Rs485SwiInfo.DevSendBuf_last, Rs485SwiInfo.DevSendBuf, Rs485SwiInfo.SwtOutputValidNum);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if(0x01 == Rs485SwiInfo.SwtRelayLedCtrlFlag)
|
||||
{
|
||||
if(0x00 != Rs485SwiInfo.SwtRelayLedCtrlCnt)
|
||||
{
|
||||
Rs485SwiInfo.SwtRelayLedCtrlCnt--;
|
||||
}else{
|
||||
Rs485SwiInfo.SwtRelayLedCtrlCnt = REPEATSENDTIMEMAX;
|
||||
Rs485SwiInfo.SwtRelayLedCtrlFlag = 0x00;
|
||||
}
|
||||
BLW_Touch_Switch_ctrl(&BUS_Public, &Rs485SwiInfo);
|
||||
Ret = RS485OCCUPYTIME;
|
||||
|
||||
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
|
||||
BLV_Communication_Record(&Rs485SwiInfo.comm_record,0x01,0x00);
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||
}
|
||||
|
||||
return Ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
514
BLV_485_Driver/blv_rs485_dev_touchtempt1.c
Normal file
514
BLV_485_Driver/blv_rs485_dev_touchtempt1.c
Normal file
@@ -0,0 +1,514 @@
|
||||
/*
|
||||
* blv_rs485_dev_touchtempt1.c
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> T1 <20><><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Created on: Nov 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_rs485_dev_touchtempt1.h"
|
||||
#include "blv_dev_action.h"
|
||||
#include "blv_device_type.h"
|
||||
#include "blv_device_option.h"
|
||||
#include "debug.h"
|
||||
#include "uart.h"
|
||||
#include "spi_sram.h"
|
||||
#include "check_fun.h"
|
||||
#include "log_api.h"
|
||||
#include "sram_mem_addr.h"
|
||||
#include "rtc.h"
|
||||
#include "ch564.h"
|
||||
|
||||
#include "blv_netcomm_function.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
|
||||
uint8_t BLWOut_TempT1CycleCtrl(uint32_t dev_addr);
|
||||
uint8_t BLWOut_Rs485_TempT1_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_RS485_TempT1_Data_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
|
||||
* Input :
|
||||
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_RS485_TempT1_Data_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLWOut_TempT1CycleCtrl;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLWOut_Rs485_TempT1_Check;
|
||||
Rs485TempT1->ValveSameFlag = 0x01; //<2F><><EFBFBD>ȷ<EFBFBD>һ<EFBFBD><D2BB> 2023-04-17
|
||||
Rs485TempT1->DevPort = Polling_Port; //2024-11-05 <20><>ѵ<EFBFBD>˿<EFBFBD><CBBF>豸
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_RS485_TempT1D_Data_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
|
||||
* Input :
|
||||
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_RS485_TempT1D_Data_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLWOut_TempT1CycleCtrl;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLWOut_Rs485_TempT1_Check;
|
||||
Rs485TempT1->ValveSameFlag = 0x02; //<2F><><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD>һ<EFBFBD><D2BB> 2023-04-17
|
||||
Rs485TempT1->DevPort = Polling_Port; //2024-11-05 <20><>ѵ<EFBFBD>˿<EFBFBD><CBBF>豸
|
||||
}
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_RS485_TempT1_Activ_Init
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
* Input :
|
||||
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
|
||||
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_RS485_TempT1_Activ_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1)
|
||||
{
|
||||
BUS_Public->polling_cf = (uint32_t)&BLWOut_TempT1CycleCtrl;
|
||||
BUS_Public->processing_cf = (uint32_t)&BLWOut_Rs485_TempT1_Check;
|
||||
Rs485TempT1->ValveSameFlag = 0x02; //<2F><><EFBFBD>ȷ<EFBFBD><C8B7><EFBFBD>һ<EFBFBD><D2BB> 2023-04-17
|
||||
Rs485TempT1->DevPort = Active_Port; //2024-11-05 <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF>豸
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_TempT1CycleCtrl
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_TempT1Ctrl(Device_Public_Information_G *BUS_Public,RS485_TEMP_INFO *Rs485Tem,uint8_t CtrlWay)
|
||||
{
|
||||
// ͷ LEN Type Addr <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||
uint8_t CtrlSend[10] = {0x55, 0x55, 0xee, 0x07, 0x03, 0x01, 0x00, 0x00};
|
||||
|
||||
CtrlSend[5] = BUS_Public->addr;
|
||||
|
||||
switch(CtrlWay)
|
||||
{
|
||||
case 0: //<2F><><EFBFBD>ػ<EFBFBD>
|
||||
CtrlSend[6] = 0x01;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s:<3A><><EFBFBD>ػ<EFBFBD>״̬:%d", __func__,Rs485Tem->TemStateCtrl.on_off);
|
||||
|
||||
switch(Rs485Tem->TemStateCtrl.on_off) //<2F><><EFBFBD>ػ<EFBFBD>
|
||||
{
|
||||
case TEMP_STATE_ON: //<2F><><EFBFBD><EFBFBD>
|
||||
CtrlSend[7] = 0x01;
|
||||
break;
|
||||
case TEMP_STATE_OFF: //<2F>ػ<EFBFBD>
|
||||
CtrlSend[7] = 0x00;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 1: //ģʽ
|
||||
CtrlSend[6] = 0x02;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s:ģʽ״̬:%d",__func__, Rs485Tem->TemStateCtrl.mode);
|
||||
switch(Rs485Tem->TemStateCtrl.mode)
|
||||
{
|
||||
case TEMP_COLD: CtrlSend[7] = 0x01; break; //<2F><>
|
||||
case TEMP_HOT: CtrlSend[7] = 0x02; break; //<2F><>
|
||||
case TEMP_WIND: CtrlSend[7] = 0x03; break; //ͨ<><CDA8>
|
||||
|
||||
}
|
||||
break;
|
||||
case 3: //<2F><><EFBFBD><EFBFBD>
|
||||
CtrlSend[6] = 0x04;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s:<3A><><EFBFBD><EFBFBD>״̬:%d", __func__,Rs485Tem->TemStateCtrl.fan);
|
||||
switch(Rs485Tem->TemStateCtrl.fan)
|
||||
{
|
||||
// case 0: CtrlSend[5] = 0x03; break; //ֹͣ
|
||||
case TEMP_LOW: CtrlSend[7] = 0x03; break; //<2F><><EFBFBD><EFBFBD>
|
||||
case TEMP_MID: CtrlSend[7] = 0x02; break; //<2F><><EFBFBD><EFBFBD>
|
||||
case TEMP_HIGH: CtrlSend[7] = 0x01; break; //<2F><><EFBFBD><EFBFBD>
|
||||
case TEMP_FANAUTO: CtrlSend[7] = 0x00; break; //<2F>Զ<EFBFBD>
|
||||
}
|
||||
break;
|
||||
case 2: //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
CtrlSend[6] = 0x03;
|
||||
CtrlSend[7] = TEMTEMPCONVER(Rs485Tem->TemStateCtrl.set_t); //
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s:<3A>¶<EFBFBD>:%d", __func__,CtrlSend[7]);
|
||||
break;
|
||||
}
|
||||
|
||||
NetCRC16(&CtrlSend[3],7);
|
||||
Rs485Tem->DevOffline = DEV_IS_LINEUNINIT; //<2F>豸״̬δȷ<CEB4><C8B7>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
MCU485_SendString(BUS_Public->port,CtrlSend,10);
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Send_Control_Record(BUS_Public->port,BUS_Public->baud,CtrlSend,10);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_tempCycle
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_tempT1Cycle(Device_Public_Information_G *BUS_Public)
|
||||
{
|
||||
// ͷ LEN Type Addr CMD
|
||||
uint8_t t_send[9] = {0x55, 0x55, 0xEE, 0x06, 0x03, 0x01, 0x0A}; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>
|
||||
|
||||
t_send[5] = BUS_Public->addr; // SRAM_Read_Byte(dev_addr+Dev_Addr);
|
||||
|
||||
NetCRC16(&t_send[3],6);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
MCU485_SendString(BUS_Public->port,t_send,9);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_tempT1CardCtrl
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD>忨״̬ͬ<CCAC><CDAC><EFBFBD><EFBFBD><EFBFBD>ܷ<EFBFBD><DCB7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLWOut_tempT1CardCtrl(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485Tem)
|
||||
{
|
||||
// ͷ LEN Type Addr CMD
|
||||
uint8_t t_send[10] = {0x55, 0x55, 0xEE, 0x07, 0x03, 0x01, 0x11 , 0x00 ,0x00, 0x00}; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>
|
||||
|
||||
t_send[5] = BUS_Public->addr;
|
||||
t_send[7] = Rs485Tem->CardEn;
|
||||
|
||||
NetCRC16(&t_send[3],7);
|
||||
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"BLWOut_tempT1CardCtrl",t_send,10);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
MCU485_SendString(BUS_Public->port,t_send,10);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_T1Temp_PortSet_Send
|
||||
* Description : BLV T1<54>¿ض˿<D8B6><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_T1Temp_PortSet_Send(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485Tem)
|
||||
{
|
||||
// ͷ LEN Type Addr CMD
|
||||
uint8_t t_send[10] = {0x55, 0x55, 0xEE, 0x07, 0x03, 0x01, 0x12 , 0x00 ,0x00, 0x00}; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>
|
||||
|
||||
t_send[5] = BUS_Public->addr;
|
||||
t_send[7] = Rs485Tem->DevPort;
|
||||
|
||||
NetCRC16(&t_send[3],7);
|
||||
|
||||
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"BLV_T1Temp_PortSet_Send",t_send,10);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
MCU485_SendString(BUS_Public->port,t_send,10);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_TempT1CycleCtrl
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLWOut_TempT1CycleCtrl(uint32_t dev_addr)
|
||||
{
|
||||
return TemSingleJudge(dev_addr, BLWOut_TempT1Ctrl, BLWOut_tempT1Cycle);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_TempT1CtrDataProc
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLWOut_TempT1CtrDataProc(Device_Public_Information_G* BUS_Public, uint8_t *data, RS485_TEMP_INFO *Rs485Tem)
|
||||
{
|
||||
RS485_TEMP_BASIC Rs485TemRecBuf; //<2F><><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ洢<DAB4>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t temp = 0;
|
||||
|
||||
switch(data[4])
|
||||
{
|
||||
case 0x01: //<2F><><EFBFBD><EFBFBD>
|
||||
Rs485TemRecBuf.TemState.on_off = TEMP_STATE_ON;
|
||||
break;
|
||||
case 0x00: //<2F>ػ<EFBFBD>
|
||||
Rs485TemRecBuf.TemState.on_off = TEMP_STATE_OFF;
|
||||
break;
|
||||
}
|
||||
|
||||
switch(data[6])
|
||||
{
|
||||
case 1: //<2F><><EFBFBD><EFBFBD>
|
||||
Rs485TemRecBuf.TemState.mode = TEMP_COLD;
|
||||
break;
|
||||
case 2: //<2F><><EFBFBD><EFBFBD>
|
||||
Rs485TemRecBuf.TemState.mode = TEMP_HOT;
|
||||
break;
|
||||
case 3: //<2F>ͷ<EFBFBD>
|
||||
Rs485TemRecBuf.TemState.mode = TEMP_WIND;
|
||||
break;
|
||||
}
|
||||
Rs485TemRecBuf.TemState.set_t = data[7];
|
||||
switch(data[10])
|
||||
{
|
||||
case 1:
|
||||
Rs485TemRecBuf.TemState.fan = TEMP_HIGH;
|
||||
break; //<2F><><EFBFBD><EFBFBD>
|
||||
case 2:
|
||||
Rs485TemRecBuf.TemState.fan = TEMP_MID;
|
||||
break; //<2F><><EFBFBD><EFBFBD>
|
||||
case 3:
|
||||
Rs485TemRecBuf.TemState.fan = TEMP_LOW;
|
||||
break; //<2F><><EFBFBD><EFBFBD>
|
||||
case 0:
|
||||
Rs485TemRecBuf.TemState.fan = TEMP_FANAUTO;
|
||||
break; //<2F>Զ<EFBFBD>
|
||||
}
|
||||
|
||||
|
||||
if((data[13] & 0x08)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>||(temp & 0x10)
|
||||
{
|
||||
Rs485TemRecBuf.TemState.valve = TEMP_VALVE_OPEN;
|
||||
}else{
|
||||
Rs485TemRecBuf.TemState.valve = TEMP_VALVE_CLOSE; //<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
if(0x00 != (data[13]&0x07)) //<2F><>0 <20>Ͱ<EFBFBD><CDB0>ն<EFBFBD><D5B6><EFBFBD>ȥ<EFBFBD><C8A5>
|
||||
{
|
||||
Rs485TemRecBuf.FanAutoRelay = (data[13]&0x07); //<2F>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ٻ<EFBFBD><D9BB>õ<EFBFBD> ֻ<><D6BB>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
|
||||
}else{
|
||||
Rs485TemRecBuf.FanAutoRelay = 0x00; //<2F><>֧<EFBFBD><D6A7><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
Rs485TemRecBuf.TemState.indoor_t = data[17];//SRAM_Read_Byte(data_addr + 17); //
|
||||
|
||||
if((Rs485TemRecBuf.TemState.on_off != Rs485Tem->TemState.on_off) || (Rs485TemRecBuf.TemState.mode != Rs485Tem->TemState.mode) ||
|
||||
(Rs485TemRecBuf.TemState.fan != Rs485Tem->TemState.fan) || (Rs485TemRecBuf.TemState.valve != Rs485Tem->TemState.valve)||
|
||||
(Rs485TemRecBuf.FanAutoRelay != Rs485Tem->FanAutoRelay) ||
|
||||
(Rs485TemRecBuf.TemState.set_t != Rs485Tem->TemState.set_t)||(Rs485TemRecBuf.TemState.indoor_t != Rs485Tem->TemState.indoor_t))//<2F><><EFBFBD>ػ<EFBFBD> ģʽ <20>¶<EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD><C2B6>봢<EFBFBD><EBB4A2><EFBFBD>IJ<EFBFBD>һ<EFBFBD><D2BB>
|
||||
{
|
||||
|
||||
Temp_Action_Set(&Rs485TemRecBuf, Rs485Tem); //ͬ<><CDAC>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d ״̬<D7B4><CCAC>", BUS_Public->addr); //
|
||||
switch(Rs485Tem->TemState.on_off)
|
||||
{
|
||||
case TEMP_STATE_OFF:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>ػ<EFBFBD>");
|
||||
break;
|
||||
case TEMP_STATE_ON:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
}
|
||||
switch(Rs485Tem->TemState.mode)
|
||||
{
|
||||
case 0x01:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
case 0x02:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
case 0x03:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>ͷ<EFBFBD>");
|
||||
break;
|
||||
}
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Rs485Tem->FanAutoRelay);
|
||||
|
||||
switch(Rs485Tem->TemState.fan)
|
||||
{
|
||||
case 0x00:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>Զ<EFBFBD>");
|
||||
break;
|
||||
case 0x01:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
case 0x02:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
case 0x03:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
}
|
||||
switch(Rs485Tem->TemState.valve)
|
||||
{
|
||||
case TEMP_VALVE_OPEN:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
case TEMP_VALVE_CLOSE:
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||
break;
|
||||
}
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>:%d <20><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>:%d\r\n",Rs485Tem->TemState.set_t,Rs485TemRecBuf.TemState.indoor_t);
|
||||
|
||||
temp++;
|
||||
}
|
||||
|
||||
if(Rs485Tem->TemState.on_off == Rs485Tem->control_start) //<2F><><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>Ƴɹ<C6B3><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD>־");
|
||||
Rs485Tem->control_start = 0xFF;
|
||||
|
||||
temp++;
|
||||
}
|
||||
|
||||
/*<2A>ȶԷ<C8B6><D4B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>״̬ - <20>Ƿ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>־
|
||||
2025-10-13 <20><EFBFBD>
|
||||
1<><31>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>仯<EFBFBD><E4BBAF><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¶ȱ仯<C8B1><E4BBAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
||||
2<><32><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹͣ<CDA3><D6B9>30S<30><53><EFBFBD><EFBFBD><EFBFBD>ٽ<EFBFBD><D9BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
||||
*/
|
||||
if( (Rs485Tem->TemStateLast.on_off != Rs485Tem->TemState.on_off) \
|
||||
|| (Rs485Tem->TemStateLast.mode != Rs485Tem->TemState.mode) \
|
||||
|| (Rs485Tem->TemStateLast.fan != Rs485Tem->TemState.fan) \
|
||||
|| (Rs485Tem->TemStateLast.valve != Rs485Tem->TemState.valve) \
|
||||
|| (Rs485Tem->TemStateLast.set_t != Rs485Tem->TemState.set_t) )
|
||||
{
|
||||
Dev_Temp_State_Sync(&Rs485Tem->TemStateLast,&Rs485Tem->TemState);
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>:%04x",Dev_Temp_State_Data(Rs485Tem->TemState));
|
||||
|
||||
Rs485Tem->udp_flag = 0x01;
|
||||
Rs485Tem->udp_tick = SysTick_1ms;
|
||||
temp++;
|
||||
}
|
||||
|
||||
if(Rs485Tem->udp_flag == 0x01)
|
||||
{
|
||||
if( SysTick_1ms - Rs485Tem->udp_tick >= 30000)
|
||||
{
|
||||
Rs485Tem->udp_tick = SysTick_1ms;
|
||||
Rs485Tem->udp_flag = 0x00;
|
||||
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>־:%04x",Dev_Temp_State_Data(Rs485Tem->TemStateLast));
|
||||
|
||||
temp++;
|
||||
//д<><D0B4><EFBFBD><EFBFBD>־
|
||||
Udp_Addtion_Roomstate(DEV_RS485_TEMP,BUS_Public->addr,0x0000,Dev_Temp_State_Data(Rs485Tem->TemStateLast));
|
||||
}
|
||||
}
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
#define RECDATALENMAX 24 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLWOut_Rs485_Tem_Check
|
||||
* Description : BLWOut<75>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
|
||||
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint8_t temp_1 = 0;
|
||||
uint8_t rev = 0x01;
|
||||
|
||||
uint8_t data[RECDATALENMAX];
|
||||
uint16_t crc_val = 0;
|
||||
RS485_TEMP_INFO Rs485TempT1;
|
||||
Device_Public_Information_G BUS_Public;
|
||||
|
||||
memset(data,0x00,RECDATALENMAX);
|
||||
|
||||
if(len > RECDATALENMAX)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 Temp <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!!\r\n");
|
||||
return rev; //<2F><><EFBFBD><EFBFBD>
|
||||
}
|
||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
|
||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
||||
|
||||
if(len < 6) return rev;
|
||||
|
||||
if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee) || (len != data[3] + 0x03) || (0x03 != data[4]) ||BUS_Public.addr!=data[5] )
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s Addr:%d Check Error",__func__,BUS_Public.addr);
|
||||
return rev;
|
||||
}
|
||||
crc_val = data[len-2] + (data[len-1]<<8);
|
||||
|
||||
if(crc_val == NetCRC16_2(&data[3],len - 5))
|
||||
{
|
||||
rev = 0x00;
|
||||
|
||||
if(Rs485TempT1.DevOffline != DEV_IS_ONLINE)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Rs485TempT1 LogInfo_Device_Online...........");
|
||||
LOG_Device_Online_Record(DEV_RS485_TEMP,BUS_Public.addr,LogInfo_Device_Online); //<2F><>¼<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}
|
||||
BLV_Communication_Record(&Rs485TempT1.comm_record,0x02,0x01); //<2F><>¼ͨѶ<CDA8>ɹ<EFBFBD>
|
||||
Rs485TempT1.DevSendCnt = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
|
||||
|
||||
switch(data[3]) //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
case 0x15://<2F><>ѯ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
Rs485TempT1.DevOffline = DEV_IS_ONLINE; //Ψ<><CEA8><EFBFBD><EFBFBD>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
if(Rs485TempT1.DevOffline != Rs485TempT1.DevOfflineLast) //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
{
|
||||
Rs485TempT1.DevOfflineLast = Rs485TempT1.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
|
||||
}
|
||||
temp_1 = BLWOut_TempT1CtrDataProc(&BUS_Public, &data[3], &Rs485TempT1);
|
||||
if(temp_1 != 0x00) //<2F><>ѯ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б仯
|
||||
{
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"BLV Rs485 TempT1 Reply Change");
|
||||
LOG_Device_COMM_ASK_TO_Reply_Record(BUS_Public.port, BUS_Public.baud,(SysTick_1ms - Rs485TempT1.inquire_tick),data,len);
|
||||
}
|
||||
if(BUS_Public.port == Active_Port) //2024-11-26
|
||||
{
|
||||
BLWOut_tempT1Cycle(&BUS_Public);
|
||||
}
|
||||
break;
|
||||
case 0x07: //<2F><><EFBFBD>ƿ<EFBFBD><C6BF>ػ<EFBFBD>
|
||||
switch(data[6]) //SRAM_Read_Byte(data_addr + 6)
|
||||
{
|
||||
case 0x01: //<2F><><EFBFBD>ػ<EFBFBD><D8BB>ظ<EFBFBD>
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ػ<EFBFBD><D8BB>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>忪<EFBFBD>ػ<EFBFBD><D8BB><EFBFBD><EFBFBD>Ʊ<EFBFBD>־", BUS_Public.addr);
|
||||
Rs485TempT1.TemStateCtrlFlag.TemOnOffCtrlVar = 0x00; //<2F><><EFBFBD>տ<EFBFBD><D5BF>ػ<EFBFBD><D8BB><EFBFBD><EFBFBD>Ʊ<EFBFBD>־
|
||||
break;
|
||||
case 0x02: //ģʽ
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD>ģʽ<C4A3>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>Ʊ<EFBFBD>־", BUS_Public.addr);
|
||||
Rs485TempT1.TemStateCtrlFlag.TemModeCtrlVar = 0x00; //<2F><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD>Ʊ<EFBFBD>־
|
||||
break;
|
||||
case 0x04: //<2F><><EFBFBD><EFBFBD>
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ٻظ<D9BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٿ<EFBFBD><D9BF>Ʊ<EFBFBD>־", BUS_Public.addr);
|
||||
Rs485TempT1.TemStateCtrlFlag.TemFanCtrlVar = 0x00; //<2F><><EFBFBD>շ<EFBFBD><D5B7>ٿ<EFBFBD><D9BF>Ʊ<EFBFBD>־
|
||||
break;
|
||||
case 0x03: //<2F>¶<EFBFBD>
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD><D5B5>¶Ȼظ<C8BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD><C2B6><EFBFBD><EFBFBD>ñ<EFBFBD>־", BUS_Public.addr);
|
||||
Rs485TempT1.TemStateCtrlFlag.TemSetTCtrlVar = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶ȿ<C2B6><C8BF>Ʊ<EFBFBD>־
|
||||
break;
|
||||
case 0x11:
|
||||
Rs485TempT1.CardFlag = 0x00;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD><D5B5>忨״̬<D7B4><CCAC><EFBFBD>ûظ<C3BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־", BUS_Public.addr);
|
||||
break;
|
||||
case 0x12:
|
||||
Rs485TempT1.DevPort_Flag = 0x00;
|
||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>:%d <20>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ö˿<C3B6><CBBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ûظ<C3BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־", BUS_Public.addr);
|
||||
break;
|
||||
}
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE>¼*/
|
||||
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port, BUS_Public.baud,data,len);
|
||||
break;
|
||||
}
|
||||
|
||||
BUS_Public.check = 0x00;
|
||||
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
|
||||
}
|
||||
|
||||
return rev;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
192
BLV_485_Driver/inc/blv_bus_dev_c5iofun.h
Normal file
192
BLV_485_Driver/inc/blv_bus_dev_c5iofun.h
Normal file
@@ -0,0 +1,192 @@
|
||||
/*
|
||||
* blv_bus_dev_c5iofun.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_BUS_DEV_C5IOFUN_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_BUS_DEV_C5IOFUN_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "ch564.h"
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define C5IOTYPE 0xF1 //C5IO<49>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>BLV_BUSЭ<53><D0AD>ͨѶʹ<D1B6><CAB9>
|
||||
#define DEV_C5IO_Type 0xF1 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>б<EFBFBD><D0B1>е<EFBFBD><D0B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#define C5IO_REPEATSENDTIMEMAX 0x02 //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C5IO_SEND_WAIT_TIME 0x28 //<2F>ȴ<EFBFBD>ʱ<EFBFBD><CAB1> 2024-02-23
|
||||
|
||||
#define C5IO_RecvData_Len_MAX 0x28 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>Ŀǰ<C4BF>30Byte
|
||||
|
||||
#define BLV_C5IO_Inquire_CMD 0x20
|
||||
#define BLV_C5IO_Set_Relay_CMD 0x21
|
||||
#define BLV_C5IO_Set_Relay_Inching_CMD 0x22
|
||||
#define BLV_C5IO_Set_Do_CMD 0x23
|
||||
#define BLV_C5IO_Set_Do_Inching_CMD 0x24
|
||||
#define BLV_C5IO_Set_Di_CMD 0x25
|
||||
#define BLV_C5IO_SetRTC_CMD 0x27
|
||||
#define BLV_C5IO_Reply_CMD 0xA0
|
||||
|
||||
#define BLV_C5IO_Reply_Result 0x00
|
||||
#define BLV_C5IO_Relay_Result 0x01
|
||||
#define BLV_C5IO_Relay_Inching_Result 0x02
|
||||
#define BLV_C5IO_Do_Result 0x03
|
||||
#define BLV_C5IO_Do_Inching_Result 0x04
|
||||
#define BLV_C5IO_Di_Result 0x05
|
||||
#define BLV_C5IO_Error_Result 0xF0
|
||||
|
||||
#define BUS_C5IO_DI_Key_Type 0x01 //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BUS_C5IO_DI_Pir_Type 0x02 //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - PIR<49><52><EFBFBD><EFBFBD>
|
||||
#define BUS_C5IO_DI_Dry_Type 0x03 //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>ɽӵ<C9BD>
|
||||
#define BUS_C5IO_DI_Level_HIGH 0x20 //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>ߵ<EFBFBD>ƽ
|
||||
#define BUS_C5IO_DI_Level_LOW 0x10 //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>͵<EFBFBD>ƽ
|
||||
|
||||
#define BUS_C5IO_DO_Common_Mode 0x00 //DO<44><4F><EFBFBD><EFBFBD>ģʽ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
#define BUS_C5IO_DO_Inching_Mode 0x01 //DO<44><4F><EFBFBD><EFBFBD>ģʽ - <20>㶯<EFBFBD><E3B6AF><EFBFBD><EFBFBD>ģʽ
|
||||
#define BUS_C5IO_OUT_LOW 0x01
|
||||
#define BUS_C5IO_OUT_HIGH 0x02
|
||||
#define BUS_C5IO_OUT_TOGGLE 0x03
|
||||
#define BUS_C5IO_Right_Inching 0x01
|
||||
#define BUS_C5IO_Reverse_Inching 0x02
|
||||
#define BUS_C5IO_Toggle_Inching 0x03
|
||||
|
||||
typedef enum{
|
||||
C5IO_Relay_CH1,
|
||||
C5IO_Relay_CH2,
|
||||
C5IO_Relay_CH3,
|
||||
C5IO_Relay_CH4,
|
||||
C5IO_Relay_CH5,
|
||||
C5IO_Relay_CH6,
|
||||
C5IO_Relay_CH7,
|
||||
C5IO_Relay_CH8,
|
||||
C5IO_Relay_CH9,
|
||||
C5IO_Relay_CH10,
|
||||
C5IO_Relay_CH11,
|
||||
C5IO_Relay_CH12,
|
||||
C5IO_Relay_CH13,
|
||||
C5IO_Relay_CH14,
|
||||
C5IO_Relay_CH15,
|
||||
C5IO_Relay_CH16,
|
||||
C5IO_Relay_CH17,
|
||||
C5IO_Relay_CH18,
|
||||
C5IO_Relay_CH19,
|
||||
C5IO_Relay_CH20,
|
||||
C5IO_Relay_CH21,
|
||||
C5IO_Relay_CH22,
|
||||
C5IO_Relay_CH23,
|
||||
C5IO_Relay_CH24,
|
||||
C5IO_Relay_CH_MAX,
|
||||
}BUS_C5IO_RELAY_NUM_E;
|
||||
|
||||
typedef enum{
|
||||
C5IO_DO_CH1,
|
||||
C5IO_DO_CH2,
|
||||
C5IO_DO_CH3,
|
||||
C5IO_DO_CH4,
|
||||
C5IO_DO_CH5,
|
||||
C5IO_DO_CH_MAX,
|
||||
}BUS_C5IO_DO_NUM_E;
|
||||
|
||||
typedef enum{
|
||||
C5IO_DI_CH1,
|
||||
C5IO_DI_CH2,
|
||||
C5IO_DI_CH3,
|
||||
C5IO_DI_CH4,
|
||||
C5IO_DI_CH5,
|
||||
C5IO_DI_CH6,
|
||||
C5IO_DI_CH7,
|
||||
C5IO_DI_CH8,
|
||||
C5IO_DI_CH9,
|
||||
C5IO_DI_CH10,
|
||||
C5IO_DI_CH11,
|
||||
C5IO_DI_CH12,
|
||||
C5IO_DI_CH13,
|
||||
C5IO_DI_CH_MAX,
|
||||
}BUS_C5IO_DI_NUM_E;
|
||||
|
||||
typedef struct{
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
uint8_t DO_Mode[C5IO_DO_CH_MAX]; //DO<44><4F><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t DO_Control[C5IO_DO_CH_MAX]; //Do<44><6F><EFBFBD><EFBFBD>
|
||||
uint16_t Last_DO_Level_Start; //֮ǰDOʵ<4F>ʵ<EFBFBD>ƽ״̬
|
||||
uint16_t DO_Level_Actual_Start; //DOʵ<4F>ʵ<EFBFBD>ƽ״̬
|
||||
uint16_t DO_Level_Perfect_Start; //DO<44><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ״̬
|
||||
uint16_t DO_Inching_Tick[C5IO_DO_CH_MAX]; //DO<44>㶯ʱ<E3B6AF><CAB1><EFBFBD><EFBFBD>
|
||||
uint16_t DO_Inching_Time[C5IO_DO_CH_MAX]; //DO<44>㶯ʱ<E3B6AF><CAB1>
|
||||
|
||||
uint8_t Relay_Mode[C5IO_Relay_CH_MAX]; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t Relay_Control[C5IO_Relay_CH_MAX]; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t Last_Relay_Level_Start; //֮ǰ<D6AE>̵<EFBFBD><CCB5><EFBFBD>ʵ<EFBFBD>ʵ<EFBFBD>ƽ״̬
|
||||
uint32_t Relay_Level_Actual_Start; //<2F>̵<EFBFBD><CCB5><EFBFBD>ʵ<EFBFBD><CAB5>״̬
|
||||
uint32_t Relay_Level_Perfect_Start; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
uint16_t Relay_Inching_Tick[C5IO_Relay_CH_MAX]; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>㶯ʱ<E3B6AF><CAB1><EFBFBD><EFBFBD>
|
||||
uint16_t Relay_Inching_Time[C5IO_Relay_CH_MAX]; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>㶯ʱ<E3B6AF><CAB1>
|
||||
uint8_t Relay_feedback; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint8_t DI_Type[C5IO_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0~3:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4~7:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ
|
||||
uint16_t DI_Level_Actual_Start;
|
||||
uint32_t DI_Actual_State;
|
||||
uint32_t DI_Perfect_State;
|
||||
uint8_t DI_Start[C5IO_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD>״̬
|
||||
uint8_t DI_LastStart[C5IO_DI_CH_MAX];
|
||||
uint8_t DI_Detection_Time[C5IO_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevSendSN; //<2F><><EFBFBD><EFBFBD>SN<53><4E>
|
||||
|
||||
uint8_t Send_Type; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t DI_Control_Flag; //DI<44><49><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint16_t Last_DI_Control_Flag; //DI<44>ϴο<CFB4><CEBF>Ʊ<EFBFBD>־λ
|
||||
uint8_t DO_Control_Flag; //DO<44><4F><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint8_t Last_DO_Control_Flag; //DO<44>ϴο<CFB4><CEBF>Ʊ<EFBFBD>־λ
|
||||
uint8_t DO_Inching_Control_Flag; //DO<44>㶯<EFBFBD><E3B6AF><EFBFBD>Ʊ<EFBFBD>־
|
||||
uint8_t Last_DO_Inching_Control_Flag; //DO<44>㶯<EFBFBD>ϴο<CFB4><CEBF>Ʊ<EFBFBD>־
|
||||
uint32_t Relay_Control_Flag; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint32_t Last_Relay_Control_Flag; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ϴο<CFB4><CEBF>Ʊ<EFBFBD>־
|
||||
uint32_t Relay_Inching_Control_Flag; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>㶯<EFBFBD><E3B6AF><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint32_t Last_Relay_Inching_Control_Flag; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>㶯<EFBFBD>ϴο<CFB4><CEBF>Ʊ<EFBFBD>־λ
|
||||
|
||||
uint8_t C5IO_Version; //IO<49><4F><EFBFBD><EFBFBD><EFBFBD>汾 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>C5 C12 CSIO
|
||||
uint8_t comm_version; //CSIOͨѶЭ<D1B6><D0AD><EFBFBD><EFBFBD> - <20>Դ<EFBFBD><D4B4>İ汾<C4B0><E6B1BE>
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint16_t CxIO_DI_Control_Flag; //<2F><>¼<EFBFBD><C2BC>Ҫ<EFBFBD><D2AA><EFBFBD>õ<EFBFBD>DI<44><49>·
|
||||
uint8_t DI_Reset_Flag; //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t DI_Reset_Tick; //DI<44><49><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint8_t Relay_Reset_Flag; //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t rtc_set_flag;
|
||||
uint8_t DI_Init_flag; //DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ 2025-08-07 <20><><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><F3A3ACB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}BUS_C5IO_INFO;
|
||||
|
||||
void BLV_BUS_CSIO_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
void BLV_BUS_CSIO_DI_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t dev_addr);
|
||||
uint8_t BLV_CSIO_RTC_TimeValid(uint8_t *date);
|
||||
uint8_t BLV_BUS_C5IO_Data_Processing(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
void BUS_C5IO_DI_Control_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_DO_Control_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_DO_Inching_Control_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_Relay_Control_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_Relay_Inching_Control_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_CSIO_SetRTCTime_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_Inquire_Datasend(uint32_t dev_addr,BUS_C5IO_INFO *Dev_Info);
|
||||
void BUS_C5IO_Control_Relay(uint32_t dev_addr,uint8_t loop,uint8_t start);
|
||||
void BUS_C5IO_Control_Do(uint32_t dev_addr,uint8_t loop,uint8_t start);
|
||||
void BUS_C5IO_Control_Relay_Inching(uint32_t dev_addr,uint8_t loop,uint8_t start,uint16_t d_time);
|
||||
void BUS_C5IO_Group_Control_Relay(uint32_t dev_addr,uint32_t loop,uint32_t start);
|
||||
void BUS_CSIO_Set_RTC_Time(uint32_t dev_addr);
|
||||
uint32_t Get_BUS_C5IO_Realy_Status(uint32_t devaddr);
|
||||
uint8_t Get_BUS_C5IO_Online_Status(uint32_t devaddr);
|
||||
uint8_t Get_Bus_C5IO_COMM_State(uint32_t devaddr);
|
||||
uint8_t Get_Bus_CSIO_COMM_Version(uint32_t devaddr);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_BUS_DEV_C5IOFUN_H_ */
|
||||
250
BLV_485_Driver/inc/blv_bus_dev_c5music.h
Normal file
250
BLV_485_Driver/inc/blv_bus_dev_c5music.h
Normal file
@@ -0,0 +1,250 @@
|
||||
/*
|
||||
* blv_bus_dev_c5music.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_BUS_DEV_C5MUSIC_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_BUS_DEV_C5MUSIC_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define C5MUSICTYPE 0x01 //C5IO<49>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>BLV_BUSЭ<53><D0AD>ͨѶʹ<D1B6><CAB9>
|
||||
#define DEV_C5MUSIC_Type 0x15 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>б<EFBFBD><D0B1>е<EFBFBD><D0B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#define C5MUSIC_REPEATSENDTIMEMAX 0x04 //<2F><><EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C5MUSIC_SEND_WAIT_TIME 0x0020 //C5MUSIC<49><43><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1> - 32ms
|
||||
|
||||
#define BLV_C5MUSIC_Playback_Status_CMD 0x20 //<2F><>ѯ<EFBFBD><D1AF>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Default_Volume_CMD 0x21 //<2F>趨<EFBFBD><E8B6A8><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Specify_Play_CMD 0x22 //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Volume_CMD 0x23 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Default_Volume_CMD 0x24 //<2F><>ѯĬ<D1AF><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Volume_CMD 0x26 //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Loop_Mode_CMD 0x29 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Loop_Mode_CMD 0x2A //<2F><>ѯѭ<D1AF><D1AD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Filenum_CMD 0x2B //<2F><>ѯ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Versions_CMD 0x2C //<2F><>ѯ<EFBFBD>汾<EFBFBD><E6B1BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Write_FILEHEAD_CMD 0x2D //д<>ļ<EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Write_FILEData_CMD 0x2E //д<>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Read_FILEHEAD_CMD 0x2F //<2F><><EFBFBD>ļ<EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Read_FILEData_CMD 0x40 //<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define BLV_C5MUSIC_Playback_Status_Reply 0x30 //<2F><>ѯ<EFBFBD><D1AF>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬<D7B4>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Default_Volume_Reply 0x31 //<2F>趨<EFBFBD><E8B6A8><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Specify_Play_Reply 0x32 //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Volume_Reply 0x33 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Default_Volume_Reply 0x34 //<2F><>ѯĬ<D1AF><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Volume_Reply 0x36 //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Set_Loop_Mode_Reply 0x39 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>ģʽ<C4A3>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Loop_Mode_Reply 0x3A //<2F><>ѯѭ<D1AF><D1AD>ģʽ<C4A3>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Filenum_Reply 0x3B //<2F><>ѯ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Query_Versions_Reply 0x3C //<2F><>ѯ<EFBFBD>汾<EFBFBD>Żظ<C5BB>
|
||||
#define BLV_C5MUSIC_Write_FILEHEAD_Reply 0x3D //д<>ļ<EFBFBD>ͷ<EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Write_FILEData_Reply 0x3E //д<>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>ݻظ<DDBB>
|
||||
#define BLV_C5MUSIC_Read_FILEHEAD_Reply 0x3F //<2F><><EFBFBD>ļ<EFBFBD>ͷ<EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_C5MUSIC_Read_FILEData_Reply 0x50 //<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>ݻظ<DDBB>
|
||||
|
||||
#define C5MUSIC_Control_Num 13 //13<31>ֿ<EFBFBD><D6BF><EFBFBD>
|
||||
#define C5MUSIC_Set_Default_Volume_Flag 0x0001 //<2F>趨<EFBFBD><E8B6A8><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Set_Volume_Flag 0x0002 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Set_Loop_Mode_Flag 0x0004 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>ģʽ<C4A3><CABD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Specify_Play_Flag 0x0008 //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Query_Default_Volume_Flag 0x0010 //<2F><>ѯĬ<D1AF><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Query_Volume_Flag 0x0020 //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Query_Loop_Mode_Flag 0x0040 //<2F><>ѯѭ<D1AF><D1AD>ģʽ<C4A3><CABD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Query_Filenum_Flag 0x0080 //<2F><>ѯ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>(<28><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)<29><><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Query_Versions_Flag 0x0100 //<2F><>ѯ<EFBFBD>汾<EFBFBD>ſ<EFBFBD><C5BF>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Write_FILEHEAD_Flag 0x0200 //д<>ļ<EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Write_FILEData_Flag 0x0400 //д<>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Read_FILEHEAD_Flag 0x0800 //<2F><><EFBFBD>ļ<EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
#define C5MUSIC_Read_FILEData_Flag 0x1000 //<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>ݻظ<DDBB><D8B8><EFBFBD>־λ
|
||||
|
||||
#define BLV_C5MUSIC_Relay_SUCC 0xE0 //<2F><EFBFBD><DEB4><EFBFBD>
|
||||
#define BLV_C5MUSIC_Relay_Check_Error 0xE1 //CRCУ<43><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Relay_CMD_Error 0xE2 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Relay_Para_Error 0xE3 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Relay_Other_Error 0xE4 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define BLV_C5MUSIC_Music_Dir 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
#define BLV_C5MUSIC_Warning_Dir 0x01 //<2F><>ʾ<EFBFBD><CABE><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
#define BLV_C5MUSIC_Helpsleep_Dir 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
#define BLV_C5MUSIC_Doorbell_Dir 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
#define BLV_C5MUSIC_Greet_Dir 0x04 //<2F><>ӭ<EFBFBD><D3AD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
#define BLV_C5MUSIC_Helpsleep1_Dir 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>_1_ڤ<5F><DAA4>
|
||||
#define BLV_C5MUSIC_Helpsleep2_Dir 0x06 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>_2_<32><5F><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Helpsleep3_Dir 0x07 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>_3_ɭ<5F><C9AD>
|
||||
|
||||
|
||||
#define BLV_C5MUSIC_Full_Loop 0x00 //ȫ<><C8AB>ѭ<EFBFBD><D1AD>
|
||||
#define BLV_C5MUSIC_Single_Cycle 0x01 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
#define BLV_C5MUSIC_Folder_Loop 0x02 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
#define BLV_C5MUSIC_Random_Cycle 0x03 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
#define BLV_C5MUSIC_Order_CyCle 0x05 //˳<><CBB3>ѭ<EFBFBD><D1AD>
|
||||
|
||||
#define BLV_C5MUSIC_Playing 0x00 //<2F><><EFBFBD><EFBFBD>״̬
|
||||
#define BLV_C5MUSIC_Halted 0x01 //<2F><>ͣ״̬
|
||||
#define BLV_C5MUSIC_Stopped 0x02 //ֹͣ״̬
|
||||
#define BLV_C5MUSIC_Next_Song 0x03 //<2F><>һ<EFBFBD><D2BB>
|
||||
#define BLV_C5MUSIC_Prev_Song 0x04 //<2F><>һ<EFBFBD><D2BB>
|
||||
#define BLV_C5MUSIC_Fast_Forward 0x05 //<2F><><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Rewind 0x06 //<2F><><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Single_Play 0x07 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Forestall 0x08 //<2F><><EFBFBD>Ȳ<EFBFBD><C8B2><EFBFBD>
|
||||
|
||||
#define BLV_C5MUSIC_Volume_MAX 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Volume_MIN 0 //<2F><>С<EFBFBD><D0A1><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_Default_Volume 25 //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_C5MUSIC_HelpSleep_Start_Volume 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֺ궨<D6BA>忪ʼ*/
|
||||
#define MUSICLOOPMAX 0x05 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>
|
||||
#define CtrlDirectOpen 0x01 //<2F><>
|
||||
#define CtrlDirectClose 0x02 //<2F><>
|
||||
|
||||
typedef struct{
|
||||
|
||||
uint8_t CtrlDirect; //<2F><><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD> <20><><EFBFBD>ù<EFBFBD><C3B9><EFBFBD>:0x00<30><30><EFBFBD><EFBFBD> 0x01<30><31><EFBFBD><EFBFBD> 0x02<30>ػ<EFBFBD> 0x03<30><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x04<30>ز<EFBFBD><D8B2><EFBFBD>
|
||||
uint8_t CtrlDir; //<2F><><EFBFBD><EFBFBD>Ŀ¼ <20><>CtrlDirectΪ0x03ʱ CtrlDir<69><72>ʾ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> CtrlCont<6E><74>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD> <20><>CtrlDirectΪ0x00ʱ CtrlDirΪ1<CEAA><31>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD> CtrlDirΪ2<CEAA><32>ʾ<EFBFBD><CABE>ͣ
|
||||
|
||||
}DEV_MUSIC_CTRLWAY; //<2F><><EFBFBD>Ʒ<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ֽڴ<D6BD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF>ػ<EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
uint8_t CtrlMode; //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t CtrlVoice; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}DEV_MUSIC_CTRLCONT; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
DEV_MUSIC_CTRLWAY DevMusicCtrlWay; //<2F><><EFBFBD>Ʒ<EFBFBD>ʽ
|
||||
DEV_MUSIC_CTRLCONT CtrlCont; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}DEV_MUSIC_CTRLSTATE; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֺ궨<D6BA><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
typedef struct{
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevOfflineLast; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevSendSN; //<2F><><EFBFBD><EFBFBD>SN<53><4E>
|
||||
|
||||
uint8_t now_playback_status_num; //<2F><><EFBFBD><EFBFBD>״̬<D7B4>ı<EFBFBD><C4B1><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ״̬<D7B4><CCAC><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ÿ<EFBFBD>ֵ״̬
|
||||
uint8_t now_playback_type; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD>0x02:ϴ<>ּ<EFBFBD><D6BC><EFBFBD><EFBFBD>֡<EFBFBD>0x03:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>֡<EFBFBD>0x04:<3A><><EFBFBD>塢0x05<30><35><EFBFBD>Ż<EFBFBD>ӭ<EFBFBD><D3AD>
|
||||
uint8_t now_playback_status; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD>ţ<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
|
||||
uint8_t last_playback_status;
|
||||
uint8_t now_playback_volume; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t last_playback_volume;
|
||||
uint8_t now_mute_status; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬
|
||||
uint8_t now_global_volume; //<2F><>ǰȫ<C7B0>ְٷֱ<D9B7><D6B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t now_music_volume; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t now_tone_volume; //<2F><>ǰ<EFBFBD><C7B0>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t now_door_volume; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t now_helpsleep_volume; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2022-12-16
|
||||
uint8_t now_playback_mode; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ģʽ - 0x00:ȫ<><C8AB>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>0x01:<3A><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>0x02:<3A>ļ<EFBFBD><C4BC><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>0x03:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>0x05:˳<><EFBFBD>
|
||||
uint8_t now_playback_dir; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
uint8_t last_playback_dir;
|
||||
uint16_t now_playback_idx; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t last_playback_idx;
|
||||
|
||||
uint8_t assign_dir; //0x00:<3A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> 0x01:<3A><>ʾ<EFBFBD><CABE><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> 0x02:<3A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> 0x03:<3A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> 0x04:<3A><>ӭ<EFBFBD><D3AD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
uint16_t assign_playback_path; //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>
|
||||
uint16_t assign_playback_idx; //ָ<><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD>
|
||||
|
||||
uint8_t adjust_volume_type; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x01:<3A><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> 0x02:<3A><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD>
|
||||
uint8_t adjust_volume_operate; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x01 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>0x02 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ
|
||||
uint8_t adjust_volume_loop; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
uint8_t set_playback_volume; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t set_music_volume; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t set_tone_volume; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t set_door_volume; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t set_helpsleep_volume;
|
||||
uint8_t set_global_volume; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD>ְٷֱ<D9B7><D6B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t fade_time; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>λ<EFBFBD><CEBB>100ms
|
||||
uint16_t helpsleep_time; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>λ<EFBFBD><CEBB>1S
|
||||
uint32_t helpsleep_tick; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t playback_type; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD>0x02:ϴ<>ּ<EFBFBD><D6BC><EFBFBD><EFBFBD>֡<EFBFBD>0x03:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>֡<EFBFBD>0x04:<3A><><EFBFBD>塢0x05<30><35><EFBFBD>Ż<EFBFBD>ӭ<EFBFBD><D3AD>
|
||||
uint8_t playback_fun; //<2F><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD> - 0x00:<3A><><EFBFBD>š<EFBFBD>0x01:<3A><>ͣ<EFBFBD><CDA3>0x02:ֹͣ<CDA3><D6B9>0x03:<3A><>һ<EFBFBD>ס<EFBFBD>0x04:<3A><>һ<EFBFBD>ס<EFBFBD>0x05:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x06:<3A><><EFBFBD>ˡ<EFBFBD>0x07:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t playback_mode; //<2F><><EFBFBD><EFBFBD>ģʽ - 0x00:ȫ<><C8AB>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>0x01:<3A><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>0x02:<3A>ļ<EFBFBD><C4BC><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD>0x03:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>0x05:˳<><EFBFBD>
|
||||
uint8_t quiet_mode; //<2F><><EFBFBD><EFBFBD>ģʽ - 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t set_quiet_status; //<2F><><EFBFBD>þ<EFBFBD><C3BE><EFBFBD>״̬ - 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x01:<3A>رվ<D8B1><D5BE><EFBFBD>
|
||||
uint8_t quite_flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint8_t global_volume; //ȫ<>ְٷֱ<D9B7><D6B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t default_volume; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t helpsleep_volume; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t playback_volume_max; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t playback_volume_min; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD>忪ʼ*/
|
||||
DEV_MUSIC_CTRLSTATE BackMusicState[MUSICLOOPMAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>ǰ״̬
|
||||
DEV_MUSIC_CTRLSTATE BackMusicStateLast[MUSICLOOPMAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
uint16_t file_block; //<2F>ļ<EFBFBD><C4BC><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
|
||||
uint16_t file_block_num; //<2F>ļ<EFBFBD><C4BC>ܿ<EFBFBD><DCBF><EFBFBD>
|
||||
uint16_t file_size; //<2F>ļ<EFBFBD><C4BC><EFBFBD>С
|
||||
uint32_t file_start_addr; //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
uint32_t file_end_addr; //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
uint16_t playback_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t dev_versions; //<2F>豸<EFBFBD>汾<EFBFBD><E6B1BE>
|
||||
uint32_t control_flag; //<2F><><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
}BUS_C5MUSIC_INFO;
|
||||
|
||||
void BLV_BUS_C5MUSIC_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint32_t dev_addr);
|
||||
uint8_t BLV_BUS_C5MUSIC_Data_Processing(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
void BUS_C5MUSIC_Playback_Status_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Set_Default_Volume_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Specify_Play_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Set_Volume_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Query_Default_Volume_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Query_Volume_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Set_Loop_Mode_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Query_Loop_Mode_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Query_Filenum_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Query_Versions_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Write_FILEHEAD_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Write_FILEData_Datasend(uint32_t dev_addr,BUS_C5MUSIC_INFO *Dev_Info);
|
||||
void BUS_C5MUSIC_Set_Playback_Mode(uint32_t devaddr,uint8_t play_mode);
|
||||
void BUS_C5MUSIC_Playback(uint32_t devaddr,uint8_t play_dir,uint8_t playback,uint8_t play_id);
|
||||
void BUS_C5MUSIC_Doorbell_Dir(uint32_t devaddr,uint8_t id);
|
||||
void BUS_C5MUSIC_Warning_Dir(uint32_t devaddr,uint8_t id,uint8_t start);
|
||||
void BUS_C5MUSIC_Greet_Dir(uint32_t devaddr,uint8_t id,uint8_t start);
|
||||
void BUS_C5MUSIC_Helpsleep_Dir(uint32_t devaddr,uint8_t dir,uint8_t id);
|
||||
void BUS_C5MUSIC_Play_Helpsleep_Dir(uint32_t devaddr,uint8_t dir,uint8_t id, uint16_t time);
|
||||
void BUS_C5MUSIC_Helpsleep_Dir_Just(uint32_t devaddr,uint8_t dir,uint8_t id);
|
||||
void BUS_C5MUSIC_Stop_Playback(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Play_Playback(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Play_Playback_Next(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Play_Playback_Last(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Pause_Playback(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Playback_Next(uint32_t devaddr, uint8_t dir);
|
||||
void BUS_C5MUSIC_Playback_Prev(uint32_t devaddr, uint8_t dir);
|
||||
void BUS_C5MUSIC_Relative_Volume_Plus(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Relative_Volume_Subtraction(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Relative_Volume_PlusValue(uint32_t devaddr, uint8_t value);
|
||||
void BUS_C5MUSIC_Relative_Volume_SubtractionValue(uint32_t devaddr, uint8_t value);
|
||||
void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t devaddr);
|
||||
void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_t devaddr,uint8_t status);
|
||||
void BUS_C5MUSIC_Set_Global_Volume(uint32_t devaddr,uint8_t vel);
|
||||
void BUS_C5MUSIC_Set_LoopVolume(uint32_t devaddr,uint8_t loop,uint8_t vel);
|
||||
void BUS_C5MUSIC_Set_LoopVolume_2(uint32_t devaddr,uint8_t loop,uint8_t vel);
|
||||
uint8_t Get_BUS_C5MUSIC_Loop_Volume(uint32_t devaddr,uint8_t loop);
|
||||
uint8_t Get_BUS_C5MUSIC_Online_Status(uint32_t devaddr);
|
||||
void BLV_Music_CtrlState_Get(DEV_MUSIC_CTRLSTATE *music_state,uint16_t Output_state );
|
||||
void Logic_Music_Ctrl(uint32_t DevAddrIn, uint16_t DevInputLoop, uint32_t DevAddrOut, uint16_t DevOutputLoop, uint16_t DevOutputType);
|
||||
uint16_t Dev_Music_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_BUS_DEV_C5MUSIC_H_ */
|
||||
133
BLV_485_Driver/inc/blv_device_option.h
Normal file
133
BLV_485_Driver/inc/blv_device_option.h
Normal file
@@ -0,0 +1,133 @@
|
||||
/*
|
||||
* blv_device_option.h
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_DEVICE_OPTION_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_DEVICE_OPTION_H_
|
||||
|
||||
#define ProCode NULL //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> - uint32_t
|
||||
#define HouseType NULL //<2F><><EFBFBD><EFBFBD>
|
||||
#define ProName "ͨ<><CDA8>APP<50>̼<EFBFBD><CCBC><EFBFBD><EFBFBD><EFBFBD>MQTT,֧<><D6A7>Luancher<65><72>V04<30><34>" //<2F><>Ŀ˵<C4BF><CBB5> -64Bytes
|
||||
|
||||
#define C8_TYPE 0x00 //C8<43><38><EFBFBD><EFBFBD>
|
||||
|
||||
#define FLash_Fix_Data 0x00 //Flashij<68><C4B3><EFBFBD>ڴ<EFBFBD><DAB4>̶<EFBFBD>FF
|
||||
|
||||
#define UDPServer_Internal_Flag 0x00 //<2F><>UDP<44><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶʹ<D1B6>ܱ<EFBFBD>־λ
|
||||
|
||||
//#define LOGIC_FILE_EN 0x01 //ʹ<><CAB9><EFBFBD><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Restart_Address_EN 0x01 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 0x00:Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַΪ0x8000,0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַΪ0x5000
|
||||
|
||||
#define NET_DHCP_Optimized_INIT_EN 0x00 //<2F><><EFBFBD><EFBFBD>DHCP<43><50><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD><EFBFBD>DHCP<43><50><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>Ϊ0.0.0.0 2022-07-19
|
||||
|
||||
|
||||
#define DevExistJudgge(Flag, FunName) ((0x01 == Flag)?FunName:NULL) //<2F><>־λΪ1<CEAA>ͷ<EFBFBD><CDB7>غ<EFBFBD><D8BA><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ؿ<F2B7B5BB>
|
||||
|
||||
|
||||
/*<2A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_HVout_C5RELAY_Flag 0x01 //C5<43>̵<EFBFBD><CCB5><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_HVout_A9RELAY_Flag 0x00 //A9<41>̵<EFBFBD><CCB5><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_HVout_SwiRELAY_Flag 0x01 //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
/*<2A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_Switch_Touch_Flag 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_Switch_A9IO_Flag 0x00 //A9IO<49><4F><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_Switch_Rotary_Flag 0x00 //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_Switch_Rotary_P1_Flag 0x00 //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>1
|
||||
#define RS485_Switch_Rotary_P2_Flag 0x00 //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>2
|
||||
/*485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_Temp_T1_Flag 0x01 //T1<54>¿<EFBFBD><C2BF><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_Temp_T1_Flag_Si 0x01 //T1<54>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺܣ<C4B9>
|
||||
#define RS485_Temp_T1_Active_Flag 0x01 //T1<54>¿<EFBFBD><C2BF><EFBFBD> <20><><EFBFBD><EFBFBD> <20>Ĺ<EFBFBD>
|
||||
#define RS485_Temp_C7T_Flag 0x00 //C7T<37>¿<EFBFBD><C2BF><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
/*485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_LED_Flag 0x01 //485PWM<57><4D><EFBFBD><EFBFBD><EFBFBD>ܱ<EFBFBD><DCB1><EFBFBD>
|
||||
#define RS485_LED_PWM_Flag 0x00 //PWM0~10V<30><56><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_LED_A9LD_Flag 0x00 //A9LD<4C><44><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_LED_Slider_Flag 0x00 //Slider<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_LED_A8PB_Flag 0x00 //A8PB<50><42><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_LED_C12Dim_Flag 0x01 //C12Dim<69><6D><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_LED_RGB_Flag 0x00 //RGB<47><42><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
/*485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_MUSIC_BLW_Flag 0x00 //С<><D0A1><EFBFBD><EFBFBD><EFBFBD>֣<EFBFBD><D6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_MUSIC_HES_Flag 0x00 //485<38><35><EFBFBD><EFBFBD>˼<EFBFBD><CBBC><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
/*485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
#define RS485_RFGatewayHost_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>BLW<57><CEA2><EFBFBD><EFBFBD>
|
||||
/*485<35><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
|
||||
#define RS485_WxLock_Flag 0x00 //<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_WxLock_BLW_Flag 0x00 //BLW<57><CEA2><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_WxLock_FreeGo_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CEA2><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_WxLock_CJia_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><CEA2><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
/*485<35><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD><EAB6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
#define RS485_AirDetect_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
#define RS485_AirReveal_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>־
|
||||
|
||||
#define RS485_TimeCtrl_Flag 0x00 //ʱ<><CAB1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#define RS485_Curtain_Flag 0x01 //485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_DOOYA_Curtain_Flag 0x00 //<2F><><EFBFBD>Ǵ<EFBFBD><C7B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_BinShen_Curtain_Flag 0x01 //<2F><><EFBFBD>괰<EFBFBD><EAB4B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define RS485_CardState_Flag 0x01 //<2F>忨״̬ͬ<CCAC><CDAC>
|
||||
|
||||
#define RS485_FreshAir_Flag 0x00 //<2F>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_FloorHeat_Flag 0x00 //<2F><>ů<EFBFBD><C5AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RS485_BLW_FreshAir_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_BLW_FloorHeat_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ů 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_CLED_FreshAir_Flag 0x00 //CLED<45>·<EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
#define RS485_CLED_FloorHeat_Flag 0x00 //CLED<45><44>ů 1Ϊ<31><CEAA><EFBFBD><EFBFBD> 0Ϊ<30>ر<EFBFBD>
|
||||
|
||||
|
||||
#if C8_TYPE
|
||||
|
||||
#define RS485_PB20Fun_Flag 0x01 //PB20
|
||||
#define RS485_PB20_LD_Flag 0x00 //PB20-LD
|
||||
#define RS485_PB20_LS_Flag 0x01 //PB20-LS
|
||||
#define RS485_PB20_Relay_Flag 0x01 //PB20-Relay
|
||||
#define RS485_LCD_1602_Flag 0x01 //LCD
|
||||
|
||||
#else
|
||||
|
||||
#define RS485_PB20Fun_Flag 0x00 //PB20
|
||||
#define RS485_PB20_LD_Flag 0x00 //PB20-LD
|
||||
#define RS485_PB20_LS_Flag 0x00 //PB20-LS
|
||||
#define RS485_PB20_Relay_Flag 0x00 //PB20-Relay
|
||||
#define RS485_LCD_1602_Flag 0x00 //LCD
|
||||
|
||||
#endif
|
||||
|
||||
#define Dev_Nor_NoCard_Flag 0x00 //<2F><EFBFBD><DEBF>ϵ<EFBFBD><CFB5>豸
|
||||
#define Dev_Nor_VirtualCard_Flag 0x01 //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸
|
||||
#define RS485_Dev_IN_CH6 0x00 //<2F><><EFBFBD><EFBFBD>6·<36><C2B7><EFBFBD><EFBFBD>
|
||||
|
||||
#define Dev_485_Pir_Flag 0x00 //485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ
|
||||
|
||||
#define Dev_Nor_ColorTemp 0x01 //ɫ<><C9AB>ģ<EFBFBD><C4A3>
|
||||
|
||||
#define Dev_485_Card_Polling_Flag 0x01 //<2F><>ѵ<EFBFBD>˿<EFBFBD>485<38>忨ȡ<E5BFA8><C8A1>
|
||||
#define Dev_485_Card_Active_Flag 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>485<38>忨ȡ<E5BFA8><C8A1>
|
||||
|
||||
#define Dev_485_IrSend_Polling_Flag 0x01 //<2F><>ѵ<EFBFBD>˿ں<CBBF><DABA><EFBFBD>ת<EFBFBD><D7AA>
|
||||
#define Dev_485_IrSend_Active_Flag 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF><DABA><EFBFBD>ת<EFBFBD><D7AA>
|
||||
|
||||
#define Dev_485_BLE_Music_Flag 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ
|
||||
|
||||
#define Dev_Nor_Carbon_Flag 0x01 //̼<><CCBC><EFBFBD><EFBFBD>
|
||||
|
||||
#define Dev_Nor_Scene_Restore_Flag 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>滹ԭ
|
||||
|
||||
#define Dev_Nor_GlobalSet_Flag 0x01 //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,2025-07-14,YYW
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_DEVICE_OPTION_H_ */
|
||||
92
BLV_485_Driver/inc/blv_device_type.h
Normal file
92
BLV_485_Driver/inc/blv_device_type.h
Normal file
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* blv_device_type.h
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_DEVICE_TYPE_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_DEVICE_TYPE_H_
|
||||
|
||||
typedef enum
|
||||
{
|
||||
Dev_Host_Invalid = 0, //0 - <20><>Ч<EFBFBD>豸 Ҳ<><D2B2><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD>Ϊ<EFBFBD>dz<EFBFBD><C7B3><EFBFBD>
|
||||
Dev_Host_HVout, //1 - ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
Dev_Host_LVinput, //2 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
Dev_Host_LVoutput, //3 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
Dev_Host_Service, //4 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
Dev_NodeCurtain, //5 - <20>ɽڵ㴰<DAB5><E3B4B0> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
|
||||
/*485<38>豸<EFBFBD><E8B1B8><EFBFBD>Ϳ<EFBFBD>ʼ*/
|
||||
DEV_RS485_SWT, //6 - <20><><EFBFBD><EFBFBD>ָʾ<D6B8><CABE> <20><><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD>״̬ 485<38>豸<EFBFBD><EFBFBD>ַ
|
||||
DEV_RS485_TEMP, //7 - <20>յ<EFBFBD>1 <20>յ<EFBFBD>״̬
|
||||
DEV_RS485_INFRARED, //8 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ <20><><EFBFBD><EFBFBD>
|
||||
DEV_RS485_AirDetect, //9 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><><EFBFBD><EFBFBD>
|
||||
DEV_RS485_CARD, //10 - <20>忨ȡ<E5BFA8><C8A1> ȡ<><C8A1>״̬
|
||||
DEV_RS485_HEATER, //11 - <20><>ů <20><>ů״̬
|
||||
Dev_RCU_NET, //12 - RCU<43>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
DEV_RS485_CURTAIN, //13 - <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
DEV_RS485_RELAY, //14 - <20>̵<EFBFBD><CCB5><EFBFBD> <20>̵<EFBFBD><CCB5><EFBFBD>״̬
|
||||
DEV_RS485_IR_SEND, //15 - <20><><EFBFBD>ⷢ<EFBFBD><E2B7A2> <20><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>״̬
|
||||
DEV_RS485_DIMMING, //16 - ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||
DEV_RS485_TRAIC, //17 - <20>ɿع<C9BF><D8B9><EFBFBD><EFBFBD><EFBFBD> <20>ɿع<C9BF>״̬
|
||||
DEV_RS485_STRIP, //18 - <20>ƴ<EFBFBD> <20>ƴ<EFBFBD>״̬ --2025-11-24 ȡ<><C8A1>
|
||||
DEV_RS485_CoreCtrl, //19 - <20>п<EFBFBD>
|
||||
DEV_RS485_WxLock, //20 - <><CEA2><EFBFBD><EFBFBD> <><CEA2><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><F0B9B7B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>0<EFBFBD><30>ַ
|
||||
DEV_RS485_MUSIC, //21 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
/*485<38>豸<EFBFBD><E8B1B8><EFBFBD>ͽ<EFBFBD><CDBD><EFBFBD>*/
|
||||
DEV_NET_ROOMSTATE, //22 - <20><>̬<EFBFBD>·<EFBFBD>
|
||||
|
||||
Dev_Host_PWMLight, //23 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>
|
||||
DEV_RS485_PWM, //24 - 485PWM<57><4D><EFBFBD><EFBFBD> PWM<57><4D><EFBFBD><EFBFBD>״̬
|
||||
DEV_PB_LED, //25 - <20><><EFBFBD>ߵ<EFBFBD><DFB5><EFBFBD> PBLED<45><44><EFBFBD><EFBFBD>״̬
|
||||
DEV_RCU_POWER, //26 - RCU<43><55>Դ
|
||||
|
||||
DEV_RS485_A9_IO_SWT, //27 - A9IO<49><4F><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>أ<EFBFBD>û<EFBFBD><C3BB>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DEV_RS485_A9_IO_EXP, //28 - A9IO<49><4F>չ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9>û<EFBFBD><C3BB>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DEV_RS485_A9_IO_POWER, //29 - A9IO<49><4F>Դ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>û<EFBFBD><C3BB>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
DEV_RS485_RFGatewayCycle, //30 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>豸 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ú<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
DEV_RS485_RFGatewayHost, //31 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
|
||||
DEV_RS485_RFGatewayDoor, //32 - <20><><EFBFBD><EFBFBD><EFBFBD>Ŵ<EFBFBD>
|
||||
DEV_RS485_AirReveal, //33 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD>豸
|
||||
DEV_RS485_RFGatewayRelayPir, //34 - <20><><EFBFBD>̵<DFBC><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ̵<DABC><CCB5><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
Dev_Host_TimeCtrl, //35 - ʱ<><CAB1>ͬ<EFBFBD><CDAC>
|
||||
|
||||
Dev_Rs458_MonitorCtrl, //36 - <20><><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>
|
||||
|
||||
Dev_Rs458_RotaryCtrl, //37 - <20><>ť<EFBFBD><C5A5><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>
|
||||
|
||||
Dev_BUS_C5IO, //38 - C5IO - <20><><EFBFBD><EFBFBD>
|
||||
|
||||
Dev_RS485_CardState, //39 - <20>忨״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
DEV_RS485_FreshAir, //40 - 485<38>·<EFBFBD><C2B7>豸
|
||||
DEV_RS485_FaceMach, //41 - 485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
DEV_Center_Control, //42 - <20>п<EFBFBD>
|
||||
DEV_Domain_Control, //43 - <20><><EFBFBD><EFBFBD>
|
||||
DEV_RS485_LCD, //44 - LCD
|
||||
DEV_Virtual_NoCard, //45 - <20><EFBFBD><DEBF>ϵ<EFBFBD> --2025-11-24 ȡ<><C8A1>
|
||||
DEV_Virtual_Card, //46 - <20><EFBFBD>ȡ<EFBFBD><C8A1>2
|
||||
|
||||
DEV_Virtual_Time, //47 - <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>豸
|
||||
|
||||
Dev_Rs485_PB20 = 0x30,
|
||||
Dev_Rs485_PB20_LD = 0x31,
|
||||
Dev_Rs485_PB20_LS = 0x32,
|
||||
Dev_Rs485_PB20_Relay = 0x33,
|
||||
|
||||
DEV_Virtual_ColorTemp, //52 - ɫ<>µ<EFBFBD><C2B5>ڹ<EFBFBD><DAB9><EFBFBD>
|
||||
|
||||
Dev_485_BLE_Music, //53 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶ
|
||||
DEV_Carbon_Saved, //54 - ̼<><CCBC><EFBFBD><EFBFBD>
|
||||
Dev_Scene_Restore, //55 - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ
|
||||
Dev_Virtual_GlobalSet, //56 - ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
Dev_Energy_Monitor, //57 - <20>ܺļ<DCBA><C4BC><EFBFBD>
|
||||
|
||||
Dev_Num_MAX, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}Enum_Dev_Type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD>
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_DEVICE_TYPE_H_ */
|
||||
144
BLV_485_Driver/inc/blv_nor_dec_virtualcard.h
Normal file
144
BLV_485_Driver/inc/blv_nor_dec_virtualcard.h
Normal file
@@ -0,0 +1,144 @@
|
||||
/*
|
||||
* blv_nor_dec_virtualcard.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
|
||||
|
||||
#define VC_CONDGROUP_MAX 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><D6A7><EFBFBD><EFBFBD>
|
||||
#define VC_CONDSUB_MAX 10 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֧<EFBFBD><D6A7><EFBFBD><EFBFBD>
|
||||
|
||||
#define VIRTUAL_PORT_MAX 11 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
|
||||
|
||||
#define SOMEONE 1 //<2F><><EFBFBD><EFBFBD>
|
||||
#define NOONE 2 //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
#define VC_CONDGROUP_Default_StartGroup 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ĭ<><C4AC><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ0x01
|
||||
|
||||
#define VC_CONDGROUP_SomeOne_Type 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_CONDGROUP_NoOne_Type 0x02
|
||||
#define VC_CONDGROUP_BrieflyLeaving_Type 0x03
|
||||
#define VC_CONDGROUP_LongTermLeaving_Type 0x04
|
||||
|
||||
#define DETECTION_Window_Time_Max 43200 //<2F><>ʱ<EFBFBD>䴰<EFBFBD>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC>λ<EFBFBD><CEBB>S
|
||||
|
||||
//<2F>¼<EFBFBD>ID
|
||||
#define VC_EventID_DoorSensor 0x01 //<2F><><EFBFBD>Ž<EFBFBD><C5BD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_CardedPersonLeft 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD>ˣ<EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_UncardedPersonLeft 0x03 //<2F><EFBFBD><DEBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_RadarPersonDetected 0x04 //<2F>״<EFBFBD><D7B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_RadarPersonLeft 0x05 //<2F>״<EFBFBD><D7B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_RS485ButtonPress 0x06 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD><DABC>RS485 <20><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>
|
||||
#define VC_EventID_BrieflyLeaving 0x07 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_EventID_LongTermLeaving 0x08 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
//<2F><>־λ
|
||||
#define VC_Event_DoorSensor_Flag 0x01 //<2F><><EFBFBD>Ž<EFBFBD><C5BD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
#define VC_Event_CardedPersonLeft_Flag 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD>ˣ<EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_Event_UncardedPersonLeft_Flag 0x04 //<2F><EFBFBD><DEBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD>ˣ<EFBFBD><CBA3><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_Event_RadarPersonDetected_Flag 0x08 //<2F>״<EFBFBD><D7B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD><EFBFBD>
|
||||
#define VC_Event_RadarPersonLeft_Flag 0x10 //<2F>״<EFBFBD><D7B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_Event_RS485ButtonPress_Flag 0x20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڼ<EFBFBD><DABC>RS485 <20><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>
|
||||
#define VC_Event_BrieflyLeaving_Flag 0x40 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define VC_Event_LongTermLeaving_Flag 0x80 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t HPort_Type; //ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t HPort_Addr; //ӳ<><D3B3><EFBFBD>˿<EFBFBD>485<38><35>ַ
|
||||
uint16_t HPort_Loop; //ӳ<><D3B3><EFBFBD>˿ڻ<CBBF>·
|
||||
|
||||
uint8_t PortIndex; //<2F><><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
|
||||
uint8_t PortEnFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·ͳ<C2B7><CDB3><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
}VPORT_STRUCT; //<2F>˿<EFBFBD><CBBF><EFBFBD><EFBFBD>Խṹ<D4BD><E1B9B9>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t HPort_Type; //ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t HPort_Addr; //ӳ<><D3B3><EFBFBD>˿<EFBFBD>485<38><35>ַ
|
||||
uint16_t HPort_Loop; //ӳ<><D3B3><EFBFBD>˿ڻ<CBBF>·
|
||||
|
||||
uint8_t Release_Thres; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>ֵ <20><><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
uint8_t PortIndex; //<2F><><EFBFBD><EFBFBD><EFBFBD>˿ں<CBBF>
|
||||
uint8_t PortEnFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
uint16_t Judgment_Time; //<2F><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Judgment_Unit; //<2F><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3>ʱ<EFBFBD>䵥λ
|
||||
uint8_t Trigger_Thres; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ <20><><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
}VPORT_INFO_STRUCT; //<2F>˿<EFBFBD><CBBF><EFBFBD>Ϣ<EFBFBD>ṹ<EFBFBD><E1B9B9> - <20><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>д洢<D0B4><E6B4A2><EFBFBD>ݽṹ
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Exist_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 1:<3A><><EFBFBD><EFBFBD> 2:<3A><><EFBFBD><EFBFBD> 3:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4:<3A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Condi_Gruop; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Condi_Subset; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint16_t Judgment_Time; //<2F><><EFBFBD><EFBFBD> - <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Judgment_Unit; //<2F><><EFBFBD><EFBFBD> - <20>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>䵥λ
|
||||
|
||||
uint8_t Port_State[VIRTUAL_PORT_MAX]; //0:<3A><><EFBFBD>ж<EFBFBD> 1:<3A><><EFBFBD><EFBFBD> 2:<3A>ͷ<EFBFBD>
|
||||
|
||||
uint16_t Timeout_Time; //<2F><><EFBFBD><EFBFBD> - <20>ж<EFBFBD><D0B6><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint8_t Timeout_Unit; //<2F><><EFBFBD><EFBFBD> - <20>ж<EFBFBD><D0B6><EFBFBD>ʱʱ<CAB1>䵥λ
|
||||
|
||||
uint8_t Trigger_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint32_t Trigger_Tick; //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
}CONDITION_STRUCT; //<2F><><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD><E1B9B9>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Det1sTime; //1s<31><73><EFBFBD>ǰ<E2B5B1><C7B0><EFBFBD><EFBFBD>
|
||||
uint8_t Det30sTime; //30s дһ<D0B4><D2BB><EFBFBD><EFBFBD>־
|
||||
uint8_t TriggerNum[VIRTUAL_PORT_MAX]; //1s<31>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t FullFlag[VIRTUAL_PORT_MAX]; //<2F><><EFBFBD>ⴰ<EFBFBD><E2B4B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>־λ
|
||||
|
||||
uint8_t Trigger_Thres[VIRTUAL_PORT_MAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ <20><><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
uint8_t Release_Thres[VIRTUAL_PORT_MAX]; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>ֵ <20><><EFBFBD><EFBFBD>-><3E><><EFBFBD><EFBFBD>
|
||||
uint16_t DetWinTotalNum[VIRTUAL_PORT_MAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> Ĭ<><C4AC>12Сʱ(43200<30><30>) <20><>λ<EFBFBD><CEBB>S
|
||||
uint16_t DetWinTrigger[VIRTUAL_PORT_MAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>(<28><>)
|
||||
uint16_t DetWinIdex[VIRTUAL_PORT_MAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
|
||||
}DETECT_STRUCT; //89B
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t PortTick; //<2F>˿ڼ<CBBF><DABC><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 4
|
||||
uint8_t PortInit_Flag; //<2F>˿<EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1
|
||||
|
||||
VPORT_STRUCT Port_Info[VIRTUAL_PORT_MAX]; //ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD> 77
|
||||
uint8_t PortState[VIRTUAL_PORT_MAX]; //<2F>˿<EFBFBD>״̬ 11
|
||||
uint8_t PortStateLast[VIRTUAL_PORT_MAX]; //<2F><>һ<EFBFBD>ζ˿<CEB6>״̬ 11
|
||||
uint8_t PortStateAct[VIRTUAL_PORT_MAX]; //<2F>˿ڶ<CBBF><DAB6><EFBFBD>״̬ 11 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
uint32_t PortTiggleTick[VIRTUAL_PORT_MAX]; //<2F>˿ڼ<CBBF>¼<EFBFBD>㰴ʱ<E3B0B4><CAB1><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>A9IO<49><4F><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>״̬ 44
|
||||
|
||||
DETECT_STRUCT DetInfo; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ 102
|
||||
|
||||
float ActThreshold[VIRTUAL_PORT_MAX]; //ʵ<>ʴ<EFBFBD><CAB4><EFBFBD><EFBFBD><EFBFBD>ֵ 44
|
||||
|
||||
uint8_t ExistState; //<2F><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
uint8_t ExistState_Last;
|
||||
uint8_t ConGroupIndx; //<2F><>ǰ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
uint8_t Action; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CardState; //<2F>п<EFBFBD>״̬
|
||||
uint8_t CardStateLast; //
|
||||
uint8_t DetNum; //<2F><><EFBFBD>봰<EFBFBD>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD>˿<EFBFBD><CBBF><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Last_ConGroupType; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>롢<EFBFBD><EBA1A2>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>¼<EFBFBD>
|
||||
uint32_t Condition_Trigger_Tick;
|
||||
|
||||
uint32_t Last_Trigger_Tick; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
}VIRTUALCARD_STRUCT;
|
||||
|
||||
|
||||
|
||||
void BLV_Nor_Dev_VirtualCard_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_ */
|
||||
55
BLV_485_Driver/inc/blv_nor_dev_hvoutfun.h
Normal file
55
BLV_485_Driver/inc/blv_nor_dev_hvoutfun.h
Normal file
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* blv_rs485_dev_hvoutfun.h
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_HVOUTFUN_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_HVOUTFUN_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define HVoutNumMAX 32 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C1_HVOUTNUMMAX 0x18 //C1Ϊ20·
|
||||
|
||||
#define HVout_State_Open 0x01 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬ - <20><>
|
||||
#define HVout_State_Close 0x00 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬ - <20><>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevHVoutState[HVoutNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>Ǵ<C7B4><F2BFAABB>ǹر<C7B9>
|
||||
uint8_t DevHVoutStateLast[HVoutNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t DevHVoutSaveState[HVoutNumMAX]; //״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t A9Relay_ReadFlag;
|
||||
|
||||
uint8_t HVoutLoopValidNum; //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||
uint8_t HVoutCtrlCnt; //<2F><><EFBFBD>Ƽ<EFBFBD><C6BC><EFBFBD>
|
||||
|
||||
uint8_t HVSwitchFlag; //ǿ<>翪<EFBFBD>ر<EFBFBD>־ 1<><31>ǿ<EFBFBD>翪<EFBFBD><E7BFAA> 0<><30><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ü̵<C3BC><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>Ŀ<EFBFBD><C4BF>أ<EFBFBD><D8A3><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD>翪<EFBFBD><E7BFAA>
|
||||
uint8_t HVSwitchCtrlFlag; //ǿ<>翪<EFBFBD>ؿ<EFBFBD><D8BF>Ʊ<EFBFBD>־ <20><>ǿ<EFBFBD>翪<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>仯<EFBFBD><E4BBAF><EFBFBD>ô˱<C3B4>־
|
||||
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> ռ4λ
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
uint8_t RELAYSn; //<2F><>չ<EFBFBD><D5B9>Sn<53><6E>
|
||||
|
||||
uint8_t init_flag; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
|
||||
uint32_t DevC5IOAddr; //C5IO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint32_t DevChangeFlag; //<2F>豸<EFBFBD>仯<EFBFBD><E4BBAF>־ Ϊ1<CEAA><31>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
|
||||
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
}NOR_HVOUT_INFO; //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
void BLV_Nor_Dev_HVout_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
uint16_t HVout_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||
void BLW_HVout_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start);
|
||||
void BLW_HVout_Group_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start);
|
||||
uint16_t BLW_HVout_Group_Read(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
||||
uint8_t Get_BLV485_Expand_Online_Status(uint32_t devaddr);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_HVOUTFUN_H_ */
|
||||
102
BLV_485_Driver/inc/blv_nor_dev_lvinput.h
Normal file
102
BLV_485_Driver/inc/blv_nor_dev_lvinput.h
Normal file
@@ -0,0 +1,102 @@
|
||||
/*
|
||||
* blv_nor_dev_lvinput.h
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_LVINPUT_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_LVINPUT_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define LVINPUTNUMMAX 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define C1_LVINPUTNUMMAX 0x07 //C1Ϊ7·
|
||||
|
||||
typedef struct{
|
||||
uint64_t LVinputCH01:2; //1
|
||||
uint64_t LVinputCH02:2; //2
|
||||
uint64_t LVinputCH03:2; //3
|
||||
uint64_t LVinputCH04:2; //4
|
||||
uint64_t LVinputCH05:2; //5
|
||||
uint64_t LVinputCH06:2; //6
|
||||
uint64_t LVinputCH07:2; //7
|
||||
uint64_t LVinputCH08:2; //8
|
||||
uint64_t LVinputCH09:2; //9
|
||||
uint64_t LVinputCH10:2; //10
|
||||
uint64_t LVinputCH11:2; //11
|
||||
uint64_t LVinputCH12:2; //12
|
||||
uint64_t LVinputCH13:2; //13
|
||||
uint64_t LVinputCH14:2; //14
|
||||
uint64_t LVinputCH15:2; //15
|
||||
|
||||
uint64_t LVinputCH16:2; //16 //<2F><><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint64_t LVinputCH17:2; //17
|
||||
uint64_t LVinputCH18:2; //18
|
||||
uint64_t LVinputCH19:2; //19
|
||||
uint64_t LVinputCH20:2; //20
|
||||
uint64_t LVinputCH21:2; //21
|
||||
uint64_t LVinputCH22:2; //22
|
||||
uint64_t LVinputCH23:2; //23
|
||||
uint64_t LVinputCH24:2; //24
|
||||
uint64_t LVinputCH25:2; //25
|
||||
uint64_t LVinputCH26:2; //26
|
||||
uint64_t LVinputCH27:2; //27
|
||||
uint64_t LVinputCH28:2; //28
|
||||
uint64_t LVinputCH29:2; //29
|
||||
uint64_t LVinputCH30:2; //30
|
||||
uint64_t LVinputCH31:2; //31
|
||||
uint64_t LVinputCH32:2; //32
|
||||
|
||||
}DEV_LVINPUTDATA_TYPE; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define INCH6_DI_CH_MAX 0x06
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevReadBuf[LVINPUTNUMMAX]; //ÿ<><C3BF>λ<EFBFBD>水<EFBFBD><E6B0B4><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⣬<EFBFBD><E2A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t DevReadBufLast[LVINPUTNUMMAX]; //ÿ<><C3BF>λ<EFBFBD>水<EFBFBD><E6B0B4><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>
|
||||
|
||||
uint8_t LVinputValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||
uint8_t DevSendCnt; //<2F><><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD>
|
||||
uint8_t DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
uint8_t DevSn; //<2F>豸Sn<53><6E>
|
||||
uint8_t Dev_Init_Flag; //<2F>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ 2025-09-26
|
||||
|
||||
uint8_t Send_Type;
|
||||
|
||||
uint8_t DI_Type[INCH6_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0~3:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4~7:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƽ
|
||||
uint8_t DI_Start[INCH6_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD>״̬
|
||||
uint8_t DI_Report_En[INCH6_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
uint8_t DI_LastStart[INCH6_DI_CH_MAX];
|
||||
uint8_t DI_Detection_Time[INCH6_DI_CH_MAX]; //DI<44><49><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint16_t Version; //IO<49><4F><EFBFBD><EFBFBD><EFBFBD>汾
|
||||
uint16_t control_flag; //<2F><><EFBFBD>Ʊ<EFBFBD>־λ
|
||||
uint16_t DI_set_flag; //DI<44><49><EFBFBD>ñ<EFBFBD>־λ
|
||||
uint16_t Last_DI_set_flag;
|
||||
uint16_t DI_Level_Actual_Start;
|
||||
|
||||
uint32_t DevC5IOAddr; //C5IO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint32_t DI_Actual_State;
|
||||
uint32_t DI_Perfect_State;
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>֧<EFBFBD><D6A7>30<33><30><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t HoldTick[LVINPUTNUMMAX];
|
||||
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
}NOR_LVINPUT_INFO; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
void BLV_Nor_Dev_LVinput_Init(uint8_t devaddr, uint16_t LoopMax);
|
||||
uint8_t Dev_LVinput_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||
void Dev_LVinput_Dis(uint32_t DevAddr);
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_LVINPUT_H_ */
|
||||
29
BLV_485_Driver/inc/blv_rs485_dev_c12dimming.h
Normal file
29
BLV_485_Driver/inc/blv_rs485_dev_c12dimming.h
Normal file
@@ -0,0 +1,29 @@
|
||||
/*
|
||||
* blv_rs485_dev_c12dimming.h
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_C12DIMMING_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_C12DIMMING_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
#include "blv_rs485_dev_ledcrtl.h"
|
||||
|
||||
#define C12DIM_OUT_CH_MAX 0x0C //C12Dim<69><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>12·
|
||||
|
||||
#define C12_SET_LIGHT_CMD 0x21 //<2F>ٷֱ<D9B7><D6B1>趨<EFBFBD><E8B6A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
void BLW_RS485_C12Dim_Data_Init(Device_Public_Information_G *BUS_Public, RS485_LED_INFO *Rs485LED, uint16_t LoopNum);
|
||||
uint8_t BLW_C12DimCycleCtrl(uint32_t dev_addr);
|
||||
uint8_t BLW_Rs485_C12Dim_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
void BLW_Rs485_C12Dim_Ctrl(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo);
|
||||
void BLW_Rs485_C12Dim_Way_Ctrl(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo);
|
||||
void BLW_Rs485_C12Dim_Read(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo);
|
||||
void BLW_C12_GlobalValue_Set(Device_Public_Information_G *BUS_Public, RS485_LED_INFO* Rs485LEDInfo);
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_C12DIMMING_H_ */
|
||||
56
BLV_485_Driver/inc/blv_rs485_dev_cardctrl.h
Normal file
56
BLV_485_Driver/inc/blv_rs485_dev_cardctrl.h
Normal file
@@ -0,0 +1,56 @@
|
||||
/*
|
||||
* blv_rs485_dev_cardctrl.h
|
||||
*
|
||||
* Created on: Nov 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_CARDCTRL_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_CARDCTRL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define CARD_Anonymous_Identity 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define CARD_Guest_Identity 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define CARD_Staff_Identity 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ա<EFBFBD><D4B1><EFBFBD><EFBFBD>
|
||||
#define CARD_Identity_3 0x03 //<2F><><EFBFBD><EFBFBD>3
|
||||
#define CARD_Identity_4 0x04 //<2F><><EFBFBD><EFBFBD>4
|
||||
#define CARD_Identity_5 0x05 //<2F><><EFBFBD><EFBFBD>5
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Rs485CardAction; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Rs485CardFlag; //<2F>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD>־<EFBFBD><D6BE> <20><><EFBFBD><EFBFBD>
|
||||
uint8_t Rs485CardFlagLast; //<2F><>һ<EFBFBD>β忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD>־λ
|
||||
uint8_t Rs485CardTypeLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t Rs485CardType; //<2F><>״̬ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t DevPort; //2024-11-05
|
||||
uint8_t DevPort_Last; //2024-11-05
|
||||
uint8_t DevPort_Flag; //2024-11-05
|
||||
|
||||
uint8_t DevInitFlag; //2025-08-04 <20>Ե<EFBFBD>һ<EFBFBD><D2BB>ͨѶ<CDA8>Ķ<EFBFBD>ȡ״̬<D7B4><CCAC>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬<D7B4><CCAC><EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD>ִ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>
|
||||
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
}RS485_CARD_INFO;
|
||||
|
||||
|
||||
void BLV_RS485_Card_Active_Init(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo);
|
||||
void BLV_RS485_Card_Polling_Init(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo);
|
||||
void BLV_RS485_Card_Data_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
void BLV_RS485_Card_Polling_Send(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo);
|
||||
void BLV_RS485_Card_PortType_Send(Device_Public_Information_G *BUS_Public, RS485_CARD_INFO *Rs485CardInfo);
|
||||
uint8_t BLV_RS485_Card_Cycle_Dis(uint32_t dev_addr);
|
||||
uint8_t BLV_Rs485_Card_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
uint8_t Get_BLV485_CARD_Online_Status(uint32_t devaddr);
|
||||
uint8_t Dev_Rs485_Card_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_CARDCTRL_H_ */
|
||||
158
BLV_485_Driver/inc/blv_rs485_dev_ledcrtl.h
Normal file
158
BLV_485_Driver/inc/blv_rs485_dev_ledcrtl.h
Normal file
@@ -0,0 +1,158 @@
|
||||
/*
|
||||
* blv_rs485_dev_ledcrtl.h
|
||||
*
|
||||
* Created on: Nov 17, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_LEDCRTL_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_LEDCRTL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define CFG_Dev_CtrlWay_Is_Open 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽΪ<CABD><CEAA>
|
||||
#define CFG_Dev_CtrlWay_Is_Close 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽΪ<CABD><CEAA>
|
||||
#define CFG_Dev_CtrlWay_Is_TOGGLE 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽΪȡ<CEAA><C8A1>
|
||||
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_CycleUp 0x07 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_CycleDown 0x08 //<2F><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Stop 0x09 //<2F><><EFBFBD><EFBFBD>ֹͣ
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Up 0x0A //<2F><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Down 0x0B //<2F><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Open 0x0C //<2F>㰴<EFBFBD><E3B0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Close 0x0D //<2F>㰴<EFBFBD><E3B0B4><EFBFBD>ر<EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_RelateBlink 0x0E //<2F><><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽΪ<CABD><CEAA>Ӧ<EFBFBD><D3A6>˸ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ר<EFBFBD><D7A8><EFBFBD><EFBFBD><EFBFBD>ɽڵ<C9BD><DAB5><EFBFBD><EFBFBD><EFBFBD>485
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Up_Step_Cycle 0x0F //<2F><><EFBFBD>ϵ㰴ѭ<E3B0B4><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define CFG_Dev_CtrlWay_Is_OnlySwitch 0x11 //ֻ<><D6BB><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_OnlyBright 0x12 //ֻ<><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Up_Limit 0x1A //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD> <20><><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Down_Limit 0x1B //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD> <20><><EFBFBD>µ<EFBFBD><C2B5><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define CFG_Dev_CtrlWay_Is_Dim_Up_Step_Cycle_Limit 0x1F //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD> <20><><EFBFBD>ϵ㰴ѭ<E3B0B4><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define CFG_Dev_CtrlWay_Is_PWM_Set_Time 0x20 //PWM<57><4D><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
#define CFG_Dev_CtrlWay_Is_A9LD_Set_Time 0x21 //A9LD<4C><44><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
#define CFG_Dev_CtrlWay_Is_A8PB_Set_Time 0x22 //A8PB<50><42><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
#define CFG_Dev_CtrlWay_Is_C12_Set_Time 0x23 //C12<31><32><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
#define CFG_Dev_CtrlWay_Is_RGB_Set_Time 0x24 //RGB<47><42><EFBFBD>⽥<EFBFBD><E2BDA5>ʱ<EFBFBD><CAB1>
|
||||
|
||||
#define Dim_Global_Value_Cmd 0x30 //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Dim_UpLimit_Value_Cmd 0x31 //ȫ<>ֿɵ<D6BF><C9B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Dim_DnLimit_Value_Cmd 0x32 //ȫ<>ֿɵ<D6BF><C9B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
typedef enum{
|
||||
LED_OUT_CH01,
|
||||
LED_OUT_CH02,
|
||||
LED_OUT_CH03,
|
||||
LED_OUT_CH04,
|
||||
LED_OUT_CH05,
|
||||
LED_OUT_CH06,
|
||||
LED_OUT_CH07,
|
||||
LED_OUT_CH08,
|
||||
LED_OUT_CH09,
|
||||
LED_OUT_CH10,
|
||||
LED_OUT_CH11,
|
||||
LED_OUT_CH12,
|
||||
LED_OUT_CH13,
|
||||
LED_OUT_CH14,
|
||||
LED_OUT_CH15,
|
||||
LED_OUT_CH16,
|
||||
LED_OUT_CH17,
|
||||
LED_OUT_CH18,
|
||||
LED_OUT_CH19,
|
||||
LED_OUT_CH20,
|
||||
LED_OUT_CH21,
|
||||
LED_OUT_CH22,
|
||||
LED_OUT_CH23,
|
||||
LED_OUT_CH24,
|
||||
LED_OUT_CH25,
|
||||
LED_OUT_CH26,
|
||||
LED_OUT_CH27,
|
||||
LED_OUT_CH28,
|
||||
LED_OUT_CH29,
|
||||
LED_OUT_CH30,
|
||||
LED_OUT_CH31,
|
||||
LED_OUT_CH32,
|
||||
LED_OUT_CH_MAX,
|
||||
}RS485_LED_OUT_NUM_E;
|
||||
|
||||
#define LED_BUFF_Size LED_OUT_CH_MAX //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
uint8_t DevSendBuf[LED_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬<EFBFBD><E9A3AC><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD>л<EFBFBD>·<EFBFBD><C2B7>״̬
|
||||
uint8_t DevSendBuf_last[LED_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬<EFBFBD><E9A3AC><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD>л<EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t DevSendBufNext[LED_BUFF_Size]; //<2F><EFBFBD>Ϊȫ<CEAA><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
uint8_t DevSaveBuf[LED_BUFF_Size];
|
||||
|
||||
uint8_t DevReadBuf[LED_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·״̬<D7B4>仯<EFBFBD><E4BBAF><EFBFBD>Ʊ<EFBFBD>־
|
||||
uint8_t DevRecBuf[LED_BUFF_Size]; //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>
|
||||
uint8_t DevRecBufLast[LED_BUFF_Size]; //<2F><><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
|
||||
|
||||
uint8_t LEDSn; //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ʾSn<53><6E>
|
||||
|
||||
uint8_t WayCtrli; //<2F><>ʽ<EFBFBD><CABD><EFBFBD>Ƶ<EFBFBD><C6B5>±<EFBFBD>
|
||||
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> ռ4λ
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
|
||||
uint8_t LEDUpLightLimit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t LEDUpLightLimitLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t LEDDownLightLimit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t LEDDownLightLimitLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Dim_Global_Value; //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Dim_Global_Value_Last; //<2F>ϴ<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Dim_GV_Flag; //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
|
||||
uint8_t PWM_Set_Time;
|
||||
uint8_t A9LD_Set_Time;
|
||||
uint8_t A8PB_Set_Time;
|
||||
uint8_t C12_Set_Time;
|
||||
uint8_t RGB_Set_Time;
|
||||
|
||||
uint8_t LEDCtrlCnt; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȿ<EFBFBD><C8BF>Ƽ<EFBFBD><C6BC><EFBFBD>
|
||||
uint8_t LEDLoopValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
|
||||
|
||||
uint8_t LEDLightRelease[LED_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ɿ<EFBFBD><C9BF><EFBFBD><EFBFBD>ȱ<EFBFBD><C8B1><EFBFBD>
|
||||
uint8_t LedUpDown[LED_BUFF_Size]; //ѭ<><D1AD><EFBFBD><EFBFBD><EFBFBD>ⷽ<EFBFBD><E2B7BD>
|
||||
|
||||
uint8_t LEDLightnessReadFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡ<EFBFBD><C8A1>־
|
||||
uint8_t LEDLightnessReadCnt; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȶ<EFBFBD>ȡ<EFBFBD><C8A1>־
|
||||
|
||||
uint8_t LEDCycleStep; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC>
|
||||
|
||||
uint8_t DevCtrlWayBuf[LED_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD>ʽ
|
||||
uint8_t DevCtrlWayBuf_last[LED_BUFF_Size]; //<2F><><EFBFBD>ⷽʽ<E2B7BD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
uint8_t DevCtrlWayContect[LED_BUFF_Size]; //<2F><><EFBFBD>ⷽʽ<E2B7BD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t LEDWayCtrlCnt; //<2F><><EFBFBD>ⷽʽ<E2B7BD><CABD><EFBFBD>Ƽ<EFBFBD><C6BC><EFBFBD>
|
||||
|
||||
uint8_t init_flag; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint16_t LEDCtrlFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȿ<EFBFBD><C8BF>Ʊ<EFBFBD>־
|
||||
uint16_t LEDWayCtrlFlag; //<2F><><EFBFBD>ⷽʽ<E2B7BD><CABD><EFBFBD>Ʊ<EFBFBD>־
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
}RS485_LED_INFO; //485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뺯<EFBFBD><EBBAAF>
|
||||
|
||||
void BLW_RS485_LED_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
void BLW_LED_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t loop,uint16_t start);
|
||||
uint16_t BLW_LED_Read_State(uint32_t devaddr,uint16_t loop);
|
||||
uint8_t Get_BLV485_LED_Online_Status(uint32_t devaddr);
|
||||
void BLW_LED_Group_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start);
|
||||
uint16_t BLW_LED_Group_Read(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_LEDCRTL_H_ */
|
||||
127
BLV_485_Driver/inc/blv_rs485_dev_switchctrl.h
Normal file
127
BLV_485_Driver/inc/blv_rs485_dev_switchctrl.h
Normal file
@@ -0,0 +1,127 @@
|
||||
/*
|
||||
* blv_rs485_dev_switchctrl.h
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_SWITCHCTRL_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_SWITCHCTRL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define Key_BUFF_Size 32
|
||||
#define KeyHoldJudgeTime 400
|
||||
#define SWI_KEY_LONG_PERIOD 200
|
||||
#define SWIOUTUPEXIST 0x00 //<2F><><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>־
|
||||
|
||||
typedef enum{
|
||||
RS_SWITCH_CH1 = 0x00,
|
||||
RS_SWITCH_CH2,
|
||||
RS_SWITCH_CH3,
|
||||
RS_SWITCH_CH4,
|
||||
RS_SWITCH_CH5,
|
||||
RS_SWITCH_CH6,
|
||||
RS_SWITCH_CH7,
|
||||
RS_SWITCH_CH8,
|
||||
RS_SWITCH_CH9,
|
||||
RS_SWITCH_CH10,
|
||||
RS_SWITCH_CH11,
|
||||
RS_SWITCH_CH12,
|
||||
RS_SWITCH_CH13,
|
||||
RS_SWITCH_CH14,
|
||||
RS_SWITCH_CH15,
|
||||
RS_SWITCH_CH16,
|
||||
RS_SWITCH_CH17,
|
||||
RS_SWITCH_CH18,
|
||||
RS_SWITCH_CH19,
|
||||
RS_SWITCH_CH20,
|
||||
RS_SWITCH_CH21,
|
||||
RS_SWITCH_CH22,
|
||||
RS_SWITCH_CH23,
|
||||
RS_SWITCH_CH24,
|
||||
RS_SWITCH_CH25,
|
||||
RS_SWITCH_CH26,
|
||||
RS_SWITCH_CH27,
|
||||
RS_SWITCH_CH28,
|
||||
RS_SWITCH_CH29,
|
||||
RS_SWITCH_CH30,
|
||||
RS_SWITCH_CH_MAX,
|
||||
}RS485_SWITCH_NUM_E;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
KeyNoAction = 0x00, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB6><EFBFBD>
|
||||
KeyPress = 0x01, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>̰<EFBFBD>
|
||||
KeyRelease = 0x02, //<2F><><EFBFBD><EFBFBD><EFBFBD>ɿ<EFBFBD> <20>ͷ<EFBFBD>
|
||||
KeyHold = 0x03, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>
|
||||
RotaryLight = 0x04, //<2F><>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
RotaryVol = 0x05, //<2F><>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
RotaryTemp = 0x06, //<2F><>ת<EFBFBD><D7AA><EFBFBD>¶<EFBFBD>
|
||||
RotaryCCT = 0x07, //<2F><>ת<EFBFBD><D7AA>ɫ<EFBFBD><C9AB>
|
||||
RotaryOther = 0x08, //<2F><>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}keyState_Typedef; //<2F><><EFBFBD>밴<EFBFBD><EBB0B4>״̬ö<CCAC><C3B6>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevReadBuf[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬ÿ<E9A3AC><C3BF><EFBFBD>ֽڴ水<DAB4><E6B0B4><EFBFBD><EFBFBD>״̬
|
||||
uint8_t DevReadBuf_last[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬ÿ<E9A3AC><C3BF><EFBFBD>ֽڴ水<DAB4><E6B0B4><EFBFBD><EFBFBD>״̬
|
||||
|
||||
uint8_t DevSendBuf[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬ÿ<E9A3AC><C3BF><EFBFBD>ֽڴ<D6BD>ָʾ<D6B8>Ƶ<EFBFBD>״̬
|
||||
uint8_t DevSendBuf_last[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>飬ÿ<E9A3AC><C3BF><EFBFBD>ֽڴ<D6BD>ָʾ<D6B8>Ƶ<EFBFBD><C6B5><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
|
||||
uint8_t A9IORepeatFlag; //A9IO<49>ط<EFBFBD><D8B7><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>û<EFBFBD>н<EFBFBD><D0BD>յ<EFBFBD><D5B5><EFBFBD>ֵʱ<D6B5><CAB1><EFBFBD>ط<EFBFBD><D8B7><EFBFBD>־<EFBFBD><D6BE>һ<EFBFBD><D2BB>Sn<53>Ų<EFBFBD><C5B2><EFBFBD><EFBFBD>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD>ֵʱ<D6B5><CAB1><EFBFBD>ط<EFBFBD><D8B7><EFBFBD>־<EFBFBD><D6BE>0<EFBFBD><30>Sn<53><6E><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t SwtInputValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t SwtOutputValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t SwtRelayLedCtrlFlag; //<2F><><EFBFBD><EFBFBD>ָʾ<D6B8>ƿ<EFBFBD><C6BF>Ʊ<EFBFBD>־
|
||||
uint8_t SwtRelayLedCtrlCnt; //ָʾ<D6B8>ƿ<EFBFBD><C6BF>Ƽ<EFBFBD><C6BC><EFBFBD>
|
||||
|
||||
uint8_t KeyCntChangFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD><EFBFBD>
|
||||
uint8_t SwtCycleStep; //<2F><><EFBFBD>ؿ<EFBFBD><D8BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ÿ<EFBFBD><C3BF>ؿ<EFBFBD><D8BF>ƿ<EFBFBD><C6BF><EFBFBD>
|
||||
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t SwitchSn; //<2F><><EFBFBD><EFBFBD>Sn<53><6E>
|
||||
|
||||
uint8_t MultiValidNo[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD> 2024-05-23
|
||||
uint8_t MultiNumber[Key_BUFF_Size]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ǰִ<C7B0><D6B4><EFBFBD>±<EFBFBD> 2024-05-23
|
||||
|
||||
uint8_t RotaryValue_Flag; //<2F><>ťֵ<C5A5>仯<EFBFBD><E4BBAF><EFBFBD><EFBFBD>
|
||||
uint8_t RotaryBL; //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD>״̬
|
||||
uint8_t RotaryBL_Last; //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD>״̬
|
||||
uint8_t RotaryBL_Flag; //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD><EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD><EFBFBD>
|
||||
uint8_t RotaryCCTValue_Flag; //<2F><>ťɫ<C5A5><C9AB>ֵ<EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD><EFBFBD>,2025-07-10,YYW
|
||||
|
||||
uint8_t RL_Upper_limit; //<2F><><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t RL_Upper_limit_Last; //<2F><><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t RL_Lower_limit; //<2F><><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t RL_Lower_limit_Last; //<2F><><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t RL_Limit_Flag;
|
||||
uint8_t Rotary_PageFlag; //<2F><>ťҳ<C5A5><D2B3><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD><C3B7>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
|
||||
uint16_t RotaryValue[5]; //<2F><>ť<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>ֵ
|
||||
|
||||
uint32_t Rotary_PageEn; //<2F><>ťҳ<C5A5><D2B3><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
uint32_t Rotary_PageEnLast;
|
||||
uint32_t KeyBitValue; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ֵ 32<33><32>λ<EFBFBD><CEBB><EFBFBD>Ա<EFBFBD>ʾ32<33><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>λ<EFBFBD><CEBB>ʼ<EFBFBD>洢 OCY<43><59><EFBFBD>أ<EFBFBD>1<EFBFBD><31>ʾ<EFBFBD>г<EFBFBD><D0B3><EFBFBD> 0<><30>ʾ<EFBFBD><EFBFBD><DEB3><EFBFBD>
|
||||
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
}RS485_SWI_INFO; //485<38><35><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뺯<EFBFBD><EBBAAF>
|
||||
|
||||
void BLW_RS485_Switch_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
uint8_t Get_Switch_Online_Status(uint32_t devaddr);
|
||||
uint8_t Dev_Swi_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||
void Dev_Swi_Output_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t DevAddr, uint16_t DevOutputLoop, uint16_t DevOutputType);
|
||||
uint16_t Dev_Swi_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_SWITCHCTRL_H_ */
|
||||
175
BLV_485_Driver/inc/blv_rs485_dev_tempctrl.h
Normal file
175
BLV_485_Driver/inc/blv_rs485_dev_tempctrl.h
Normal file
@@ -0,0 +1,175 @@
|
||||
/*
|
||||
* blv_rs485_dev_tempfun.h
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_TEMPCTRL_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_TEMPCTRL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
|
||||
#define TMEP_TYPE_IR 0 //<2F><><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ٲ<EFBFBD><D9B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƽ̵<C6BC><CCB5><EFBFBD>
|
||||
#define TEMP_TYPE_VALVE 1 //<2F><><EFBFBD>ŷ<EFBFBD><C5B7>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>ٻ<EFBFBD><D9BB><EFBFBD><EFBFBD>Ƽ̵<C6BC><CCB5><EFBFBD>
|
||||
|
||||
#define TEM_DecTem 15 //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
#define TEM_AddTem 33 //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
#define TEM_DecFan 14 //<2F><><EFBFBD>ٷ<EFBFBD><D9B7><EFBFBD>
|
||||
#define TEM_AddFan 34 //<2F><><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD>
|
||||
|
||||
#define TEM_MIN_SET 0x10 //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
#define TEM_MAX_SET 0x20 //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
|
||||
#define TEMP_ONOFF_CTRL_MAX 0x03 //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define TEMP_VALVE_OPEN 0x01 //<2F><><EFBFBD><EFBFBD>
|
||||
#define TEMP_VALVE_CLOSE 0x00 //<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
#define TEMP_ON 0x01 //<2F>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_OFF 0x02 //<2F>յ<EFBFBD><D5B5>ػ<EFBFBD>
|
||||
|
||||
#define TEMP_STATE_ON 0x01 //<2F>յ<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||
#define TEMP_STATE_OFF 0x00 //<2F>յ<EFBFBD>״̬<D7B4>ػ<EFBFBD>
|
||||
|
||||
#define TEMP_HIGH 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_MID 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_LOW 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_FANAUTO 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>
|
||||
|
||||
#define TEMP_COLD 0x01 //<2F>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_HOT 0x02 //<2F>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TEMP_WIND 0x03 //<2F>յ<EFBFBD><D5B5>ͷ<EFBFBD>
|
||||
#define TEMP_MODEAUTO 0x00 //<2F>յ<EFBFBD>ģʽ<C4A3>Զ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>Ψ<EFBFBD><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD>ƿյ<C6BF>ʱ <20>Ŵ<EFBFBD><C5B4><EFBFBD> <20>ϱ<EFBFBD><CFB1>յ<EFBFBD><D5B5><EFBFBD>״̬<D7B4><CCAC>û<EFBFBD><C3BB><EFBFBD>Զ<EFBFBD>
|
||||
|
||||
#define TEMTEMPCONVER(data) ((0x00 == data)?TEM_MAX_SET:data) //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD>¶<EFBFBD>ת<EFBFBD><D7AA>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32<33><32>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t indoor_t ; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
uint8_t set_t ; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>
|
||||
uint8_t valve ; // 1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
|
||||
uint8_t fan ; // 1<><31><EFBFBD><EFBFBD>,2<><32><EFBFBD><EFBFBD>,3<><33><EFBFBD><EFBFBD>,0ֹͣ,4<>Զ<EFBFBD>
|
||||
uint8_t mode ; // 1<><31><EFBFBD><EFBFBD>,2<><32><EFBFBD><EFBFBD>,3<>ͷ<EFBFBD>,0<>Զ<EFBFBD>
|
||||
uint8_t on_off ; // 1<><31>,2<><32>
|
||||
}TemState_Struct;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t IndoorFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD><C2B6>жϱ<D0B6>־
|
||||
uint8_t SetTFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD><C2B6>жϱ<D0B6>־
|
||||
uint8_t ValveFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
||||
uint8_t FanFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
||||
uint8_t ModeFlag:1; //ģʽ<C4A3>жϱ<D0B6>־
|
||||
uint8_t OnOffFlag:1; //<2F><><EFBFBD>ػ<EFBFBD><D8BB>жϱ<D0B6>־
|
||||
|
||||
uint8_t IndoorState:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>״̬
|
||||
uint8_t SetTState:1; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶<EFBFBD>״̬
|
||||
uint8_t HValveFlag:1; //<2F>ȷ<EFBFBD><C8B7>жϱ<D0B6>־
|
||||
uint8_t HValveState:1; //<2F>ȷ<EFBFBD>״̬
|
||||
uint8_t ValveState:1; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint8_t FanState:2; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint8_t ModeState:2; //ģʽ״̬
|
||||
uint8_t OnOffState:1; //<2F><><EFBFBD>ػ<EFBFBD>״̬
|
||||
|
||||
}TemCond_Struct; //<2F><>һ<EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>״̬һ<CCAC><D2BB><EFBFBD>ж<EFBFBD> <20>ǵ<EFBFBD>һ<EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1>ֻ<EFBFBD><D6BB><EFBFBD>жϱ<D0B6>־λ
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t TemIndoorCtrlVar ; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶ȿ<C2B6><C8BF>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t TemSetTCtrlVar ; //<2F><><EFBFBD><EFBFBD><EFBFBD>¶ȿ<C2B6><C8BF>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t TemValveCtrlVar ; //<2F><><EFBFBD>ſ<EFBFBD><C5BF>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t TemFanCtrlVar ; //<2F><><EFBFBD>ٿ<EFBFBD><D9BF>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t TemModeCtrlVar ; //ģʽ<C4A3><CABD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t TemOnOffCtrlVar ; //<2F><><EFBFBD>ػ<EFBFBD><D8BB><EFBFBD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}TemStateCtrlVar_Struct;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
|
||||
|
||||
TemState_Struct TemState;
|
||||
|
||||
TemState_Struct TemStateCtrl; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD>Ƶ<EFBFBD>״̬
|
||||
TemState_Struct TemStateCtrlLast; //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD>Ƶ<EFBFBD><C6B5><EFBFBD>һ<EFBFBD><D2BB>״̬
|
||||
|
||||
TemStateCtrlVar_Struct TemStateCtrlFlag; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־
|
||||
TemStateCtrlVar_Struct TemStateCtrlCnt; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƽ<EFBFBD><C6BC><EFBFBD>
|
||||
|
||||
TemCond_Struct TemCondCfg; //<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>6λһ<CEBB><D2BB>Ϊ1ʱ<31><CAB1><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>һ<EFBFBD><D2BB><EFBFBD><EFBFBD> <20><>6λ2<CEBB><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1ʱ<31><CAB1>Ϊ<EFBFBD>ǵ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
TemCond_Struct TemCondRec; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>6λΪ<CEBB><CEAA><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD> <20><>10λΪ<CEBB><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t FanAutoRelay; //<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
uint8_t FanAutoFlag; //Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD>٣<EFBFBD>Ϊ1<CEAA><31><EFBFBD><EFBFBD>Э<EFBFBD><D0AD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t relay_out; //0λ<30><CEBB><EFBFBD><EFBFBD> 1λ<31><CEBB><EFBFBD><EFBFBD> 2λ<32><CEBB><EFBFBD><EFBFBD> 3λ<33>ȷ<EFBFBD> 4λ<34>䷧
|
||||
uint8_t ValveSameFlag; //<2F><><EFBFBD>ȷ<EFBFBD>һ<EFBFBD><D2BB>Ϊ1 <20><>һ<EFBFBD><D2BB>Ϊ2 //2023-04-17
|
||||
|
||||
uint8_t control_start; //<2F><><EFBFBD>ؿ<EFBFBD><D8BF>ػ<EFBFBD><D8BB><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
|
||||
TemState_Struct TemStateVir; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD>״̬<D7B4>仯<EFBFBD>Ƚ<EFBFBD> <20><>δ<EFBFBD><CEB4>
|
||||
TemState_Struct TemStateLast; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ <20><><EFBFBD><EFBFBD>״̬<D7B4>仯<EFBFBD>ϱ<EFBFBD>
|
||||
|
||||
TemState_Struct TemKeepState;
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> ռ4λ
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> ռ2λ
|
||||
|
||||
uint8_t TemCycleCnt; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>LF<4C>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>ר<EFBFBD><D7A8>
|
||||
|
||||
uint8_t TemDataChangeFlag; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸı<DDB8><C4B1><EFBFBD>־
|
||||
uint8_t TempType; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD>Ĭ<EFBFBD><C4AC>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>м̵<D0BC><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD>ǵ<EFBFBD><C7B5>ŷ<EFBFBD><C5B7>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>0Ϊ<30><CEAA><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD>1Ϊ<31><CEAA><EFBFBD>ŷ<EFBFBD><C5B7>¿<EFBFBD><C2BF><EFBFBD>
|
||||
|
||||
uint8_t TempComSetFlag; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD>²<EFBFBD><C2B2><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>Ϊ1<CEAA><31>C43<34><33><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>²
|
||||
uint8_t TempComSetCnt; //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD>²<EFBFBD><C2B2><EFBFBD><EFBFBD>ü<EFBFBD><C3BC><EFBFBD>
|
||||
|
||||
uint8_t CardEn; //2023-12-26 <20>忨״̬ͬ<CCAC><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t CardFlag; //2023-12-26 <20>忨״̬ͬ<CCAC><CDAC><EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
uint8_t CardCnt; //2023-12-26 <20>忨״̬ͬ<CCAC><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t ValveNoExist; //2024-06-27 ˮ<><CBAE><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t DevPort; //2024-11-05
|
||||
uint8_t DevPort_Last; //2024-11-05
|
||||
uint8_t DevPort_Flag; //2024-11-05
|
||||
|
||||
uint8_t inif_flag; //2025-08-21 <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint8_t Carbon_Set_Temp; //2025-10-13 <20><>̼<EFBFBD><CCBC><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
uint8_t udp_flag; //2025-10-13 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>־λ
|
||||
uint32_t udp_tick; //2025-10-13
|
||||
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
}RS485_TEMP_INFO; //485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뺯<EFBFBD><EBBAAF>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
TemState_Struct TemState; //
|
||||
uint8_t FanAutoRelay; //<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
}RS485_TEMP_BASIC; //485<38>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
typedef void (*RS485_Tem_CycleCtrl_ptr)(Device_Public_Information_G *BUS_Public); //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
typedef void (*RS485_Tem_Ctrl_ptr)(Device_Public_Information_G *BUS_Public,RS485_TEMP_INFO *Rs485Tem, uint8_t CtrlWay); //<2F><><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
void BLW_RS485_TempFun_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
|
||||
void Dev_Temp_State_Sync(TemState_Struct *temp,TemState_Struct *sync_temp);
|
||||
uint16_t Dev_Temp_State_Data(TemState_Struct temp);
|
||||
uint8_t Dev_TEMPCTRL_InType_Get(uint32_t CfgDevAddIn, uint16_t DevInputLoop, uint16_t DevInputType);
|
||||
void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t CfgDevAddOut, uint16_t DevOutputLoop, uint16_t DevOutputType);
|
||||
uint8_t Get_BLV485_TEMP_Online_Status(uint32_t devaddr);
|
||||
uint16_t Get_BLV485_TEMP_Status(uint32_t devaddr,uint16_t loop);
|
||||
|
||||
uint8_t TemSingleJudge(uint32_t CfgDevAdd, RS485_Tem_Ctrl_ptr Rs485TemCtrl, RS485_Tem_CycleCtrl_ptr Rs485TemCycle);
|
||||
uint8_t TemGlobalJudge(uint32_t CfgDevAdd, RS485_Tem_Ctrl_ptr Rs485TemCtrl, RS485_Tem_CycleCtrl_ptr Rs485TemCycle);
|
||||
void Temp_Action_Set(RS485_TEMP_BASIC *Rs485TemRecBuf, RS485_TEMP_INFO *Rs485Tem);
|
||||
void Temp_Action_Set(RS485_TEMP_BASIC *Rs485TemRecBuf, RS485_TEMP_INFO *Rs485Tem);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_TEMPCTRL_H_ */
|
||||
27
BLV_485_Driver/inc/blv_rs485_dev_touchswitch.h
Normal file
27
BLV_485_Driver/inc/blv_rs485_dev_touchswitch.h
Normal file
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* blv_rs485_dev_touchswitch.h
|
||||
*
|
||||
* Created on: Nov 13, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHSWITCH_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHSWITCH_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "logic_file_function.h"
|
||||
#include "blv_rs485_dev_switchctrl.h"
|
||||
|
||||
void BLV_485_Dev_Touch_Switch_Init(Device_Public_Information_G *BUS_Public, RS485_SWI_INFO *Rs485SwiInfo);
|
||||
void BlwRelaySwtRecAsk(uint8_t *data);
|
||||
void BlwTouchSwtRecAsk(uint32_t DevAdd, uint8_t *data, uint16_t DataLen);
|
||||
void BLW_Touch_Rs485_Swi_Pro(Device_Public_Information_G* BUS_Public, uint8_t *data, RS485_SWI_INFO *Switch_Info, uint8_t lens);
|
||||
uint8_t BLW_Rs485_Touch_Swi_Check(uint32_t DevAdd ,uint32_t Data_addr, uint16_t DataLen);
|
||||
void BLW_Touch_Switch_ctrl(Device_Public_Information_G *BUS_Public, RS485_SWI_INFO *Rs485SwiInfo);
|
||||
uint8_t BLW_Touch_SwitchCycleDis(uint32_t DevAdd);
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHSWITCH_H_ */
|
||||
24
BLV_485_Driver/inc/blv_rs485_dev_touchtempt1.h
Normal file
24
BLV_485_Driver/inc/blv_rs485_dev_touchtempt1.h
Normal file
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* blv_rs485_dev_touchtempt1.h
|
||||
*
|
||||
* Created on: Nov 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHTEMPT1_H_
|
||||
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHTEMPT1_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "blv_rs485_dev_tempctrl.h"
|
||||
|
||||
void BLWOut_RS485_TempT1_Data_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1);
|
||||
void BLWOut_RS485_TempT1D_Data_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1);
|
||||
void BLWOut_RS485_TempT1_Activ_Init(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485TempT1);
|
||||
|
||||
void BLWOut_tempT1CardCtrl(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485Tem);
|
||||
void BLV_T1Temp_PortSet_Send(Device_Public_Information_G *BUS_Public, RS485_TEMP_INFO *Rs485Tem);
|
||||
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_TOUCHTEMPT1_H_ */
|
||||
114
BLV_485_Driver/inc/pc_devicetest_fun.h
Normal file
114
BLV_485_Driver/inc/pc_devicetest_fun.h
Normal file
@@ -0,0 +1,114 @@
|
||||
/*
|
||||
* pc_devicetest_fun.h
|
||||
*
|
||||
* Created on: Nov 10, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef BLV_485_DRIVER_INC_PC_DEVICETEST_FUN_H_
|
||||
#define BLV_485_DRIVER_INC_PC_DEVICETEST_FUN_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define PCTESTTYPE 0xF2 //<2F>豸Э<E8B1B8><D0AD> - <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD>ͨѶЭ<D1B6><D0AD>ʹ<EFBFBD><CAB9>
|
||||
#define DEV_PCTEST_TYPE 0xF2 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>б<EFBFBD><D0B1>е<EFBFBD><D0B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define DEV_PCTEST_Addr 0xFC //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD>б<EFBFBD><D0B1>е<EFBFBD><D0B5>豸<EFBFBD><E8B1B8>ַ
|
||||
|
||||
#define BLV_PC_TEST_SearchMCU_CMD 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_SyncTime_CMD 0x02 //ͬ<><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define BLV_PC_TEST_QueryTime_CMD 0x03 //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define BLV_PC_TEST_ConfigInfo_CMD 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>·<EFBFBD> - <20>·<EFBFBD><C2B7>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define BLV_PC_TEST_ReadRegister_CMD 0x05 //<2F><>ȡӳ<C8A1><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_WriteRegister_CMD 0x06 //дӳ<D0B4><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_StartTesting_CMD 0x07 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_SetBaud_CMD 0x08 //<2F><><EFBFBD><EFBFBD>PC<50>˿ڽ<CBBF><DABD><EFBFBD>
|
||||
#define BLV_PC_SET_DEBUG_CMD 0x09 //<2F><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>0 - Debug<75><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define BLV_PC_TEST_GPIO_CMD 0x0A //<2F><><EFBFBD><EFBFBD>GPIO<49><4F><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_SET_MCU_Revision_CMD 0x0B //<2F><><EFBFBD><EFBFBD>MCU<43>汾<EFBFBD>ű<EFBFBD><C5B1><EFBFBD><EFBFBD><EFBFBD>Flash<73><68>
|
||||
#define BLV_PC_READ_MCU_Revision_CMD 0x0C //<2F><>ȡMCU<43>汾<EFBFBD><E6B1BE>
|
||||
#define BLV_PC_SET_MQTT_CMD 0x0D //<2F><><EFBFBD><EFBFBD>MQTT<54><54><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_READ_MQTT_CMD 0x0E //<2F><>ȡMQTT<54><54><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_CORE_TEST_CMD 0x0F //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_READ_RCU_Data_CMD 0x10 //<2F><>ȡRCU<43><55><EFBFBD><EFBFBD> - 2022-06-06 <20><><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_READ_Device_Data_CMD 0x21 //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
|
||||
#define BLV_PC_READ_RCU_VERSION_CMD 0x22 //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>Ϣ<EFBFBD><CFA2><EFBFBD>̼<EFBFBD><CCBC><EFBFBD>laucher<65><72><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>
|
||||
|
||||
#define BLV_PC_TEST_SearchMCU_Relay 0x11 //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_SyncTime_Relay 0x12 //<2F>ظ<EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define BLV_PC_TEST_QueryTime_Relay 0x13 //<2F>ظ<EFBFBD><D8B8><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define BLV_PC_TEST_ConfigInfo_Relay 0x14 //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>·<EFBFBD> - <20>·<EFBFBD><C2B7>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define BLV_PC_TEST_ReadRegister_Relay 0x15 //<2F>ظ<EFBFBD><D8B8><EFBFBD>ȡӳ<C8A1><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_WriteRegister_Relay 0x16 //<2F>ظ<EFBFBD>дӳ<D0B4><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_StartTesting_Relay 0x17 //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_TEST_SetBaud_Relay 0x18 //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>PC<50>˿ڲ<CBBF><DAB2><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ+
|
||||
#define BLV_PC_SET_DEBUG_Relay 0x19 //<2F><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>0 - Debug<75><67><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define BLV_PC_TEST_GPIO_Relay 0x1A //<2F><><EFBFBD><EFBFBD>GPIO<49><4F><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_SET_MCU_Revision_Relay 0x1B //<2F><><EFBFBD><EFBFBD>MCU<43>汾<EFBFBD>ű<EFBFBD><C5B1><EFBFBD><EFBFBD><EFBFBD>Flash<73><68>
|
||||
#define BLV_PC_READ_MCU_Revision_Relay 0x1C //<2F><>ȡMCU<43>汾<EFBFBD><E6B1BE>
|
||||
#define BLV_PC_SET_MQTT_Relay 0x1D //<2F><><EFBFBD><EFBFBD>MQTT<54><54><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_PC_READ_MQTT_Relay 0x1E //<2F><>ȡMQTT<54><54><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD>
|
||||
#define BLV_PC_CORE_TEST_Relay 0x1F //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>Իظ<D4BB>
|
||||
#define BLV_PC_READ_RCU_Data_Relay 0x20 //<2F><>ȡRCU<43><55><EFBFBD>ݻظ<DDBB> - 2022-06-06 <20><><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_READ_Device_Data_Relay 0x31 //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ظ<EFBFBD> - 2024-05-22 <20><><EFBFBD><EFBFBD>
|
||||
#define BLV_PC_READ_RCU_VERSION_Relay 0x32 //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE>Ϣ<EFBFBD><CFA2><EFBFBD>̼<EFBFBD><CCBC><EFBFBD>laucher<65><72><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD> - 2025-07-05 <20><><EFBFBD><EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
|
||||
uint8_t DevSendSN; //<2F><><EFBFBD><EFBFBD>SN<53><4E>
|
||||
uint8_t link_port; //PC <20><><EFBFBD>Ӷ˿<D3B6>
|
||||
uint8_t link_flag; //PC <20><><EFBFBD>ӱ<EFBFBD>־λ
|
||||
uint8_t test_flag; //PC <20><><EFBFBD>Ա<EFBFBD>־λ - 0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԣ<EFBFBD>0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,0x03Ѳ<33>ز<EFBFBD><D8B2><EFBFBD>
|
||||
uint8_t test_dev; //PC <20><><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
uint8_t test_addr; //PC <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
|
||||
uint8_t tour_num; //Ѳ<>ش<EFBFBD><D8B4><EFBFBD>
|
||||
uint8_t tour_succ; //Ѳ<>سɹ<D8B3><C9B9><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t pc_ip[4]; //PC<50><43>IP<49><50>ַ
|
||||
uint16_t pc_port; //PC<50>Ķ˿<C4B6>
|
||||
|
||||
uint32_t tour_tick; //Ѳ<>ز<EFBFBD><D8B2><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t core_tick; //ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t link_baud; //PC ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
}PC_TEST_FLAG_G;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
|
||||
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevSendSN; //<2F><><EFBFBD><EFBFBD>SN<53><4E>
|
||||
|
||||
uint8_t send_flag;
|
||||
uint8_t test_flag; //PC <20><><EFBFBD>Ա<EFBFBD>־λ - 0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԣ<EFBFBD>0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t test_time; //PC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
uint32_t test_tick; //PC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
|
||||
}PC_TEST_DEVICE_INFO;
|
||||
|
||||
extern PC_TEST_FLAG_G g_pc_test;
|
||||
|
||||
void BLV_PC_DEVICE_TEST_Init(void);
|
||||
uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(uint32_t dev_addr);
|
||||
uint8_t BLV_PC_DEVICE_TEST_Data_Processing(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
|
||||
uint8_t BLV_PC_ReadRegister_DataDeal(uint32_t data_addr,uint16_t len);
|
||||
uint8_t BLV_PC_WriteRegister_DataDeal(uint32_t data_addr,uint16_t len);
|
||||
uint8_t BLV_PC_Testing_DataDeal(uint32_t data_addr,uint16_t len);
|
||||
uint8_t BLV_PC_Testing_Data_Reported(uint8_t type,uint8_t dev_type,uint8_t dev_addr,uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t BLV_PC_Testing_Data_Reported2(uint8_t type,uint8_t dev_type,uint8_t dev_addr,uint8_t *data_buff,uint8_t data_len);
|
||||
uint8_t BLV_PC_TEST_TOUR_DATASEND(void);
|
||||
uint8_t BLV_PC_TEST_TOUR_DATASEND2(void);
|
||||
uint8_t BLV_PC_TEST_TOUR_DATACheck(uint32_t data_addr,uint16_t len);
|
||||
uint8_t BLV_PC_TEST_TOUR_ACKSend(uint8_t ack_data);
|
||||
uint8_t BLV_PC_SET_MCU_Revision_Data_Reported(uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t BLV_PC_READ_MCU_Revision_Data_Reported(uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t BLV_PC_READ_RCU_Data_Reported(uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t BLV_PC_READ_RCU_VERSION_Reported(uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t BLV_PC_READ_Device_Data_Reported(uint32_t data_addr,uint8_t data_len);
|
||||
uint8_t SyncTime_DATA_Processing(uint32_t data_addr,uint16_t data_len);
|
||||
uint16_t QueryTime_Relay_DATA_Packaging(uint32_t data_addr,uint16_t data_len);
|
||||
uint8_t TEST_GPIO_Relay_Fail(void);
|
||||
|
||||
|
||||
#endif /* BLV_485_DRIVER_INC_PC_DEVICETEST_FUN_H_ */
|
||||
1782
BLV_485_Driver/pc_devicetest_fun.c
Normal file
1782
BLV_485_Driver/pc_devicetest_fun.c
Normal file
File diff suppressed because it is too large
Load Diff
317
Core/core_riscv.c
Normal file
317
Core/core_riscv.c
Normal file
@@ -0,0 +1,317 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : core_riscv.c
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : RISC-V V4J Core Peripheral Access Layer Source File for CH564
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#include "stdint.h"
|
||||
|
||||
/* define compiler specific symbols */
|
||||
#if defined(__CC_ARM)
|
||||
#define __ASM __asm /* asm keyword for ARM Compiler */
|
||||
#define __INLINE __inline /* inline keyword for ARM Compiler */
|
||||
|
||||
#elif defined(__ICCARM__)
|
||||
#define __ASM __asm /* asm keyword for IAR Compiler */
|
||||
#define __INLINE inline /* inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
#define __ASM __asm /* asm keyword for GNU Compiler */
|
||||
#define __INLINE inline /* inline keyword for GNU Compiler */
|
||||
|
||||
#elif defined(__TASKING__)
|
||||
#define __ASM __asm /* asm keyword for TASKING Compiler */
|
||||
#define __INLINE inline /* inline keyword for TASKING Compiler */
|
||||
|
||||
#endif
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MSTATUS
|
||||
*
|
||||
* @brief Return the Machine Status Register
|
||||
*
|
||||
* @return mstatus value
|
||||
*/
|
||||
uint32_t __get_MSTATUS(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0," "mstatus" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MSTATUS
|
||||
*
|
||||
* @brief Set the Machine Status Register
|
||||
*
|
||||
* @param value - set mstatus value
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void __set_MSTATUS(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mstatus, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MISA
|
||||
*
|
||||
* @brief Return the Machine ISA Register
|
||||
*
|
||||
* @return misa value
|
||||
*/
|
||||
uint32_t __get_MISA(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""misa" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MISA
|
||||
*
|
||||
* @brief Set the Machine ISA Register
|
||||
*
|
||||
* @param value - set misa value
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void __set_MISA(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw misa, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MTVEC
|
||||
*
|
||||
* @brief Return the Machine Trap-Vector Base-Address Register
|
||||
*
|
||||
* @return mtvec value
|
||||
*/
|
||||
uint32_t __get_MTVEC(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mtvec" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MTVEC
|
||||
*
|
||||
* @brief Set the Machine Trap-Vector Base-Address Register
|
||||
*
|
||||
* @param value - set mtvec value
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void __set_MTVEC(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mtvec, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MSCRATCH
|
||||
*
|
||||
* @brief Return the Machine Seratch Register
|
||||
*
|
||||
* @return mscratch value
|
||||
*/
|
||||
uint32_t __get_MSCRATCH(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mscratch" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MSCRATCH
|
||||
*
|
||||
* @brief Set the Machine Seratch Register
|
||||
*
|
||||
* @param value - set mscratch value
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void __set_MSCRATCH(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mscratch, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MEPC
|
||||
*
|
||||
* @brief Return the Machine Exception Program Register
|
||||
*
|
||||
* @return mepc value
|
||||
*/
|
||||
uint32_t __get_MEPC(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mepc" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MEPC
|
||||
*
|
||||
* @brief Set the Machine Exception Program Register
|
||||
*
|
||||
* @return mepc value
|
||||
*/
|
||||
void __set_MEPC(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mepc, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MCAUSE
|
||||
*
|
||||
* @brief Return the Machine Cause Register
|
||||
*
|
||||
* @return mcause value
|
||||
*/
|
||||
uint32_t __get_MCAUSE(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mcause" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MEPC
|
||||
*
|
||||
* @brief Set the Machine Cause Register
|
||||
*
|
||||
* @return mcause value
|
||||
*/
|
||||
void __set_MCAUSE(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mcause, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MTVAL
|
||||
*
|
||||
* @brief Return the Machine Trap Value Register
|
||||
*
|
||||
* @return mtval value
|
||||
*/
|
||||
uint32_t __get_MTVAL(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mtval" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __set_MTVAL
|
||||
*
|
||||
* @brief Set the Machine Trap Value Register
|
||||
*
|
||||
* @return mtval value
|
||||
*/
|
||||
void __set_MTVAL(uint32_t value)
|
||||
{
|
||||
__ASM volatile("csrw mtval, %0" : : "r"(value));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MVENDORID
|
||||
*
|
||||
* @brief Return Vendor ID Register
|
||||
*
|
||||
* @return mvendorid value
|
||||
*/
|
||||
uint32_t __get_MVENDORID(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mvendorid" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MARCHID
|
||||
*
|
||||
* @brief Return Machine Architecture ID Register
|
||||
*
|
||||
* @return marchid value
|
||||
*/
|
||||
uint32_t __get_MARCHID(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""marchid" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MIMPID
|
||||
*
|
||||
* @brief Return Machine Implementation ID Register
|
||||
*
|
||||
* @return mimpid value
|
||||
*/
|
||||
uint32_t __get_MIMPID(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mimpid": "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_MHARTID
|
||||
*
|
||||
* @brief Return Hart ID Register
|
||||
*
|
||||
* @return mhartid value
|
||||
*/
|
||||
uint32_t __get_MHARTID(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("csrr %0,""mhartid" : "=r"(result));
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __get_SP
|
||||
*
|
||||
* @brief Return SP Register
|
||||
*
|
||||
* @return SP value
|
||||
*/
|
||||
uint32_t __get_SP(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__ASM volatile("mv %0,""sp" : "=r"(result):);
|
||||
return (result);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_SystemReset
|
||||
*
|
||||
* @brief Initiate a system reset request
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((noinline)) void NVIC_SystemReset(void)
|
||||
{
|
||||
asm("li t0, 0xa8");
|
||||
asm("jr t0");
|
||||
}
|
||||
|
||||
686
Core/core_riscv.h
Normal file
686
Core/core_riscv.h
Normal file
@@ -0,0 +1,686 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : core_riscv.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : RISC-V V4J Core Peripheral Access Layer Header File for CH564
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CORE_RISCV_H__
|
||||
#define __CORE_RISCV_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/* IO definitions */
|
||||
#ifdef __cplusplus
|
||||
#define __I volatile /* defines 'read only' permissions */
|
||||
#else
|
||||
#define __I volatile const /* defines 'read only' permissions */
|
||||
#endif
|
||||
#define __O volatile /* defines 'write only' permissions */
|
||||
#define __IO volatile /* defines 'read / write' permissions */
|
||||
|
||||
/* Standard Peripheral Library old types (maintained for legacy purpose) */
|
||||
typedef __I uint64_t vuc64; /* Read Only */
|
||||
typedef __I uint32_t vuc32; /* Read Only */
|
||||
typedef __I uint16_t vuc16; /* Read Only */
|
||||
typedef __I uint8_t vuc8; /* Read Only */
|
||||
|
||||
typedef const uint64_t uc64; /* Read Only */
|
||||
typedef const uint32_t uc32; /* Read Only */
|
||||
typedef const uint16_t uc16; /* Read Only */
|
||||
typedef const uint8_t uc8; /* Read Only */
|
||||
|
||||
typedef __I int64_t vsc64; /* Read Only */
|
||||
typedef __I int32_t vsc32; /* Read Only */
|
||||
typedef __I int16_t vsc16; /* Read Only */
|
||||
typedef __I int8_t vsc8; /* Read Only */
|
||||
|
||||
typedef const int64_t sc64; /* Read Only */
|
||||
typedef const int32_t sc32; /* Read Only */
|
||||
typedef const int16_t sc16; /* Read Only */
|
||||
typedef const int8_t sc8; /* Read Only */
|
||||
|
||||
typedef __IO uint64_t vu64;
|
||||
typedef __IO uint32_t vuint32_t;
|
||||
typedef __IO uint16_t vu16;
|
||||
typedef __IO uint8_t vuint8_t;
|
||||
|
||||
typedef uint64_t u64;
|
||||
typedef uint32_t u32;
|
||||
typedef uint16_t u16;
|
||||
typedef uint8_t u8;
|
||||
|
||||
typedef __IO int64_t vs64;
|
||||
typedef __IO int32_t vs32;
|
||||
typedef __IO int16_t vs16;
|
||||
typedef __IO int8_t vs8;
|
||||
|
||||
typedef int64_t s64;
|
||||
typedef int32_t s32;
|
||||
typedef int16_t s16;
|
||||
typedef int8_t s8;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
NoREADY = 0,
|
||||
READY = !NoREADY
|
||||
} ErrorStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
#define RV_STATIC_INLINE static inline
|
||||
|
||||
/* memory mapped structure for Program Fast Interrupt Controller (PFIC) */
|
||||
typedef struct
|
||||
{
|
||||
__I uint32_t ISR[8];
|
||||
__I uint32_t IPR[8];
|
||||
__IO uint32_t ITHRESDR;
|
||||
__IO uint32_t RESERVED;
|
||||
__IO uint32_t CFGR;
|
||||
__I uint32_t GISR;
|
||||
__IO uint8_t VTFIDR[4];
|
||||
uint8_t RESERVED0[12];
|
||||
__IO uint32_t VTFADDR[4];
|
||||
uint8_t RESERVED1[0x90];
|
||||
__O uint32_t IENR[8];
|
||||
uint8_t RESERVED2[0x60];
|
||||
__O uint32_t IRER[8];
|
||||
uint8_t RESERVED3[0x60];
|
||||
__O uint32_t IPSR[8];
|
||||
uint8_t RESERVED4[0x60];
|
||||
__O uint32_t IPRR[8];
|
||||
uint8_t RESERVED5[0x60];
|
||||
__IO uint32_t IACTR[8];
|
||||
uint8_t RESERVED6[0xE0];
|
||||
__IO uint8_t IPRIOR[256];
|
||||
uint8_t RESERVED7[0x810];
|
||||
__IO uint32_t SCTLR;
|
||||
} PFIC_Type;
|
||||
|
||||
/* memory mapped structure for SysTick */
|
||||
typedef struct
|
||||
{
|
||||
__IO uint32_t CTLR;
|
||||
__IO uint32_t SR;
|
||||
__IO uint64_t CNT;
|
||||
__IO uint64_t CMP;
|
||||
} SysTick_Type;
|
||||
|
||||
#define PFIC ((PFIC_Type *)0xE000E000)
|
||||
#define NVIC PFIC
|
||||
#define NVIC_KEY1 ((uint32_t)0xFA050000)
|
||||
#define NVIC_KEY2 ((uint32_t)0xBCAF0000)
|
||||
#define NVIC_KEY3 ((uint32_t)0xBEEF0000)
|
||||
#define SysTick ((SysTick_Type *)0xE000F000)
|
||||
|
||||
/* CSR_Operation_Function */
|
||||
#define READ_CSR(reg) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
__asm volatile("csrr %0, " #reg : "=r"(__tmp)); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
#define WRITE_CSR(reg, val) \
|
||||
({ \
|
||||
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
|
||||
__asm volatile("csrw " #reg ", %0" ::"i"(val)); \
|
||||
else \
|
||||
__asm volatile("csrw " #reg ", %0" ::"r"(val)); \
|
||||
})
|
||||
|
||||
#define SWAP_CSR(reg, val) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
|
||||
__asm volatile("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
|
||||
else \
|
||||
__asm volatile("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
#define SET_CSR(reg, bit) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
|
||||
__asm volatile("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
|
||||
else \
|
||||
__asm volatile("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
#define CLEAR_CSR(reg, bit) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
|
||||
__asm volatile("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
|
||||
else \
|
||||
__asm volatile("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __enable_irq
|
||||
*
|
||||
* @brief Enable Global Interrupt
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void __enable_irq()
|
||||
{
|
||||
__asm volatile("csrs 0x800, %0" : : "r"(0x88));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __disable_irq
|
||||
*
|
||||
* @brief Disable Global Interrupt
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void __disable_irq()
|
||||
{
|
||||
__asm volatile("csrc 0x800, %0" : : "r"(0x88));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __NOP
|
||||
*
|
||||
* @brief nop
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void __NOP()
|
||||
{
|
||||
__asm volatile("nop");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_EnableIRQ
|
||||
*
|
||||
* @brief Enable Interrupt
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->IENR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_DisableIRQ
|
||||
*
|
||||
* @brief Disable Interrupt
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->IRER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_GetStatusIRQ
|
||||
*
|
||||
* @brief Get Interrupt Enable State
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return 1 - Interrupt Pending Enable
|
||||
* 0 - Interrupt Pending Disable
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t NVIC_GetStatusIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
return ((uint32_t)((NVIC->ISR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_GetPendingIRQ
|
||||
*
|
||||
* @brief Get Interrupt Pending State
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return 1 - Interrupt Pending Enable
|
||||
* 0 - Interrupt Pending Disable
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
return ((uint32_t)((NVIC->IPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_SetPendingIRQ
|
||||
*
|
||||
* @brief Set Interrupt Pending
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->IPSR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_ClearPendingIRQ
|
||||
*
|
||||
* @brief Clear Interrupt Pending
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
|
||||
{
|
||||
NVIC->IPRR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_GetActive
|
||||
*
|
||||
* @brief Get Interrupt Active State
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
*
|
||||
* @return 1 - Interrupt Active
|
||||
* 0 - Interrupt No Active
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
|
||||
{
|
||||
return ((uint32_t)((NVIC->IACTR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F))) ? 1 : 0));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn NVIC_SetPriority
|
||||
*
|
||||
* @brief Set Interrupt Priority
|
||||
*
|
||||
* @param IRQn - Interrupt Numbers
|
||||
* interrupt nesting enable(CSR-0x804 bit1 = 1)
|
||||
* priority - bit[7] - Preemption Priority
|
||||
* bit[6:5] - Sub priority
|
||||
* bit[4:0] - Reserve
|
||||
* interrupt nesting disable(CSR-0x804 bit1 = 0)
|
||||
* priority - bit[7:5] - Sub priority
|
||||
* bit[4:0] - Reserve
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint8_t priority)
|
||||
{
|
||||
NVIC->IPRIOR[(uint32_t)(IRQn)] = priority;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __WFI
|
||||
*
|
||||
* @brief Wait for Interrupt
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void __WFI(void)
|
||||
{
|
||||
NVIC->SCTLR &= ~(1 << 3); // wfi
|
||||
__asm volatile("wfi");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn _SEV
|
||||
*
|
||||
* @brief Set Event
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void _SEV(void)
|
||||
{
|
||||
uint32_t t;
|
||||
|
||||
t = NVIC->SCTLR;
|
||||
NVIC->SCTLR |= (1 << 3) | (1 << 5);
|
||||
NVIC->SCTLR = (NVIC->SCTLR & ~(1 << 5)) | (t & (1 << 5));
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn _WFE
|
||||
*
|
||||
* @brief Wait for Events
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void _WFE(void)
|
||||
{
|
||||
NVIC->SCTLR |= (1 << 3);
|
||||
__asm volatile("wfi");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __WFE
|
||||
*
|
||||
* @brief Wait for Events
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void __WFE(void)
|
||||
{
|
||||
_SEV();
|
||||
_WFE();
|
||||
_WFE();
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn SetVTFIRQ
|
||||
*
|
||||
* @brief Set VTF Interrupt
|
||||
*
|
||||
* @param addr - VTF interrupt service function base address.
|
||||
* IRQn - Interrupt Numbers
|
||||
* num - VTF Interrupt Numbers
|
||||
* NewState - DISABLE or ENABLE
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void SetVTFIRQ(uint32_t addr, IRQn_Type IRQn, uint8_t num,
|
||||
FunctionalState NewState)
|
||||
{
|
||||
if (num > 3)
|
||||
return;
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
NVIC->VTFIDR[num] = IRQn;
|
||||
NVIC->VTFADDR[num] = ((addr & 0xFFFFFFFE) | 0x1);
|
||||
}
|
||||
else
|
||||
{
|
||||
NVIC->VTFIDR[num] = IRQn;
|
||||
NVIC->VTFADDR[num] = ((addr & 0xFFFFFFFE) & (~0x1));
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ICacheEnable
|
||||
*
|
||||
* @brief Enable ICache
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void ICacheEnable(void)
|
||||
{
|
||||
WRITE_CSR(0xBD0, 0x4);
|
||||
__asm volatile("fence.i");
|
||||
CLEAR_CSR(0xBC2, 0x2);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ICacheDisable
|
||||
*
|
||||
* @brief Disable ICache
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void ICacheDisable(void)
|
||||
{
|
||||
SET_CSR(0xBC2, 0x2);
|
||||
WRITE_CSR(0xBD0, 0x4);
|
||||
__asm volatile("fence.i");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ICacheInvalidate
|
||||
*
|
||||
* @brief Invalidate ICache
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void ICacheInvalidate(void)
|
||||
{
|
||||
WRITE_CSR(0xBD0, 0x4);
|
||||
__asm volatile("fence.i");
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ICacheInvalidate_By_Address
|
||||
*
|
||||
* @brief Invalidate ICache By Address
|
||||
*
|
||||
* @param addr - operation address(addr%4 = 0)
|
||||
* size - operation size(unit 4Byte)
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE void ICacheInvalidate_By_Address(uint32_t *addr, uint32_t size)
|
||||
{
|
||||
uint32_t t;
|
||||
uint32_t temp;
|
||||
|
||||
for (t = 0; t < size; t++)
|
||||
{
|
||||
temp = (uint32_t)(addr + t);
|
||||
WRITE_CSR(0xBD0, (temp & 0xFFFFFFF8));
|
||||
__asm volatile("fence.i");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOADD_W
|
||||
*
|
||||
* @brief Atomic Add with 32bit value
|
||||
* Atomically ADD 32bit value with value in memory using amoadd.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be ADDed
|
||||
*
|
||||
* @return return memory value + add value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOADD_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amoadd.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOAND_W
|
||||
*
|
||||
* @brief Atomic And with 32bit value
|
||||
* Atomically AND 32bit value with value in memory using amoand.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be ANDed
|
||||
*
|
||||
* @return return memory value & and value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOAND_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amoand.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOMAX_W
|
||||
*
|
||||
* @brief Atomic signed MAX with 32bit value
|
||||
* Atomically signed max compare 32bit value with value in memory using amomax.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be compared
|
||||
*
|
||||
* @return the bigger value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMAX_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amomax.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOMAXU_W
|
||||
*
|
||||
* @brief Atomic unsigned MAX with 32bit value
|
||||
* Atomically unsigned max compare 32bit value with value in memory using amomaxu.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be compared
|
||||
*
|
||||
* @return return the bigger value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMAXU_W(volatile uint32_t *addr, uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__asm volatile("amomaxu.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOMIN_W
|
||||
*
|
||||
* @brief Atomic signed MIN with 32bit value
|
||||
* Atomically signed min compare 32bit value with value in memory using amomin.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be compared
|
||||
*
|
||||
* @return the smaller value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOMIN_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amomin.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOMINU_W
|
||||
*
|
||||
* @brief Atomic unsigned MIN with 32bit value
|
||||
* Atomically unsigned min compare 32bit value with value in memory using amominu.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be compared
|
||||
*
|
||||
* @return the smaller value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOMINU_W(volatile uint32_t *addr, uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__asm volatile("amominu.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOOR_W
|
||||
*
|
||||
* @brief Atomic OR with 32bit value
|
||||
* Atomically OR 32bit value with value in memory using amoor.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be ORed
|
||||
*
|
||||
* @return return memory value | and value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOOR_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amoor.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOSWAP_W
|
||||
*
|
||||
* @brief Atomically swap new 32bit value into memory using amoswap.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* newval - New value to be stored into the address
|
||||
*
|
||||
* @return return the original value in memory
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE uint32_t __AMOSWAP_W(volatile uint32_t *addr, uint32_t newval)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
__asm volatile("amoswap.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(newval) : "memory");
|
||||
return result;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn __AMOXOR_W
|
||||
*
|
||||
* @brief Atomic XOR with 32bit value
|
||||
* Atomically XOR 32bit value with value in memory using amoxor.d.
|
||||
*
|
||||
* @param addr - Address pointer to data, address need to be 4byte aligned
|
||||
* value - value to be XORed
|
||||
*
|
||||
* @return return memory value ^ and value
|
||||
*/
|
||||
__attribute__((always_inline)) RV_STATIC_INLINE int32_t __AMOXOR_W(volatile int32_t *addr, int32_t value)
|
||||
{
|
||||
int32_t result;
|
||||
|
||||
__asm volatile("amoxor.w %0, %2, %1" : "=r"(result), "+A"(*addr) : "r"(value) : "memory");
|
||||
return *addr;
|
||||
}
|
||||
|
||||
/* Core_Exported_Functions */
|
||||
extern uint32_t __get_MSTATUS(void);
|
||||
extern void __set_MSTATUS(uint32_t value);
|
||||
extern uint32_t __get_MISA(void);
|
||||
extern void __set_MISA(uint32_t value);
|
||||
extern uint32_t __get_MTVEC(void);
|
||||
extern void __set_MTVEC(uint32_t value);
|
||||
extern uint32_t __get_MSCRATCH(void);
|
||||
extern void __set_MSCRATCH(uint32_t value);
|
||||
extern uint32_t __get_MEPC(void);
|
||||
extern void __set_MEPC(uint32_t value);
|
||||
extern uint32_t __get_MCAUSE(void);
|
||||
extern void __set_MCAUSE(uint32_t value);
|
||||
extern uint32_t __get_MTVAL(void);
|
||||
extern void __set_MTVAL(uint32_t value);
|
||||
extern uint32_t __get_MVENDORID(void);
|
||||
extern uint32_t __get_MARCHID(void);
|
||||
extern uint32_t __get_MIMPID(void);
|
||||
extern uint32_t __get_MHARTID(void);
|
||||
extern uint32_t __get_SP(void);
|
||||
extern void NVIC_SystemReset(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
263
Flashlib/ISP564.h
Normal file
263
Flashlib/ISP564.h
Normal file
@@ -0,0 +1,263 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ISP564.h
|
||||
* Author : WCH
|
||||
* Version : V1.1.0
|
||||
* Date : 2024/07/17
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* FLASH firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __ISP564_H
|
||||
#define __ISP564_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "stdint.h"
|
||||
|
||||
/* FLASH Status */
|
||||
typedef enum
|
||||
{
|
||||
FLASH_COMPLETE,
|
||||
FLASH_TIMEOUT,
|
||||
FLASH_VERIFY_ERROR,
|
||||
FLASH_ADR_RANGE_ERROR,
|
||||
FLASH_UNLOCK_ERROR,
|
||||
}FLASH_Status;
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_Unlock
|
||||
*
|
||||
* @brief Unlocks the FLASH Program and Erase Controller.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
extern void FLASH_Unlock(void);
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_Lock
|
||||
*
|
||||
* @brief Locks the FLASH Program and Erase Controller.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
extern void FLASH_Lock(void);
|
||||
|
||||
/*********************************************************************
|
||||
* @fn GetMACAddress
|
||||
*
|
||||
* @brief Get MAC address(6Bytes)
|
||||
*
|
||||
* @param Buffer - Pointer to the buffer where data should be stored,
|
||||
* Must be aligned to 4 bytes.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT.
|
||||
*/
|
||||
extern FLASH_Status GetMACAddress( void *Buffer );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn GET_UNIQUE_ID
|
||||
*
|
||||
* @brief Get unique ID(8Bytes)
|
||||
*
|
||||
* @param Buffer - Pointer to the buffer where data should be stored,
|
||||
* Must be aligned to 4 bytes.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT.
|
||||
*/
|
||||
extern FLASH_Status GET_UNIQUE_ID( void *Buffer );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn GetCHIPID
|
||||
*
|
||||
* @brief Get chip ID(4Bytes)
|
||||
*
|
||||
* @param Buffer - Pointer to the buffer where data should be stored,
|
||||
* Must be aligned to 4 bytes.
|
||||
* ChipID List-
|
||||
* CH564L-0x564005x8
|
||||
* CH564Q-0x564105x8
|
||||
* CH564F-0x564305x8
|
||||
* CH564C-0x564205x8
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT.
|
||||
*/
|
||||
extern FLASH_Status GetCHIPID( void *Buffer );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn Get_Flash_Size
|
||||
*
|
||||
* @brief Get FLASH Size(1Bytes)
|
||||
*
|
||||
* @param Buffer - Pointer to the buffer where data should be stored.
|
||||
* 0 - FLASH-256K
|
||||
* ROMA(UserFLASH)
|
||||
* - Size(192K)
|
||||
* - Address range(0x0 -- 0x2FFFF)
|
||||
* EEPROM(DataFLASH)
|
||||
* - Size(32K)
|
||||
* - Address range(0x30000 -- 0x37FFF)
|
||||
* 1 - FLASH-512K
|
||||
* ROMA(UserFLASH)
|
||||
* - Size(448K)
|
||||
* - Address range(0x0 -- 0x6FFFF)
|
||||
* EEPROM(DataFLASH)
|
||||
* - Size(32K)
|
||||
* - Address range(0x70000 -- 0x77FFF)
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT.
|
||||
*/
|
||||
extern FLASH_Status Get_Flash_Size( void *Buffer );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_EnableCodeProtection
|
||||
*
|
||||
* @brief Enables the code protection.
|
||||
*
|
||||
* @return FLASH Status - The returned value can be: FLASH_BUSY, FLASH_ERROR_PG,
|
||||
* FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
|
||||
*/
|
||||
extern FLASH_Status FLASH_EnableCodeProtection( void );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROM_PWR_UP
|
||||
*
|
||||
* @brief The function `FLASH_ROM_PWR_DOWN` sends a command to put
|
||||
* the SPI flash memory into power down mode.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
extern void FLASH_ROM_PWR_DOWN( void );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROM_PWR_UP
|
||||
*
|
||||
* @brief The function `FLASH_ROM_PWR_UP` sets up the SPI flash
|
||||
* control register to power up the flash memory
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
extern void FLASH_ROM_PWR_UP( void );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn EEPROM_READ
|
||||
*
|
||||
* @brief (DataFLASH) - The EEPROM_READ function reads data from a specified address
|
||||
* in flash memory with error handling for address range checks.
|
||||
*
|
||||
* @param StartAddr - Read the starting address of the DataFLASH.
|
||||
* Buffer - Read the value of the DataFLASH.
|
||||
* Length - Read the length of the DataFLASH.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR.
|
||||
*/
|
||||
extern FLASH_Status EEPROM_READ( uint32_t StartAddr, void *Buffer, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn EEPROM_ERASE
|
||||
*
|
||||
* @brief (DataFLASH) - The function EEPROM_ERASE checks the flash size and address
|
||||
* range before erasing a specified portion of flash memory.
|
||||
*
|
||||
* @param StartAddr - Erases the starting address of the DataFLASH(StartAddr%4096 == 0).
|
||||
* Length - Erases the length of the DataFLASH(Length%4096 == 0).
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR,FLASH_UNLOCK_ERROR.
|
||||
*/
|
||||
extern FLASH_Status EEPROM_ERASE( uint32_t StartAddr, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn EEPROM_WRITE
|
||||
*
|
||||
* @brief (DataFLASH) - The function EEPROM_WRITE writes data to EEPROM memory
|
||||
* based on specified address and length, performing address
|
||||
* range and unlock checks.
|
||||
*
|
||||
* @param StartAddr - Writes the starting address of the DataFLASH.
|
||||
* Buffer - Writes the value of the DataFLASH.
|
||||
* Length - Writes the length of the DataFLASH.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR,FLASH_UNLOCK_ERROR.
|
||||
*/
|
||||
extern FLASH_Status EEPROM_WRITE( uint32_t StartAddr, void *Buffer, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROMA_ERASE
|
||||
*
|
||||
* @brief (UserFLASH) - The function `FLASH_ROMA_ERASE` checks the flash size and
|
||||
* address range before erasing a specified portion of flash
|
||||
* memory.
|
||||
*
|
||||
* @param StartAddr - Erases the starting address of the UserFLASH(StartAddr%4096 == 0).
|
||||
* Length - Erases the length of the UserFLASH(Length%4096 == 0).
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR,FLASH_UNLOCK_ERROR.
|
||||
*/
|
||||
extern FLASH_Status FLASH_ROMA_ERASE( uint32_t StartAddr, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROMA_WRITE
|
||||
*
|
||||
* @brief (UserFLASH) - The function FLASH_ROMA_WRITE writes data to a specific
|
||||
* flash memory address after performing size and unlock checks.
|
||||
*
|
||||
* @param StartAddr - Writes the starting address of the UserFLASH.
|
||||
* Buffer - Writes the value of the UserFLASH.
|
||||
* Length - Writes the length of the UserFLASH.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR,FLASH_UNLOCK_ERROR.
|
||||
*/
|
||||
extern FLASH_Status FLASH_ROMA_WRITE( uint32_t StartAddr, void *Buffer, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROMA_VERIFY
|
||||
*
|
||||
* @brief (UserFLASH) - The function `FLASH_ROMA_VERIFY` verifies the contents of
|
||||
* a specified flash memory region against a provided buffer.
|
||||
*
|
||||
* @param StartAddr - Verify the starting address of the UserFLASH.
|
||||
* Buffer - Verify the value of the UserFLASH.
|
||||
* Length - Verify the length of the UserFLASH.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR,FLASH_VERIFY_ERROR.
|
||||
*/
|
||||
extern FLASH_Status FLASH_ROMA_VERIFY( uint32_t StartAddr, void *Buffer, uint32_t Length );
|
||||
|
||||
/*********************************************************************
|
||||
* @fn FLASH_ROMA_READ
|
||||
*
|
||||
* @brief (UserFLASH) - The function `FLASH_ROMA_READ` reads data from a specific
|
||||
* flash memory address with error handling for different flash
|
||||
* size
|
||||
*
|
||||
* @param StartAddr - Read the starting address of the UserFLASH.
|
||||
* Buffer - Read the value of the UserFLASH.
|
||||
* Length - Read the length of the UserFLASH.
|
||||
*
|
||||
* @return FLASH_Status -The returned value can be: FLASH_COMPLETE,
|
||||
* FLASH_TIMEOUT,FLASH_ADR_RANGE_ERROR.
|
||||
*/
|
||||
extern FLASH_Status FLASH_ROMA_READ( uint32_t StartAddr, void *Buffer, uint32_t Length );
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
BIN
Flashlib/libISP564.a
Normal file
BIN
Flashlib/libISP564.a
Normal file
Binary file not shown.
220
Ld/Link.ld
Normal file
220
Ld/Link.ld
Normal file
@@ -0,0 +1,220 @@
|
||||
ENTRY( _start )
|
||||
|
||||
__stack_size = 2048;
|
||||
|
||||
PROVIDE( _stack_size = __stack_size );
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/* FLASH + RAM supports the following configuration
|
||||
FLASH-80K + RAM-64K
|
||||
FLASH-48K + RAM-96K
|
||||
FLASH-16K + RAM-128K
|
||||
*/
|
||||
|
||||
/* FLASH-16K + RAM-128K */
|
||||
/*
|
||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 16K
|
||||
FLASH1 (rx) : ORIGIN = 0x00004000 , LENGTH = 448K - 16K
|
||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 128K
|
||||
*/
|
||||
|
||||
|
||||
/* FLASH-48K + RAM-96K */
|
||||
/*
|
||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 48K
|
||||
FLASH1 (rx) : ORIGIN = 0x0000C000 , LENGTH = 448K - 48K
|
||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 96K
|
||||
*/
|
||||
|
||||
/* FLASH-80K + RAM-64K */
|
||||
/*
|
||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 80K
|
||||
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 448K - 80K
|
||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
||||
*/
|
||||
|
||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 80K
|
||||
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 368K
|
||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
||||
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.init :
|
||||
{
|
||||
_sinit = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(SORT_NONE(.init)))
|
||||
. = ALIGN(4);
|
||||
_einit = .;
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.vector :
|
||||
{
|
||||
*(.vector);
|
||||
_endof_Vector = .;
|
||||
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
PROVIDE( _cache_beg = __cache_beg );
|
||||
PROVIDE( _cache_end = __cache_end );
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*libISP564.a:(.text))
|
||||
KEEP(*libISP564.a:(.text.*))
|
||||
KEEP(*libISP564.a:(.rodata))
|
||||
KEEP(*libISP564.a:(.rodata.*))
|
||||
_endof_Flashlib = .;
|
||||
ASSERT(_endof_Flashlib < ORIGIN(FLASH1), "The Flash lib must maintain in 0-wait zone");
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
*(.gnu.linkonce.t.*)
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.text1 :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( __cache_beg = .);
|
||||
*(.cache);
|
||||
*(.cache.*);
|
||||
PROVIDE( __cache_end = .);
|
||||
*(.non_0_wait);
|
||||
*(.non_0_wait.*);
|
||||
. = ALIGN(4);
|
||||
} >FLASH1 AT>FLASH1
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(SORT_NONE(.fini)))
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
PROVIDE( _etext = . );
|
||||
PROVIDE( _eitcm = . );
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_vma = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.dlalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_lma = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
*(.sdata .sdata.*)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
. = ALIGN(8);
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _sbss = .);
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _ebss = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
PROVIDE( _end = _ebss);
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_susrstack = . );
|
||||
. = . + __stack_size;
|
||||
PROVIDE( _eusrstack = .);
|
||||
} >RAM
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
92
MCU_Driver/blv_authorize.c
Normal file
92
MCU_Driver/blv_authorize.c
Normal file
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* blv_authorize.c
|
||||
*
|
||||
* Created on: Nov 8, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "blv_authorize.h"
|
||||
|
||||
#include "SPI_SRAM.h"
|
||||
#include "rw_logging.h"
|
||||
#include "sram_mem_addr.h"
|
||||
#include <string.h>
|
||||
|
||||
BLV_AUTHORIZE sys_authorize;
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Set_Authorize_Status
|
||||
* Description : <20><><EFBFBD><EFBFBD>BLVϵͳ<CFB5><CDB3>Ȩ״̬
|
||||
* Input :
|
||||
expires_time :<3A><>Ȩʱ<C8A8><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_Set_Authorize_Status(uint32_t Expires_time,uint8_t lock)
|
||||
{
|
||||
memset(&sys_authorize,0,sizeof(BLV_AUTHORIZE));
|
||||
|
||||
sys_authorize.lock_status = lock;
|
||||
sys_authorize.expires_time = Expires_time;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : BLV_Authorize_Processing
|
||||
* Description : BLVϵͳ<CFB5><CDB3>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
utc_time :<3A><><EFBFBD><EFBFBD>utcʱ<63><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void BLV_Authorize_Processing(uint32_t utc_time)
|
||||
{
|
||||
uint32_t temp_tick = utc_time;
|
||||
uint32_t temp_lock = 0;
|
||||
if((sys_authorize.expires_time != 0x00) && (temp_tick >= sys_authorize.expires_time ) )
|
||||
{
|
||||
sys_authorize.lock_status = 1;
|
||||
/*<2A><><EFBFBD>ʱ<E2B5BD>䵽<EFBFBD>ں<DABA><F3A3ACBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC>λ<EFBFBD><CEBB>ͬʱ<CDAC><CAB1><EFBFBD>浽Flash<73><68>*/
|
||||
temp_lock = SRAM_Read_DW(SRAM_Register_Start_ADDRESS + Register_MandateLock_OFFSET);
|
||||
if(temp_lock != 0x00000001)
|
||||
{
|
||||
SRAM_Write_DW(0x01,SRAM_Register_Start_ADDRESS + Register_MandateLock_OFFSET);
|
||||
//Retain_Flash_Register_Data();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_Authorize_Lock_Status
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
|
||||
* Input :
|
||||
0x00<30><30><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩδ<C8A8><CEB4><EFBFBD><EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Set_Authorize_Lock_Status(uint8_t state)
|
||||
{
|
||||
sys_authorize.lock_status = state;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_Authorize_Lock_Status
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
|
||||
* Input : None
|
||||
* Return :
|
||||
0x00<30><30><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩδ<C8A8><CEB4><EFBFBD><EFBFBD>
|
||||
0x01<30><31><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Get_Authorize_Lock_Status(void)
|
||||
{
|
||||
if(sys_authorize.expires_time != 0x00) return sys_authorize.lock_status;
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Get_Authorize_UnixTime
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
* Input : None
|
||||
* Return : <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint32_t Get_Authorize_UnixTime(void)
|
||||
{
|
||||
return sys_authorize.expires_time;
|
||||
}
|
||||
|
||||
|
||||
3037
MCU_Driver/blv_dev_action.c
Normal file
3037
MCU_Driver/blv_dev_action.c
Normal file
File diff suppressed because it is too large
Load Diff
1517
MCU_Driver/blv_netcomm_function.c
Normal file
1517
MCU_Driver/blv_netcomm_function.c
Normal file
File diff suppressed because it is too large
Load Diff
1661
MCU_Driver/blv_rs485_protocol.c
Normal file
1661
MCU_Driver/blv_rs485_protocol.c
Normal file
File diff suppressed because it is too large
Load Diff
235
MCU_Driver/check_fun.c
Normal file
235
MCU_Driver/check_fun.c
Normal file
@@ -0,0 +1,235 @@
|
||||
/*
|
||||
* check_fun.c
|
||||
*
|
||||
* Created on: Nov 8, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "includes.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Log_CheckSum
|
||||
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>SRAM<41>ж<EFBFBD>ȡ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Log_CheckSum(uint32_t addr,uint8_t len)
|
||||
{
|
||||
uint8_t data_sum = 0;
|
||||
for(uint8_t i = 0;i<len;i++)
|
||||
{
|
||||
data_sum += SRAM_Read_Byte(addr+i);
|
||||
}
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Data_CheckSum
|
||||
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Data_CheckSum(uint8_t* data,uint16_t len)
|
||||
{
|
||||
uint8_t data_sum = 0;
|
||||
for(uint16_t i = 0;i<len;i++)
|
||||
{
|
||||
data_sum += data[i];
|
||||
}
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : CheckSum_Overlook_Check
|
||||
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>,<2C><><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>
|
||||
* input: data: <20><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
len <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD><DCB3><EFBFBD>
|
||||
check_id: У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t CheckSum_Overlook_Check(uint8_t *data, uint16_t len, uint16_t check_id)
|
||||
{
|
||||
uint8_t data_sum = 0;
|
||||
|
||||
for(uint16_t i = 0;i<len;i++)
|
||||
{
|
||||
if(check_id != i) data_sum += data[i];
|
||||
}
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NetCRC16
|
||||
* Description : CRCУ<43><D0A3> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void NetCRC16(uint8_t *aStr ,uint16_t len)
|
||||
{
|
||||
uint16_t alen = len-2; //CRC16
|
||||
uint16_t xda , xdapoly ;
|
||||
uint16_t i,j, xdabit ;
|
||||
xda = 0xFFFF ;
|
||||
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
|
||||
for(i=0;i<alen;i++)
|
||||
{
|
||||
xda ^= aStr[i] ;
|
||||
for(j=0;j<8;j++)
|
||||
{
|
||||
xdabit = (uint8_t )(xda & 0x01) ;
|
||||
xda >>= 1 ;
|
||||
if( xdabit ) xda ^= xdapoly ;
|
||||
}
|
||||
}
|
||||
aStr[alen] = (uint8_t)(xda & 0xFF) ;
|
||||
aStr[alen+1] = (uint8_t)(xda>>8) ;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NetCRC16_2
|
||||
* Description : CRCУ<43><D0A3> - <20><>ȡSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
aStr : <20><>ҪУ<D2AA><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
len : <20><><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>512Byte
|
||||
* Return : <20><><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>ֵ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t NetCRC16_2(uint8_t *aStr ,uint16_t len)
|
||||
{
|
||||
uint16_t xda , xdapoly ;
|
||||
uint16_t i,j, xdabit ;
|
||||
xda = 0xFFFF ;
|
||||
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
|
||||
for(i=0;i<len;i++)
|
||||
{
|
||||
xda ^= aStr[i] ;
|
||||
for(j=0;j<8;j++)
|
||||
{
|
||||
xdabit = (uint8_t )(xda & 0x01) ;
|
||||
xda >>= 1 ;
|
||||
if( xdabit ) xda ^= xdapoly ;
|
||||
}
|
||||
}
|
||||
return xda;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NetCRC16_Data
|
||||
* Description : CRCУ<43><D0A3> - CRC<52>ڼ<EFBFBD><DABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
aStr : <20><>ҪУ<D2AA><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
len : <20><><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- Flash<73>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>512Byte
|
||||
crc_id <20><>CRC<52><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5>±<EFBFBD>λ<EFBFBD>ã<EFBFBD><C3A3>͵<EFBFBD>ַ<EFBFBD><D6B7>ǰ
|
||||
* Return : <20><><EFBFBD>ݵ<EFBFBD>У<EFBFBD><D0A3>ֵ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t NetCRC16_Data(uint8_t *aStr ,uint16_t len,uint16_t crc_id)
|
||||
{
|
||||
uint16_t xda , xdapoly ;
|
||||
uint16_t i,j, xdabit ;
|
||||
xda = 0xFFFF ;
|
||||
xdapoly = 0xA001 ; // (X**16 + X**15 + X**2 + 1)
|
||||
for(i=0;i<len;i++)
|
||||
{
|
||||
if((i == crc_id) || (i == (crc_id + 1)))
|
||||
{
|
||||
xda ^= 0x00;
|
||||
}else {
|
||||
xda ^= aStr[i];
|
||||
}
|
||||
|
||||
for(j=0;j<8;j++)
|
||||
{
|
||||
xdabit = (uint8_t )(xda & 0x01) ;
|
||||
xda >>= 1 ;
|
||||
if( xdabit ) xda ^= xdapoly ;
|
||||
}
|
||||
}
|
||||
|
||||
return xda;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DoubleData_CheckSum
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1>
|
||||
* Data1 <20><><EFBFBD>ݰ<EFBFBD>1
|
||||
* Data1Len <20><><EFBFBD>ݰ<EFBFBD>1<EFBFBD>ij<EFBFBD><C4B3><EFBFBD>
|
||||
* Data2 <20><><EFBFBD>ݰ<EFBFBD>2
|
||||
* Data2Len <20><><EFBFBD>ݰ<EFBFBD>2<EFBFBD>ij<EFBFBD><C4B3><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t DoubleData_CheckSum(uint8_t *Data1, uint16_t Data1Len, uint8_t *Data2, uint16_t Data2Len)
|
||||
{
|
||||
uint8_t data_sum = 0;
|
||||
uint16_t i;
|
||||
|
||||
for(i = 0; i < Data1Len;i++)
|
||||
{
|
||||
data_sum += Data1[i];
|
||||
}
|
||||
|
||||
for(i = 0; i < Data2Len; i++)
|
||||
{
|
||||
data_sum += Data2[i];
|
||||
}
|
||||
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SOR_CRC
|
||||
* Description : <20><>У<EFBFBD><D0A3>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t SOR_CRC(uint8_t *Data, uint8_t DataLen)
|
||||
{
|
||||
uint8_t i;
|
||||
uint8_t sor_data = 0;
|
||||
|
||||
for(i = 0; i < DataLen; i++)//i<><69><EFBFBD><EFBFBD>Ϊ0 <20><>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1
|
||||
{
|
||||
sor_data = sor_data+Data[i];
|
||||
}
|
||||
return sor_data;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DevAction_Data_Check
|
||||
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t DeAction_Data_Check(uint32_t sram_addr)
|
||||
{
|
||||
uint16_t data_len = SRAM_Read_Word(sram_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State) + 1);
|
||||
uint8_t data_sum = 0;
|
||||
uint8_t check_temp_buff[SRAM_DevAction_List_Size] = {0};
|
||||
|
||||
if(data_len > SRAM_DevAction_List_Size)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ַ:%08X <20>洢<EFBFBD>ij<EFBFBD><C4B3>ȣ<EFBFBD>%04X",sram_addr, data_len);
|
||||
return 1;
|
||||
}
|
||||
memset(check_temp_buff,0,SRAM_DevAction_List_Size);
|
||||
|
||||
SRAM_DMA_Read_Buff(check_temp_buff,data_len,sram_addr);
|
||||
|
||||
for(uint16_t i = 0;i<data_len;i++)
|
||||
{
|
||||
data_sum += check_temp_buff[i];
|
||||
}
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Dev_CheckSum
|
||||
* Description : <20><>У<EFBFBD><D0A3>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>SRAM<41>ж<EFBFBD>ȡ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t DevAction_CheckSum(uint32_t addr,uint16_t len)
|
||||
{
|
||||
uint8_t data_sum = 0;
|
||||
uint8_t check_temp_buff[SRAM_DevAction_List_Size];// = {0};
|
||||
if(len > SRAM_DevAction_List_Size)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD>ַ:%08X <20>洢<EFBFBD>ij<EFBFBD><C4B3>ȣ<EFBFBD>%04X",addr, len);
|
||||
return 1;
|
||||
}
|
||||
|
||||
memset(check_temp_buff,0,SRAM_DevAction_List_Size);
|
||||
SRAM_DMA_Read_Buff(check_temp_buff,len,addr);
|
||||
|
||||
for(uint16_t i = 0;i<len;i++)
|
||||
{
|
||||
data_sum += check_temp_buff[i];
|
||||
}
|
||||
return ~data_sum;
|
||||
}
|
||||
|
||||
|
||||
363
MCU_Driver/debug.c
Normal file
363
MCU_Driver/debug.c
Normal file
@@ -0,0 +1,363 @@
|
||||
/*
|
||||
* debug.c
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "debug.h"
|
||||
#include <stddef.h>
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
|
||||
volatile uint32_t SysTick_100us = 0;
|
||||
volatile uint32_t SysTick_1ms = 0;
|
||||
volatile uint32_t SysTick_1s = 0;
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void Systick_Init(void)
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>*/
|
||||
NVIC_SetPriority(SysTick_IRQn, 0x00);
|
||||
NVIC_EnableIRQ(SysTick_IRQn);
|
||||
|
||||
/*<2A><><EFBFBD>ö<EFBFBD>ʱ<EFBFBD><CAB1>*/
|
||||
SysTick->CTLR= 0;
|
||||
SysTick->SR = 0;
|
||||
SysTick->CNT = 0;
|
||||
SysTick->CMP = SystemCoreClock/10000;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1000<30><30><EFBFBD><EFBFBD>1000HZ(<28>Ǿ<EFBFBD><C7BE><EFBFBD>1ms<6D><73>һ<EFBFBD><D2BB><EFBFBD>ж<EFBFBD>)
|
||||
SysTick->CTLR= 0xf;
|
||||
}
|
||||
|
||||
void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
static uint8_t NUM = 0;
|
||||
static uint16_t NUM_s = 0;
|
||||
|
||||
SysTick->SR = 0; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־
|
||||
|
||||
SysTick_100us++;
|
||||
NUM++;
|
||||
|
||||
if(NUM >= 10){
|
||||
NUM = 0;
|
||||
|
||||
SysTick_1ms++;
|
||||
NUM_s++;
|
||||
|
||||
if(NUM_s >= 1000){
|
||||
NUM_s = 0x00;
|
||||
SysTick_1s++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn Delay_Us
|
||||
*
|
||||
* @brief Microsecond Delay Time.
|
||||
*
|
||||
* @param n - Microsecond number.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void Delay_Us(uint32_t n)
|
||||
{
|
||||
for(uint32_t i=0;i<n;i++){
|
||||
for(uint32_t j=0;j<30;j++){
|
||||
__NOP();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn Delay_Ms
|
||||
*
|
||||
* @brief Millisecond Delay Time.
|
||||
*
|
||||
* @param n - Millisecond number.
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void Delay_Ms(uint32_t n)
|
||||
{
|
||||
for(uint32_t i=0;i<n;i++){
|
||||
Delay_Us(1000);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn _write
|
||||
*
|
||||
* @brief Support Printf Function
|
||||
*
|
||||
* @param *buf - UART send Data.
|
||||
* size - Data length.
|
||||
*
|
||||
* @return size - Data length
|
||||
*/
|
||||
__attribute__((used)) int _write(int fd, char *buf, int size)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
#if (DEBUG) == DEBUG_UART0
|
||||
while ((R8_UART0_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART0_THR = *(buf++);
|
||||
#elif (DEBUG) == DEBUG_UART1
|
||||
while ((R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART1_THR = *(buf++);
|
||||
#elif (DEBUG) == DEBUG_UART2
|
||||
while ((R8_UART2_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART2_THR = *(buf++);
|
||||
#endif
|
||||
}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn _sbrk
|
||||
*
|
||||
* @brief Change the spatial position of data segment.
|
||||
*
|
||||
* @return size: Data length
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern char _end[];
|
||||
extern char _heap_end[];
|
||||
static char *curbrk = _end;
|
||||
|
||||
if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
|
||||
return NULL - 1;
|
||||
|
||||
curbrk += incr;
|
||||
return curbrk - incr;
|
||||
}
|
||||
|
||||
|
||||
uint32_t SysTick_Now = 0, SysTick_Last = 0, SysTick_Diff = 0;
|
||||
char Dbg_Buffer[100];
|
||||
|
||||
uint32_t Dbg_Switch = (DBG_OPT_ActCond_STATUS << DBG_BIT_ActCond_STATUS_bit) + \
|
||||
(DBG_OPT_MQTT_STATUS << DBG_BIT_MQTT_STATUS_bit) + \
|
||||
(DBG_OPT_Debug_STATUS << DBG_BIT_Debug_STATUS_bit) + \
|
||||
(DBG_OPT_LOGIC_STATUS << DBG_BIT_LOGIC_STATUS_bit) + \
|
||||
(DBG_OPT_DEVICE_STATUS << DBG_BIT_DEVICE_STATUS_bit) + \
|
||||
(DBG_OPT_NET_STATUS << DBG_BIT_NET_STATUS_bit) + \
|
||||
(DBG_OPT_SYS_STATUS << DBG_BIT_SYS_STATUS_bit);
|
||||
|
||||
//<2F>÷<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD>ٴ<EFBFBD><D9B4><EFBFBD><EFBFBD>ռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
void __putchar__ (char ch)
|
||||
{
|
||||
|
||||
#if (DEBUG) == DEBUG_UART0
|
||||
while ((R8_UART0_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART0_THR = ch;
|
||||
#elif (DEBUG) == DEBUG_UART1
|
||||
while ((R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART1_THR = ch;
|
||||
#elif (DEBUG) == DEBUG_UART2
|
||||
while ((R8_UART2_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART2_THR = ch;
|
||||
#elif (DEBUG) == DEBUG_UART3
|
||||
while ((R8_UART3_LSR & RB_LSR_TX_FIFO_EMP) == 0);
|
||||
R8_UART3_THR = ch;
|
||||
#endif
|
||||
|
||||
}
|
||||
/*******************************************************************************
|
||||
* Function Name : Dbg_NoTick_Print
|
||||
* Description : DEBUG<55><47><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӡ
|
||||
* Input :
|
||||
* Return :
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Dbg_NoTick_Print(int DbgOptBit ,const char *fmt, ...)
|
||||
{
|
||||
char ch;
|
||||
va_list ap;
|
||||
|
||||
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
|
||||
{
|
||||
va_start(ap, fmt);
|
||||
while (*fmt) {
|
||||
if (*fmt != '%') {
|
||||
__putchar__(*fmt++);
|
||||
continue;
|
||||
}
|
||||
switch (*++fmt) {
|
||||
case 's':
|
||||
{
|
||||
char *str = va_arg(ap, char *);
|
||||
printf("%s",str);
|
||||
}
|
||||
break;
|
||||
case 'd':
|
||||
{
|
||||
int num = va_arg(ap, int);
|
||||
printf("%d", num);
|
||||
}
|
||||
break;
|
||||
|
||||
case 'x':
|
||||
case 'X':
|
||||
{
|
||||
int num = va_arg(ap, unsigned int);
|
||||
printf("%x", num);
|
||||
}
|
||||
break;
|
||||
// Add other specifiers here...
|
||||
case 'c':
|
||||
case 'C':
|
||||
ch = (unsigned char)va_arg(ap, int);
|
||||
printf("%c", ch);
|
||||
break;
|
||||
default:
|
||||
__putchar__(*fmt);
|
||||
break;
|
||||
}
|
||||
fmt++;
|
||||
}
|
||||
va_end(ap);
|
||||
printf("\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void Dbg_Print(int DbgOptBit ,const char *fmt, ...)
|
||||
{
|
||||
char ch;
|
||||
va_list ap;
|
||||
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
|
||||
{
|
||||
SysTick_Now = SysTick_1ms;
|
||||
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
|
||||
SysTick_Last = SysTick_Now;
|
||||
|
||||
printf("%8d [%6d]: ",SysTick_Now,SysTick_Diff);
|
||||
|
||||
va_start(ap, fmt);
|
||||
while (*fmt) {
|
||||
if (*fmt != '%') {
|
||||
__putchar__(*fmt++);
|
||||
continue;
|
||||
}
|
||||
switch (*++fmt) {
|
||||
case 's':
|
||||
{
|
||||
char *str = va_arg(ap, char *);
|
||||
printf("%s",str);
|
||||
}
|
||||
break;
|
||||
case 'd':
|
||||
{
|
||||
int num = va_arg(ap, int);
|
||||
printf("%d", num);
|
||||
}
|
||||
break;
|
||||
|
||||
case 'x':
|
||||
case 'X':
|
||||
{
|
||||
int num = va_arg(ap, unsigned int);
|
||||
printf("%x", num);
|
||||
}
|
||||
break;
|
||||
// Add other specifiers here...
|
||||
case 'c':
|
||||
case 'C':
|
||||
ch = (unsigned char)va_arg(ap, int);
|
||||
printf("%c", ch);
|
||||
break;
|
||||
default:
|
||||
__putchar__(*fmt);
|
||||
break;
|
||||
}
|
||||
fmt++;
|
||||
}
|
||||
va_end(ap);
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void Dbg_Println(int DbgOptBit ,const char *fmt, ...)
|
||||
{
|
||||
char ch;
|
||||
va_list ap;
|
||||
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
|
||||
{
|
||||
SysTick_Now = SysTick_1ms;
|
||||
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
|
||||
SysTick_Last = SysTick_Now;
|
||||
|
||||
printf("%8d [%6d]: ",SysTick_Now,SysTick_Diff);
|
||||
|
||||
va_start(ap, fmt);
|
||||
while (*fmt) {
|
||||
if (*fmt != '%') {
|
||||
__putchar__(*fmt++);
|
||||
continue;
|
||||
}
|
||||
switch (*++fmt) {
|
||||
case 's':
|
||||
{
|
||||
char *str = va_arg(ap, char *);
|
||||
printf("%s",str);
|
||||
}
|
||||
break;
|
||||
case 'd':
|
||||
{
|
||||
int num = va_arg(ap, int);
|
||||
printf("%d", num);
|
||||
}
|
||||
break;
|
||||
|
||||
case 'x':
|
||||
case 'X':
|
||||
{
|
||||
int num = va_arg(ap, unsigned int);
|
||||
printf("%x", num);
|
||||
}
|
||||
break;
|
||||
// Add other specifiers here...
|
||||
case 'c':
|
||||
case 'C':
|
||||
ch = (unsigned char)va_arg(ap, int);
|
||||
printf("%c", ch);
|
||||
break;
|
||||
default:
|
||||
__putchar__(*fmt);
|
||||
break;
|
||||
}
|
||||
fmt++;
|
||||
}
|
||||
va_end(ap);
|
||||
printf("\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len)
|
||||
{
|
||||
if (DBG_LOG_EN && (Dbg_Switch & (1 << DbgOptBit )))
|
||||
{
|
||||
SysTick_Now = SysTick_1ms;
|
||||
SysTick_Diff = SysTick_Now - SysTick_Last; //<2F><>һ<EFBFBD>δ<EFBFBD>ӡʱ<D3A1><CAB1><EFBFBD><EFBFBD>
|
||||
SysTick_Last = SysTick_Now;
|
||||
|
||||
DBG_Printf("%8d [%6d]: %s",SysTick_Now,SysTick_Diff,cmd);
|
||||
for(uint32_t i=0;i<len;i++)
|
||||
{
|
||||
DBG_Printf("%02X ",buff[i]);
|
||||
}
|
||||
DBG_Printf("\n\r");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
28
MCU_Driver/inc/blv_authorize.h
Normal file
28
MCU_Driver/inc/blv_authorize.h
Normal file
@@ -0,0 +1,28 @@
|
||||
/*
|
||||
* blv_authorize.h
|
||||
*
|
||||
* Created on: Nov 8, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef _BLV_AUTHORIZE_H_
|
||||
#define _BLV_AUTHORIZE_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t lock_status; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>״̬
|
||||
uint8_t last_status;
|
||||
uint32_t expires_time; //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
}BLV_AUTHORIZE;
|
||||
|
||||
void BLV_Set_Authorize_Status(uint32_t Expires_time,uint8_t lock);
|
||||
void BLV_Authorize_Processing(uint32_t utc_time);
|
||||
void Set_Authorize_Lock_Status(uint8_t state);
|
||||
uint8_t Get_Authorize_Lock_Status(void);
|
||||
uint32_t Get_Authorize_UnixTime(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_AUTHORIZE_H_ */
|
||||
304
MCU_Driver/inc/blv_dev_action.h
Normal file
304
MCU_Driver/inc/blv_dev_action.h
Normal file
@@ -0,0 +1,304 @@
|
||||
/*
|
||||
* blv_dev_action.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_BLV_DEV_ACTION_H_
|
||||
#define MCU_DRIVER_INC_BLV_DEV_ACTION_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "ch564.h"
|
||||
|
||||
#define DevActionNameLenMax 0x20 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define DevCtrlNumMax 50 //<2F><>չ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>50
|
||||
|
||||
#define CtrlValid 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
#define CtrlInvalid 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
|
||||
#define CondIsPass 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>
|
||||
#define CondIsNotPass 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD>жϲ<D0B6><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define DEV_STATE_OPEN 0x01 //<2F>豸״̬Ϊ<CCAC><CEAA>
|
||||
#define DEV_STATE_CLOSE 0x02 //<2F>豸״̬Ϊ<CCAC><CEAA>
|
||||
|
||||
#define SCENE_MODE_CTRL 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
#define LIGHT_MODE_CTRL 0x02 //<2F>ƹ<EFBFBD><C6B9><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
|
||||
#define NOR_MODE_CTRL 0x01 //<2F><>ͨģʽ<C4A3><CABD><EFBFBD><EFBFBD>
|
||||
#define SLEEP_MODE_CTRL 0x02 //˯<><CBAF>ģʽ<C4A3><CABD><EFBFBD><EFBFBD>
|
||||
|
||||
#define DEV_CTRLWAY_INVALID 0x00 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><CABD>Ч
|
||||
#define DEV_CTRLWAY_OPEN 0x01 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
|
||||
#define DEV_CTRLWAY_CLOSE 0x02 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>
|
||||
#define DEV_CTRLWAY_RELATESCENE 0x03 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪ<CABD><CEAA>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define DEV_CTRLWAY_STOP 0x06 //<2F><><EFBFBD>Ʒ<EFBFBD>ʽΪͣ
|
||||
|
||||
#define Season_Spring 0x01 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Season_Summer 0x02 //<2F>ļ<EFBFBD>
|
||||
#define Season_Winter 0x03 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Season_Autumn 0x00 //<2F>＾
|
||||
|
||||
#define ACTION_SCENE_ONE 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
|
||||
#define ACTION_SCENE_TWO 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>
|
||||
#define ACTION_SCENE_SLEEP 0x04 //˯<><CBAF>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
|
||||
#define ACTION_SCENE_MAINSWITCH 0x05 //<2F>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָʾ<D6B8>ƾͿ<C6BE><CDBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еƹأ<C6B9>ָʾ<D6B8>ƲŹ<C6B2>
|
||||
#define ACTION_SCENE_HELPSLEEP 0x06 //<2F><><EFBFBD><EFBFBD>ģʽ <20><>ȫ<EFBFBD><C8AB><EFBFBD>ز<EFBFBD><D8B2>㿪<EFBFBD><E3BFAA><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ء<EFBFBD>
|
||||
#define ACTION_SCENE_MULTI 0x0B //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define ACTION_SCENE_Rotary 0x0C //<2F><>ť<EFBFBD><C5A5><EFBFBD><EFBFBD>
|
||||
#define ACTION_SCENE_SLEEP_UNRELATED 0x0E //<2F><>˯<EFBFBD><CBAF><EFBFBD>صij<D8B5><C4B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ᴥ<EFBFBD><E1B4A5><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD><EFBFBD>
|
||||
|
||||
#define NightModeStart 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹģʽ
|
||||
#define NightModeOpen 0x02 //<2F><><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9>
|
||||
#define NightModeClose 0x00 //<2F>ر<EFBFBD>ҹ<EFBFBD><D2B9>
|
||||
|
||||
#define DevCtrlLen 0x06 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȹ̶<C8B9>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
|
||||
#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
|
||||
#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
char DevActionName[DevActionNameLenMax]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32<33><32><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><C6A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>÷ָ<C3B7><D6B8><EFBFBD>
|
||||
}Dev_Action_Core; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t inAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint16_t inType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
uint64_t RoomState:3; //<2F><>̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<>˷<EFBFBD> 3<><33><EFBFBD><EFBFBD> 4<>շ<EFBFBD>
|
||||
uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint64_t EleState:3; //ȡ<><C8A1>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t WashState:3; //ϴ<><CFB4>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t SosState:3; //SOS״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬ 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32>
|
||||
uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31> 2<><32> 3<><33> 4<><34> <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB>1<EFBFBD><31> 2<><32> 3<><33> 0<><30>
|
||||
uint64_t TimeState:3; //ʱ<><CAB1> 1ȫ<31><C8AB> 2<><32><EFBFBD><EFBFBD> 3<><33>ҹ
|
||||
uint64_t NeightFlag:1; //<2F><>ҹ<EFBFBD><D2B9><EFBFBD>й<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD>й<EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ1<CEAA><31><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD> Ϊ0<CEAA><30><EFBFBD><EFBFBD>ҹ<EFBFBD><D2B9><EFBFBD>ܲ<EFBFBD><DCB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint64_t NeightState:2; //<2F><>ҹ״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ 2<><32>ҹ<EFBFBD><D2B9> 0<>˳<EFBFBD><CBB3><EFBFBD>ҹ
|
||||
uint64_t RcuLockState:3; //RCU<43><55><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0<><30><EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD> 2<><32><EFBFBD><EFBFBD> <20><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
|
||||
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
|
||||
|
||||
}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
|
||||
}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DelayCont; //<2F><>ʱʱ<CAB1><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱִ<CAB1><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t DelayWeight; //<2F><>ʱ<EFBFBD><CAB1>λ
|
||||
}Dev_Dly_Value; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
|
||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬
|
||||
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
|
||||
}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
#define DEVACTIONOUTCFGLEN sizeof(Dev_Action_OutCfg) //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Dev_Action_OutCfg DevActionOutCfg; // <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
|
||||
uint32_t DevActionOutAddr; //ÿ<><C3BF><EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
|
||||
uint32_t DevDlyAddr; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ĵ<EFBFBD>ַ
|
||||
}Dev_Action_Output; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t SceneState; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬ Ŀǰ<C4BF><C7B0><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߹<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD>Ƶı<C6B5>־ ˯<>߽ڵ<DFBD><DAB5>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ݱȽ<DDB1><C8BD><EFBFBD><EFBFBD>⣬ȫ<E2A3AC><C8AB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
uint8_t SceneStateLast; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ״̬<D7B4><CCAC><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬ <20><><EFBFBD><EFBFBD>ָʾ<D6B8>ƿ<EFBFBD><C6BF><EFBFBD>
|
||||
uint8_t SceneReuseFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ȫһ<C8AB><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҷ<EFBFBD><D2B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><D6BE>һ Ϊ1<CEAA><31>ɨ<EFBFBD>趯<EFBFBD><E8B6AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t MultiSetFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><C2B1><EFBFBD><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD> 2024-05-23
|
||||
uint8_t MultiNumber; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2024-05-23
|
||||
uint8_t MultiValidNo; //<2F><>Ч<EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2024-05-23
|
||||
uint8_t SceneTypeFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD>жϱ<D0B6>־ 1<><31><EFBFBD><EFBFBD>Ҫ<EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ 0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϳ<D0B6><CFB3><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>ɹرգ<D8B1>˯<EFBFBD>ߣ<EFBFBD><DFA3>ܿ<EFBFBD><DCBF>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ж<EFBFBD> 1<><31><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 2<><32><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>س<EFBFBD><D8B3><EFBFBD> 0<><30><EFBFBD><EFBFBD>ʾδ<CABE><CEB4><EFBFBD>峡<EFBFBD><E5B3A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƶƹ<C6B5>һ<EFBFBD>࣬һ·<D2BB>Ƽ<EFBFBD><C6BC>ǵ<EFBFBD><C7B5>أ<EFBFBD><D8A3><EFBFBD>·<EFBFBD>Ƽ<EFBFBD><C6BC>Ƕ<EFBFBD><C7B6>ء<EFBFBD><D8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>أ<EFBFBD><D8A3><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t DevAddrIn; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
}Dev_Action_State; //<2F>豸״̬ һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct CFG_Action_Add
|
||||
{
|
||||
Dev_Action_Core DevActionCore; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ һ<><D2BB>34<33><34><EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Input DevActionInput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
|
||||
|
||||
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
||||
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
|
||||
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
|
||||
uint8_t DevCtrlNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1<><31><EFBFBD>ֽ<EFBFBD>
|
||||
Dev_Action_Output DevActionOutput[DevCtrlNumMax]; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>16N <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>28<32><38>
|
||||
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
|
||||
|
||||
typedef struct{
|
||||
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
|
||||
|
||||
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
|
||||
uint8_t BlwMapDevi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
|
||||
uint8_t DevNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevBusNum; //Bus<75><73><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevPollNum; //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
|
||||
|
||||
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
|
||||
uint8_t TimeGetFlag; //ʱ<><CAB1><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1>
|
||||
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
|
||||
uint16_t SleepActionNo; //˯<>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
|
||||
uint32_t DevLockAddr; //<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t Lock485Addr; //<><CEA2><EFBFBD><EFBFBD>485<38><35>ַ
|
||||
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
|
||||
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CheckTypeNum; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CheckMapList[4]; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
|
||||
|
||||
uint8_t OffLineDevType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
|
||||
uint8_t OffLineDevAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
||||
uint8_t InputType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
|
||||
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
|
||||
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
|
||||
|
||||
uint8_t People_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 2024-03-01
|
||||
uint8_t ServerCtrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t CardInFlag; //<2F><>ס<EFBFBD><D7A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD> 2024-04-29
|
||||
|
||||
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t TimeSyncFlag; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
|
||||
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t VC_ConNToSGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t VC_ConNToSSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t VC_ConSToNGruop; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t VC_ConSToNSubset; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t VC_PortNum; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
|
||||
|
||||
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
|
||||
|
||||
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
|
||||
uint8_t SleepMode_State;
|
||||
uint8_t Last_SleepMode_State;
|
||||
uint8_t SleepLight_State;
|
||||
uint8_t Last_SleepLight_State;
|
||||
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
|
||||
uint8_t Last_Person_Detected;
|
||||
|
||||
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
|
||||
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
|
||||
|
||||
uint8_t CardState; //<2F>忨״̬
|
||||
uint8_t Last_CardState;
|
||||
|
||||
uint8_t Rs485CardType; //<2F>忨<EFBFBD><E5BFA8><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD> <20><><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -> "<22><><EFBFBD><EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>+<2B><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"<22>¼<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t Last_Rs485CardType;
|
||||
uint8_t Last_NeightState;
|
||||
|
||||
}BLV_DevAction_Manage_G;
|
||||
|
||||
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
|
||||
#define DevDlyNumMax ((SRAM_DevDly_List_End_Addr - SRAM_DevDly_List_Start_Addr) / DevDlyStructLen) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define DELAY_TIME_MS 0x01 //<2F><><EFBFBD><EFBFBD>
|
||||
#define DELAY_TIME_S 0x02 //<2F><>
|
||||
#define DELAY_TIME_MIN 0x03 //<2F><><EFBFBD><EFBFBD>
|
||||
#define DELAY_TIME_HOUR 0x04 //Сʱ
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0Ϊ<30><CEAA><EFBFBD><EFBFBD>
|
||||
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>· Ϊ<><CEAA><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>˱<EFBFBD><CBB1><EFBFBD>û<EFBFBD><C3BB>
|
||||
uint32_t DevDlyAddr; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ڵ<EFBFBD> <20>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Χ<EFBFBD><CEA7><EFBFBD><EFBFBD><EFBFBD>߶<EFBFBD><DFB6><EFBFBD><EFBFBD><EFBFBD>Χ
|
||||
}Struct_Dev_Dly_Core; //<2F><>ʱ<EFBFBD>豸<EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ 7<><37><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
||||
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t DlyExcuteTime; //<2F><>ʱִ<CAB1><D6B4>ʱ<EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ʱ<EFBFBD>䱻<EFBFBD><E4B1BB>ֵ
|
||||
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
|
||||
|
||||
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
|
||||
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint8_t Addr;
|
||||
uint32_t ExpandReadFlag;
|
||||
uint16_t ExpandReadState[32];
|
||||
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||
|
||||
typedef struct{
|
||||
uint8_t Addr;
|
||||
uint32_t DimmReadFlag;
|
||||
uint16_t DimmReadState[32];
|
||||
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern BLV_DevAction_Manage_G DevActionGlobal;
|
||||
|
||||
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
||||
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
|
||||
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
|
||||
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
||||
93
MCU_Driver/inc/blv_netcomm_function.h
Normal file
93
MCU_Driver/inc/blv_netcomm_function.h
Normal file
@@ -0,0 +1,93 @@
|
||||
/*
|
||||
* BLV_NETCOMM_Function.h
|
||||
*
|
||||
* Created on: Nov 3, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef _BLV_NETCOMM_FUNCTION_H_
|
||||
#define _BLV_NETCOMM_FUNCTION_H_
|
||||
|
||||
#define FRAME_HEAD_OFFSET 0 //ͷλ<CDB7><CEBB> 0
|
||||
#define FRAME_LEN_OFFSET 2 //֡<><D6A1>λ<EFBFBD><CEBB> 2
|
||||
#define SYSTEM_ID_OFFSET 4 //ϵͳIDλ<44><CEBB> 4
|
||||
#define CMD_OFFSET 8 //<2F><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 8
|
||||
#define FRAME_NO_OFFSET 9 //֡<><D6A1>λ<EFBFBD><CEBB> 9
|
||||
#define FLOOR_NUM_OFFSET 11 //¥<><C2A5><EFBFBD><EFBFBD>λ<EFBFBD><CEBB> 11
|
||||
#define BLV_UDP_HEAD_LEN 15 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
|
||||
#define BLV_UDP_PACK_LEN 17 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SeriaNet_Cmd_Send_Len 19 //<2F><>ͷ<EFBFBD><CDB7>15Byte+<2B><><EFBFBD>ݣ<EFBFBD>2Byte+CRC<52><43>2Byte
|
||||
|
||||
#define Search_Cmd 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Heart_Cmd 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_QueryTime_Cmd 0x08 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
#define In_RoomState_Cmd 0x0E //״̬<D7B4>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 ȡ<><C8A1>
|
||||
#define In_DevCtr_Cmd 0x0F //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ͵<C6BA><CDB5><EFBFBD>
|
||||
#define In_SingleAirCtrl_Cmd 0x13 //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_Sys_Key_Cmd 0x24 //һ<><D2BB><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define In_SetSecretKey_Cmd 0x28 //<2F><><EFBFBD><EFBFBD>MQTT<54><54>Կ
|
||||
#define In_ReadSecretKey_Cmd 0x29 //<2F><>ȡMQTT<54><54>Կ
|
||||
#define In_ReadRegister_Cmd 0x30 //<2F><>ȡӳ<C8A1><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_WriteRegister_Cmd 0x31 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_Get_RoomRent_Cmd 0x32 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ 2025-09-09
|
||||
#define In_Reboot_Reason_Cmd 0x33 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_PeriodicReport_Cmd 0x34 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define In_SeriaNet_Cmd 0x70 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
|
||||
#define In_SeriaNetReported_Cmd 0x71 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
||||
|
||||
#define In_Read_MCUSystem_Cmd 0xB1 //<2F><>ȡϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define In_BLVIAP_Cmd 0xB2 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ִ<EFBFBD>е<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPCheck_Cmd 0xB3 //BLV_Cx<43><78><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPJump_Cmd 0xB4 //BLV_Cx<43><78>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>
|
||||
#define In_BLVIAPLogic_Cmd 0xB5 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><DFBC>ļ<EFBFBD>
|
||||
#define In_BLVIAPPlan_Cmd 0xB6 //BLV_Cx<43>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ϱ<EFBFBD>
|
||||
#define In_BLVPCTest_Cmd 0xD1 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬ 2021-07-13 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVConfig_Cmd 0xD2 //BLV-C1<43><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>·<EFBFBD> 2025-10-09 ȡ<><C8A1>ʹ<EFBFBD><CAB9>
|
||||
#define In_BLVPCTestDevice_Cmd 0xD3 //BLV-C1 PC<50><43><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-10-26 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVFlashInfoWrite_CMD 0xD4 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVFlashInfoRead_CMD 0xD5 //BLV-C1 Flashд<68><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2021-12-01 <20><><EFBFBD><EFBFBD>
|
||||
#define In_BLVQueryTFTPIP_CMD 0xD6 //<2F>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP
|
||||
#define In_BLVRpDomainCtrl_Cmd 0xD7 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
#define In_BLVQueryCommonState_Cmd 0xD8 //ѯ<>ʹ<EFBFBD><CAB9><EFBFBD>״̬
|
||||
|
||||
#define In_BLVTFTPDomainName_Cmd 0xD9 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>RCU-TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_BLVTFTPDataRead_Cmd 0xDA //TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ȡ
|
||||
#define In_BLVDayNightTimeSet_Cmd 0xDB //<2F><><EFBFBD><EFBFBD>ʱ<EFBFBD>䷶Χ<E4B7B6><CEA7><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
|
||||
#define UDP_ActSend_PowerChange_Flag 0x01 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ȡ<><C8A1>״̬<D7B4>仯 <20><>־λ
|
||||
#define UDP_ActSend_DevState_Flag 0x02 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20>豸״̬<D7B4>仯 <20><>־λ
|
||||
#define UDP_ActSend_Periodic_Flag 0x04 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> <20><>־λ
|
||||
#define UDP_ActSend_Reboot_Flag 0x08 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD> <20><>־λ
|
||||
#define UDP_ActSend_RoomState_Flag 0x10 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><>ȡ<EFBFBD><C8A1>̬<EFBFBD><CCAC>Ϣ <20><>־λ
|
||||
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
|
||||
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
|
||||
|
||||
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
|
||||
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
|
||||
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
||||
#define USER_NET_Send_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define RCU_SoftwareVer 20 //RCU<43>̼<EFBFBD><CCBC>汾
|
||||
#define RCU_ConfigVer 3 //RCU<43><55><EFBFBD>ð汾<C3B0><E6B1BE>
|
||||
|
||||
|
||||
|
||||
extern uint8_t Global_Large_Buff[1100];
|
||||
|
||||
void Udp_Addtion_Roomstate(uint8_t type,uint8_t addr,uint16_t loop,uint16_t start);
|
||||
|
||||
uint8_t Udp_Internal_PC_Testing_Reported(uint8_t *reply_data,uint16_t reply_len,uint8_t *ip,uint16_t port);
|
||||
uint8_t Udp_Internal_BLVPCTestDevice_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
|
||||
|
||||
uint8_t Udp_Internal_SeriaNet_Process(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port);
|
||||
uint8_t Udp_Internal_SeriaNet_Uploading(uint8_t port,uint32_t baud,uint32_t data_addr);
|
||||
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
|
||||
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */
|
||||
355
MCU_Driver/inc/blv_rs485_protocol.h
Normal file
355
MCU_Driver/inc/blv_rs485_protocol.h
Normal file
@@ -0,0 +1,355 @@
|
||||
/*
|
||||
* blv_rs485_protocol.h
|
||||
*
|
||||
* Created on: Nov 10, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
|
||||
#define MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define Polling_Port 0x01 //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
#define Active_Port 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#define Bus_port 0x03 //BUS<55>˿<EFBFBD>
|
||||
|
||||
#define Active_Baud 9600 //<2F><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Polling_Baud 9600 //<2F><>ѯ<EFBFBD>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Bus_Baud 115200 //BUS<55>˿<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define RS485OCCUPYTIME 0x01 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
|
||||
#define RS485OCCUPYNOTIME 0x00 //485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>ʱ<EFBFBD><CAB1>
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>洢<EFBFBD>ṹ*/
|
||||
typedef enum{
|
||||
Dev_Type = 0x00, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
|
||||
Dev_Addr, //<2F>豸<EFBFBD><E8B1B8>ַ - 1Byte
|
||||
Dev_port, //<2F>豸<EFBFBD>˿<EFBFBD> - 1Byte
|
||||
Dev_baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_baud_8,
|
||||
Dev_baud_16,
|
||||
Dev_baud_24,
|
||||
Dev_Check, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> - 1Byte
|
||||
Dev_DataLen, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> - 2Byte
|
||||
Dev_DataLen_H, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
Dev_Retrynum, //<2F>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
Dev_WaitTime, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1> - 2Byte
|
||||
Dev_WaitTime_8,
|
||||
Dev_Protocol, //<2F>豸Э<E8B1B8><D0AD>
|
||||
Dev_Coord, //<2F>豸<EFBFBD>±<EFBFBD>
|
||||
Dev_Coord_8,
|
||||
Dev_ActionCoord, //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
Dev_ActionCoord_8,
|
||||
Dev_Polling_CF, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Polling_CF_8,
|
||||
Dev_Polling_CF_16,
|
||||
Dev_Polling_CF_24,
|
||||
Dev_Processing_CF, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Processing_CF_8,
|
||||
Dev_Processing_CF_16,
|
||||
Dev_Processing_CF_24,
|
||||
Dev_Data_Process_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte Ҳ<>Ǻ<EFBFBD><C7BA><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
Dev_Data_Process_8,
|
||||
Dev_Data_Process_16,
|
||||
Dev_Data_Process_24,
|
||||
Dev_Input_Type_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Input_Type_Get_8,
|
||||
Dev_Input_Type_Get_16,
|
||||
Dev_Input_Type_Get_24,
|
||||
Dev_Output_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƻص<C6BB><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Ctrl_8,
|
||||
Dev_Output_Ctrl_16,
|
||||
Dev_Output_Ctrl_24,
|
||||
Dev_Output_Loop_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Loop_State_Get_8,
|
||||
Dev_Output_Loop_State_Get_16,
|
||||
Dev_Output_Loop_State_Get_24,
|
||||
Dev_Output_Group_Ctrl_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD>Ƶõ<C6B5><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Group_Ctrl_8,
|
||||
Dev_Output_Group_Ctrl_16,
|
||||
Dev_Output_Group_Ctrl_24,
|
||||
Dev_Output_Loop_Group_State_Get_0, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD><C3B5>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
Dev_Output_Loop_Group_State_Get_8,
|
||||
Dev_Output_Loop_Group_State_Get_16,
|
||||
Dev_Output_Loop_Group_State_Get_24,
|
||||
Dev_Privately, //<2F>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD> -- <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
}Device_Attribute_E;
|
||||
|
||||
/*485<38>豸״̬<D7B4><CCAC><EFBFBD>忪ʼ*/
|
||||
#define DEV_IS_ONLINE 0x00 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define DEV_IS_OFFLINE 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define DEV_IS_LINEUNINIT 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>δȷ<CEB4><C8B7>
|
||||
|
||||
#define Port_Normal_Mode 0x01 //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
#define Port_Passthrough_mode 0x02 //<><CDB8>ģʽ
|
||||
#define Port_Monitoring_mode 0x03 //<2F><><EFBFBD><EFBFBD>ģʽ
|
||||
|
||||
#define In_ErrFun_LineState 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
#define In_ErrFun_ELEPercent 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ص<EFBFBD><D8B5><EFBFBD>
|
||||
#define In_ErrFun_CurValue 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ֵ
|
||||
#define In_ErrFun_ResetTime 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1901<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define In_ErrFun_LoopState 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8>·״̬
|
||||
|
||||
#define Passthrough_DataLen_Max 0x01E0 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ480Byte
|
||||
|
||||
#define BLV_BUS485_WaitLdle_Time 20 //<2F><>λ:ms
|
||||
#define BUS_Retry_Flag 0x40 //<2F>ط<EFBFBD><D8B7><EFBFBD>־
|
||||
#define BLV_BUS485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
#define BLV_BUS485_ChangeBaudSendWaitTime 20 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
#define BLV_POLL485_ChangeBaudWaitTime 10 //<2F><>λ<EFBFBD><CEBB>ms
|
||||
|
||||
/* BLV_BUS 485<38><35><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD>ʽ
|
||||
<EFBFBD><EFBFBD> PKT_ADD_FM<46><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߣ<EFBFBD><DFA3><EFBFBD>ַ
|
||||
<EFBFBD><EFBFBD> PKT_TYPE<50><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Ҳ<EFBFBD><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>
|
||||
<20><> bit 7 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD>ǵ<EFBFBD><C7B5><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>š<EFBFBD>
|
||||
bit 7 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
bit 7 = 1 <20><> Ⱥ<><C8BA><EFBFBD><EFBFBD>ַ
|
||||
<20><> bit 6 <20><><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7B7><EFBFBD><EFBFBD>ݻ<EFBFBD><DDBB><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݡ<EFBFBD>
|
||||
bit 6 = 0 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
bit 6 = 1 <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ݰ<EFBFBD>
|
||||
<20><> bit 3<><33>0 <20><><EFBFBD><EFBFBD><EFBFBD>кš<D0BA>
|
||||
<20><><EFBFBD>кŷ<D0BA>Χ<EFBFBD><CEA7>0~15ѭ<35><D1AD><EFBFBD>ۼӣ<DBBC>ÿ<EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>μ<EFBFBD>1<EFBFBD><31>
|
||||
<EFBFBD><EFBFBD> PKT_DevType<70><65><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
<EFBFBD><EFBFBD> PKT_ADD_TO<54><4F><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪȺ<CEAA><C8BA>ʱ<EFBFBD><CAB1>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0<EFBFBD><30>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ΪȫԱ<C8AB>㲥<EFBFBD><E3B2A5>Ϣ<EFBFBD><CFA2>
|
||||
<EFBFBD><EFBFBD> PKT_LEN<45><4E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȣ<EFBFBD><C8A3><EFBFBD><EFBFBD><EFBFBD>50<35><30>
|
||||
<EFBFBD><EFBFBD> PKT_CHKSUM<55><4D>У<EFBFBD><D0A3><EFBFBD>ͣ<EFBFBD>1Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>PKT_CHKSUM<55>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ࡣ
|
||||
<EFBFBD><EFBFBD> PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3>̶<EFBFBD><CCB6><EFBFBD><EFBFBD><EFBFBD> 1Byte
|
||||
<EFBFBD><EFBFBD> PKT_PARA<52><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PKT_CMD<4D><44><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><C8B2>̶<EFBFBD>
|
||||
*/
|
||||
typedef enum{
|
||||
PKT_ADD_FM,
|
||||
PKT_TYPE,
|
||||
PKT_DevType,
|
||||
PKT_ADD_TO,
|
||||
PKT_LEN,
|
||||
PKT_CHKSUM,
|
||||
PKT_CMD,
|
||||
PKT_PARA,
|
||||
}BLV_BUS_PKT_E;
|
||||
|
||||
/*BUS<55><53><EFBFBD>߿<EFBFBD><DFBF><EFBFBD>Э<EFBFBD><D0AD>2 - <20><><EFBFBD>ȸ<EFBFBD>Ϊuint16_t<5F><74><EFBFBD><EFBFBD>*/
|
||||
typedef enum{
|
||||
PKT2_ADD_FM,
|
||||
PKT2_TYPE,
|
||||
PKT2_DevType,
|
||||
PKT2_ADD_TO,
|
||||
PKT2_LEN,
|
||||
PKT2_LEN_8,
|
||||
PKT2_CHKSUM,
|
||||
PKT2_CMD,
|
||||
PKT2_PARA,
|
||||
}BLV_BUS_PKT2_E;
|
||||
|
||||
typedef enum{
|
||||
B_IDLE, //<2F><><EFBFBD><EFBFBD>
|
||||
B_Polling, //<2F>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||
B_Send, //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||
Change_Dev, //<2F>л<EFBFBD><D0BB>豸
|
||||
Read_Dev, //<2F><><EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
|
||||
B_Retry, //<2F><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>
|
||||
Wait_Reply, //<2F>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
|
||||
B_Wait, //BUS<55><53><EFBFBD>ߵȴ<DFB5>
|
||||
Baud_Wait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>
|
||||
Baud_Comm, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA>ȷ<EFBFBD><C8B7><EFBFBD>һ<EFBFBD><D2BB>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ
|
||||
Baud_SendWait, //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʺ<EFBFBD><CABA><EFBFBD><EFBFBD>͵ȴ<CDB5>
|
||||
}G_BLV_BUS;
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6>忪ʼ*/
|
||||
typedef void (*fun_prt)(uint32_t );
|
||||
typedef uint8_t (*fun2_prt)(uint32_t ,uint32_t ,uint16_t );
|
||||
typedef void (*fun3_prt)(unsigned long);
|
||||
typedef uint8_t (*fun4_prt)(uint32_t );
|
||||
|
||||
|
||||
typedef void (*Dev_Dev_Data_Process_ptr)(uint32_t CfgDevAdd); //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
|
||||
typedef uint8_t (*Dev_Dev_Input_Type_Get_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputLoop, uint16_t DevInputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
typedef void (*Dev_Output_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t CfgDevAddOut, uint16_t DevOutputLoop, uint16_t DevOutputType); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD>ɿ<EFBFBD><C9BF><EFBFBD><EFBFBD>豸
|
||||
typedef uint16_t (*Dev_Output_Loop_State_Get_ptr)(uint32_t CfgDevAddOut, uint16_t DevOutputLoop); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·״̬<D7B4>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱLED<45><44>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>Ϊ50<35><30> <20><>ôӦ<C3B4>÷<EFBFBD><C3B7><EFBFBD>50
|
||||
|
||||
typedef void (*Dev_Output_Group_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInputAddr,uint32_t devaddr, uint32_t CtrlFlag, uint8_t CtrlNum,uint16_t *start);
|
||||
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
#define Dev_Fun_Ptr_Len sizeof(Struct_Dev_Fun_Info) //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸<EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> һ<><D2BB>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||
|
||||
typedef struct
|
||||
{
|
||||
Dev_Dev_Data_Process_ptr Dev_Data_Process; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
|
||||
Dev_Dev_Input_Type_Get_ptr Dev_Input_Type_Get; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Dev_Output_Ctrl_ptr Dev_Output_Ctrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Dev_Output_Loop_State_Get_ptr Dev_Output_Loop_State_Get; //<2F><><EFBFBD><EFBFBD>״̬<D7B4>õ<EFBFBD>
|
||||
Dev_Output_Group_Ctrl_ptr Dev_Output_Group_Ctrl; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD>
|
||||
Dev_Output_Loop_Group_State_Get_ptr Dev_Output_Loop_Group_State_Get_ptr; //<2F><><EFBFBD><EFBFBD>Ⱥ״̬<D7B4>õ<EFBFBD>
|
||||
|
||||
}Struct_Dev_Fun_Info; //<2F>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC>ͬ<EFBFBD><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD>ͬ<EFBFBD>ĺ<EFBFBD><C4BA><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD>Ǵ<EFBFBD><C7B4>IJ<EFBFBD><C4B2><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>
|
||||
|
||||
/*ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
|
||||
#define BLV_COMM_RecordNum 30
|
||||
#define BLV_CONTINUE_FAIL_MAX 20 //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define BLV_COMM_Fail_Precent_Max 30 //ʧ<><CAA7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٷֱ<D9B7>
|
||||
#define BLV_COMM_Precent_Num 100 //ͨѶ<CDA8>ٷֱȿ<D6B1>ʼ<EFBFBD><CABC>¼<EFBFBD><C2BC>
|
||||
#define BLV_BUS_BAUD_ADJUST_SIZE 1000 //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>115200*1%
|
||||
#define BLV_BUS_BAUD_ADJUST_MIN 103200
|
||||
#define BLV_BUS_BAUD_ADJUST_MAX 126200
|
||||
|
||||
typedef struct{
|
||||
uint8_t record[BLV_COMM_RecordNum]; //ͨѶ<CDA8><D1B6>¼BUFF
|
||||
uint8_t num; //<2F><>ǰд<C7B0><D0B4><EFBFBD>±<EFBFBD>
|
||||
uint8_t continue_fail_num; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܼ<EFBFBD><DCBC><EFBFBD>
|
||||
uint8_t comm_percent; //ͨѶ<CDA8>ٷֱ<D9B7>
|
||||
uint8_t full_flag; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t remian1;
|
||||
uint8_t remian2;
|
||||
}BLV_COMM_RECORD_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t type;
|
||||
uint8_t addr;
|
||||
uint8_t port;
|
||||
uint32_t baud;
|
||||
uint8_t check;
|
||||
uint16_t data_len;
|
||||
uint8_t retry_num;
|
||||
uint16_t wait_time;
|
||||
uint8_t Protocol; //Э<><D0AD>
|
||||
uint16_t DevCoord; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
uint16_t ActionCoord; //<2F><>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
|
||||
uint32_t polling_cf; //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
uint32_t processing_cf; //<2F><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Struct_Dev_Fun_Info DevFunInfo; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>ṹ<EFBFBD><E1B9B9>
|
||||
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
}Device_Public_Information_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_BUS_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t POLL_Start; //POLL״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_POLL_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
|
||||
uint8_t pass_state; //<><CDB8>״̬<D7B4><CCAC>
|
||||
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t pass_tick; //<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t pass_outtime; //<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t Act_Start; //Active״̬<D7B4><CCAC>
|
||||
uint8_t device_num; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t process_num; //<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint32_t list_read_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||
uint8_t Send_Flag; //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
|
||||
|
||||
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
|
||||
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
|
||||
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
|
||||
}BLV_ACTIVE_Manage_G;
|
||||
|
||||
typedef struct{
|
||||
uint8_t NorDeviceNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
|
||||
uint8_t NorDevicei; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD>IJ<EFBFBD><C4B2><EFBFBD>
|
||||
}BLV_NORDEV_Manage_G;
|
||||
|
||||
extern BLV_BUS_Manage_G BUS485_Info;
|
||||
extern BLV_POLL_Manage_G Poll485_Info;
|
||||
extern BLV_ACTIVE_Manage_G Act485_Info;
|
||||
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
|
||||
|
||||
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
|
||||
uint8_t Device_Data_Check(uint32_t sram_addr);
|
||||
void BLV_BUS_Polling_Task(void);
|
||||
void BUS485Port_Passthrough_Task(void);
|
||||
void BLV_BUS485Port_ModeTask(void);
|
||||
void BLV_PollPort_Task(void);
|
||||
void Poll485Port_Passthrough_Task(void);
|
||||
void BLV_PollPort_ModeTask(void);
|
||||
void BLV_ActivePort_Task(void);
|
||||
void Act485Port_Passthrough_Task(void);
|
||||
void BLV_ActivePort_ModeTask(void);
|
||||
void BLV_Active_Set_List_Addr(uint32_t addr);
|
||||
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
|
||||
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);
|
||||
uint32_t Find_AllDevice_List_Information2(uint8_t Port, uint8_t dev_type,uint8_t addr);
|
||||
uint8_t Find_The_Number_Of_Device_In_The_List(void);
|
||||
uint8_t Gets_the_state_of_all_devices(uint8_t *data_buff,uint8_t num);
|
||||
void Write_Device_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state);
|
||||
void Write_Device_Loop_Fault_State(uint8_t device_type,uint8_t device_addr,uint8_t fault_type,uint8_t fault_state,uint16_t loop);
|
||||
void BLV_Communication_Record(BLV_COMM_RECORD_G *dev_record,uint8_t option,uint8_t state);
|
||||
uint16_t Get_BLV_Communication_Fail_Rate(BLV_COMM_RECORD_G *dev_record);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_BLV_RS485_PROTOCOL_H_ */
|
||||
25
MCU_Driver/inc/check_fun.h
Normal file
25
MCU_Driver/inc/check_fun.h
Normal file
@@ -0,0 +1,25 @@
|
||||
/*
|
||||
* check_fun.h
|
||||
*
|
||||
* Created on: Nov 8, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_CHECK_FUN_H_
|
||||
#define MCU_DRIVER_INC_CHECK_FUN_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
uint8_t Log_CheckSum(uint32_t addr,uint8_t len);
|
||||
uint8_t Data_CheckSum(uint8_t* data,uint16_t len);
|
||||
uint8_t CheckSum_Overlook_Check(uint8_t *data, uint16_t len, uint16_t check_id);
|
||||
void NetCRC16(uint8_t *aStr ,uint16_t len);
|
||||
uint16_t NetCRC16_2(uint8_t *aStr ,uint16_t len);
|
||||
uint16_t NetCRC16_Data(uint8_t *aStr ,uint16_t len,uint16_t crc_id);
|
||||
uint8_t DoubleData_CheckSum(uint8_t *Data1, uint16_t Data1Len, uint8_t *Data2, uint16_t Data2Len);
|
||||
uint8_t SOR_CRC(uint8_t *Data, uint8_t DataLen);
|
||||
uint8_t DeAction_Data_Check(uint32_t sram_addr);
|
||||
uint8_t DevAction_CheckSum(uint32_t addr,uint16_t len);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_CHECK_FUN_H_ */
|
||||
83
MCU_Driver/inc/debug.h
Normal file
83
MCU_Driver/inc/debug.h
Normal file
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* debug.h
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_DEBUG_H_
|
||||
#define MCU_DRIVER_DEBUG_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdio.h>
|
||||
|
||||
/* UART Printf Definition */
|
||||
#define DEBUG_UART0 1
|
||||
#define DEBUG_UART1 2
|
||||
#define DEBUG_UART2 3
|
||||
#define DEBUG_UART3 4
|
||||
|
||||
/* DEBUG log function. DEBUG printf() <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
|
||||
#ifndef DBG_LOG_EN
|
||||
#define DBG_LOG_EN 1 //DEBUG LOG <20><><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF><EFBFBD>
|
||||
#endif
|
||||
|
||||
#define DBG_Particular_EN 1 //<2F><>ϸ<EFBFBD><CFB8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD> -- <20><><EFBFBD>嵽<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
|
||||
#define DBG_NET_LOG_EN 1 //<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ״̬*/
|
||||
#define DBG_OPT_ActCond_STATUS 1 //<2F><><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_MQTT_STATUS 1 //MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_Debug_STATUS 1 //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_LOGIC_STATUS 1 //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_DEVICE_STATUS 1 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_NET_STATUS 1 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
#define DBG_OPT_SYS_STATUS 1 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ӡ<EFBFBD><D3A1><EFBFBD><EFBFBD>
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ*/
|
||||
#define DBG_BIT_ActCond_STATUS_bit 6
|
||||
#define DBG_BIT_MQTT_STATUS_bit 5
|
||||
#define DBG_BIT_Debug_STATUS_bit 4
|
||||
#define DBG_BIT_LOGIC_STATUS_bit 3
|
||||
#define DBG_BIT_DEVICE_STATUS_bit 2
|
||||
#define DBG_BIT_NET_STATUS_bit 1
|
||||
#define DBG_BIT_SYS_STATUS_bit 0
|
||||
|
||||
|
||||
#ifdef DBG_LOG_EN
|
||||
#define DBG_Printf(...) printf(__VA_ARGS__)
|
||||
#else
|
||||
#define DBG_Printf(...)
|
||||
#endif
|
||||
|
||||
#ifdef DBG_Particular_EN
|
||||
#define DBG_log(...) {DBG_Printf("%s %s-%d :",__FILE__,__func__,__LINE__);DBG_Printf(__VA_ARGS__);}
|
||||
#else
|
||||
#define DBG_log(...) DBG_Printf(__VA_ARGS__)
|
||||
#endif
|
||||
|
||||
#define DBG_INFO(msg) DBG_Printf("%s %s-%d :%s",__FILE__,__func__,__LINE__,msg)
|
||||
|
||||
#ifdef DBG_NET_LOG_EN
|
||||
#define DBG_NET_log(...) DBG_Printf(__VA_ARGS__)
|
||||
#else
|
||||
#define DBG_NET_log(...)
|
||||
#endif
|
||||
|
||||
extern uint32_t Dbg_Switch;
|
||||
|
||||
|
||||
extern volatile uint32_t SysTick_100us;
|
||||
extern volatile uint32_t SysTick_1ms;
|
||||
extern volatile uint32_t SysTick_1s;
|
||||
|
||||
void Systick_Init(void);
|
||||
void Delay_Us(uint32_t n);
|
||||
void Delay_Ms(uint32_t n);
|
||||
|
||||
void Dbg_NoTick_Print(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Print(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Println(int DbgOptBit ,const char *cmd, ...);
|
||||
void Dbg_Print_Buff(int DbgOptBit ,const char *cmd ,uint8_t *buff,uint32_t len);
|
||||
|
||||
#endif /* MCU_DRIVER_DEBUG_H_ */
|
||||
43
MCU_Driver/inc/flash_mem_addr.h
Normal file
43
MCU_Driver/inc/flash_mem_addr.h
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* flash_mem_addr.h
|
||||
*
|
||||
* Created on: Oct 30, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
|
||||
#define MCU_DRIVER_INC_FLASH_MEM_ADDR_H_
|
||||
|
||||
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ʼ*/
|
||||
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
#define SPIFLASH_APP_Start_Addr 0x00000000
|
||||
|
||||
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
||||
|
||||
|
||||
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
|
||||
|
||||
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
|
||||
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
|
||||
|
||||
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
||||
/*APP<50><50><EFBFBD>ݼ<EFBFBD><DDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
|
||||
|
||||
|
||||
#define FLASH_Register_Start_ADDRESS 0x00088000 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><>ʼ<EFBFBD><CABC>ַ
|
||||
#define FLASH_Register_End_ADDRESS 0x000887FF //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
#define FLASH_MCU_Model_Revision_ADDRESS 0x0008A000 //MCU<43>汾<EFBFBD>ͺ<EFBFBD> 64Byte
|
||||
#define FLASH_MCU_Control_Revision_ADDRESS 0x0008A040 //MCU<43>пذ汾<D8B0>ͺ<EFBFBD> 64Byte
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
|
||||
#define SPIFLASH_LOGIC_FILE_Start_Addr 0x00090000
|
||||
#define SPIFLASH_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||
#define SPIFLASH_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
#define SPIFLASH_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||
#define SPIFLASH_LOGIC_DataStart_ADDRESS 0x00090200 //<2F>ļ<EFBFBD><C4BC><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SPIFLASH_LOGIC_FILE_End_Addr 0x000FFFFF
|
||||
|
||||
#endif /* MCU_DRIVER_INC_FLASH_MEM_ADDR_H_ */
|
||||
20
MCU_Driver/inc/led.h
Normal file
20
MCU_Driver/inc/led.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* led.h
|
||||
*
|
||||
* Created on: May 15, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_LED_H_
|
||||
#define MCU_DRIVER_INC_LED_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define SYS_LED_ON GPIOB_ResetBits(GPIO_Pin_12)
|
||||
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
|
||||
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)
|
||||
|
||||
void SYS_LED_Init(void);
|
||||
void SYS_LED_Task(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LED_H_ */
|
||||
126
MCU_Driver/inc/log_api.h
Normal file
126
MCU_Driver/inc/log_api.h
Normal file
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
* log_api.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef _LOG_API_H_
|
||||
#define _LOG_API_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define LogType_Enable 1 //LOGʹ<47><CAB9>
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD>*/
|
||||
#define LogType_Launcher 0x01 //Launcher<65><72>Ϣ<EFBFBD><CFA2>¼
|
||||
#define LogType_SYS_Record 0x02 //ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼
|
||||
#define LogType_Device_COMM 0x03 //<2F>豸ͨѶ<CDA8><D1B6>¼
|
||||
#define LogType_Device_Online 0x04 //<2F>豸ͨѶ״̬<D7B4><CCAC>¼
|
||||
#define LogType_Global_Parameters 0x05 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼
|
||||
#define LogType_Net_COMM 0x06 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
|
||||
#define LogType_Logic_Record 0x07 //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD> - <20><>ʼ״̬*/
|
||||
#define LogType_Launcher_SWITCH 1
|
||||
#define LogType_SYS_Record_SWITCH 1
|
||||
#define LogType_Device_COMM_SWITCH 1
|
||||
#define LogType_Device_Online_SWITCH 1
|
||||
#define LogType_Global_Parameters_SWITCH 1
|
||||
#define LogType_Net_COMM_SWITCH 1
|
||||
#define LogType_Logic_Record_SWITCH 1
|
||||
|
||||
/*<2A><>־<EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>λ*/
|
||||
#define LogType_Launcher_bit 0
|
||||
#define LogType_SYS_Record_bit 1
|
||||
#define LogType_Device_COMM_bit 2
|
||||
#define LogType_Device_Online_bit 3
|
||||
#define LogType_Global_Parameters_bit 4
|
||||
#define LogType_Net_COMM_bit 5
|
||||
#define LogType_Logic_Record_bit 6
|
||||
|
||||
extern uint32_t SYS_Log_Switch;
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE><EFBFBD>ز<EFBFBD><D8B2><EFBFBD>*/
|
||||
#define LogInfo_Device_Online 0x01 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define LogInfo_Device_Offline 0x02 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
typedef enum{
|
||||
LLauncher_App_Check = 0x01, //У<><D0A3>APP
|
||||
LLauncher_Read_App, //<2F><>ȡAPP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD>д<EFBFBD>뵽MCU FLash<73><68>
|
||||
LLauncher_Write_Flash, //дFlash
|
||||
LLauncher_Factory_Reset, //<2F>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LLauncher_Reset_Source, //<2F><>λԴ
|
||||
LLauncher_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
|
||||
}LOGTYPE_Launcher_E;
|
||||
|
||||
typedef enum {
|
||||
LSYS_PHY_Change = 0x01, //PHY״̬<D7B4>仯<EFBFBD><E4BBAF>¼
|
||||
LSYS_DevInfo_Error, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
|
||||
LSYS_API_State, //<2F><><EFBFBD><EFBFBD>״̬
|
||||
LSYS_NET_ARGC, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LSYS_MQTT_ARGC, //MQTT<54><54><EFBFBD><EFBFBD>
|
||||
LSYS_Server_Comm_State, //<2F>ƶ<EFBFBD>ͨѶ״̬<D7B4><CCAC>¼
|
||||
LSYS_NET_DefaultARGC, //<2F><><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD><CFB2><EFBFBD>
|
||||
LSYS_RCUKey_State, //RCU<43><55><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD>¼
|
||||
}LOGTYPR_SYSRecord;
|
||||
|
||||
typedef enum {
|
||||
LCOMM_ASK_TO_Reply = 0x01, //<2F><>ѯ<EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Send_Control, //RCU<43>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Control_Reply, //RCU<43><55><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||
LCOMM_Adjust_Baud, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_DEV_COMM;
|
||||
|
||||
typedef enum {
|
||||
LGlobal_Para = 0x01, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LGlobal_Dev, //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_Global_E;
|
||||
|
||||
typedef enum {
|
||||
LNetComm_Send = 0x01, //<2F><><EFBFBD>緢<EFBFBD><E7B7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
LNetComm_Recv, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}LOGTYPE_NET_COMM_E;
|
||||
|
||||
typedef enum {
|
||||
LLogic_DebugString = 0x01, //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD> - <20>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
|
||||
}LOGTYPE_LOGICRecord_E;
|
||||
|
||||
/*Launcher<65><72>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Launcher_APP_Check_Record(uint8_t state);
|
||||
void LOG_Launcher_Read_App_Record(uint8_t state);
|
||||
void LOG_Launcher_Write_Flash_Record(uint32_t addr,uint16_t len);
|
||||
void LOG_Launcher_Factory_Reset_Record(void);
|
||||
/*ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_SYS_PHY_Change_Record(uint8_t state);
|
||||
void LOG_SYS_DevInfo_Error_Record(uint8_t dev,uint8_t addr,uint32_t info_addr);
|
||||
void LOG_SYS_API_State_Record(uint8_t API_way,uint8_t state);
|
||||
void LOG_SYS_NET_Argc_Record(uint8_t *IP,uint8_t *MAC,uint8_t *DNS_IP1,uint8_t *DNS_IP2,uint8_t *DNS_IP3);
|
||||
void LOG_SYS_MQTT_Argc_Record(uint8_t *productkey,uint8_t *devname,uint8_t *devsecret,uint8_t *publish,uint8_t *sublish);
|
||||
void LOG_SYS_Server_Comm_State_Record(uint8_t state);
|
||||
void LOG_SYS_NET_Argc_Init_Record(uint8_t *IP,uint8_t *Gateway,uint8_t *IP_Mask,uint8_t *DNS_Add,uint8_t ArgcFlag,uint8_t DHCPFlag,uint8_t ServerFlag);
|
||||
void LOG_SYS_RCUKey_State_Record(uint8_t state);
|
||||
/*<2A>豸ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Device_COMM_ASK_TO_Reply_Record(uint8_t port,uint32_t baud,uint32_t data_tick,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_ASK_TO_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint32_t data_tick,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Send_Control_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Send_Control_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len);
|
||||
void LOG_Device_COMM_Control_Reply_Record3(uint32_t port_addr,uint32_t baud_addr,uint32_t buff_addr,uint16_t len);
|
||||
void LOG_Device_COMM_Adjust_Baud_Record(uint8_t dev_type,uint8_t dev_addr,uint32_t baud,uint8_t way,uint8_t fail_num,uint8_t sum,uint8_t num);
|
||||
void LOG_Device_COMM_Adjust_Baud_Record2(uint32_t dev_type,uint32_t dev_addr,uint32_t baud_addr);
|
||||
/*<2A>豸ͨѶ״̬<D7B4><CCAC>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Device_Online_Record(uint8_t dev,uint8_t addr,uint8_t state);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4><CCAC><EFBFBD>ڼ<EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_Global_ParaInfo_Record(uint8_t *buff,uint16_t len);
|
||||
void LOG_Global_DevInfo_Record(uint8_t *buff,uint16_t len);
|
||||
/*<2A><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_NET_COMM_Send_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
|
||||
void LOG_NET_COMM_Recv_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len);
|
||||
/*<2A><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>API*/
|
||||
void LOG_LogicInfo_DebugRecord(char *fmt,...);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LOG_API_H_ */
|
||||
171
MCU_Driver/inc/logic_file_function.h
Normal file
171
MCU_Driver/inc/logic_file_function.h
Normal file
@@ -0,0 +1,171 @@
|
||||
/*
|
||||
* logic_file_function.h
|
||||
*
|
||||
* Created on: Nov 11, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
|
||||
#define MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ENUM_RS485_DEV_PRO_00, //0<><30>Э<EFBFBD><D0AD> //0
|
||||
ENUM_RS485_DEV_PRO_01, //1<><31>Э<EFBFBD><D0AD> //1
|
||||
ENUM_RS485_DEV_PRO_02, //2<><32>Э<EFBFBD><D0AD> //2
|
||||
ENUM_RS485_DEV_PRO_03, //3<><33>Э<EFBFBD><D0AD> //3
|
||||
ENUM_RS485_DEV_PRO_04, //4<><34>Э<EFBFBD><D0AD> //4
|
||||
ENUM_RS485_DEV_PRO_05, //5<><35>Э<EFBFBD><D0AD> //5
|
||||
ENUM_RS485_DEV_PRO_06, //6<><36>Э<EFBFBD><D0AD> //6
|
||||
ENUM_RS485_DEV_PRO_07, //7<><37>Э<EFBFBD><D0AD> //7
|
||||
ENUM_RS485_DEV_PRO_08, //8<><38>Э<EFBFBD><D0AD> //8
|
||||
ENUM_RS485_DEV_PRO_09, //9<><39>Э<EFBFBD><D0AD> //9
|
||||
ENUM_RS485_DEV_PRO_10, //10<31><30>Э<EFBFBD><D0AD> //10
|
||||
ENUM_RS485_DEV_PRO_11, //11<31><31>Э<EFBFBD><D0AD> //11
|
||||
ENUM_RS485_DEV_PRO_12, //12<31><32>Э<EFBFBD><D0AD> //12
|
||||
ENUM_RS485_DEV_PRO_13, //13<31><33>Э<EFBFBD><D0AD> //13
|
||||
ENUM_RS485_DEV_PRO_14, //14<31><34>Э<EFBFBD><D0AD> //14
|
||||
ENUM_RS485_DEV_PRO_15, //15<31><35>Э<EFBFBD><D0AD> //15
|
||||
ENUM_RS485_DEV_PRO_16, //16<31><36>Э<EFBFBD><D0AD> //16
|
||||
ENUM_RS485_DEV_PRO_17, //17<31><37>Э<EFBFBD><D0AD> //17
|
||||
ENUM_RS485_DEV_PRO_18, //18<31><38>Э<EFBFBD><D0AD> //18
|
||||
ENUM_RS485_DEV_PRO_19, //19<31><39>Э<EFBFBD><D0AD> //19
|
||||
// ENUM_RS485_DEV_PRO_20, //<2F><>ǰЭ<C7B0><D0AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ //20
|
||||
|
||||
}enum_RS485Protocol; //ͬ<><CDAC><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><D4B0><EFBFBD>Э<EFBFBD><D0AD><EFBFBD><EFBFBD><EFBFBD>з<EFBFBD><D0B7><EFBFBD>
|
||||
|
||||
#define LOGIC_DataFlag 0xCC060001 //<2F><EFBFBD><DFBC><EFBFBD>־
|
||||
#define Logic_FrameType_LogicInfo 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_Global 0x02 //ȫ<><C8AB><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_DeviceExist 0x03 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define Logic_FrameType_DeviceAction 0x04 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define Logic_FrameType_VoiceMap 0x05 //<2F><><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>Ϣ
|
||||
|
||||
#define Logic_FrameType_DevCheckMap 0x07 //<2F>豸Ѳ<E8B1B8><D1B2><EFBFBD><EFBFBD>·<EFBFBD><C2B7>Ϣ
|
||||
|
||||
#define Logic_FrameType_VCCondition 0x08 //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_VCPortInfor 0x09 //<2F><EFBFBD>ȡ<EFBFBD><C8A1>ӳ<EFBFBD><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ
|
||||
#define Logic_FrameType_VCProperty 0x0B //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#define Logic_FrameType_ColorTempMap 0x0A //ɫ<>µ<EFBFBD><C2B5>ڶ˿<DAB6>ӳ<EFBFBD><D3B3>
|
||||
|
||||
#define LogicFile_DeviceInfo_InputSet 79 //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD> 2022-05-30 <20><><EFBFBD><EFBFBD><EFBFBD>ֽڴ<D6BD>32->64
|
||||
|
||||
typedef enum{
|
||||
Logic_D_Hear_L,
|
||||
Logic_D_Hear_H,
|
||||
Logic_D_Len_L,
|
||||
Logic_D_Len_H,
|
||||
Logic_D_CRC_L,
|
||||
Logic_D_CRC_H,
|
||||
Logic_D_Frame_L,
|
||||
Logic_D_Frame_H,
|
||||
Logic_D_FrameNum_L,
|
||||
Logic_D_FrameNum_H,
|
||||
Logic_D_FrameType,
|
||||
Logic_D_Para,
|
||||
}LOGIC_INFO_E;
|
||||
|
||||
typedef struct {
|
||||
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
|
||||
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
|
||||
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t writ_time; //ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint8_t parent_port; //<2F><><EFBFBD>豸<EFBFBD>˿<EFBFBD>
|
||||
uint8_t lin[5]; //<2F><EFBFBD><DEBF>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
uint8_t priproperty[10]; //˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
|
||||
}LOGICFILE_DEVICE_INFO; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ
|
||||
|
||||
typedef struct{
|
||||
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
uint64_t RoomState:3; //<2F><>̬
|
||||
uint64_t EleCtrlFlag:1; //ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint64_t EleState:3; //ȡ<><C8A1>״̬
|
||||
uint64_t DndState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t CleanState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t CallState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t WashState:3; //ϴ<><CFB4>״̬
|
||||
uint64_t CheckOutState:3; //<2F>˷<EFBFBD>״̬
|
||||
uint64_t WaitState:3; //<2F>Ժ<EFBFBD>״̬
|
||||
uint64_t SosState:3; //SOS״̬
|
||||
uint64_t RentState:3; //ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>״̬
|
||||
uint64_t LockState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t LuggageState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t StrongState:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
uint64_t DoorState:3; //<2F>Ŵ<EFBFBD>״̬
|
||||
uint64_t WarningState:3; //<2F><>ʾ<EFBFBD><CABE>״̬
|
||||
uint64_t BacklightState:3; //<2F><><EFBFBD><EFBFBD>״̬
|
||||
uint64_t SeasonState:3; //<2F><><EFBFBD><EFBFBD>
|
||||
uint64_t TimeState:3; //ʱ<><CAB1>
|
||||
uint64_t NeightState:3; //<2F><>ҹ״̬
|
||||
uint64_t RcuLockState:3; //1<><31><EFBFBD><EFBFBD> 0<><30><EFBFBD><EFBFBD>
|
||||
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
|
||||
}LOGIC_ACTIVE_CONDITION_G; //<2F><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
|
||||
|
||||
typedef struct {
|
||||
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
|
||||
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
|
||||
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
|
||||
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
|
||||
}LOGIC_DEVICE_ACTIVE_G; //<2F><EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
|
||||
|
||||
#if C8_TYPE
|
||||
|
||||
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define PollingDevice_NumMax 15 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define ActiveDevice_NumMax 20 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define NorDevice_NumMax 34 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#else
|
||||
|
||||
#define BusDevice_NumMax 10 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define PollingDevice_NumMax 20 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define ActiveDevice_NumMax 34 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
#define NorDevice_NumMax 15 //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
uint8_t Bus_device_num;
|
||||
uint8_t Active_device_num;
|
||||
uint8_t Polling_device_num;
|
||||
uint8_t Nor_device_num;
|
||||
|
||||
uint16_t device_num;
|
||||
uint16_t active_num;
|
||||
uint16_t voicemap_num;
|
||||
uint16_t devcheckmap_num; //2023-11-27
|
||||
|
||||
uint32_t Bus_device_addr[BusDevice_NumMax];
|
||||
uint32_t Polling_device_addr[PollingDevice_NumMax];
|
||||
uint32_t Active_device_addr[ActiveDevice_NumMax];
|
||||
uint32_t Nor_device_addr[NorDevice_NumMax];
|
||||
|
||||
uint32_t ColorTemp_Map_Addr; //ɫ<><C9AB>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD>ַ
|
||||
}LOGICFILE_Content_Of_Statistical; //<2F><EFBFBD><DFBC>ļ<EFBFBD>ͳ<EFBFBD><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
|
||||
|
||||
void BLV_DevAction_AllData_Init(void);
|
||||
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
|
||||
uint8_t LOGIC_FILE_Check(void);
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_LOGIC_FILE_FUNCTION_H_ */
|
||||
20
MCU_Driver/inc/md5.h
Normal file
20
MCU_Driver/inc/md5.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* md5.h
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_MD5_H_
|
||||
#define MCU_DRIVER_INC_MD5_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
void MD5Digest(char *pszInput, unsigned int nInputSize, char *pszOutPut);
|
||||
void MD5Digest_SRAM(uint32_t add, unsigned int nInputSize, char *pszOutPut);
|
||||
void MD5Digest_FLASH(uint32_t add, unsigned int nInputSize, char *pszOutPut);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_MD5_H_ */
|
||||
55
MCU_Driver/inc/rtc.h
Normal file
55
MCU_Driver/inc/rtc.h
Normal file
@@ -0,0 +1,55 @@
|
||||
/*
|
||||
* rtc.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_RTC_H_
|
||||
#define MCU_DRIVER_INC_RTC_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include "ch564.h"
|
||||
|
||||
typedef struct{
|
||||
uint8_t second;
|
||||
uint8_t minute;
|
||||
uint8_t hour;
|
||||
uint8_t week;
|
||||
uint8_t day;
|
||||
uint8_t month;
|
||||
uint8_t year;
|
||||
}S_RTC;
|
||||
|
||||
typedef struct{
|
||||
uint32_t hour;
|
||||
uint16_t minute;
|
||||
uint16_t second;
|
||||
}G_CORE_RTC;
|
||||
|
||||
typedef struct{
|
||||
uint8_t time_select; //<2F><>ǰʱ<C7B0><CAB1>ѡ<EFBFBD><D1A1> 0x00:<3A><>ǰδѡ<CEB4><D1A1><EFBFBD><EFBFBD>0x01: ѡ<>ض<F1B1BEB5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:Ӳ<><D3B2>CSIO RTCʱ<43><CAB1>
|
||||
uint8_t csio_rtc_cnt; //CSIO RTCʱ<43>Ӽ<EFBFBD><D3BC><EFBFBD>
|
||||
|
||||
int16_t timezone; //ʱ<><CAB1>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||
uint32_t Mcu_GetTime_tick;
|
||||
}TIME_INFO_T;
|
||||
|
||||
extern S_RTC RTC_Raw_Data;
|
||||
extern S_RTC MCU_RTC_Data;
|
||||
extern S_RTC Net_RTC_Data;
|
||||
extern TIME_INFO_T g_time_info;
|
||||
extern uint32_t Log_Time_ms;
|
||||
|
||||
void RTC_Init(void);
|
||||
uint8_t HEX_Conversion_To_DEC(uint8_t c_num);
|
||||
uint8_t DEV_Conversion_To_HEX(uint8_t c_num);
|
||||
uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time);
|
||||
void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick);
|
||||
uint8_t RTC_ReadDate(S_RTC *psRTC);
|
||||
uint8_t RTC_WriteDate(S_RTC SetRTC);
|
||||
void RTC_TASK(void);
|
||||
uint8_t RTC_TimeDate_Correct_Figure(uint8_t data);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_RTC_H_ */
|
||||
49
MCU_Driver/inc/rw_logging.h
Normal file
49
MCU_Driver/inc/rw_logging.h
Normal file
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
* rw_logging.h
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_RW_LOGGING_H_
|
||||
#define MCU_DRIVER_INC_RW_LOGGING_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define APPFlag_UartUpgrade_Reset 0xBBC1 //APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
//<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>
|
||||
#define LOG_Data_Hand 0xA5 //LOG<4F><47><EFBFBD><EFBFBD>ͷ
|
||||
#define Log_Data_End 0x5A //LOG<4F><47><EFBFBD><EFBFBD>β
|
||||
#define Log_Data_Len_MAX 512 //<2F><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
/*<2A><>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݸ<EFBFBD>ʽ*/
|
||||
typedef enum{
|
||||
S_Log_Hand,
|
||||
S_Log_SN, //<2F><>־ÿ<D6BE><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
|
||||
S_Log_Len,
|
||||
S_Log_Len_8,
|
||||
S_Log_Check,
|
||||
S_Log_Date_H, //<2F>꣺5bit <20>£<EFBFBD>5bit <20>գ<EFBFBD>5bit
|
||||
S_Log_Date_L,
|
||||
S_Log_Type,
|
||||
S_Log_Time8B, //Сʱʱ<CAB1><CAB1><EFBFBD><EFBFBD>
|
||||
S_Log_Time16B,
|
||||
S_Log_Time24B,
|
||||
S_Log_Time32B,
|
||||
S_Log_Data,
|
||||
}Sram_Log_Data_Format;
|
||||
|
||||
|
||||
uint8_t Log_write_sram(uint8_t data_type,uint8_t *buff,uint16_t len);
|
||||
void Retain_Flash_Register_Data(void);
|
||||
void Read_Flash_Register_Data(void);
|
||||
void LOG_Save_Global_Parameters(void);
|
||||
uint8_t SRAM_PowerOn_Restore_ParaInfo(void);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_RW_LOGGING_H_ */
|
||||
65
MCU_Driver/inc/spi_flash.h
Normal file
65
MCU_Driver/inc/spi_flash.h
Normal file
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* spi_flash.h
|
||||
*
|
||||
* Created on: May 20, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SPI_FLASH_H_
|
||||
#define MCU_DRIVER_INC_SPI_FLASH_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define Flash_CS_H GPIOA_SetBits(GPIO_Pin_11)
|
||||
#define Flash_CS_L GPIOA_ResetBits(GPIO_Pin_11)
|
||||
|
||||
#define Flash_ADDRESS_MAX 0x00200000
|
||||
|
||||
/***********ָ<><D6B8><EFBFBD><EFBFBD>**********/
|
||||
//Read
|
||||
#define P24Q40H_ReadData 0x03
|
||||
#define P24Q40H_FastReadData 0x0B
|
||||
#define P24Q40H_FastReadDual 0x3B
|
||||
//Program and Erase
|
||||
#define P24Q40H_PageErase 0x81
|
||||
#define P24Q40H_SectorErase 0x20
|
||||
#define P24Q40H_BlockErase 0xD8
|
||||
#define P24Q40H_ChipErase 0xC7
|
||||
#define P24Q40H_PageProgram 0x02
|
||||
//Protection
|
||||
#define P24Q40H_WriteEnable 0x06
|
||||
#define P24Q40H_WriteDisable 0x04
|
||||
//Status Register
|
||||
#define P24Q40H_ReadStatusReg 0x05
|
||||
#define P24Q40H_WriteStatusReg 0x01
|
||||
//Other Commands
|
||||
#define P24Q40H_PowerDown 0xB9
|
||||
#define P24Q40H_ReleasePowerDown 0xAB
|
||||
#define P24Q40H_ReadManufactureID 0x90
|
||||
#define P24Q40H_ReadDeviceID 0x9F
|
||||
#define P24Q40H_ResetEnable 0x66
|
||||
#define P24Q40H_Reset 0x99
|
||||
|
||||
extern uint8_t Temp_Flash_Buff[4100];
|
||||
|
||||
void SPI_FLASH_Init(void);
|
||||
uint8_t Flash_ReadSR(void);
|
||||
void Flash_WriteSR(uint8_t sr_val);
|
||||
void Flash_Write_Enable(void);
|
||||
void Flash_Write_Disable(void);
|
||||
uint16_t Flash_ReadID(void);
|
||||
uint8_t Flash_Wait_Busy(void);
|
||||
void Flash_PowerDown(void);
|
||||
void Flash_Wakeup(void);
|
||||
void Flash_Erase_Chip(void);
|
||||
void Flash_Erase_Block(uint32_t BLK_ID);
|
||||
void Flash_Erase_Sector(uint32_t DST_ID);
|
||||
void Flash_Erase_Page(uint32_t Page_ID);
|
||||
void Flash_Erase_Pageaddr(uint32_t Page_addr);
|
||||
void Flash_Read(uint8_t* pBuffer,uint16_t NumByteToRead,uint32_t ReadAddr);
|
||||
void Flash_Write_Page(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
|
||||
void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr);
|
||||
void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr);
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SPI_FLASH_H_ */
|
||||
46
MCU_Driver/inc/spi_sram.h
Normal file
46
MCU_Driver/inc/spi_sram.h
Normal file
@@ -0,0 +1,46 @@
|
||||
/*
|
||||
* spi_sram.h
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SPI_SRAM_H_
|
||||
#define MCU_DRIVER_INC_SPI_SRAM_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define SRAM_CE_H GPIOA_ResetBits(GPIO_Pin_11)
|
||||
#define SRAM_CE_L GPIOA_SetBits(GPIO_Pin_11)
|
||||
|
||||
#define SRAM_CMD_Read 0x03
|
||||
#define SRAM_CMD_Fast_Read 0x0B
|
||||
#define SRAM_CMD_Fast_Read_Quad 0xEB
|
||||
#define SRAM_CMD_Write 0x02
|
||||
#define SRAM_CMD_Quad_Write 0x38
|
||||
#define SRAM_CMD_Enter_Quad_Mode 0x35
|
||||
#define SRAM_CMD_Exit_Quad_Mode 0xF5
|
||||
#define SRAM_CMD_Reset_Enable 0x66
|
||||
#define SRAM_CMD_Reset 0x99
|
||||
#define SRAM_CMD_Wrap_Boundary_Toggle 0xC0
|
||||
#define SRAM_CMD_Read_ID 0x9F
|
||||
|
||||
#define SRAM_ADDRESS_MAX 0x00800000
|
||||
|
||||
|
||||
void SPI_SRAM_Init(void);
|
||||
void SRAM_Write_Byte(uint8_t wdate,uint32_t add);
|
||||
uint8_t SRAM_Read_Byte(uint32_t add);
|
||||
void SRAM_Write_Word(uint16_t wdate,uint32_t add);
|
||||
uint16_t SRAM_Read_Word(uint32_t add);
|
||||
void SRAM_Write_DW(uint32_t wdate,uint32_t add);
|
||||
uint32_t SRAM_Read_DW(uint32_t add);
|
||||
uint8_t SRAM_Read_ID_Opeartion(void);
|
||||
void SRAM_Reset_Operation(void);
|
||||
|
||||
void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add);
|
||||
void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add);
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SPI_SRAM_H_ */
|
||||
272
MCU_Driver/inc/sram_mem_addr.h
Normal file
272
MCU_Driver/inc/sram_mem_addr.h
Normal file
@@ -0,0 +1,272 @@
|
||||
/*
|
||||
* sram_mem_addr.h
|
||||
* <20>ⲿSRAM<41><4D>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00000000 ~ 0x007FFFF
|
||||
*
|
||||
* Created on: Oct 30, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
|
||||
#define MCU_DRIVER_INC_SRAM_MEM_ADDR_H_
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ
|
||||
***********************************************************
|
||||
//SRAM<41>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ -
|
||||
<20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ -
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַΪ0x000100
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȴ洢<C8B4><E6B4A2><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_BUS_Device_List_Addr
|
||||
<20>ڴ<EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>Ǵ洢<C7B4><E6B4A2><EFBFBD><EFBFBD>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_POLL_Device_List_Addr
|
||||
Ȼ<><C8BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E> <20><>ַƫ<D6B7><C6AB>0x000200*N -> SRAM_ACTIVE_Device_List_Addr
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>ϢN<CFA2><4E>
|
||||
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>豸˳<E8B1B8><CBB3><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
*****************************************************************************************
|
||||
| | <20><>ʼ<EFBFBD><CABC>ַ | <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ |
|
||||
| BUS<55>豸<EFBFBD><E8B1B8>Ϣ | SRAM_Device_List_Start_Addr | SRAM_BUS_Device_List_Addr |
|
||||
| <20><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_BUS_Device_List_Addr | SRAM_POLL_Device_List_Addr |
|
||||
| <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_POLL_Device_List_Addr | SRAM_ACTIVE_Device_List_Addr |
|
||||
| <20><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ | SRAM_ACTIVE_Device_List_Addr| SRAM_Device_List_End_Addr |
|
||||
*****************************************************************************************
|
||||
* */
|
||||
#define SRAM_Device_List_Size 0x00000200 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD>ܴ<EFBFBD>С
|
||||
#define SRAM_BUS_Device_List_Addr 0x00000000 //BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ - 4Byte
|
||||
#define SRAM_POLL_Device_List_Addr 0x00000004 //<2F><>ѯ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define SRAM_ACTIVE_Device_List_Addr 0x00000008 //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define SRAM_NORMAL_Device_List_Addr 0x0000000C //<2F><>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
|
||||
#define SRAM_Device_List_Start_Addr 0x00000100 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_Device_List_End_Addr 0x00009FFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>*/
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - LOGȫ<47><C8AB>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00B000 - 0x00BFFF*/
|
||||
#define SRAM_LOG_Device_C5IO_Relay_Status 0x0000B000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||
#define SRAM_LOG_Device_C5IO_DO_Status 0x0000B003 //DO״̬ - 1byte
|
||||
#define SRAM_LOG_Device_C5IO_DI_Status 0x0000B004 //DI״̬ - 2Byte
|
||||
#define SRAM_LOG_Device_C5MUSIC_Playback_Status 0x0000B006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||
#define SRAM_LOG_Device_C5MUSIC_Volume_Status 0x0000B007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||
#define SRAM_LOG_Device_C5MUSIC_idx_Status 0x0000B008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||
#define SRAM_LOG_Device_Card_Status 0x0000B00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte 2025-09-03 <20><>ûʹ<C3BB><CAB9>
|
||||
#define SRAM_LOG_Device_Temp_Status 0x0000B00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||
|
||||
/**/
|
||||
#define SRAM_LOG_Device_Switch_Type 0x0000B00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define SRAM_LOG_Device_Switch_Num 0x0000B00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||
#define SRAM_LOG_Device_Switch1_Status 0x0000B00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_Device_Switch2_Status 0x0000B011 //<2F><><EFBFBD><EFBFBD>2<EFBFBD><32><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_Device_Switch3_Status 0x0000B013 //<2F><><EFBFBD><EFBFBD>3<EFBFBD><33><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SRAM_LOG_RCU_Reboot_Reason 0x0000B015 //RCU<43><55><EFBFBD><EFBFBD>ԭ<EFBFBD><D4AD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9> 2025-09-27
|
||||
|
||||
/*<2A>豸<EFBFBD><E8B1B8>Ϣ - UDPȫ<50><C8AB>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00C000 - 0x00CFFF*/
|
||||
#define SRAM_UDP_Device_C5IO_Relay_Status 0x0000C000 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬ - 3Byte
|
||||
#define SRAM_UDP_Device_C5IO_DO_Status 0x0000C003 //DO״̬ - 1byte
|
||||
#define SRAM_UDP_Device_C5IO_DI_Status 0x0000C004 //DI״̬ - 2Byte
|
||||
#define SRAM_UDP_Device_C5MUSIC_Playback_Status 0x0000C006 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>״̬ - 1Byte
|
||||
#define SRAM_UDP_Device_C5MUSIC_Volume_Status 0x0000C007 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Bye
|
||||
#define SRAM_UDP_Device_C5MUSIC_idx_Status 0x0000C008 //<2F><>Ƶ - <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 2Byte
|
||||
#define SRAM_UDP_Device_Card_Status 0x0000C00A //<2F>忨ȡ<E5BFA8><C8A1> - 1Byte
|
||||
#define SRAM_UDP_Device_Temp_Status 0x0000C00B //<2F>¿<EFBFBD><C2BF><EFBFBD> - 2Byte
|
||||
/**/
|
||||
#define SRAM_UDP_Device_Switch_Type 0x0000C00D //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define SRAM_UDP_Device_Switch_Num 0x0000C00E //<2F><><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD> - 1Byte
|
||||
#define SRAM_UDP_Device_Switch1_Status 0x0000C00F //<2F><><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD> 2Byte һ<><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD><D5BC>2Byte<74><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_UDP_ELEReport_Action 0x0000C011 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_EleState 0x0000C012 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_EleState_Last 0x0000C013
|
||||
#define SRAM_UDP_ELEReport_CardState 0x0000C014 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1>״̬<D7B4>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_CardState_Last 0x0000C015
|
||||
#define SRAM_UDP_ELEReport_CardType 0x0000C016 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3>忨ȡ<E5BFA8><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_CardType_Last 0x0000C017
|
||||
#define SRAM_UDP_ELEReport_VirtualCard 0x0000C018 //UDP ȡ<><C8A1><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD><D0A3><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC>ж<EFBFBD><D0B6>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ϱ<EFBFBD>
|
||||
#define SRAM_UDP_ELEReport_VirtualCard_Last 0x0000C019
|
||||
#define SRAM_UDP_Report_CarbonSatet 0x0000C01A //UDP <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>У<EFBFBD>̼<EFBFBD><CCBC><EFBFBD>˵<EFBFBD>״̬
|
||||
|
||||
/*SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>豸<EFBFBD>仯<EFBFBD><E4BBAF><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ƻ<EFBFBD><C6BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
<EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD><EFBFBD>0x00D000 - 0x00DFFF*/
|
||||
#define SRAM_UDP_SendData_Writeaddr 0x0000D000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_SendData_Readaddr 0x0000D004 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_UDP_SendData_Tempaddr 0x0000D008 //
|
||||
|
||||
#define SRAM_UDP_SendData_Startaddr 0x0000D010 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_UDP_SendData_Endaddr 0x0000D7EA //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_SendData_Size 0x9C //һ<>η<EFBFBD><CEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_UDP_RecvData_Writeaddr 0x0000D800 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_UDP_RecvData_Readaddr 0x0000D804 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_UDP_RecvData_Tempaddr 0x0000D808 //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ַ
|
||||
#define SRAM_UDP_RecvData_ControlNum 0x0000D80C //<2F><><EFBFBD>շ<EFBFBD><D5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>
|
||||
#define SRAM_UDP_RecvData_Startaddr 0x0000D810 //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||
#define SRAM_UDP_RecvData_Endaddr 0x0000DFEA //<2F><><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
/*<2A>ϵ<EFBFBD><CFB5>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* <20><>ַ<EFBFBD><D6B7>Χ:0x0x00E100 ~ 0x00E1FF */
|
||||
#define SRAM_PowerOn_Restore_StartAddr 0x0000E100
|
||||
#define SRAM_PowerOn_Restore_Flag 0x0000E100
|
||||
#define SRAM_PowerOn_Restore_Len 0x0000E101
|
||||
#define SRAM_PowerOn_Restore_Check 0x0000E102
|
||||
#define SRAM_PowerOn_Restore_Param 0x0000E103
|
||||
#define SRAM_PowerOn_Restore_EndAddr 0x0000E1FF
|
||||
|
||||
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼Boot<6F><74><EFBFBD><EFBFBD> дMCU Flash<73><68><EFBFBD><EFBFBD> <20><>С<EFBFBD><D0A1>0x200 2025-04-28*/
|
||||
#define SRAM_APP_FEATURE_2_CHECK_Addr 0x0000E600
|
||||
|
||||
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
|
||||
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
|
||||
|
||||
|
||||
|
||||
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
|
||||
|
||||
#define SRAM_UART0_RecvBuffer_Start_Addr 0x00010000
|
||||
#define SRAM_UART0_RecvBuffer_End_Addr 0x00010FFF
|
||||
#define SRAM_UART0_SendBuffer_Start_Addr 0x00011000
|
||||
#define SRAM_UART0_SendBuffer_End_Addr 0x00011FFF
|
||||
|
||||
#define SRAM_UART1_RecvBuffer_Start_Addr 0x00012000
|
||||
#define SRAM_UART1_RecvBuffer_End_Addr 0x00012FFF
|
||||
#define SRAM_UART1_SendBuffer_Start_Addr 0x00013000
|
||||
#define SRAM_UART1_SendBuffer_End_Addr 0x00013FFF
|
||||
|
||||
#define SRAM_UART2_RecvBuffer_Start_Addr 0x00014000
|
||||
#define SRAM_UART2_RecvBuffer_End_Addr 0x00014FFF
|
||||
#define SRAM_UART2_SendBuffer_Start_Addr 0x00015000
|
||||
#define SRAM_UART2_SendBuffer_End_Addr 0x00015FFF
|
||||
|
||||
#define SRAM_UART3_RecvBuffer_Start_Addr 0x00016000
|
||||
#define SRAM_UART3_RecvBuffer_End_Addr 0x00016FFF
|
||||
#define SRAM_UART3_SendBuffer_Start_Addr 0x00017000
|
||||
#define SRAM_UART3_SendBuffer_End_Addr 0x00017FFF
|
||||
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ŀ<DEB8>ʼ -- <20><>Ҫ<EFBFBD><EFBFBD> */
|
||||
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>¼ 0x031400~0x031FFF 3K<33><4B>ÿ<EFBFBD><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>6<EFBFBD>ֽڣ<D6BD>һ<EFBFBD><D2BB><EFBFBD>ܹ<EFBFBD><DCB9>ܴ<EFBFBD>509<30><39><EFBFBD>豸<EFBFBD><E8B1B8>*/
|
||||
#define SRAM_DEVICE_ONLINE_STATE_WRITE_ADDR 0x00031400 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬д<CCAC><D0B4><EFBFBD><EFBFBD>ַ
|
||||
#define SRAM_DEVICE_ONLINE_STATE_READ_ADDR 0x00031404 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1>ַ
|
||||
#define SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR 0x00031408 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4>м<EFBFBD><D0BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
#define SRAM_DEVICE_ONLINE_STATE_START_ADDR 0x00031410 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʿ<EFBFBD>ʼд<CABC><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
//#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031500 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7> - <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
#define SRAM_DEVICE_ONLINE_STATE_END_ADDR 0x00031FFE //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʵ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ݵ<EFBFBD>ַ<EFBFBD><D6B7>
|
||||
/*2022.12.26 <20>ֿ<EFBFBD><D6BF><EFBFBD><EFBFBD>Ľ<DEB8><C4BD><EFBFBD>*/
|
||||
|
||||
#define SRAM_CheckMap_List_Start_Addr 0x0003A800 //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>10K
|
||||
#define SRAM_CheckMap_List_End_Addr 0x0003CFFF //Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_PortInf_Start_Addr 0x0003D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>2K
|
||||
#define SRAM_VCard_PortInf_End_Addr 0x0003D7FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> ӳ<><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_ConNToS_Start_Addr 0x0003D800 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_ConNToS_End_Addr 0x0003DBFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_ConSToN_Start_Addr 0x0003DC00 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_Con_End_Addr 0x0003DFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_DetectWin_Start_Addr 0x0003E000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>60K
|
||||
#define SRAM_VCard_DetectWin_End_Addr 0x0004CFFF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD>ⴰ<EFBFBD><E2B4B0>״̬ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
|
||||
|
||||
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
|
||||
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_Register_Start_ADDRESS 0x0008E900
|
||||
#define SRAM_Register_End_ADDRESS 0x0008EFFF
|
||||
|
||||
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
|
||||
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||
#define Register_NetIP_OFFSET 0x0000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - DHCP<43><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>֮<EFBFBD><EFBFBD>DHCPʧ<50><CAA7>֮<EFBFBD><D6AE> ʹ<>õ<EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD><EFBFBD>MCUĬ<55><C4AC>IP
|
||||
#define Register_NetPort_OFFSET 0x0004 //<2F><><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetMask_OFFSET 0x0008 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetGateway_OFFSET 0x000C //<2F><><EFBFBD><EFBFBD> - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_DNSServerIP_OFFSET 0x0010 //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NETMACKADDR_OFFSET 0x0014 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>MACK<43><4B>ַ
|
||||
#define Register_WebServerIP_OFFSET 0x0018 //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - PC<50><43><EFBFBD>õ<EFBFBD><C3B5>ƶ<EFBFBD>IP<49><50>ַ
|
||||
#define Register_WebServerPort_OFFSET 0x001C //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8>˿<EFBFBD> - 2025-10-11 <20><><EFBFBD><EFBFBD>
|
||||
#define Register_MandateExpiresTime_OFFSET 0x0020 //MCU<43><55>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> - <20><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
#define Register_CurrentUsageTime_OFFSET 0x0024 //MCU<43><55>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define Register_MandateUTC_OFFSET 0x0028 //<2F><>Ȩʱ<C8A8><CAB1> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȩʱ<C8A8>ĵ<EFBFBD>ǰUTCʱ<43><CAB1>
|
||||
#define Register_MandateLock_OFFSET 0x002C //<2F><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||
#define Register_NetInfo_EN_OFFSET 0x0030 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>ܣ<EFBFBD>DHCPʹ<50><CAB9> - 1Byte<74><65><EFBFBD><EFBFBD>ʾDHCPʹ<50><CAB9> 1Byte<74>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ΪĬ<CEAA><C4AC>IP<49><50>ַ - PC<50><43><EFBFBD>ñ<EFBFBD><C3B1><EFBFBD>
|
||||
#define Register_NetOfflineTime_OFFSET 0x0034 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1> - 4Byte <20><>λ<EFBFBD><CEBB>ms
|
||||
#define Register_ProjectCode_OFFSET 0x0038 //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
||||
#define Register_SoftwareVersion_OFFSET 0x003C //<2F><><EFBFBD><EFBFBD><EFBFBD>汾<EFBFBD><E6B1BE> - <20>̼<EFBFBD><CCBC>汾<EFBFBD><E6B1BE>
|
||||
#define Register_ConfigVersion_OFFSET 0x0040 //<2F><><EFBFBD>ð汾<C3B0><E6B1BE>
|
||||
#define Register_RoomNumber_OFFSET 0x0044 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Register_HouseType_OFFSET 0x0048 //<2F><><EFBFBD><EFBFBD>
|
||||
#define Register_RoomRent_OFFSET 0x004C //<2F><>̬<EFBFBD><CCAC>Ϣ - <20><><EFBFBD><EFBFBD>״̬
|
||||
#define Register_SeasonStatus_OFFSET 0x0050 //<2F><><EFBFBD><EFBFBD>״̬
|
||||
#define Register_TFTPStatus_OFFSET 0x0054 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD> 4Byte
|
||||
#define Register_TFTPUploadTime_OFFSET 0x0058 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> 4Byte
|
||||
#define Register_BLVServerDmLen_OFFSET 0x005C //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte
|
||||
#define Register_BLVServerDmName_OFFSET 0x0060 //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 64Byte
|
||||
#define Register_UDPPeriodicTime_OFFSET 0x00A0 //UDPͨѶ <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4Byte <20><>λ:ms
|
||||
|
||||
#define Register_RoomNumNote_OFFSET 0x0100 //<2F><><EFBFBD>ű<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||
#define Register_RoomTypeNote_OFFSET 0x0110 //<2F><><EFBFBD>ͱ<EFBFBD>ע<EFBFBD><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 16Byte
|
||||
#define Register_RoomNote_OFFSET 0x0120 //<2F><><EFBFBD>䱸ע<E4B1B8><D7A2>Ϣ<EFBFBD><CFA2><EFBFBD>ŵ<EFBFBD>ַ<EFBFBD>ռ<EFBFBD> - 96Byte
|
||||
#define Register_TFTPLOGPort_OFFSET 0x0180 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> - 2Byte
|
||||
#define Register_TFTPLOGTime_OFFSET 0x0182 //TFTP<54><50>־<EFBFBD>ϴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
|
||||
#define Register_TFTPDmLens_OFFSET 0x0184 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
|
||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD><EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||
|
||||
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
|
||||
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
|
||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
||||
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
||||
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
|
||||
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
|
||||
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ*********
|
||||
*
|
||||
* 2025-07-29 <20><EFBFBD>SRAM<41>洢<EFBFBD><E6B4A2>ַ 0x00400000 ~ 0x007FFFFF SIZE:4MByte
|
||||
* 1<><31><EFBFBD>ĶԿռ<D4BF><D5BC><EFBFBD>ַУ<D6B7>飬<EFBFBD><E9A3AC>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD>쳣
|
||||
* 2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5>û<EFBFBD><C3BB>ʹ<EFBFBD>õı<C3B5><C4B1><EFBFBD>
|
||||
* */
|
||||
#define SRAM_LOG_Start_Address 0x00400000 //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>ʼ<EFBFBD><CABC>ַ - <20><>ǰSRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ַ - 4Byte
|
||||
#define SRAM_TFTP_LOG_READ_Address 0x00400004 //TFTP<54><50>־<EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
|
||||
#define SRAM_FLASH_LOG_READ_Address 0x00400008 //Flash<73><68>־д<D6BE><D0B4><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ַ - 4Byte
|
||||
#define SRAM_SD_LOG_READ_Start_Address 0x0040000C //SD<53><44>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ - <20><>TFTP<54><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ʱ<EFBFBD><CAB1>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ֵ<EFBFBD>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDд<44><D0B4>LOGʹ<47><CAB9> - 4Byte
|
||||
#define SRAM_SD_LOG_READ_End_Address 0x00400010 //SD<53><44>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 4Byte
|
||||
#define SRAM_Flash_Serial_Number 0x00400014 //<2F><>־<EFBFBD><D6BE><EFBFBD>ű<EFBFBD><C5B1><EFBFBD><EFBFBD><EFBFBD>ַ - 1Byte
|
||||
#define SRAM_LOGFlag_Reset_Source 0x00400018 //Launcher<65><72><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD> - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_LOGFlag_Addr_INIT 0x00400019 //Launcher<65><72>¼<EFBFBD><C2BC>ַSRAM<41><4D>ʼ<EFBFBD><CABC>״̬<D7B4><CCAC>־λ - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_LOGFlag_Debug_Switch 0x0040001A //Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ 4Byte - <20><>APPʹ<50><CAB9>
|
||||
#define SRAM_APPFlag_Reset_Source 0x0040001E //App<70><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ 2Byte - <20><>Launcher<65><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣʹ<CFA2><CAB9> 0xBBC1
|
||||
#define SRAM_LOG_DATA_Address 0x00400100 //<2F><>־<EFBFBD><D6BE><EFBFBD>ݵ<EFBFBD>ַ
|
||||
#define SRAM_LOG_End_Address 0x007FFFFF //<2F><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 0x007FFFFF
|
||||
|
||||
/**********<2A><>־<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_SRAM_MEM_ADDR_H_ */
|
||||
20
MCU_Driver/inc/timer.h
Normal file
20
MCU_Driver/inc/timer.h
Normal file
@@ -0,0 +1,20 @@
|
||||
/*
|
||||
* timer.h
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_TIMER_H_
|
||||
#define MCU_DRIVER_INC_TIMER_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
|
||||
extern volatile uint32_t Time0_100us;
|
||||
extern volatile uint32_t Time0_1ms;
|
||||
|
||||
void TIMER0_Init(void);
|
||||
void Timer0_Task(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_TIMER_H_ */
|
||||
82
MCU_Driver/inc/uart.h
Normal file
82
MCU_Driver/inc/uart.h
Normal file
@@ -0,0 +1,82 @@
|
||||
/*
|
||||
* uart.h
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_UART_H_
|
||||
#define MCU_DRIVER_INC_UART_H_
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define Recv_2400_TimeOut 10 //ms
|
||||
#define Recv_9600_TimeOut 5 //ms
|
||||
#define Recv_115200_TimeOut 3 //ms
|
||||
|
||||
#define USART_BUFFER_NUM 3
|
||||
#define USART_BUFFER_SIZE 100
|
||||
|
||||
#define MCU485_EN1_H
|
||||
#define MCU485_EN1_L
|
||||
#define MCU485_EN2_H
|
||||
#define MCU485_EN2_L
|
||||
#define MCU485_EN3_H
|
||||
#define MCU485_EN3_L
|
||||
|
||||
typedef uint8_t (*Uart_prt)(uint8_t *,uint16_t);
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UART_0,
|
||||
UART_1,
|
||||
UART_2,
|
||||
UART_3,
|
||||
UART_MAX,
|
||||
}UART_IDX;
|
||||
|
||||
typedef struct{
|
||||
uint8_t RecvBuffer[USART_BUFFER_SIZE];
|
||||
uint8_t Receiving;
|
||||
uint16_t RecvLen;
|
||||
|
||||
uint32_t RecvTimeout;
|
||||
uint32_t RecvIdleTiming;
|
||||
|
||||
uint32_t TX_Buffer_WriteAddr;
|
||||
uint32_t TX_Buffer_ReadAddr;
|
||||
uint32_t RX_Buffer_WriteAddr;
|
||||
uint32_t RX_Buffer_ReadAddr;
|
||||
}__attribute__((packed)) UART_t;
|
||||
|
||||
extern UART_t g_uart[UART_MAX];
|
||||
|
||||
void UARTx_Init(UART_IDX uart_id, uint32_t buad);
|
||||
void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud);
|
||||
|
||||
void UART0_RECEIVE(void);
|
||||
void UART1_RECEIVE(void);
|
||||
void UART2_RECEIVE(void);
|
||||
void UART3_RECEIVE(void);
|
||||
|
||||
uint8_t UART0_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART1_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART2_ChangeBaud(uint32_t baudrate);
|
||||
uint8_t UART3_ChangeBaud(uint32_t baudrate);
|
||||
|
||||
void Uart0_Flush(uint16_t over_time);
|
||||
void Uart1_Flush(uint16_t over_time);
|
||||
void Uart2_Flush(uint16_t over_time);
|
||||
void Uart3_Flush(uint16_t over_time);
|
||||
|
||||
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||
void MCU485_SendString_1(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
|
||||
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len);
|
||||
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len);
|
||||
|
||||
|
||||
|
||||
#endif /* MCU_DRIVER_INC_UART_H_ */
|
||||
15
MCU_Driver/inc/watchdog.h
Normal file
15
MCU_Driver/inc/watchdog.h
Normal file
@@ -0,0 +1,15 @@
|
||||
/*
|
||||
* watchdog.h
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
|
||||
#define MCU_DRIVER_INC_WATCHDOG_H_
|
||||
|
||||
void WDT_Init(void);
|
||||
void WDT_Feed(void);
|
||||
void WDT_Reinit(void);
|
||||
|
||||
#endif /* MCU_DRIVER_INC_WATCHDOG_H_ */
|
||||
33
MCU_Driver/led.c
Normal file
33
MCU_Driver/led.c
Normal file
@@ -0,0 +1,33 @@
|
||||
/*
|
||||
* led.c
|
||||
*
|
||||
* Created on: 2025<32><35>5<EFBFBD><35>15<31><35>
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "led.h"
|
||||
#include "debug.h"
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void SYS_LED_Init(void)
|
||||
{
|
||||
GPIOA_ModeCfg(GPIO_Pin_12,GPIO_ModeOut_PP); //LED
|
||||
|
||||
SYS_LED_ON;
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void SYS_LED_Task(void)
|
||||
{
|
||||
static uint32_t led_tick = 0;
|
||||
|
||||
if(SysTick_1ms - led_tick >= 1000 ){
|
||||
led_tick = SysTick_1ms;
|
||||
|
||||
SYS_LED_FLIP;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
866
MCU_Driver/log_api.c
Normal file
866
MCU_Driver/log_api.c
Normal file
@@ -0,0 +1,866 @@
|
||||
/***********************************<2A><><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݴ洢<DDB4><E6B4A2><EFBFBD><EFBFBD> - <20>ṩ<EFBFBD><E1B9A9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD>***************************************/
|
||||
#include "rw_logging.h"
|
||||
#include "SPI_SRAM.h"
|
||||
#include "Log_api.h"
|
||||
#include "string.h"
|
||||
#include "spi_flash.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
|
||||
uint32_t SYS_Log_Switch = (LogType_Launcher_SWITCH << LogType_Launcher_bit) + \
|
||||
(LogType_SYS_Record_SWITCH << LogType_SYS_Record_bit) + \
|
||||
(LogType_Device_COMM_SWITCH << LogType_Device_COMM_bit) + \
|
||||
(LogType_Device_Online_SWITCH << LogType_Device_Online_bit) + \
|
||||
(LogType_Global_Parameters_SWITCH << LogType_Global_Parameters_bit) + \
|
||||
(LogType_Net_COMM_SWITCH << LogType_Net_COMM_bit) + \
|
||||
(LogType_Logic_Record_SWITCH << LogType_Logic_Record_bit);
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Launcher_APP_Check_Record
|
||||
* Description : Launcher<65><72><EFBFBD><EFBFBD> - У<><D0A3>APP
|
||||
* Input :
|
||||
state :״̬
|
||||
0x00:<3A><>ͬ
|
||||
0x01:<3A><>ͬ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Launcher_APP_Check_Record(uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[3] = {0};
|
||||
|
||||
temp_buff[0] = LLauncher_App_Check;
|
||||
temp_buff[1] = state;
|
||||
|
||||
Log_write_sram(LogType_Launcher,temp_buff,2);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Launcher_APP_Check_Record
|
||||
* Description : Launcher<65><72><EFBFBD><EFBFBD> - У<><D0A3>APP
|
||||
* Input :
|
||||
state :״̬
|
||||
0x00:<3A>ɹ<EFBFBD>
|
||||
0x01:ʧ<><CAA7>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Read_App_Record(uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[3] = {0};
|
||||
|
||||
temp_buff[0] = LLauncher_Read_App;
|
||||
temp_buff[1] = state;
|
||||
|
||||
Log_write_sram(LogType_Launcher,temp_buff,2);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Launcher_Write_Flash_Record
|
||||
* Description : Launcher<65><72><EFBFBD><EFBFBD> - Flashд<68><D0B4>
|
||||
* Input :
|
||||
addr :д<><D0B4><EFBFBD><EFBFBD>ַ
|
||||
len :д<>볤<EFBFBD><EBB3A4>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Write_Flash_Record(uint32_t addr,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[7] = {0};
|
||||
|
||||
temp_buff[0] = LLauncher_Write_Flash;
|
||||
temp_buff[1] = addr & 0xFF;
|
||||
temp_buff[2] = (addr >> 8) & 0xFF;
|
||||
temp_buff[3] = (addr >> 16) & 0xFF;
|
||||
temp_buff[4] = (addr >> 24) & 0xFF;
|
||||
temp_buff[5] = len & 0xFF;
|
||||
temp_buff[6] = (len >> 8) & 0xFF;
|
||||
|
||||
Log_write_sram(LogType_Launcher,temp_buff,7);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Launcher_Factory_Reset_Record
|
||||
* Description : Launcher<65><72><EFBFBD><EFBFBD> - <20>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Launcher_Factory_Reset_Record(void)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Launcher_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[3] = {0};
|
||||
|
||||
temp_buff[0] = LLauncher_Factory_Reset;
|
||||
temp_buff[1] = 0x00;
|
||||
|
||||
Log_write_sram(LogType_Launcher,temp_buff,2);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_PHY_Change_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - PHY״̬<D7B4><CCAC>¼
|
||||
* Input :
|
||||
state :״̬
|
||||
0x00:<3A>γ<EFBFBD>
|
||||
0x01:<3A><><EFBFBD><EFBFBD>
|
||||
0x02:TCP<43><50>ʱ
|
||||
0x03:TCP<43>Ͽ<EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_PHY_Change_Record(uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[3] = {0};
|
||||
|
||||
temp_buff[0] = LSYS_PHY_Change;
|
||||
temp_buff[1] = state;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,2);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_DevInfo_Error_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
dev :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr :<3A>豸<EFBFBD><E8B1B8>ַ
|
||||
info_addr :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>洢<EFBFBD><E6B4A2>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_DevInfo_Error_Record(uint8_t dev,uint8_t addr,uint32_t info_addr)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[8] = {0};
|
||||
|
||||
temp_buff[0] = LSYS_DevInfo_Error;
|
||||
temp_buff[1] = dev;
|
||||
temp_buff[2] = addr;
|
||||
temp_buff[3] = info_addr & 0xFF;
|
||||
temp_buff[4] = (info_addr >> 8) & 0xFF;
|
||||
temp_buff[5] = (info_addr >> 16) & 0xFF;
|
||||
temp_buff[6] = (info_addr >> 24) & 0xFF;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,7);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_API_State_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - API״̬<D7B4><CCAC>¼
|
||||
* Input :
|
||||
API_way :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʽ
|
||||
0x01:<3A><><EFBFBD><EFBFBD>
|
||||
0x02:<3A><><EFBFBD><EFBFBD>
|
||||
state :״̬
|
||||
0x01:д<><D0B4><EFBFBD>ɹ<EFBFBD>
|
||||
0x02:д<><D0B4>ʧ<EFBFBD><CAA7>
|
||||
0x03:<3A>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
0x04:MD5У<35><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
0x05:CRCУ<43><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
0x06:<3A><>תLauncher
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_API_State_Record(uint8_t API_way,uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[8] = {0};
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
temp_buff[temp_len++] = LSYS_API_State;
|
||||
temp_buff[temp_len++] = API_way;
|
||||
temp_buff[temp_len++] = state;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_NET_Argc_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
IP :<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>IP<49><50>ַ - 4Byte
|
||||
MAC :<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>MAC<41><43>ַ - 4Byte
|
||||
DNS_IP1 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP1 - <20>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
DNS_IP2 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP2 - TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
DNS_IP3 :DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP3 - MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_NET_Argc_Record(uint8_t *IP,uint8_t *MAC,uint8_t *DNS_IP1,uint8_t *DNS_IP2,uint8_t *DNS_IP3)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[40] = {0};
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
temp_buff[temp_len++] = LSYS_NET_ARGC;
|
||||
temp_buff[temp_len++] = IP[0];
|
||||
temp_buff[temp_len++] = IP[1];
|
||||
temp_buff[temp_len++] = IP[2];
|
||||
temp_buff[temp_len++] = IP[3];
|
||||
|
||||
temp_buff[temp_len++] = MAC[0];
|
||||
temp_buff[temp_len++] = MAC[1];
|
||||
temp_buff[temp_len++] = MAC[2];
|
||||
temp_buff[temp_len++] = MAC[3];
|
||||
temp_buff[temp_len++] = MAC[4];
|
||||
temp_buff[temp_len++] = MAC[5];
|
||||
|
||||
temp_buff[temp_len++] = DNS_IP1[0];
|
||||
temp_buff[temp_len++] = DNS_IP1[1];
|
||||
temp_buff[temp_len++] = DNS_IP1[2];
|
||||
temp_buff[temp_len++] = DNS_IP1[3];
|
||||
|
||||
temp_buff[temp_len++] = DNS_IP2[0];
|
||||
temp_buff[temp_len++] = DNS_IP2[1];
|
||||
temp_buff[temp_len++] = DNS_IP2[2];
|
||||
temp_buff[temp_len++] = DNS_IP2[3];
|
||||
|
||||
temp_buff[temp_len++] = DNS_IP3[0];
|
||||
temp_buff[temp_len++] = DNS_IP3[1];
|
||||
temp_buff[temp_len++] = DNS_IP3[2];
|
||||
temp_buff[temp_len++] = DNS_IP3[3];
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_MQTT_Argc_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - MQTT<54><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
productkey :<3A><>Ʒ<EFBFBD><C6B7>Կ - 12Byte
|
||||
devname :<3A>豸<EFBFBD><E8B1B8> - 65Byte
|
||||
devsecret :<3A>豸<EFBFBD><E8B1B8>Կ - 33Byte
|
||||
publish :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 65Byte
|
||||
sublish :<3A><><EFBFBD>ĵ<EFBFBD>ַ - 65Byte
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_MQTT_Argc_Record(uint8_t *productkey,uint8_t *devname,uint8_t *devsecret,uint8_t *publish,uint8_t *sublish)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LSYS_MQTT_ARGC;
|
||||
|
||||
for(uint8_t i=0;i<12;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = productkey[i];
|
||||
}
|
||||
|
||||
for(uint8_t i=0;i<65;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = devname[i];
|
||||
}
|
||||
|
||||
for(uint8_t i=0;i<33;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = devsecret[i];
|
||||
}
|
||||
|
||||
for(uint8_t i=0;i<65;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = publish[i];
|
||||
}
|
||||
|
||||
for(uint8_t i=0;i<65;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = sublish[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_Server_Comm_State_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20>ƶ<EFBFBD>ͨѶ״̬<D7B4><CCAC>¼
|
||||
* Input :
|
||||
state :״̬
|
||||
0x00:<3A><><EFBFBD><EFBFBD>
|
||||
0x01:<3A><><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_Server_Comm_State_Record(uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[8] = {0};
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
temp_buff[temp_len++] = LSYS_Server_Comm_State;
|
||||
temp_buff[temp_len++] = state;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_NET_Argc_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
IP :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ - 4Byte
|
||||
Gateway :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַ - 4Byte
|
||||
IP_Mask :Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||
DNS_Add :DNS<4E><53>ַ - 4Byte
|
||||
ArgcFlag :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ - 1Byte
|
||||
DHCPFlag :DHCPʹ<50>ܱ<EFBFBD>־ - 1Byte
|
||||
ServerFlag :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ - 1Byte
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_NET_Argc_Init_Record(uint8_t *IP,uint8_t *Gateway,uint8_t *IP_Mask,uint8_t *DNS_Add,uint8_t ArgcFlag,uint8_t DHCPFlag,uint8_t ServerFlag)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[40] = {0};
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
temp_buff[temp_len++] = LSYS_NET_DefaultARGC;
|
||||
temp_buff[temp_len++] = IP[0];
|
||||
temp_buff[temp_len++] = IP[1];
|
||||
temp_buff[temp_len++] = IP[2];
|
||||
temp_buff[temp_len++] = IP[3];
|
||||
|
||||
temp_buff[temp_len++] = Gateway[0];
|
||||
temp_buff[temp_len++] = Gateway[1];
|
||||
temp_buff[temp_len++] = Gateway[2];
|
||||
temp_buff[temp_len++] = Gateway[3];
|
||||
|
||||
temp_buff[temp_len++] = IP_Mask[0];
|
||||
temp_buff[temp_len++] = IP_Mask[1];
|
||||
temp_buff[temp_len++] = IP_Mask[2];
|
||||
temp_buff[temp_len++] = IP_Mask[3];
|
||||
|
||||
temp_buff[temp_len++] = DNS_Add[0];
|
||||
temp_buff[temp_len++] = DNS_Add[1];
|
||||
temp_buff[temp_len++] = DNS_Add[2];
|
||||
temp_buff[temp_len++] = DNS_Add[3];
|
||||
|
||||
temp_buff[temp_len++] = ArgcFlag;
|
||||
temp_buff[temp_len++] = DHCPFlag;
|
||||
temp_buff[temp_len++] = ServerFlag;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_SYS_NET_Argc_Record
|
||||
* Description : SYS_Record<72><64><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
state<74><65>״̬
|
||||
0x01<30><31><EFBFBD>㰴
|
||||
0x02<30><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
0x03<30><33><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿ<EFBFBD>
|
||||
0x04<30><34><EFBFBD>ﵽ<EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_SYS_RCUKey_State_Record(uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_SYS_Record_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[5] = {0};
|
||||
uint8_t temp_len = 0;
|
||||
|
||||
temp_buff[temp_len++] = LSYS_RCUKey_State;
|
||||
temp_buff[temp_len++] = state;
|
||||
|
||||
Log_write_sram(LogType_SYS_Record,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Device_COMM_ASK_TO_Reply_Record
|
||||
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCU<43><55>ѯ<EFBFBD>ظ<EFBFBD><D8B8>仯<EFBFBD><E4BBAF><EFBFBD>ݼ<EFBFBD>¼
|
||||
* Input :
|
||||
port :<3A>˿ں<CBBF>
|
||||
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
data_tick :ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
buff :<3A><><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_ASK_TO_Reply_Record(uint8_t port,uint32_t baud,uint32_t data_tick,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_ASK_TO_Reply;
|
||||
Temp_Flash_Buff[temp_len++] = port;
|
||||
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_ASK_TO_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint32_t data_tick,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_ASK_TO_Reply;
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Device_COMM_Send_Control_Record
|
||||
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCU<43>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼ<EFBFBD>¼
|
||||
* Input :
|
||||
port :<3A>˿ں<CBBF>
|
||||
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
buff :<3A><><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Send_Control_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_Send_Control;
|
||||
Temp_Flash_Buff[temp_len++] = port;
|
||||
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Send_Control_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_Send_Control;
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Device_COMM_Control_Reply_Record
|
||||
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - RCY<43><59><EFBFBD>ƻظ<C6BB><D8B8><EFBFBD><EFBFBD>ݼ<EFBFBD>¼
|
||||
* Input :
|
||||
port :<3A>˿ں<CBBF>
|
||||
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
buff :<3A><><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record(uint8_t port,uint32_t baud,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
|
||||
Temp_Flash_Buff[temp_len++] = port;
|
||||
Temp_Flash_Buff[temp_len++] = baud & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 8) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 16) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (baud >> 24) & 0xFF;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record2(uint32_t port_addr,uint32_t baud_addr,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Control_Reply_Record3(uint32_t port_addr,uint32_t baud_addr,uint32_t buff_addr,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LCOMM_Control_Reply;
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(port_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = SRAM_Read_Byte(buff_addr + i);
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Device_COMM_Adjust_Baud_Record
|
||||
* Description : Device_COMM<4D><4D><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD>
|
||||
* Input :
|
||||
dev_type :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
dev_addr :<3A>豸<EFBFBD><E8B1B8>ַ
|
||||
baud :ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
way :<3A>ı䷽ʽ<E4B7BD><CABD>0x01:<3A><><EFBFBD><EFBFBD>ͨѶʧ<D1B6>ܴﵽ<DCB4><EFB5BD><EFBFBD><EFBFBD>,0x02:ͨѶʧ<D1B6>ܴ<EFBFBD><DCB4><EFBFBD><EFBFBD>ﵽ<EFBFBD>ٷֱ<D9B7><D6B1><EFBFBD><EFBFBD><EFBFBD>
|
||||
fail_num :ʧ<>ܴ<EFBFBD><DCB4><EFBFBD>
|
||||
sum :<3A>ܰ<EFBFBD><DCB0><EFBFBD>
|
||||
num :<3A><>ǰͨѶ<CDA8>±<EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Adjust_Baud_Record(uint8_t dev_type,uint8_t dev_addr,uint32_t baud,uint8_t way,uint8_t fail_num,uint8_t sum,uint8_t num)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[12];
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(temp_buff,0,sizeof(temp_buff));
|
||||
|
||||
temp_buff[temp_len++] = LCOMM_Adjust_Baud;
|
||||
temp_buff[temp_len++] = dev_type;
|
||||
temp_buff[temp_len++] = dev_addr;
|
||||
temp_buff[temp_len++] = baud & 0xFF;
|
||||
temp_buff[temp_len++] = (baud >> 8) & 0xFF;
|
||||
temp_buff[temp_len++] = (baud >> 16) & 0xFF;
|
||||
temp_buff[temp_len++] = (baud >> 24) & 0xFF;
|
||||
temp_buff[temp_len++] = way;
|
||||
temp_buff[temp_len++] = fail_num;
|
||||
temp_buff[temp_len++] = sum;
|
||||
temp_buff[temp_len++] = num;
|
||||
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_COMM_Adjust_Baud_Record2(uint32_t dev_type,uint32_t dev_addr,uint32_t baud_addr)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_COMM_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[8];
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(temp_buff,0,sizeof(temp_buff));
|
||||
|
||||
temp_buff[temp_len++] = LCOMM_Adjust_Baud;
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(dev_type);
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(dev_addr);
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr);
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 1);
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 2);
|
||||
temp_buff[temp_len++] = SRAM_Read_Byte(baud_addr + 3);
|
||||
|
||||
Log_write_sram(LogType_Device_COMM,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Device_Online_Record
|
||||
* Description : Device_Online<6E><65><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>¼
|
||||
* Input :
|
||||
dev :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
addr :<3A>豸<EFBFBD><E8B1B8>ַ
|
||||
state :<3A>豸״̬ - 0x00<30><30><EFBFBD><EFBFBD><EFBFBD>ߣ<EFBFBD>0x01<30><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Device_Online_Record(uint8_t dev,uint8_t addr,uint8_t state)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Device_Online_bit )) )
|
||||
{
|
||||
uint8_t temp_buff[6];
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(temp_buff,0,sizeof(temp_buff));
|
||||
|
||||
temp_buff[temp_len++] = dev;
|
||||
temp_buff[temp_len++] = addr;
|
||||
temp_buff[temp_len++] = state;
|
||||
|
||||
Log_write_sram(LogType_Device_Online,temp_buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Global_ParaInfo_Record
|
||||
* Description : Global_Parameters<72><73><EFBFBD><EFBFBD> - ȫ<>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>¼ <20><><EFBFBD><EFBFBD>10<31><30><EFBFBD>Ӽ<EFBFBD>¼
|
||||
* Input :
|
||||
buff :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
len :<3A>豸<EFBFBD><E8B1B8>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Global_ParaInfo_Record(uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Global_Parameters_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LGlobal_Para;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Global_Parameters,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Global_ParaInfo_Record
|
||||
* Description : Global_Parameters<72><73><EFBFBD><EFBFBD> - ȫ<>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>¼ <20><><EFBFBD><EFBFBD>10<31><30><EFBFBD>Ӽ<EFBFBD>¼
|
||||
* Input :
|
||||
buff :<3A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||
len :<3A>豸<EFBFBD><E8B1B8>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Global_DevInfo_Record(uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Global_Parameters_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LGlobal_Dev;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Global_Parameters,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_NET_COMM_Record
|
||||
* Description : Net_COMM<4D><4D><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
|
||||
* Input :
|
||||
SocketId:<3A><EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(1~4)
|
||||
ip :<3A><><EFBFBD>յ<EFBFBD>IP<49><50>ַ
|
||||
port :<3A><><EFBFBD>յ<EFBFBD>Port
|
||||
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_NET_COMM_Send_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Net_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LNetComm_Send;
|
||||
Temp_Flash_Buff[temp_len++] = SocketId;
|
||||
Temp_Flash_Buff[temp_len++] = ip[0];
|
||||
Temp_Flash_Buff[temp_len++] = ip[1];
|
||||
Temp_Flash_Buff[temp_len++] = ip[2];
|
||||
Temp_Flash_Buff[temp_len++] = ip[3];
|
||||
Temp_Flash_Buff[temp_len++] = (port) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (port >> 8) & 0xFF;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Net_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_NET_COMM_Record
|
||||
* Description : Net_COMM<4D><4D><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>¼
|
||||
* Input :
|
||||
SocketId:<3A><EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(1~4)
|
||||
ip :<3A><><EFBFBD>յ<EFBFBD>IP<49><50>ַ
|
||||
port :<3A><><EFBFBD>յ<EFBFBD>Port
|
||||
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_NET_COMM_Recv_Record(uint8_t SocketId,uint8_t *ip,uint16_t port,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Net_COMM_bit )) )
|
||||
{
|
||||
uint16_t buff_len = len ;
|
||||
if(buff_len >= 512) buff_len = 512; //<2F><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>512Byte
|
||||
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LNetComm_Recv;
|
||||
Temp_Flash_Buff[temp_len++] = SocketId;
|
||||
Temp_Flash_Buff[temp_len++] = ip[0];
|
||||
Temp_Flash_Buff[temp_len++] = ip[1];
|
||||
Temp_Flash_Buff[temp_len++] = ip[2];
|
||||
Temp_Flash_Buff[temp_len++] = ip[3];
|
||||
Temp_Flash_Buff[temp_len++] = (port) & 0xFF;
|
||||
Temp_Flash_Buff[temp_len++] = (port >> 8) & 0xFF;
|
||||
|
||||
for(uint16_t i=0;i<buff_len;i++)
|
||||
{
|
||||
Temp_Flash_Buff[temp_len++] = buff[i];
|
||||
}
|
||||
|
||||
Log_write_sram(LogType_Net_COMM,Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_LogicInfo_DebugRecord
|
||||
* Description : Logic_Rec<65><63><EFBFBD><EFBFBD> - <20><EFBFBD><DFBC><EFBFBD>Ϣ <20><><EFBFBD>Լ<EFBFBD>¼
|
||||
* Input :
|
||||
buff :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len :<3A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_LogicInfo_DebugRecord(char *fmt,...)
|
||||
{
|
||||
if(LogType_Enable && (SYS_Log_Switch & (1 << LogType_Logic_Record_bit )) )
|
||||
{
|
||||
uint16_t temp_len = 0;
|
||||
|
||||
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||
|
||||
Temp_Flash_Buff[temp_len++] = LLogic_DebugString;
|
||||
|
||||
va_list ap; //<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>char<61><72><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
|
||||
va_start(ap, fmt); //ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ֵ--<2D><>ʼ<EFBFBD><CABC>
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ո<EFBFBD>ʽ<EFBFBD><CABD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>-<2D><><EFBFBD>ŵ<EFBFBD>strָ<72><D6B8><EFBFBD>Ŀռ<C4BF>
|
||||
temp_len += vsnprintf((char *)&Temp_Flash_Buff[1],512,fmt,ap);
|
||||
va_end(ap); //<2F><>apָ<70><D6B8><EFBFBD><EFBFBD>ΪNULL
|
||||
|
||||
Log_write_sram(LogType_Logic_Record,(uint8_t *)Temp_Flash_Buff,temp_len);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
3931
MCU_Driver/logic_file_function.c
Normal file
3931
MCU_Driver/logic_file_function.c
Normal file
File diff suppressed because it is too large
Load Diff
294
MCU_Driver/md5.c
Normal file
294
MCU_Driver/md5.c
Normal file
@@ -0,0 +1,294 @@
|
||||
/*
|
||||
* md5.c
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "md5.h"
|
||||
#include "spi_flash.h"
|
||||
#include "spi_sram.h"
|
||||
#include "watchdog.h"
|
||||
|
||||
typedef unsigned char *POINTER;
|
||||
typedef unsigned short int UINT2;
|
||||
typedef unsigned int UINT4;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
UINT4 state[4];
|
||||
UINT4 count[2];
|
||||
unsigned char buffer[64];
|
||||
}MD5_CTX;
|
||||
|
||||
#define S11 7
|
||||
#define S12 12
|
||||
#define S13 17
|
||||
#define S14 22
|
||||
#define S21 5
|
||||
#define S22 9
|
||||
#define S23 14
|
||||
#define S24 20
|
||||
#define S31 4
|
||||
#define S32 11
|
||||
#define S33 16
|
||||
#define S34 23
|
||||
#define S41 6
|
||||
#define S42 10
|
||||
#define S43 15
|
||||
#define S44 21
|
||||
|
||||
static unsigned char PADDING[64] = {
|
||||
0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
|
||||
};
|
||||
|
||||
#define F(x, y, z) (((x) & (y)) | ((~x) & (z)))
|
||||
#define G(x, y, z) (((x) & (z)) | ((y) & (~z)))
|
||||
#define H(x, y, z) ((x) ^ (y) ^ (z))
|
||||
#define I(x, y, z) ((y) ^ ((x) | (~z)))
|
||||
|
||||
#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32-(n))))
|
||||
|
||||
#define FF(a, b, c, d, x, s, ac) { (a) += F ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
|
||||
#define GG(a, b, c, d, x, s, ac) { (a) += G ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
|
||||
#define HH(a, b, c, d, x, s, ac) { (a) += H ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
|
||||
#define II(a, b, c, d, x, s, ac) { (a) += I ((b), (c), (d)) + (x) + (UINT4)(ac); (a) = ROTATE_LEFT ((a), (s)); (a) += (b); }
|
||||
|
||||
void Encode(unsigned char *output, UINT4 *input, unsigned int len)
|
||||
{
|
||||
unsigned int i, j;
|
||||
|
||||
for (i = 0, j = 0; j < len; i++, j += 4) {
|
||||
output[j] = (unsigned char)(input[i] & 0xff);
|
||||
output[j+1] = (unsigned char)((input[i] >> 8) & 0xff);
|
||||
output[j+2] = (unsigned char)((input[i] >> 16) & 0xff);
|
||||
output[j+3] = (unsigned char)((input[i] >> 24) & 0xff);
|
||||
}
|
||||
}
|
||||
|
||||
void MD5Init(MD5_CTX *context)
|
||||
{
|
||||
context->count[0] = context->count[1] = 0;
|
||||
context->state[0] = 0x67452301;
|
||||
context->state[1] = 0xefcdab89;
|
||||
context->state[2] = 0x98badcfe;
|
||||
context->state[3] = 0x10325476;
|
||||
}
|
||||
|
||||
void Decode(UINT4 *output, unsigned char *input, unsigned int len)
|
||||
{
|
||||
unsigned int i, j;
|
||||
|
||||
for (i = 0, j = 0; j < len; i++, j += 4) {
|
||||
output[i] = ((UINT4)input[j]) | (((UINT4)input[j+1]) << 8) | (((UINT4)input[j+2]) << 16) | (((UINT4)input[j+3]) << 24);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void MD5Transform (UINT4 state[4], unsigned char block[64])
|
||||
{
|
||||
UINT4 a = state[0], b = state[1], c = state[2], d = state[3], x[16];
|
||||
Decode (x, block, 64);
|
||||
FF (a, b, c, d, x[ 0], S11, 0xd76aa478); /* 1 */
|
||||
FF (d, a, b, c, x[ 1], S12, 0xe8c7b756); /* 2 */
|
||||
FF (c, d, a, b, x[ 2], S13, 0x242070db); /* 3 */
|
||||
FF (b, c, d, a, x[ 3], S14, 0xc1bdceee); /* 4 */
|
||||
FF (a, b, c, d, x[ 4], S11, 0xf57c0faf); /* 5 */
|
||||
FF (d, a, b, c, x[ 5], S12, 0x4787c62a); /* 6 */
|
||||
FF (c, d, a, b, x[ 6], S13, 0xa8304613); /* 7 */
|
||||
FF (b, c, d, a, x[ 7], S14, 0xfd469501); /* 8 */
|
||||
FF (a, b, c, d, x[ 8], S11, 0x698098d8); /* 9 */
|
||||
FF (d, a, b, c, x[ 9], S12, 0x8b44f7af); /* 10 */
|
||||
FF (c, d, a, b, x[10], S13, 0xffff5bb1); /* 11 */
|
||||
FF (b, c, d, a, x[11], S14, 0x895cd7be); /* 12 */
|
||||
FF (a, b, c, d, x[12], S11, 0x6b901122); /* 13 */
|
||||
FF (d, a, b, c, x[13], S12, 0xfd987193); /* 14 */
|
||||
FF (c, d, a, b, x[14], S13, 0xa679438e); /* 15 */
|
||||
FF (b, c, d, a, x[15], S14, 0x49b40821); /* 16 */
|
||||
GG (a, b, c, d, x[ 1], S21, 0xf61e2562); /* 17 */
|
||||
GG (d, a, b, c, x[ 6], S22, 0xc040b340); /* 18 */
|
||||
GG (c, d, a, b, x[11], S23, 0x265e5a51); /* 19 */
|
||||
GG (b, c, d, a, x[ 0], S24, 0xe9b6c7aa); /* 20 */
|
||||
GG (a, b, c, d, x[ 5], S21, 0xd62f105d); /* 21 */
|
||||
GG (d, a, b, c, x[10], S22, 0x2441453); /* 22 */
|
||||
GG (c, d, a, b, x[15], S23, 0xd8a1e681); /* 23 */
|
||||
GG (b, c, d, a, x[ 4], S24, 0xe7d3fbc8); /* 24 */
|
||||
GG (a, b, c, d, x[ 9], S21, 0x21e1cde6); /* 25 */
|
||||
GG (d, a, b, c, x[14], S22, 0xc33707d6); /* 26 */
|
||||
GG (c, d, a, b, x[ 3], S23, 0xf4d50d87); /* 27 */
|
||||
GG (b, c, d, a, x[ 8], S24, 0x455a14ed); /* 28 */
|
||||
GG (a, b, c, d, x[13], S21, 0xa9e3e905); /* 29 */
|
||||
GG (d, a, b, c, x[ 2], S22, 0xfcefa3f8); /* 30 */
|
||||
GG (c, d, a, b, x[ 7], S23, 0x676f02d9); /* 31 */
|
||||
GG (b, c, d, a, x[12], S24, 0x8d2a4c8a); /* 32 */
|
||||
HH (a, b, c, d, x[ 5], S31, 0xfffa3942); /* 33 */
|
||||
HH (d, a, b, c, x[ 8], S32, 0x8771f681); /* 34 */
|
||||
HH (c, d, a, b, x[11], S33, 0x6d9d6122); /* 35 */
|
||||
HH (b, c, d, a, x[14], S34, 0xfde5380c); /* 36 */
|
||||
HH (a, b, c, d, x[ 1], S31, 0xa4beea44); /* 37 */
|
||||
HH (d, a, b, c, x[ 4], S32, 0x4bdecfa9); /* 38 */
|
||||
HH (c, d, a, b, x[ 7], S33, 0xf6bb4b60); /* 39 */
|
||||
HH (b, c, d, a, x[10], S34, 0xbebfbc70); /* 40 */
|
||||
HH (a, b, c, d, x[13], S31, 0x289b7ec6); /* 41 */
|
||||
HH (d, a, b, c, x[ 0], S32, 0xeaa127fa); /* 42 */
|
||||
HH (c, d, a, b, x[ 3], S33, 0xd4ef3085); /* 43 */
|
||||
HH (b, c, d, a, x[ 6], S34, 0x4881d05); /* 44 */
|
||||
HH (a, b, c, d, x[ 9], S31, 0xd9d4d039); /* 45 */
|
||||
HH (d, a, b, c, x[12], S32, 0xe6db99e5); /* 46 */
|
||||
HH (c, d, a, b, x[15], S33, 0x1fa27cf8); /* 47 */
|
||||
HH (b, c, d, a, x[ 2], S34, 0xc4ac5665); /* 48 */
|
||||
II (a, b, c, d, x[ 0], S41, 0xf4292244); /* 49 */
|
||||
II (d, a, b, c, x[ 7], S42, 0x432aff97); /* 50 */
|
||||
II (c, d, a, b, x[14], S43, 0xab9423a7); /* 51 */
|
||||
II (b, c, d, a, x[ 5], S44, 0xfc93a039); /* 52 */
|
||||
II (a, b, c, d, x[12], S41, 0x655b59c3); /* 53 */
|
||||
II (d, a, b, c, x[ 3], S42, 0x8f0ccc92); /* 54 */
|
||||
II (c, d, a, b, x[10], S43, 0xffeff47d); /* 55 */
|
||||
II (b, c, d, a, x[ 1], S44, 0x85845dd1); /* 56 */
|
||||
II (a, b, c, d, x[ 8], S41, 0x6fa87e4f); /* 57 */
|
||||
II (d, a, b, c, x[15], S42, 0xfe2ce6e0); /* 58 */
|
||||
II (c, d, a, b, x[ 6], S43, 0xa3014314); /* 59 */
|
||||
II (b, c, d, a, x[13], S44, 0x4e0811a1); /* 60 */
|
||||
II (a, b, c, d, x[ 4], S41, 0xf7537e82); /* 61 */
|
||||
II (d, a, b, c, x[11], S42, 0xbd3af235); /* 62 */
|
||||
II (c, d, a, b, x[ 2], S43, 0x2ad7d2bb); /* 63 */
|
||||
II (b, c, d, a, x[ 9], S44, 0xeb86d391); /* 64 */
|
||||
state[0] += a;
|
||||
state[1] += b;
|
||||
state[2] += c;
|
||||
state[3] += d;
|
||||
memset ((POINTER)x, 0, sizeof (x));
|
||||
}
|
||||
|
||||
void MD5Update(MD5_CTX *context, unsigned char *input, unsigned int inputLen)
|
||||
{
|
||||
unsigned int i, index, partLen;
|
||||
|
||||
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
|
||||
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
|
||||
context->count[1] += ((UINT4)inputLen >> 29);
|
||||
|
||||
partLen = 64 - index;
|
||||
|
||||
if (inputLen >= partLen) {
|
||||
memcpy((POINTER)&context->buffer[index], (POINTER)input, partLen);
|
||||
MD5Transform(context->state, context->buffer);
|
||||
|
||||
for (i = partLen; i + 63 < inputLen; i += 64)
|
||||
MD5Transform (context->state, &input[i]);
|
||||
index = 0;
|
||||
} else i = 0;
|
||||
|
||||
memcpy((POINTER)&context->buffer[index], (POINTER)&input[i], inputLen-i);
|
||||
}
|
||||
|
||||
void MD5_SRAM_Update(MD5_CTX *context, uint32_t add, unsigned int inputLen)
|
||||
{
|
||||
unsigned int i, index, partLen;
|
||||
uint32_t addr = add;
|
||||
|
||||
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
|
||||
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
|
||||
context->count[1] += ((UINT4)inputLen >> 29);
|
||||
|
||||
partLen = 64 - index;
|
||||
|
||||
if (inputLen >= partLen) {
|
||||
// memcpy((POINTER)&context->buffer[index], (POINTER)input, partLen);
|
||||
SRAM_DMA_Read_Buff((POINTER)&context->buffer[index], partLen, addr);
|
||||
addr += partLen;
|
||||
|
||||
MD5Transform(context->state, context->buffer);
|
||||
unsigned char block[64];
|
||||
for (i = partLen; i + 63 < inputLen; i += 64)
|
||||
{
|
||||
WDT_Feed(); //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>Ź<EFBFBD>
|
||||
SRAM_DMA_Read_Buff(block, 64, addr);
|
||||
addr += 64;
|
||||
MD5Transform (context->state, block);
|
||||
}
|
||||
index = 0;
|
||||
} else i = 0;
|
||||
|
||||
// memcpy((POINTER)&context->buffer[index], (POINTER)&input[i], inputLen-i);
|
||||
SRAM_DMA_Read_Buff((POINTER)&context->buffer[index], inputLen-i, addr);
|
||||
}
|
||||
|
||||
void MD5_FLASH_Update(MD5_CTX *context, uint32_t add, unsigned int inputLen)
|
||||
{
|
||||
unsigned int i, index, partLen;
|
||||
uint32_t addr = add;
|
||||
|
||||
index = (unsigned int)((context->count[0] >> 3) & 0x3F);
|
||||
if ((context->count[0] += ((UINT4)inputLen << 3)) < ((UINT4)inputLen << 3)) context->count[1]++;
|
||||
context->count[1] += ((UINT4)inputLen >> 29);
|
||||
|
||||
partLen = 64 - index;
|
||||
|
||||
if (inputLen >= partLen)
|
||||
{
|
||||
Flash_Read((POINTER)&context->buffer[index], partLen, addr);
|
||||
addr += partLen;
|
||||
|
||||
MD5Transform(context->state, context->buffer);
|
||||
unsigned char block[64];
|
||||
for (i = partLen; i + 63 < inputLen; i += 64)
|
||||
{
|
||||
WDT_Feed(); //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>Ź<EFBFBD>
|
||||
Flash_Read(block, 64, addr);
|
||||
addr += 64;
|
||||
MD5Transform (context->state, block);
|
||||
}
|
||||
index = 0;
|
||||
} else i = 0;
|
||||
|
||||
Flash_Read((POINTER)&context->buffer[index], inputLen-i, addr);
|
||||
}
|
||||
|
||||
void MD5Final(unsigned char digest[16], MD5_CTX *context)
|
||||
{
|
||||
unsigned char bits[8];
|
||||
unsigned int index, padLen;
|
||||
|
||||
Encode (bits, context->count, 8);
|
||||
index = (unsigned int)((context->count[0] >> 3) & 0x3f);
|
||||
padLen = (index < 56) ? (56 - index) : (120 - index);
|
||||
MD5Update (context, PADDING, padLen);
|
||||
MD5Update (context, bits, 8);
|
||||
Encode (digest, context->state, 16);
|
||||
memset ((POINTER)context, 0, sizeof (*context));
|
||||
}
|
||||
|
||||
void MD5Digest(char *pszInput, unsigned int nInputSize, char *pszOutPut)
|
||||
{
|
||||
MD5_CTX context;
|
||||
//unsigned int len = strlen (pszInput);
|
||||
unsigned int len = nInputSize;
|
||||
|
||||
MD5Init (&context);
|
||||
MD5Update (&context, (unsigned char *)pszInput, len);
|
||||
MD5Final ((unsigned char *)pszOutPut, &context);
|
||||
}
|
||||
|
||||
void MD5Digest_SRAM(uint32_t add, unsigned int nInputSize, char *pszOutPut)
|
||||
{
|
||||
MD5_CTX context;
|
||||
//unsigned int len = strlen (pszInput);
|
||||
unsigned int len = nInputSize;
|
||||
|
||||
MD5Init(&context);
|
||||
MD5_SRAM_Update(&context, add, len);
|
||||
MD5Final((unsigned char *)pszOutPut, &context);
|
||||
}
|
||||
|
||||
void MD5Digest_FLASH(uint32_t add, unsigned int nInputSize, char *pszOutPut)
|
||||
{
|
||||
MD5_CTX context;
|
||||
unsigned int len = nInputSize;
|
||||
|
||||
MD5Init(&context);
|
||||
MD5_FLASH_Update(&context, add, len);
|
||||
MD5Final((unsigned char *)pszOutPut, &context);
|
||||
}
|
||||
|
||||
292
MCU_Driver/rtc.c
Normal file
292
MCU_Driver/rtc.c
Normal file
@@ -0,0 +1,292 @@
|
||||
/*
|
||||
* rtc.c
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "includes.h"
|
||||
#include <string.h>
|
||||
#include <time.h>
|
||||
|
||||
S_RTC RTC_Raw_Data = {
|
||||
.year = 0,
|
||||
.month = 1,
|
||||
.day = 1,
|
||||
.week = 0,
|
||||
.hour = 0,
|
||||
.minute = 0,
|
||||
.second = 0,
|
||||
};
|
||||
|
||||
S_RTC MCU_RTC_Data = {
|
||||
.year = 0,
|
||||
.month = 1,
|
||||
.day = 1,
|
||||
.week = 0,
|
||||
.hour = 0,
|
||||
.minute = 0,
|
||||
.second = 0,
|
||||
};
|
||||
|
||||
S_RTC Net_RTC_Data; //2024-08-03 <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
TIME_INFO_T g_time_info;
|
||||
|
||||
uint32_t Mcu_GetTime_tick = 0;
|
||||
uint32_t Log_Time_ms = 0;
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_Init
|
||||
* Description : RTC<54><43>ʼ<EFBFBD><CABC> - ע<><D7A2>BLV-C1Pû<50><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB>ʹ<EFBFBD><CAB9>ϵͳ<CFB5><CDB3>ʱ<EFBFBD><CAB1>ģ<EFBFBD><C4A3>RTC<54><43>ʱ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void RTC_Init(void)
|
||||
{
|
||||
memset(&RTC_Raw_Data,0,sizeof(S_RTC));
|
||||
memset(&MCU_RTC_Data,0,sizeof(S_RTC));
|
||||
memset(&Net_RTC_Data,0,sizeof(S_RTC));
|
||||
memset(&g_time_info,0,sizeof(TIME_INFO_T));
|
||||
|
||||
RTC_Raw_Data.year = 0x00;
|
||||
RTC_Raw_Data.month = 0x01;
|
||||
RTC_Raw_Data.day = 0x01;
|
||||
RTC_Raw_Data.week = 0x00;
|
||||
RTC_Raw_Data.hour = 0x00;
|
||||
RTC_Raw_Data.minute = 0x00;
|
||||
RTC_Raw_Data.second = 0x00;
|
||||
|
||||
MCU_RTC_Data.year = 0x00;
|
||||
MCU_RTC_Data.month = 0x01;
|
||||
MCU_RTC_Data.day = 0x01;
|
||||
MCU_RTC_Data.week = 0x00;
|
||||
MCU_RTC_Data.hour = 0x00;
|
||||
MCU_RTC_Data.minute = 0x00;
|
||||
MCU_RTC_Data.second = 0x00;
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : HEX_data_conversion_to_DEC
|
||||
* Description : <20><>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊʵ<CEAA>ʵ<EFBFBD>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x20 -> 20
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t HEX_Conversion_To_DEC(uint8_t c_num)
|
||||
{
|
||||
uint8_t rev_num = 0;
|
||||
|
||||
rev_num = (c_num/16)*10 + (c_num%16);
|
||||
|
||||
return rev_num;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : HEX_data_conversion_to_DEC
|
||||
* Description : <20><>ʮ<EFBFBD><CAAE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊʮ<CEAA><CAAE><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 20 -> 0x20
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t DEV_Conversion_To_HEX(uint8_t c_num)
|
||||
{
|
||||
uint8_t rev_num = 0;
|
||||
|
||||
rev_num = (c_num/10)*16 + (c_num%10);
|
||||
|
||||
return rev_num;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_Conversion_To_UTC
|
||||
* Description : <20><>RTCʱ<43><CAB1>ת<EFBFBD><D7AA>ΪUTCʱ<43><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time)
|
||||
{
|
||||
// uint32_t timestamp = 0;
|
||||
// struct tm test_time;
|
||||
//
|
||||
// test_time.tm_year = HEX_Conversion_To_DEC(rtc_time->year) + 2000 - 1900;
|
||||
// if(rtc_time->month != 0x00)
|
||||
// {
|
||||
// test_time.tm_mon = HEX_Conversion_To_DEC(rtc_time->month) - 1;
|
||||
// }else {
|
||||
// test_time.tm_mon = 1;
|
||||
// }
|
||||
//
|
||||
// test_time.tm_mday = HEX_Conversion_To_DEC(rtc_time->day);
|
||||
// test_time.tm_hour = HEX_Conversion_To_DEC(rtc_time->hour);
|
||||
// test_time.tm_min = HEX_Conversion_To_DEC(rtc_time->minute);
|
||||
// test_time.tm_sec = HEX_Conversion_To_DEC(rtc_time->second);
|
||||
// test_time.tm_isdst = -1;
|
||||
//
|
||||
// timestamp = mktime(&test_time); //<2F><>ת<EFBFBD><D7AA><EFBFBD>ı<EFBFBD>־<EFBFBD><D6BE>UTCʱ<43><CAB1><EFBFBD><EFBFBD>
|
||||
//
|
||||
// /*<2A><><EFBFBD><EFBFBD>ʱ<EFBFBD>仹<EFBFBD><E4BBB9>Ҫ<EFBFBD><D2AA>ȥ8Сʱ*/
|
||||
// timestamp -= 8*3600;
|
||||
//
|
||||
// return timestamp;
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : UTC_Conversion_To_RTC
|
||||
* Description : <20><>UTCʱ<43><CAB1>ת<EFBFBD><D7AA>ΪRTCʱ<43><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick)
|
||||
{
|
||||
// uint8_t temp = 0;
|
||||
// time_t temp_tick = utc_tick + 8*3600; /*<2A><><EFBFBD><EFBFBD>ʱ<EFBFBD>任<EFBFBD><E4BBBB><EFBFBD>ɱ<EFBFBD><EFBFBD><D7BC><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>8Сʱ*/
|
||||
// struct tm *test_time;
|
||||
//
|
||||
// test_time = localtime(&temp_tick);
|
||||
//
|
||||
// temp = ( 1900 + test_time->tm_year ) - 2000;
|
||||
// rtc_time->year = DEV_Conversion_To_HEX(temp);
|
||||
// temp = 1 + test_time->tm_mon;
|
||||
// rtc_time->month = DEV_Conversion_To_HEX(temp);
|
||||
// temp = test_time->tm_mday;
|
||||
// rtc_time->day = DEV_Conversion_To_HEX(temp);
|
||||
//
|
||||
// temp = test_time->tm_hour;
|
||||
// rtc_time->hour = DEV_Conversion_To_HEX(temp);
|
||||
// temp = test_time->tm_min;
|
||||
// rtc_time->minute = DEV_Conversion_To_HEX(temp);
|
||||
// temp = test_time->tm_sec;
|
||||
// rtc_time->second = DEV_Conversion_To_HEX(temp);
|
||||
//
|
||||
// temp = test_time->tm_wday;
|
||||
// rtc_time->week = DEV_Conversion_To_HEX(temp);
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_ReadDate
|
||||
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD>ȡ - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t RTC_ReadDate(S_RTC *psRTC)
|
||||
{
|
||||
|
||||
if(g_time_info.time_select == 0x02){
|
||||
/* CSIOʱ<4F><CAB1><EFBFBD><EFBFBD>ȡ <20><>ʼ*/
|
||||
|
||||
psRTC->year = MCU_RTC_Data.year;
|
||||
psRTC->month = MCU_RTC_Data.month;
|
||||
psRTC->day = MCU_RTC_Data.day;
|
||||
psRTC->hour = MCU_RTC_Data.hour;
|
||||
psRTC->minute = MCU_RTC_Data.minute;
|
||||
psRTC->second = MCU_RTC_Data.second;
|
||||
psRTC->week = MCU_RTC_Data.week;
|
||||
|
||||
/* CSIOʱ<4F><CAB1><EFBFBD><EFBFBD>ȡ <20><><EFBFBD><EFBFBD>*/
|
||||
}else{
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ <20><>ʼ */
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ǰʱ<C7B0><CAB1>+<2B><><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD>
|
||||
uint32_t rtc_tick = 0;
|
||||
|
||||
rtc_tick = RTC_Conversion_To_Unix(&MCU_RTC_Data);
|
||||
//rtc_tick += rtc_hour*3600+rtc_min*60+rtc_sec;
|
||||
rtc_tick += SysTick_1s - Mcu_GetTime_tick;
|
||||
Unix_Conversion_To_RTC(psRTC,rtc_tick);
|
||||
|
||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ <20><><EFBFBD><EFBFBD> */
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_WriteDate
|
||||
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t RTC_WriteDate(S_RTC SetRTC)
|
||||
{
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2<EFBFBD><32>Сʱ<D0A1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>ʵĵ<CAB5>ǰʱ<C7B0>䣬<EFBFBD><E4A3AC><EFBFBD><EFBFBD><EFBFBD>ؼ<EFBFBD><D8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
MCU_RTC_Data.year = SetRTC.year;
|
||||
MCU_RTC_Data.month = SetRTC.month;
|
||||
MCU_RTC_Data.day = SetRTC.day;
|
||||
MCU_RTC_Data.hour = SetRTC.hour;
|
||||
MCU_RTC_Data.minute = SetRTC.minute;
|
||||
MCU_RTC_Data.second = SetRTC.second;
|
||||
|
||||
Mcu_GetTime_tick = SysTick_1s; //<2F><>¼<EFBFBD><C2BC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : NetRTC_WriteDate
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> RTCʱ<43><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t NetRTC_WriteDate(S_RTC SetRTC)
|
||||
{
|
||||
Net_RTC_Data.year = SetRTC.year;
|
||||
Net_RTC_Data.month = SetRTC.month;
|
||||
Net_RTC_Data.day = SetRTC.day;
|
||||
Net_RTC_Data.hour = SetRTC.hour;
|
||||
Net_RTC_Data.minute = SetRTC.minute;
|
||||
Net_RTC_Data.second = SetRTC.second;
|
||||
Net_RTC_Data.week = SetRTC.week;
|
||||
|
||||
g_time_info.Mcu_GetTime_tick = SysTick_1s; //<2F><>¼<EFBFBD><C2BC>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_TASK
|
||||
* Description : RTC<54><43><EFBFBD><EFBFBD> - BLV_C1P<31><50>û<EFBFBD><C3BB>RTC<54><43><EFBFBD>ܣ<EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void RTC_TASK(void)
|
||||
{
|
||||
static uint32_t RTC_Tick = 0;
|
||||
uint8_t r_minute = 0;
|
||||
if(SysTick_1ms - RTC_Tick >= 1000)
|
||||
{
|
||||
r_minute = RTC_Raw_Data.minute;
|
||||
RTC_Tick = SysTick_1ms;
|
||||
RTC_ReadDate(&RTC_Raw_Data);
|
||||
|
||||
if(r_minute != RTC_Raw_Data.minute)
|
||||
{
|
||||
Log_Time_ms = SysTick_1ms; //ÿ<><C3BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
}
|
||||
if(server_info.sync_tick==0x01)
|
||||
{
|
||||
server_info.sync_tick = 0x02;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : RTC_TimeDate_Correct_Figure
|
||||
* Description : RTCʱ<43><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>Ϊ<EFBFBD><CEAA>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> A~F
|
||||
* Return : 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x01:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD>ȷ
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t RTC_TimeDate_Correct_Figure(uint8_t data)
|
||||
{
|
||||
uint8_t temp_num = data;
|
||||
|
||||
if( ((temp_num & 0x0F) < 0x0A) ){
|
||||
temp_num >>= 4;
|
||||
if( ((temp_num & 0x0F) < 0x0A) ){
|
||||
return 0x00;
|
||||
}
|
||||
}
|
||||
|
||||
return 0x01;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
340
MCU_Driver/rw_logging.c
Normal file
340
MCU_Driver/rw_logging.c
Normal file
@@ -0,0 +1,340 @@
|
||||
/*
|
||||
* rw_logging.c
|
||||
*
|
||||
* Created on: Jul 29, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "includes.h"
|
||||
#include <string.h>
|
||||
|
||||
/*<2A><>ȡSRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ǰд<C7B0><D0B4><EFBFBD><EFBFBD>ַ*/
|
||||
__attribute__((section(".non_0_wait"))) uint32_t Get_Log_Current_Address(void)
|
||||
{
|
||||
uint32_t Last_addr = 0;
|
||||
uint8_t temp_d = 0;
|
||||
|
||||
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+3);
|
||||
Last_addr = temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+2);
|
||||
Last_addr |= temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address+1);
|
||||
Last_addr |= temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_LOG_Start_Address);
|
||||
Last_addr |= temp_d;
|
||||
|
||||
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
|
||||
return Last_addr;
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>SRAM<41><4D><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ǰд<C7B0><D0B4><EFBFBD><EFBFBD>ַ*/
|
||||
__attribute__((section(".non_0_wait"))) void Set_Log_Current_Address(uint32_t W_addr)
|
||||
{
|
||||
uint32_t Last_addr = W_addr;
|
||||
uint8_t temp = 0;
|
||||
|
||||
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
|
||||
|
||||
temp = Last_addr & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address);
|
||||
temp = (Last_addr >> 8) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+1);
|
||||
temp = (Last_addr >> 16) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+2);
|
||||
temp = (Last_addr >> 24) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_LOG_Start_Address+3);
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD>SRAM<41><4D>TFTP<54><50>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ַ*/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_Set_TFTP_READ_LOG_Address(uint32_t r_addr)
|
||||
{
|
||||
uint32_t Last_addr = r_addr;
|
||||
uint8_t temp = 0;
|
||||
|
||||
/*<2A>жϵ<D0B6>ַ<EFBFBD>Ƿ<EFBFBD><C7B7>Ϸ<EFBFBD>*/
|
||||
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
|
||||
|
||||
temp = Last_addr & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address);
|
||||
temp = (Last_addr >> 8) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+1);
|
||||
temp = (Last_addr >> 16) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+2);
|
||||
temp = (Last_addr >> 24) & 0xFF;
|
||||
SRAM_Write_Byte(temp,SRAM_TFTP_LOG_READ_Address+3);
|
||||
}
|
||||
|
||||
/*<2A><>ȡSRAM<41><4D>TFTP<54><50>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>־<EFBFBD><D6BE>ַ*/
|
||||
__attribute__((section(".non_0_wait"))) uint32_t SRAM_Get_TFTP_READ_Log_Address(void)
|
||||
{
|
||||
uint32_t Last_addr = 0;
|
||||
uint8_t temp_d = 0;
|
||||
|
||||
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+3);
|
||||
Last_addr = temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+2);
|
||||
Last_addr |= temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address+1);
|
||||
Last_addr |= temp_d;
|
||||
Last_addr <<= 8;
|
||||
temp_d = SRAM_Read_Byte(SRAM_TFTP_LOG_READ_Address);
|
||||
Last_addr |= temp_d;
|
||||
|
||||
if((Last_addr < SRAM_LOG_DATA_Address) || (Last_addr > SRAM_LOG_End_Address)) Last_addr = SRAM_LOG_DATA_Address;
|
||||
return Last_addr;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : <20><>־<EFBFBD><D6BE><EFBFBD>湦<EFBFBD><E6B9A6>
|
||||
* Description : <20><>־ÿһ<C3BF><D2BB>Сʱ<D0A1><CAB1>SRAM<41>е<EFBFBD><D0B5><EFBFBD>־<EFBFBD><D6BE><EFBFBD>ݽ<EFBFBD><DDBD>з<EFBFBD>װ<EFBFBD><D7B0>
|
||||
<20><>װ<EFBFBD><D7B0>ֻ<EFBFBD>Ǽ<EFBFBD><C7BC>ϰ<EFBFBD>ͷ<EFBFBD><CDB7>β<EFBFBD><CEB2><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Log_write_sram(uint8_t data_type,uint8_t *buff,uint16_t len)
|
||||
{
|
||||
uint16_t temp_date = 0;
|
||||
uint32_t Last_add = 0;
|
||||
uint32_t Log_Hour_Tick = SysTick_1ms - Log_Time_ms; //2021-09-23 Log_Time_ms<6D>ñ<EFBFBD><C3B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>н<EFBFBD><D0BD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹȫ<D6B9>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>while<6C><65>ͬʱ<CDAC><CAB1>д
|
||||
Log_Hour_Tick += HEX_Conversion_To_DEC(RTC_Raw_Data.minute)*60000;
|
||||
Log_Hour_Tick += HEX_Conversion_To_DEC(RTC_Raw_Data.hour)*3600000;
|
||||
|
||||
uint8_t temp = 0;
|
||||
uint16_t data_len = len;
|
||||
|
||||
if(data_len >= Log_Data_Len_MAX) data_len = Log_Data_Len_MAX; //<2F><EFBFBD><DEB6><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
uint16_t write_len = S_Log_Data + data_len + 1;
|
||||
/*<2A><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>־д<D6BE><D0B4><EFBFBD><EFBFBD>ַ*/
|
||||
Last_add = Get_Log_Current_Address();
|
||||
|
||||
//<2F><>ǰ<EFBFBD><C7B0>ַ<EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD>ҿ<EFBFBD><D2BF>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>
|
||||
if((Last_add + write_len) >= SRAM_LOG_End_Address)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit," SRAM Space is not enough");
|
||||
Last_add = SRAM_LOG_DATA_Address;
|
||||
}
|
||||
|
||||
/*<2A>ڶ<EFBFBD><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ʽ<EFBFBD><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־*/
|
||||
SRAM_Write_Byte(LOG_Data_Hand,Last_add + S_Log_Hand); //<2F><><EFBFBD><EFBFBD>ͷ
|
||||
temp = SRAM_Read_Byte(SRAM_Flash_Serial_Number);
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_SN); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>
|
||||
temp++;
|
||||
SRAM_Write_Byte(temp,SRAM_Flash_Serial_Number); //<2F><><EFBFBD><EFBFBD><EFBFBD>к<EFBFBD>ˢ<EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SRAM_Write_Word(write_len,Last_add + S_Log_Len); //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD> 2Byte
|
||||
SRAM_Write_Byte(0x00,Last_add + S_Log_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>
|
||||
|
||||
temp_date = (HEX_Conversion_To_DEC(RTC_Raw_Data.year) << 10) + (HEX_Conversion_To_DEC(RTC_Raw_Data.month) << 5) + HEX_Conversion_To_DEC(RTC_Raw_Data.day);
|
||||
|
||||
temp = (temp_date >> 8) & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Date_H); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>H - <20>꣺4bit <20>£<EFBFBD>4bit
|
||||
temp = temp_date & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Date_L); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>L - <20>գ<EFBFBD>4bit ʱ<><CAB1>4bit
|
||||
SRAM_Write_Byte(data_type,Last_add + S_Log_Type); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
temp = Log_Hour_Tick & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Time8B); //ʱ<><CAB1><EFBFBD><EFBFBD>
|
||||
temp = (Log_Hour_Tick >> 8) & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Time16B);
|
||||
temp = (Log_Hour_Tick >> 16) & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Time24B);
|
||||
temp = (Log_Hour_Tick >> 24) & 0xFF;
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Time32B);
|
||||
|
||||
SRAM_DMA_Write_Buff(buff,data_len,Last_add + S_Log_Data); //<2F><><EFBFBD><EFBFBD>
|
||||
SRAM_Write_Byte(Log_Data_End,Last_add + S_Log_Data + data_len); //<2F><><EFBFBD><EFBFBD>β
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>*/
|
||||
temp = Log_CheckSum(Last_add,write_len);
|
||||
SRAM_Write_Byte(temp,Last_add + S_Log_Check); //У<><D0A3>ֵ
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD>־д<D6BE><D0B4><EFBFBD><EFBFBD>ַ*/
|
||||
Last_add = Last_add + write_len;
|
||||
Set_Log_Current_Address(Last_add);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SRAM LOG Addr : %08X",Last_add);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Retain_Flash_Register_Data
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Retain_Flash_Register_Data(void)
|
||||
{
|
||||
uint8_t temp = 0,temp1 = 0;
|
||||
uint16_t i = 0;
|
||||
|
||||
memset(Global_Large_Buff,0,Register_OFFSET_LEN);
|
||||
|
||||
Flash_Read(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
|
||||
|
||||
for(i = 0;i<Register_OFFSET_LEN;i++)
|
||||
{
|
||||
temp1 = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS+i);
|
||||
if(temp1 != Global_Large_Buff[i])
|
||||
{
|
||||
Global_Large_Buff[i] = temp1;
|
||||
temp++;
|
||||
}
|
||||
}
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽Flash<73><68>*/
|
||||
if(temp != 0x00)
|
||||
{
|
||||
Flash_Write(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Read_Flash_Register_Data
|
||||
* Description : <20><>ȡ<EFBFBD><C8A1>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Read_Flash_Register_Data(void)
|
||||
{
|
||||
memset(Global_Large_Buff,0,Register_OFFSET_LEN);
|
||||
|
||||
Flash_Read(Global_Large_Buff,Register_OFFSET_LEN,FLASH_Register_Start_ADDRESS);
|
||||
SRAM_DMA_Write_Buff(Global_Large_Buff,Register_OFFSET_LEN,SRAM_Register_Start_ADDRESS);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : LOG_Save_Global_Parameters
|
||||
* Description : <20><><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void LOG_Save_Global_Parameters(void)
|
||||
{
|
||||
static uint32_t polling_tick = 0;
|
||||
uint8_t log_len = 0;
|
||||
uint8_t log_buff[22];
|
||||
memset(log_buff,0,22);
|
||||
|
||||
/*2025-09-08 <20><EFBFBD>
|
||||
ȫ<>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڲ鿴<DAB2><E9BFB4><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>仯
|
||||
ȡ<><C8A1>״̬<D7B4><CCAC>˯<EFBFBD><CBAF>ģʽ״̬<D7B4><CCAC>ȫ<EFBFBD><C8AB>ɫ<EFBFBD>¡<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
*/
|
||||
if(SysTick_1ms - polling_tick >= 2000)
|
||||
{
|
||||
polling_tick = SysTick_1ms;
|
||||
|
||||
if( (DevActionGlobal.DevActionU64Cond.EleState != DevActionGlobal.Last_EleState)
|
||||
|| (DevActionGlobal.DimGlobalValue != DevActionGlobal.Last_DimGlobalValue)
|
||||
|| (DevActionGlobal.CCTValue != DevActionGlobal.Last_CCTValue)
|
||||
|| (DevActionGlobal.SleepMode_State != DevActionGlobal.Last_SleepMode_State)
|
||||
|| (DevActionGlobal.SleepLight_State != DevActionGlobal.Last_SleepLight_State)
|
||||
|| (DevActionGlobal.Person_Detected != DevActionGlobal.Last_Person_Detected)
|
||||
|| (DevActionGlobal.CardState != DevActionGlobal.Last_CardState)
|
||||
|| (DevActionGlobal.Rs485CardType != DevActionGlobal.Last_Rs485CardType)
|
||||
|| (DevActionGlobal.DevActionU64Cond.NeightState != DevActionGlobal.Last_NeightState) )
|
||||
{
|
||||
DevActionGlobal.Last_EleState = DevActionGlobal.DevActionU64Cond.EleState;
|
||||
DevActionGlobal.Last_DimGlobalValue = DevActionGlobal.DimGlobalValue ;
|
||||
DevActionGlobal.Last_CCTValue = DevActionGlobal.CCTValue;
|
||||
DevActionGlobal.Last_SleepMode_State = DevActionGlobal.SleepMode_State;
|
||||
DevActionGlobal.Last_SleepLight_State = DevActionGlobal.SleepLight_State;
|
||||
DevActionGlobal.Last_Person_Detected = DevActionGlobal.Person_Detected;
|
||||
DevActionGlobal.Last_CardState = DevActionGlobal.CardState;
|
||||
DevActionGlobal.Last_Rs485CardType = DevActionGlobal.Rs485CardType;
|
||||
|
||||
log_len = 0x00;
|
||||
log_buff[log_len++] = 0xA8; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
log_buff[log_len++] = 0x00; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
log_buff[log_len++] = 0x00; //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>λ
|
||||
|
||||
log_buff[log_len++] = DevActionGlobal.Last_EleState; //ȡ<><C8A1>״̬
|
||||
log_buff[log_len++] = (DevActionGlobal.Last_DimGlobalValue & 0xFF); //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
log_buff[log_len++] = ((DevActionGlobal.Last_DimGlobalValue >> 8) & 0xFF); //ȫ<><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
log_buff[log_len++] = (DevActionGlobal.Last_CCTValue & 0xFF); //ȫ<><C8AB>ɫ<EFBFBD><C9AB>
|
||||
log_buff[log_len++] = ((DevActionGlobal.Last_CCTValue >> 8) & 0xFF); //ȫ<><C8AB>ɫ<EFBFBD><C9AB>
|
||||
log_buff[log_len++] = DevActionGlobal.Last_SleepMode_State; //˯<><CBAF>ģʽ
|
||||
log_buff[log_len++] = DevActionGlobal.Last_SleepLight_State; //˯<>ߵƹ<DFB5>״̬
|
||||
log_buff[log_len++] = DevActionGlobal.Last_Person_Detected; //<2F><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
log_buff[log_len++] = DevActionGlobal.Last_CardState;
|
||||
log_buff[log_len++] = DevActionGlobal.Last_Rs485CardType;
|
||||
log_buff[log_len++] = DevActionGlobal.Last_NeightState;
|
||||
|
||||
log_buff[1] = log_len; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
log_buff[2] = Data_CheckSum(log_buff,log_len); //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %d",__func__,DevActionGlobal.Last_Person_Detected);
|
||||
|
||||
SRAM_DMA_Write_Buff(log_buff,log_len,SRAM_PowerOn_Restore_StartAddr );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*<2A>ϵ<EFBFBD><CFB5><EFBFBD>ȡ<EFBFBD>ⲿSRAM<41>еIJ<D0B5><C4B2><EFBFBD><EFBFBD><EFBFBD>Ϣ */
|
||||
__attribute__((section(".non_0_wait"))) uint8_t SRAM_PowerOn_Restore_ParaInfo(void)
|
||||
{
|
||||
uint8_t log_len = 0;
|
||||
uint8_t log_buff[22];
|
||||
uint16_t temp_val = 0;
|
||||
memset(log_buff,0,22);
|
||||
|
||||
SRAM_DMA_Read_Buff(log_buff,20,SRAM_PowerOn_Restore_StartAddr );
|
||||
|
||||
if(log_buff[0] == 0xA8) //У<><D0A3><EFBFBD><EFBFBD>־λ
|
||||
{
|
||||
if(log_buff[1] == 0x0E) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
{
|
||||
if(Data_CheckSum(log_buff,0x0E) == 0x00)
|
||||
{
|
||||
log_len = 0x03;
|
||||
DevActionGlobal.Last_EleState = log_buff[log_len++];
|
||||
|
||||
temp_val = log_buff[log_len++];
|
||||
temp_val <<= 8;
|
||||
temp_val |= log_buff[log_len++];
|
||||
DevActionGlobal.Last_DimGlobalValue = temp_val;
|
||||
|
||||
temp_val = log_buff[log_len++];
|
||||
temp_val <<= 8;
|
||||
temp_val |= log_buff[log_len++];
|
||||
DevActionGlobal.Last_CCTValue = temp_val;
|
||||
|
||||
DevActionGlobal.Last_SleepMode_State = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.Last_SleepLight_State = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.Last_Person_Detected = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.Last_CardState = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.Last_Rs485CardType = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.Last_NeightState = log_buff[log_len++];
|
||||
|
||||
DevActionGlobal.DevActionU64Cond.EleState = DevActionGlobal.Last_EleState;
|
||||
DevActionGlobal.DimGlobalValue = DevActionGlobal.Last_DimGlobalValue;
|
||||
DevActionGlobal.CCTValue = DevActionGlobal.Last_CCTValue;
|
||||
DevActionGlobal.SleepMode_State = DevActionGlobal.Last_SleepMode_State;
|
||||
DevActionGlobal.SleepLight_State = DevActionGlobal.Last_SleepLight_State;
|
||||
DevActionGlobal.Person_Detected = DevActionGlobal.Last_Person_Detected;
|
||||
DevActionGlobal.CardState= DevActionGlobal.Last_CardState;
|
||||
DevActionGlobal.Rs485CardType= DevActionGlobal.Last_Rs485CardType;
|
||||
DevActionGlobal.DevActionU64Cond.NeightState = DevActionGlobal.Last_NeightState;
|
||||
|
||||
|
||||
|
||||
DevActionGlobal.sram_save_flag = 0xA8;
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_EleState:%d ",DevActionGlobal.Last_EleState);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_DimGlobalValue:%d ",DevActionGlobal.Last_DimGlobalValue);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_CCTValue:%d ",DevActionGlobal.Last_CCTValue);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_SleepMode_State:%d ",DevActionGlobal.Last_SleepMode_State);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_SleepLight_State:%d ",DevActionGlobal.Last_SleepLight_State);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_Person_Detected:%d ",DevActionGlobal.Last_Person_Detected);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_CardState:%d ",DevActionGlobal.Last_CardState);
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Last_NeightState:%d ",DevActionGlobal.Last_NeightState);
|
||||
|
||||
return 0x00;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0x01;
|
||||
}
|
||||
|
||||
|
||||
|
||||
496
MCU_Driver/spi_flash.c
Normal file
496
MCU_Driver/spi_flash.c
Normal file
@@ -0,0 +1,496 @@
|
||||
/*
|
||||
* spi_flash.c
|
||||
*
|
||||
* Created on: May 20, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "spi_flash.h"
|
||||
#include "debug.h"
|
||||
|
||||
uint8_t Temp_Flash_Buff[4100]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void SPI_FLASH_Init(void)
|
||||
{
|
||||
/* SPI Flash <20><> SPI SRAM <20><><EFBFBD><EFBFBD>SPI<50><49><EFBFBD><EFBFBD>
|
||||
* <20><><EFBFBD><EFBFBD> SPI Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
* */
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SPI Flash ID:0x%04x\r\n",Flash_ReadID());
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_ReadSR
|
||||
* Description : P25Q40H Flash<73><68>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
* Input : None
|
||||
* Return : P25Q40H Flash״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ
|
||||
BIT7 6 5 4 3 2 1 0
|
||||
SPR0 BP4 BP3 BP2 BP1 BP0 WEL WIP
|
||||
SPR:Ĭ<><C4AC>0,״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ,<2C><><EFBFBD><EFBFBD>WPʹ<50><CAB9>
|
||||
BP4,BP3,BP2,BP1,BP0:FLASH<53><48><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
WEL:дʹ<D0B4><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
BUSY:æ<><C3A6><EFBFBD><EFBFBD>λ(1,æ;0,<2C><><EFBFBD><EFBFBD>)
|
||||
Ĭ<><C4AC>:0x00
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Flash_ReadSR(void)
|
||||
{
|
||||
uint8_t byte = 0;
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_ReadStatusReg); //<2F><><EFBFBD>Ͷ<EFBFBD>ȡ״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
byte = SPI0_MasterRecvByte();
|
||||
Flash_CS_H;
|
||||
return byte;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_WriteSR
|
||||
* Description : P25Q40H Flashд״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD>
|
||||
* Input :
|
||||
sr_val:д<><D0B4>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ֵ
|
||||
BIT7 6 5 4 3 2 1 0
|
||||
SPR0 BP4 BP3 BP2 BP1 BP0 WEL WIP
|
||||
|
||||
ֻ<><D6BB>SPR0,BP3,BP2,BP1,BP0(bit 7,5,4,3,2)<29><><EFBFBD><EFBFBD>д!!!
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_WriteSR(uint8_t sr_val)
|
||||
{
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_WriteStatusReg);
|
||||
SPI0_MasterSendByte(sr_val);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Write_Enable
|
||||
* Description : P25Q40H дʹ<D0B4><CAB9> -- <20><>WEL<45><4C>λ
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Write_Enable(void)
|
||||
{
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_WriteEnable);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Write_Disable
|
||||
* Description : P25Q40H д<><D0B4>ֹ -- <20><>WEL<45><4C><EFBFBD><EFBFBD>
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Write_Disable(void)
|
||||
{
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_WriteDisable);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_ReadID
|
||||
* Description : P25Q40H Flash <20><>ȡоƬID
|
||||
* Input : None
|
||||
* Return : <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD>£<EFBFBD>
|
||||
0x8512:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q40H
|
||||
0x8511:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q20H
|
||||
0x8510:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q10H
|
||||
0x8509:<3A><>ʾоƬ<D0BE>ͺ<EFBFBD>ΪP25Q05H
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t Flash_ReadID(void)
|
||||
{
|
||||
uint16_t temp=0;
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_ReadManufactureID);
|
||||
SPI0_MasterRecvByte();
|
||||
SPI0_MasterRecvByte();
|
||||
SPI0_MasterRecvByte();
|
||||
temp |= SPI0_MasterRecvByte()<<8;
|
||||
temp |= SPI0_MasterRecvByte();
|
||||
Flash_CS_H;
|
||||
return temp;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Wait_Busy
|
||||
* Description : <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : None
|
||||
* Return : 1<><31><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>æ״̬
|
||||
0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t Flash_Wait_Busy(void)
|
||||
{
|
||||
uint8_t temp=0;
|
||||
uint16_t i=0;
|
||||
temp = Flash_ReadSR();
|
||||
while((temp&0x01)==0x01)
|
||||
{
|
||||
FEED_DOG(); //ι<><CEB9>
|
||||
Delay_Us(100);
|
||||
temp = Flash_ReadSR();
|
||||
i++;
|
||||
if(i>3000) return 1;
|
||||
};
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_PowerDown
|
||||
* Description : Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_PowerDown(void)
|
||||
{
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_PowerDown);
|
||||
Delay_Us(3);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_PowerDown
|
||||
* Description : Flash <20><><EFBFBD>ѵ<EFBFBD><D1B5><EFBFBD>ģʽ
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Wakeup(void)
|
||||
{
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_ReleasePowerDown);
|
||||
Delay_Us(3);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Erase_Chip
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>оƬ
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Erase_Chip(void)
|
||||
{
|
||||
Flash_Write_Enable();
|
||||
Flash_Wait_Busy();
|
||||
Flash_CS_L;
|
||||
SPI0_MasterSendByte(P24Q40H_ChipErase);
|
||||
Flash_CS_H;
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Erase_Block
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : BLK_ID<49><44><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0~31) 2M
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Erase_Block(uint32_t BLK_ID)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
BLK_ID*=0x10000; //64K
|
||||
flash_buff[0] = P24Q40H_BlockErase;
|
||||
flash_buff[1] = (uint8_t)((BLK_ID >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((BLK_ID >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((BLK_ID) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_Write_Enable();
|
||||
Flash_Wait_Busy();
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
Flash_CS_H;
|
||||
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Erase_Sector
|
||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : DST_Addr<64><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>(0~511) 2M
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Erase_Sector(uint32_t DST_ID)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
DST_ID*=4096;
|
||||
flash_buff[0] = P24Q40H_SectorErase;
|
||||
flash_buff[1] = (uint8_t)((DST_ID >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((DST_ID >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((DST_ID) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_Write_Enable();
|
||||
Flash_Wait_Busy();
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
Flash_CS_H;
|
||||
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Erase_Page
|
||||
* Description : <20><><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
* Input : Page_ID<49><44>ҳ<EFBFBD><D2B3>(0~8191)
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Erase_Page(uint32_t Page_ID)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
Page_ID*=256;
|
||||
flash_buff[0] = P24Q40H_PageErase;
|
||||
flash_buff[1] = (uint8_t)((Page_ID >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((Page_ID >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((Page_ID) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_Write_Enable();
|
||||
Flash_Wait_Busy();
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
Flash_CS_H;
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Erase_Page
|
||||
* Description : <20><><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
* Input : Page_addr:<3A><>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Erase_Pageaddr(uint32_t Page_addr)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
flash_buff[0] = P24Q40H_PageErase;
|
||||
flash_buff[1] = (uint8_t)((Page_addr >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((Page_addr >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((Page_addr) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_Write_Enable();
|
||||
Flash_Wait_Busy();
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
Flash_CS_H;
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Read
|
||||
* Description : P25Q40H Flash ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼ<EFBFBD><CABC>ȡָ<C8A1><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
|
||||
NumByteToRead<61><64>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
|
||||
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Read(uint8_t* pBuffer,uint16_t NumByteToRead,uint32_t ReadAddr)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
flash_buff[0] = P24Q40H_ReadData;
|
||||
flash_buff[1] = (uint8_t)((ReadAddr >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((ReadAddr >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((ReadAddr) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
SPI0_DMARecv(pBuffer,NumByteToRead);
|
||||
Flash_CS_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Write_Page
|
||||
* Description : P25Q40H Flash ָ<><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼдָ<D0B4><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
|
||||
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>256),<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD>ó<EFBFBD><C3B3><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ʣ<EFBFBD><CAA3><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>!!!
|
||||
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Write_Page(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr)
|
||||
{
|
||||
uint8_t flash_buff[5];
|
||||
|
||||
flash_buff[0] = P24Q40H_PageProgram;
|
||||
flash_buff[1] = (uint8_t)((writeAddr >> 16) & 0xFF);
|
||||
flash_buff[2] = (uint8_t)((writeAddr >> 8) & 0xFF);
|
||||
flash_buff[3] = (uint8_t)((writeAddr) & 0xFF);
|
||||
flash_buff[4] = 0x00;
|
||||
|
||||
Flash_Write_Enable();
|
||||
Flash_CS_L;
|
||||
SPI0_DMATrans(flash_buff,0x04);
|
||||
SPI0_DMATrans(pBuffer,NumByteToWrite);
|
||||
Flash_CS_H;
|
||||
Flash_Wait_Busy();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Write_NoCheck
|
||||
* Description : <20><EFBFBD><DEBC><EFBFBD>дP25Q40H FLASH
|
||||
ע<EFBFBD>⣺<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD>ڵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD>Ϊ0XFF,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>0XFF<46><46>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ʧ<EFBFBD><CAA7>!
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD>
|
||||
<20><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼд<CABC><D0B4>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫȷ<D2AA><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Խ<EFBFBD><D4BD>!
|
||||
* Input :
|
||||
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
|
||||
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
|
||||
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Write_NoCheck(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t writeAddr)
|
||||
{
|
||||
uint16_t pageremain;
|
||||
pageremain=256-writeAddr%256; //<2F><>ҳʣ<D2B3><CAA3><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>
|
||||
if(NumByteToWrite<=pageremain) pageremain=NumByteToWrite;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>256<35><36><EFBFBD>ֽ<EFBFBD>
|
||||
while(1)
|
||||
{
|
||||
FEED_DOG(); //ι<><CEB9>
|
||||
|
||||
Flash_Write_Page(pBuffer,pageremain,writeAddr);
|
||||
if(pageremain == NumByteToWrite) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
else {
|
||||
pBuffer+=pageremain;
|
||||
writeAddr+=pageremain;
|
||||
|
||||
NumByteToWrite-=pageremain;
|
||||
if(NumByteToWrite>256) pageremain=256;
|
||||
else pageremain=NumByteToWrite;
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Flash_Write
|
||||
* Description : <20><EFBFBD><DEBC><EFBFBD>дP25Q40H FLASH
|
||||
ע<EFBFBD>⣺<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD>Χ<EFBFBD>ڵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><EFBFBD>Ϊ0XFF,<2C><><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD>0XFF<46><46>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ʧ<EFBFBD><CAA7>!
|
||||
<20><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD>
|
||||
<20><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʼд<CABC><D0B4>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>Ҫȷ<D2AA><C8B7><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>Խ<EFBFBD><D4BD>!
|
||||
* Input :
|
||||
pBuffer<65><72><EFBFBD><EFBFBD><EFBFBD>ݴ洢<DDB4><E6B4A2>
|
||||
NumByteToRead<61><64>Ҫд<D2AA><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD>(<28><><EFBFBD><EFBFBD>65535)
|
||||
ReadAddr<64><72><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʼ<EFBFBD><CABC>ַ(24bit)
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void Flash_Write(uint8_t* pBuffer,uint16_t NumByteToWrite,uint32_t WriteAddr)
|
||||
{
|
||||
uint32_t secpos;
|
||||
uint16_t secoff,secremain,i;
|
||||
uint8_t* Write_Buff;
|
||||
|
||||
if(NumByteToWrite <= 256*2)
|
||||
{
|
||||
|
||||
Write_Buff = Temp_Flash_Buff;
|
||||
|
||||
secpos = WriteAddr/256; //ҳ<><D2B3><EFBFBD><EFBFBD>ַ
|
||||
secoff = WriteAddr%256; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ƫ<EFBFBD><C6AB>
|
||||
secremain = 256 - secoff; //<2F><><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD>
|
||||
|
||||
if(NumByteToWrite<=secremain) secremain = NumByteToWrite; //<2F><>ǰҳ<C7B0><D2B3>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||
|
||||
while(1)
|
||||
{
|
||||
FEED_DOG(); //ι<><CEB9>
|
||||
|
||||
Flash_Read(Write_Buff,256,secpos*256); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
for(i=0;i<secremain;i++) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
if(Write_Buff[secoff+i]!=0xFF) break;
|
||||
}
|
||||
|
||||
if(i<secremain) //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
{
|
||||
Flash_Erase_Page(secpos); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
for(i=0;i<secremain;i++) //<2F><><EFBFBD><EFBFBD>
|
||||
{
|
||||
Write_Buff[i+secoff]=pBuffer[i];
|
||||
}
|
||||
Flash_Write_NoCheck(Write_Buff,256,secpos*256); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
}else {
|
||||
if(secremain == 256)
|
||||
{
|
||||
Flash_Write_NoCheck(pBuffer,256,secpos*256); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
|
||||
}else if(secremain < 256){
|
||||
Flash_Write_NoCheck(pBuffer,secremain,WriteAddr); //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ӣ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>
|
||||
}
|
||||
}
|
||||
if(NumByteToWrite == secremain) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
else //д<><D0B4>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
|
||||
{
|
||||
secpos++; //ҳ<><D2B3><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>1
|
||||
secoff = 0; //ҳ<><D2B3>ƫ<EFBFBD><C6AB>λ<EFBFBD>ù<EFBFBD><C3B9><EFBFBD>
|
||||
pBuffer += secremain; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ƫ<EFBFBD><C6AB>
|
||||
WriteAddr += secremain; //<2F><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>
|
||||
NumByteToWrite -= secremain; //ʣ<><CAA3>д<EFBFBD><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݼ<EFBFBD>
|
||||
if(NumByteToWrite > 256) secremain = 256; //<2F><>һ<EFBFBD><D2BB>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
else secremain = NumByteToWrite; //<2F><>һ<EFBFBD><D2BB>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
Write_Buff = Temp_Flash_Buff;
|
||||
|
||||
secpos = WriteAddr/4096; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||
secoff = WriteAddr%4096; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ƫ<EFBFBD><C6AB>
|
||||
secremain = 4096 - secoff; //<2F><><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD>
|
||||
|
||||
if(NumByteToWrite<=secremain) secremain = NumByteToWrite; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3><EFBFBD>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||
|
||||
while(1)
|
||||
{
|
||||
FEED_DOG(); //ι<><CEB9>
|
||||
|
||||
Flash_Read(Write_Buff,2048,secpos*4096); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_Read(Write_Buff+2048,2048,secpos*4096+2048); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
for(i=0;i<secremain;i++) //У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
if(Write_Buff[secoff+i]!=0xFF)break;
|
||||
}
|
||||
|
||||
if(i<secremain) //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
Flash_Erase_Sector(secpos); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
for(i=0;i<secremain;i++) //<2F><><EFBFBD><EFBFBD>
|
||||
{
|
||||
Write_Buff[i+secoff]=pBuffer[i];
|
||||
}
|
||||
Flash_Write_NoCheck(Write_Buff,2048,secpos*4096); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_Write_NoCheck(Write_Buff+2048,2048,secpos*4096+2048); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}else {
|
||||
if(secremain == 4096)
|
||||
{
|
||||
Flash_Write_NoCheck(pBuffer,2048,secpos*4096); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
Flash_Write_NoCheck(pBuffer+2048,2048,secpos*4096+2048); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}else if(secremain < 4096){
|
||||
Flash_Write_NoCheck(pBuffer,secremain,WriteAddr); //<2F><><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>ӣ<EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
}
|
||||
if(NumByteToWrite == secremain) break; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
else //д<><D0B4>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
|
||||
{
|
||||
secpos++; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>1
|
||||
secoff = 0; //<2F><><EFBFBD><EFBFBD>ƫ<EFBFBD><C6AB>λ<EFBFBD>ù<EFBFBD><C3B9><EFBFBD>
|
||||
pBuffer += secremain; //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>ƫ<EFBFBD><C6AB>
|
||||
WriteAddr += secremain; //<2F><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>
|
||||
NumByteToWrite -= secremain; //ʣ<><CAA3>д<EFBFBD><D0B4><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD>ݼ<EFBFBD>
|
||||
if(NumByteToWrite > 4096) secremain = 4096; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>
|
||||
else secremain = NumByteToWrite; //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
258
MCU_Driver/spi_sram.c
Normal file
258
MCU_Driver/spi_sram.c
Normal file
@@ -0,0 +1,258 @@
|
||||
/*
|
||||
* spi.c
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "spi_sram.h"
|
||||
#include "debug.h"
|
||||
#include <string.h>
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void SPI_SRAM_Init(void)
|
||||
{
|
||||
GPIOA_ModeCfg(GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_11, GPIO_ModeOut_PP);
|
||||
GPIOA_ModeCfg(GPIO_Pin_5, GPIO_ModeIN_Floating);
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap2_SPI0,ENABLE);
|
||||
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD>Եó<D4B5><C3B3><EFBFBD><EFBFBD><EFBFBD> SPI<50><49><EFBFBD>߲<EFBFBD><DFB2><EFBFBD><EFBFBD><EFBFBD>30MHZ <20>ֲ<EFBFBD><D6B2><EFBFBD>д<EFBFBD><D0B4>SPI<50><49><EFBFBD><EFBFBD>ͨѶΪ50MHZ 24MHZ*/
|
||||
SPI0_MasterInit(24000000);
|
||||
SPI0_DataMode(Mode0_HighBitINFront);
|
||||
|
||||
SRAM_CE_H;
|
||||
|
||||
/*<2A><>ȡSRAMоƬID*/
|
||||
SRAM_Read_ID_Opeartion();
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Write_Byte
|
||||
* Description : SRAMд<4D>ֽ<EFBFBD>
|
||||
* Input :
|
||||
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_Write_Byte(uint8_t wdate,uint32_t add)
|
||||
{
|
||||
uint8_t Hadd16=0x00,Hadd8=0x00,Ladd=0x00;
|
||||
Ladd=add;
|
||||
Hadd8=add>>8;
|
||||
Hadd16=add>>16;
|
||||
|
||||
if(add >= SRAM_ADDRESS_MAX) return ;
|
||||
|
||||
SRAM_CE_L;
|
||||
SPI0_MasterSendByte(SRAM_CMD_Write);
|
||||
SPI0_MasterSendByte(Hadd16);
|
||||
SPI0_MasterSendByte(Hadd8);
|
||||
SPI0_MasterSendByte(Ladd);
|
||||
SPI0_MasterSendByte(wdate);
|
||||
|
||||
SRAM_CE_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Read_Byte
|
||||
* Description : SRAM<41><4D><EFBFBD>ֽ<EFBFBD>
|
||||
* Input :
|
||||
add <20><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֽڵĵ<DAB5>ַ
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t SRAM_Read_Byte(uint32_t add)
|
||||
{
|
||||
uint8_t Hadd8=0x00,Hadd16=0x00,Ladd=0x00,rdate=0x00;
|
||||
Ladd=add;
|
||||
Hadd8=add>>8;
|
||||
Hadd16=add>>16;
|
||||
|
||||
if(add >= SRAM_ADDRESS_MAX) return 0x00;
|
||||
|
||||
SRAM_CE_L;
|
||||
SPI0_MasterSendByte(SRAM_CMD_Read);
|
||||
SPI0_MasterSendByte(Hadd16);
|
||||
SPI0_MasterSendByte(Hadd8);
|
||||
SPI0_MasterSendByte(Ladd);
|
||||
rdate = SPI0_MasterRecvByte();
|
||||
SRAM_CE_H;
|
||||
|
||||
return rdate;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Write_Word
|
||||
* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
|
||||
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD>ֽ<EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_Write_Word(uint16_t wdate,uint32_t add)
|
||||
{
|
||||
SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
|
||||
SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Read_Word
|
||||
* Description : SRAMдuint16_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
add <20><><EFBFBD><EFBFBD>ȡ<EFBFBD>ֵĵ<D6B5>ַ
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint16_t SRAM_Read_Word(uint32_t add)
|
||||
{
|
||||
uint16_t rev = 0;
|
||||
rev = SRAM_Read_Byte(add + 1);
|
||||
rev <<= 8;
|
||||
rev |= SRAM_Read_Byte(add);
|
||||
return rev;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Write_DW
|
||||
* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
wdate : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD>˫<EFBFBD><CBAB>
|
||||
add <20><>˫<EFBFBD><CBAB>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_Write_DW(uint32_t wdate,uint32_t add)
|
||||
{
|
||||
SRAM_Write_Byte((uint8_t)(wdate & 0xFF),add);
|
||||
SRAM_Write_Byte((uint8_t)((wdate >> 8) & 0xFF),add + 1);
|
||||
SRAM_Write_Byte((uint8_t)((wdate >> 16) & 0xFF),add + 2);
|
||||
SRAM_Write_Byte((uint8_t)((wdate >> 24) & 0xFF),add + 3);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Read_DW
|
||||
* Description : SRAMдuint32_t<5F><74><EFBFBD><EFBFBD> -- <20><><EFBFBD><EFBFBD>С<EFBFBD><D0A1>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
add <20><><EFBFBD><EFBFBD>ȡ˫<C8A1>ֵĵ<D6B5>ַ
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ˫<C8A1><CBAB>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint32_t SRAM_Read_DW(uint32_t add)
|
||||
{
|
||||
uint32_t rev = 0;
|
||||
|
||||
rev = SRAM_Read_Byte(add + 3);
|
||||
rev <<= 8;
|
||||
rev |= SRAM_Read_Byte(add + 2);
|
||||
rev <<= 8;
|
||||
rev |= SRAM_Read_Byte(add + 1);
|
||||
rev <<= 8;
|
||||
rev |= SRAM_Read_Byte(add);
|
||||
|
||||
return rev;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Read_ID_Opeartion
|
||||
* Description : SRAM <20><>ȡоƬID
|
||||
* Input : NULL
|
||||
* Return : <20><><EFBFBD>ض<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) uint8_t SRAM_Read_ID_Opeartion(void)
|
||||
{
|
||||
uint8_t spi_addr[5];
|
||||
uint8_t read_id[9];
|
||||
|
||||
memset(spi_addr,0,0x05);
|
||||
memset(read_id,0,0x04);
|
||||
|
||||
spi_addr[0] = SRAM_CMD_Read_ID;
|
||||
spi_addr[1] = 0x00 ;
|
||||
spi_addr[2] = 0x00 ;
|
||||
spi_addr[3] = 0x00 ;
|
||||
|
||||
SRAM_CE_L;
|
||||
SPI0_DMATrans(spi_addr,0x04);
|
||||
SPI0_DMARecv(read_id,0x08);
|
||||
SRAM_CE_H;
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM MFID:%02X",read_id[0]);
|
||||
if(read_id[1] == 0x5D)
|
||||
{
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM KGD:%02X - Known Good Die PASS",read_id[1]);
|
||||
}else {
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit, "SRAM KGD:%02X - Known Good Die FAIL",read_id[1]);
|
||||
}
|
||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit, "SRAM EID:",&read_id[2],0x06);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_Reset_Operation
|
||||
* Description : SRAM <20><>λ - ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD>λ
|
||||
* Input : NULL
|
||||
* Return : NULL
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_Reset_Operation(void)
|
||||
{
|
||||
SRAM_CE_L;
|
||||
SPI0_MasterSendByte(SRAM_CMD_Reset_Enable);
|
||||
SRAM_CE_H;
|
||||
//Delay_Ms(2);
|
||||
SRAM_CE_L;
|
||||
SPI0_MasterSendByte(SRAM_CMD_Reset);
|
||||
SRAM_CE_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_DMA_Write_Buff
|
||||
* Description : SRAM DMA<4D><41>ʽд<CABD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
wbuff : <20><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len : д<><D0B4><EFBFBD><EFBFBD><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
|
||||
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_DMA_Write_Buff(uint8_t* wbuff,uint16_t len,uint32_t add)
|
||||
{
|
||||
uint8_t spi_addr[5];
|
||||
|
||||
if(add + len >= SRAM_ADDRESS_MAX) return ;
|
||||
|
||||
memset(spi_addr,0,0x05);
|
||||
|
||||
spi_addr[0] = SRAM_CMD_Write;
|
||||
spi_addr[1] = (add >> 16) & 0xFF ;
|
||||
spi_addr[2] = (add >> 8) & 0xFF ;
|
||||
spi_addr[3] = (add) & 0xFF ;
|
||||
|
||||
SRAM_CE_L;
|
||||
SPI0_DMATrans(spi_addr,0x04);
|
||||
SPI0_DMATrans(wbuff,len);
|
||||
SRAM_CE_H;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : SRAM_DMA_Read_Buff
|
||||
* Description : SRAM DMA<4D><41>ʽ<EFBFBD><CABD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
rbuff : <20><>Ҫ<EFBFBD><D2AA>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len : <20><>ȡ<EFBFBD><C8A1><EFBFBD>ݵij<DDB5><C4B3><EFBFBD> -- <20><><EFBFBD><EFBFBD>4095<39>ֽڳ<D6BD><DAB3><EFBFBD>
|
||||
add <20><><EFBFBD>ֽ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ĵ<EFBFBD>ַ
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void SRAM_DMA_Read_Buff(uint8_t* rbuff,uint16_t len,uint32_t add)
|
||||
{
|
||||
uint8_t spi_addr[5];
|
||||
|
||||
if(add + len >= SRAM_ADDRESS_MAX) return ;
|
||||
|
||||
memset(spi_addr,0,0x05);
|
||||
|
||||
spi_addr[0] = SRAM_CMD_Read;
|
||||
spi_addr[1] = (add >> 16) & 0xFF ;
|
||||
spi_addr[2] = (add >> 8) & 0xFF ;
|
||||
spi_addr[3] = (add) & 0xFF ;
|
||||
|
||||
SRAM_CE_L;
|
||||
SPI0_DMATrans(spi_addr,0x04);
|
||||
SPI0_DMARecv(rbuff,len);
|
||||
SRAM_CE_H;
|
||||
}
|
||||
|
||||
51
MCU_Driver/timer.c
Normal file
51
MCU_Driver/timer.c
Normal file
@@ -0,0 +1,51 @@
|
||||
/*
|
||||
* timer.c
|
||||
*
|
||||
* Created on: May 16, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "timer.h"
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
|
||||
|
||||
void TIMER0_Init(void)
|
||||
{
|
||||
TMR0_DeInit();
|
||||
TMR0_TimerInit(SystemCoreClock / 10000);
|
||||
TMR0_ITCfg(RB_TMR_IF_CYC_END, ENABLE);
|
||||
NVIC_EnableIRQ(TIM0_IRQn);
|
||||
TMR0_Enable();
|
||||
}
|
||||
|
||||
volatile uint32_t Time0_100us = 0;
|
||||
volatile uint32_t Time0_1ms = 0;
|
||||
|
||||
void __attribute__((interrupt("WCH-Interrupt-fast"))) TIM0_IRQHandler()
|
||||
{
|
||||
static uint8_t NUM_1 = 0;
|
||||
|
||||
TMR0_ClearITFlag(RB_TMR_IF_CYC_END);
|
||||
|
||||
Time0_100us++;
|
||||
NUM_1++;
|
||||
|
||||
if(NUM_1 >= 10){
|
||||
NUM_1 = 0;
|
||||
Time0_1ms++;
|
||||
}
|
||||
}
|
||||
|
||||
void Timer0_Task(void)
|
||||
{
|
||||
static uint32_t timer0_tick = 0;
|
||||
|
||||
if(Time0_1ms - timer0_tick >= 1000 ){
|
||||
timer0_tick = Time0_1ms;
|
||||
|
||||
printf("Run:%d ..",timer0_tick);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
878
MCU_Driver/uart.c
Normal file
878
MCU_Driver/uart.c
Normal file
@@ -0,0 +1,878 @@
|
||||
/*
|
||||
* uart.c
|
||||
*
|
||||
* Created on: May 14, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#include "uart.h"
|
||||
#include "debug.h"
|
||||
#include "watchdog.h"
|
||||
#include "blv_rs485_protocol.h"
|
||||
#include "sram_mem_addr.h"
|
||||
#include "spi_sram.h"
|
||||
#include <string.h>
|
||||
|
||||
UART_t g_uart[UART_MAX];
|
||||
|
||||
void UART0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void UART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void UART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void UART3_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UARTx_Init
|
||||
* @brief UART<52><54>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><E2B4AE>2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PB22,PB23 - Boot,RST<53><54><EFBFBD><EFBFBD>
|
||||
* @param uart_id - <20><><EFBFBD><EFBFBD>ID
|
||||
* @param buad - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* @param prt_cf - <20><><EFBFBD>ڽ<EFBFBD><DABD>ջص<D5BB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32_t buad) {
|
||||
|
||||
switch (uart_id) {
|
||||
case UART_0:
|
||||
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
||||
UART0_BaudRateCfg(buad);
|
||||
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART0_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART0_IER = RB_IER_TXD_EN;
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
|
||||
|
||||
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
|
||||
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
||||
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
|
||||
|
||||
break;
|
||||
case UART_1:
|
||||
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
||||
UART1_BaudRateCfg(buad);
|
||||
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART1_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART1_IER = RB_IER_TXD_EN;
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
|
||||
|
||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART1_IRQn);
|
||||
|
||||
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
||||
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
|
||||
|
||||
break;
|
||||
case UART_2:
|
||||
UART2_BaudRateCfg(buad);
|
||||
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART2_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART2_IER = RB_IER_TXD_EN;
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
|
||||
|
||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART2_IRQn);
|
||||
|
||||
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
||||
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
|
||||
|
||||
break;
|
||||
case UART_3:
|
||||
UART3_BaudRateCfg(buad);
|
||||
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART3_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART3_IER = RB_IER_TXD_EN;
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
|
||||
|
||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART3_IRQn);
|
||||
|
||||
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
||||
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
|
||||
|
||||
break;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((section(".non_0_wait"))) void Set_Uart_recvTimeout(UART_t *set_uart,uint32_t baud)
|
||||
{
|
||||
if(baud == 115200)
|
||||
{
|
||||
set_uart->RecvTimeout = Recv_115200_TimeOut;
|
||||
}else if(baud == 9600)
|
||||
{
|
||||
set_uart->RecvTimeout = Recv_9600_TimeOut;
|
||||
}else if(baud == 2400)
|
||||
{
|
||||
set_uart->RecvTimeout = Recv_2400_TimeOut;
|
||||
}else
|
||||
{
|
||||
set_uart->RecvTimeout = 20;
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART1_IRQHandler
|
||||
*
|
||||
* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void UART0_IRQHandler(void)
|
||||
{
|
||||
switch( UART0_GetITFlag() )
|
||||
{
|
||||
case UART_II_THR_EMPTY:
|
||||
|
||||
break;
|
||||
case UART_II_RECV_RDY:
|
||||
case UART_II_RECV_TOUT:
|
||||
if( (g_uart[UART_0].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_0].RecvLen = 0x00;
|
||||
g_uart[UART_0].RecvBuffer[g_uart[UART_0].RecvLen] = UART0_RecvByte();
|
||||
g_uart[UART_0].RecvLen += 1;
|
||||
g_uart[UART_0].Receiving = 0x01;
|
||||
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART1_IRQHandler
|
||||
*
|
||||
* @brief USART1<54>жϺ<D0B6><CFBA><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void UART1_IRQHandler(void)
|
||||
{
|
||||
switch( UART1_GetITFlag() )
|
||||
{
|
||||
case UART_II_THR_EMPTY:
|
||||
|
||||
break;
|
||||
case UART_II_RECV_RDY:
|
||||
case UART_II_RECV_TOUT:
|
||||
if( (g_uart[UART_1].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_1].RecvLen = 0x00;
|
||||
g_uart[UART_1].RecvBuffer[g_uart[UART_1].RecvLen] = UART1_RecvByte();
|
||||
g_uart[UART_1].RecvLen += 1;
|
||||
g_uart[UART_1].Receiving = 0x01;
|
||||
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART2_IRQHandler
|
||||
*
|
||||
* @brief USART2<54>жϺ<D0B6><CFBA><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void UART2_IRQHandler(void)
|
||||
{
|
||||
switch( UART2_GetITFlag() )
|
||||
{
|
||||
case UART_II_THR_EMPTY:
|
||||
|
||||
break;
|
||||
case UART_II_RECV_RDY:
|
||||
case UART_II_RECV_TOUT:
|
||||
if( (g_uart[UART_2].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_2].RecvLen = 0x00;
|
||||
g_uart[UART_2].RecvBuffer[g_uart[UART_2].RecvLen] = UART2_RecvByte();
|
||||
g_uart[UART_2].RecvLen += 1;
|
||||
g_uart[UART_2].Receiving = 0x01;
|
||||
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART3_IRQHandler
|
||||
*
|
||||
* @brief USART3<54>жϺ<D0B6><CFBA><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void UART3_IRQHandler(void)
|
||||
{
|
||||
switch( UART3_GetITFlag() )
|
||||
{
|
||||
case UART_II_THR_EMPTY:
|
||||
|
||||
break;
|
||||
case UART_II_RECV_RDY:
|
||||
case UART_II_RECV_TOUT:
|
||||
if( (g_uart[UART_3].RecvLen + 1) >= USART_BUFFER_SIZE ) g_uart[UART_3].RecvLen = 0x00;
|
||||
g_uart[UART_3].RecvBuffer[g_uart[UART_3].RecvLen] = UART3_RecvByte();
|
||||
g_uart[UART_3].RecvLen += 1;
|
||||
g_uart[UART_3].Receiving = 0x01;
|
||||
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART1_RECEIVE
|
||||
*
|
||||
* @brief USART1
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
|
||||
{
|
||||
if(g_uart[UART_0].Receiving == 0x01)
|
||||
{
|
||||
if(SysTick_1ms - g_uart[UART_0].RecvIdleTiming >= g_uart[UART_0].RecvTimeout)
|
||||
{
|
||||
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
|
||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
|
||||
|
||||
|
||||
|
||||
g_uart[UART_0].RecvLen = 0;
|
||||
g_uart[UART_0].Receiving = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART1_RECEIVE
|
||||
*
|
||||
* @brief USART1
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
|
||||
{
|
||||
if(g_uart[UART_1].Receiving == 0x01)
|
||||
{
|
||||
if(SysTick_1ms - g_uart[UART_1].RecvIdleTiming >= g_uart[UART_1].RecvTimeout)
|
||||
{
|
||||
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
|
||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
|
||||
|
||||
|
||||
|
||||
g_uart[UART_1].RecvLen = 0;
|
||||
g_uart[UART_1].Receiving = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART2_RECEIVE
|
||||
*
|
||||
* @brief USART2
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
|
||||
{
|
||||
if(g_uart[UART_2].Receiving == 1)
|
||||
{
|
||||
if(SysTick_1ms - g_uart[UART_2].RecvIdleTiming > g_uart[UART_2].RecvTimeout)
|
||||
{
|
||||
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
|
||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
|
||||
|
||||
|
||||
|
||||
g_uart[UART_2].RecvLen = 0;
|
||||
g_uart[UART_2].Receiving = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
* @fn USART3_RECEIVE
|
||||
*
|
||||
* @brief UART3
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
__attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
|
||||
{
|
||||
if(g_uart[UART_3].Receiving == 1)
|
||||
{
|
||||
if(SysTick_1ms - g_uart[UART_3].RecvIdleTiming > g_uart[UART_3].RecvTimeout)
|
||||
{
|
||||
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
|
||||
|
||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
|
||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
|
||||
|
||||
|
||||
|
||||
g_uart[UART_3].RecvLen = 0;
|
||||
g_uart[UART_3].Receiving = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART0_ChangeBaud
|
||||
*
|
||||
* @brief UART0<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART0_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART0_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_NoRemap_UART0,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
|
||||
|
||||
UART0_BaudRateCfg(baudrate);
|
||||
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART0_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART0_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART0_CLR_RXFIFO();
|
||||
UART0_CLR_TXFIFO();
|
||||
|
||||
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART0_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_0],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART1_ChangeBaud
|
||||
*
|
||||
* @brief UART1<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART1_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART1_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_NoRemap_UART1,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_11, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
|
||||
|
||||
UART1_BaudRateCfg(baudrate);
|
||||
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART1_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART1_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART1_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_1],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART2_ChangeBaud
|
||||
*
|
||||
* @brief UART2<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART2_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART2_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
|
||||
|
||||
UART2_BaudRateCfg(baudrate);
|
||||
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART2_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART2_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART2_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_2],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn UART3_ChangeBaud
|
||||
*
|
||||
* @brief UART3<54>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
uint8_t UART3_ChangeBaud(uint32_t baudrate)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
while(1)
|
||||
{
|
||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||
{
|
||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||
__disable_irq();
|
||||
|
||||
UART3_Reset();
|
||||
|
||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
|
||||
GPIOB_ModeCfg(GPIO_Pin_19, GPIO_ModeOut_PP);
|
||||
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
|
||||
|
||||
UART3_BaudRateCfg(baudrate);
|
||||
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||
// FIFO open, trigger point 14 bytes
|
||||
R8_UART3_LCR = RB_LCR_WORD_SZ;
|
||||
R8_UART3_IER = RB_IER_TXD_EN;
|
||||
|
||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||
NVIC_EnableIRQ(UART3_IRQn);
|
||||
|
||||
Set_Uart_recvTimeout(&g_uart[UART_3],baudrate);
|
||||
|
||||
__enable_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart0_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>0<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart0_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART0_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart1_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>1<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart1_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart2_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>2<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart2_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart3_Flush
|
||||
* Description : <20><><EFBFBD><EFBFBD>3<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : over_time -- <20>ȴ<EFBFBD><C8B4><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart3_Flush(uint16_t over_time)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > over_time) break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Uart_SendString
|
||||
* Description : <20><><EFBFBD>ڷ<EFBFBD><DAB7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input :
|
||||
* uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
* buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_0:
|
||||
UART0_SendString(buff,len);
|
||||
break;
|
||||
case UART_1:
|
||||
UART1_SendString(buff,len);
|
||||
break;
|
||||
case UART_2:
|
||||
UART2_SendString(buff,len);
|
||||
break;
|
||||
case UART_3:
|
||||
UART3_SendString(buff,len);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_1
|
||||
* Description : 485_1 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_1(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN1_H;
|
||||
|
||||
UART1_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN1_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_2
|
||||
* Description : 485_2 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_2(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN2_H;
|
||||
|
||||
UART2_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART2_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN2_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString_3
|
||||
* Description : 485_3 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||
* Input :
|
||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString_3(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
uint16_t delay_num = 0;
|
||||
|
||||
MCU485_EN3_H;
|
||||
|
||||
UART3_SendString(buf,len);
|
||||
|
||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||
while(1)
|
||||
{
|
||||
WDT_Feed();
|
||||
if( (R8_UART3_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||
Delay_Us(100);
|
||||
delay_num++;
|
||||
if(delay_num > 500) break;
|
||||
}
|
||||
|
||||
MCU485_EN3_L;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString
|
||||
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_1:
|
||||
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_1(buff,len);
|
||||
break;
|
||||
case UART_2:
|
||||
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_2(buff,len);
|
||||
break;
|
||||
case UART_3:
|
||||
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||
{
|
||||
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);
|
||||
}
|
||||
MCU485_SendString_3(buff,len);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : MCU485_SendString
|
||||
* Description : 485<38><35><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
data_addr - SRAM<41>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void MCU485_SendSRAMData(uint8_t uart_id,uint32_t data_addr,uint16_t len)
|
||||
{
|
||||
uint16_t buff_len = len;
|
||||
uint8_t send_buff[buff_len];
|
||||
|
||||
memset(send_buff,0,sizeof(send_buff));
|
||||
|
||||
SRAM_DMA_Read_Buff(send_buff,buff_len,data_addr); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
MCU485_SendString(uart_id,send_buff,buff_len);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : Write_Uart_SendBuff
|
||||
* Description : дuart<72><74><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Input : uart_id - <20><><EFBFBD>͵Ĵ<CDB5><C4B4>ں<EFBFBD>
|
||||
uart_baud - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
buff - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
len -- <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||
*******************************************************************************/
|
||||
void Write_Uart_SendBuff(uint8_t uart_id,uint8_t uart_outime,uint8_t* buff,uint16_t len)
|
||||
{
|
||||
switch(uart_id)
|
||||
{
|
||||
case Polling_Port: //<2F><>ѯ
|
||||
uart_id = UART_0;
|
||||
break;
|
||||
case Active_Port: //<2F><><EFBFBD><EFBFBD>
|
||||
uart_id = UART_2;
|
||||
break;
|
||||
case Bus_port: //bus<75><73><EFBFBD><EFBFBD>
|
||||
uart_id = UART_3;
|
||||
break;
|
||||
}
|
||||
switch(uart_id)
|
||||
{
|
||||
case UART_0:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_0].TX_Buffer_WriteAddr);
|
||||
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_0].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_0].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_0].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_0].TX_Buffer_WriteAddr > SRAM_UART0_SendBuffer_End_Addr) g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_1:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_1].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_1].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_1].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_1].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_1].TX_Buffer_WriteAddr > SRAM_UART1_SendBuffer_End_Addr) g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_2:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_2].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_2].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_2].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_2].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_2].TX_Buffer_WriteAddr > SRAM_UART2_SendBuffer_End_Addr) g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
|
||||
break;
|
||||
case UART_3:
|
||||
/*<2A><><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>*/
|
||||
SRAM_Write_Word(len,g_uart[UART_3].TX_Buffer_WriteAddr);
|
||||
/*<2A><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD> - <20>ȴ<EFBFBD><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> , <20><>λ<EFBFBD><CEBB>S*/
|
||||
SRAM_Write_Byte(uart_outime,g_uart[UART_3].TX_Buffer_WriteAddr+2);
|
||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||
SRAM_DMA_Write_Buff(buff,len,g_uart[UART_3].TX_Buffer_WriteAddr+3);
|
||||
|
||||
g_uart[UART_3].TX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
|
||||
if(g_uart[UART_3].TX_Buffer_WriteAddr > SRAM_UART3_SendBuffer_End_Addr) g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
42
MCU_Driver/watchdog.c
Normal file
42
MCU_Driver/watchdog.c
Normal file
@@ -0,0 +1,42 @@
|
||||
/*
|
||||
* watchdog.c
|
||||
*
|
||||
* Created on: Nov 12, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
#include "watchdog.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDT_Init
|
||||
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void WDT_Init(void)
|
||||
{
|
||||
// WWDG_ResetCfg(ENABLE);
|
||||
// WWDG_SetCounter(WDT_NUM);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDT_Feed
|
||||
* Description : <20><><EFBFBD>Ź<EFBFBD>ι<EFBFBD><CEB9>
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void WDT_Feed(void)
|
||||
{
|
||||
//WWDG_ClearFlag();
|
||||
// WWDG_SetCounter(WDT_NUM);
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : WDT_Reinit
|
||||
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
|
||||
* Input : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
__attribute__((section(".non_0_wait"))) void WDT_Reinit(void)
|
||||
{
|
||||
|
||||
}
|
||||
698
NetLib/eth_driver.c
Normal file
698
NetLib/eth_driver.c
Normal file
@@ -0,0 +1,698 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : eth_driver.c
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : eth program body.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
|
||||
#include <string.h>
|
||||
#include "eth_driver.h"
|
||||
#include "net_config.h"
|
||||
|
||||
__attribute__((__aligned__(4))) ETH_DMADESCTypeDef DMARxDscrTab[ETH_RXBUFNB]; /* MAC receive descriptor, 4-byte aligned*/
|
||||
__attribute__((__aligned__(4))) ETH_DMADESCTypeDef DMATxDscrTab[ETH_TXBUFNB]; /* MAC send descriptor, 4-byte aligned */
|
||||
|
||||
__attribute__((__aligned__(4))) uint8_t MACRxBuf[ETH_RXBUFNB*ETH_RX_BUF_SZE]; /* MAC receive buffer, 4-byte aligned */
|
||||
__attribute__((__aligned__(4))) uint8_t MACTxBuf[ETH_TXBUFNB*ETH_TX_BUF_SZE]; /* MAC send buffer, 4-byte aligned */
|
||||
|
||||
__attribute__((__aligned__(4))) SOCK_INF SocketInf[WCHNET_MAX_SOCKET_NUM]; /* Socket information table, 4-byte alignment */
|
||||
__attribute__((__aligned__(4))) uint8_t RemoteIp[4]; /* DNS information table, 4-byte alignment */
|
||||
const uint16_t MemNum[8] = {WCHNET_NUM_IPRAW,
|
||||
WCHNET_NUM_UDP,
|
||||
WCHNET_NUM_TCP,
|
||||
WCHNET_NUM_TCP_LISTEN,
|
||||
WCHNET_NUM_TCP_SEG,
|
||||
WCHNET_NUM_IP_REASSDATA,
|
||||
WCHNET_NUM_PBUF,
|
||||
WCHNET_NUM_POOL_BUF
|
||||
};
|
||||
const uint16_t MemSize[8] = {WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IPRAW_PCB),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_UDP_PCB),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_PCB),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_PCB_LISTEN),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_SEG),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IP_REASSDATA),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_PBUF),
|
||||
WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_PBUF) + WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_POOL_BUF)
|
||||
};
|
||||
__attribute__((__aligned__(4)))uint8_t Memp_Memory[WCHNET_MEMP_SIZE];
|
||||
__attribute__((__aligned__(4)))uint8_t Mem_Heap_Memory[WCHNET_RAM_HEAP_SIZE];
|
||||
__attribute__((__aligned__(4)))uint8_t Mem_ArpTable[WCHNET_RAM_ARP_TABLE_SIZE];
|
||||
|
||||
uint16_t gPHYAddress;
|
||||
volatile uint32_t LocalTime;
|
||||
volatile uint8_t PhyWaitNegotiationSuc = 0;
|
||||
ETH_DMADESCTypeDef *pDMARxSet;
|
||||
ETH_DMADESCTypeDef *pDMATxSet;
|
||||
|
||||
volatile uint8_t LinkSta = 0; //0:Link down 1:Link up
|
||||
uint8_t LinkVaildFlag = 0; //0:invalid 1:valid
|
||||
uint8_t AccelerateLinkFlag = 0; //0:invalid 1:valid
|
||||
uint8_t LinkProcessingStep = 0;
|
||||
uint32_t LinkProcessingTime = 0;
|
||||
uint32_t TaskExecutionTime = 0;
|
||||
void ETH_LinkDownCfg(void);
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_TimeIsr
|
||||
*
|
||||
* @brief
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_TimeIsr( uint16_t timperiod )
|
||||
{
|
||||
LocalTime += timperiod;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_QueryPhySta
|
||||
*
|
||||
* @brief Query external PHY status
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
|
||||
void WCHNET_QueryPhySta(void)
|
||||
{
|
||||
if(PhyWaitNegotiationSuc)
|
||||
{
|
||||
ETH_PHYLink();
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_CheckPHYPN
|
||||
*
|
||||
* @brief check PHY PN polarity
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_CheckPHYPN(uint16_t time)
|
||||
{
|
||||
uint16_t phy_stat;
|
||||
//check PHY PN
|
||||
if((LinkProcessingStep == 0)||(LocalTime >= LinkProcessingTime))
|
||||
{
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE0 );
|
||||
phy_stat = ETH_ReadPHYRegister( gPHYAddress, PHY_STATUS1);
|
||||
if(phy_stat & (1<<4))
|
||||
{
|
||||
if(LinkProcessingStep == 0)
|
||||
{
|
||||
LinkProcessingStep = 1;
|
||||
LinkProcessingTime = LocalTime + time;
|
||||
}
|
||||
else {
|
||||
LinkProcessingStep = 0;
|
||||
LinkProcessingTime = 0;
|
||||
phy_stat = ETH_ReadPHYRegister( gPHYAddress, PHY_ANER);
|
||||
if((time == 200) || ((phy_stat & 1) == 0))
|
||||
{
|
||||
phy_stat = ETH_ReadPHYRegister( gPHYAddress, PHY_CONTROL1);
|
||||
phy_stat |= 1;
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_CONTROL1, phy_stat );
|
||||
}
|
||||
}
|
||||
}
|
||||
else {
|
||||
LinkProcessingStep = 0;
|
||||
LinkProcessingTime = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_AccelerateLink
|
||||
*
|
||||
* @brief accelerate Link processing
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_AccelerateLink(void)
|
||||
{
|
||||
uint16_t phy_stat;
|
||||
if(AccelerateLinkFlag == 0)
|
||||
{
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, 99 );
|
||||
phy_stat = ETH_ReadPHYRegister( gPHYAddress, 0x19);
|
||||
if((phy_stat & 0xf) == 3)
|
||||
{
|
||||
AccelerateLinkFlag = 1;
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE0 );
|
||||
phy_stat = 0x4;
|
||||
ETH_WritePHYRegister(gPHYAddress, 0x16, phy_stat );
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_CheckLinkVaild
|
||||
*
|
||||
* @brief check whether Link is valid
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_CheckLinkVaild(void)
|
||||
{
|
||||
uint16_t phy_stat, phy_bcr;
|
||||
|
||||
if(LinkVaildFlag == 0)
|
||||
{
|
||||
phy_bcr = ETH_ReadPHYRegister( PHY_ADDRESS, PHY_BCR);
|
||||
if((phy_bcr & (1<<13)) == 0) //Do nothing if Link mode is 10M.
|
||||
{
|
||||
LinkVaildFlag = 1;
|
||||
LinkProcessingTime = 0;
|
||||
return;
|
||||
}
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, 99 );
|
||||
phy_stat = ETH_ReadPHYRegister( gPHYAddress, 0x1b);
|
||||
if((phy_stat & (1<<2)) == 0)
|
||||
{
|
||||
LinkProcessingTime++;
|
||||
if(LinkProcessingTime == 5)
|
||||
{
|
||||
LinkProcessingTime = 0;
|
||||
phy_stat = ETH_ReadPHYRegister(gPHYAddress, PHY_BCR);
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_BCR, PHY_Reset );
|
||||
Delay_Us(100);
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_BCR, phy_stat );
|
||||
ETH_LinkDownCfg();
|
||||
}
|
||||
}
|
||||
else {
|
||||
LinkVaildFlag = 1;
|
||||
LinkProcessingTime = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_LinkProcessing
|
||||
*
|
||||
* @brief process Link stage task
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_LinkProcessing(void)
|
||||
{
|
||||
u16 phy_bcr;
|
||||
|
||||
if(LocalTime >= TaskExecutionTime)
|
||||
{
|
||||
TaskExecutionTime = LocalTime + 10; //execution cycle:10ms
|
||||
if(LinkSta == 0) //Link down
|
||||
{
|
||||
phy_bcr = ETH_ReadPHYRegister( PHY_ADDRESS, PHY_BCR);
|
||||
if(phy_bcr & PHY_AutoNegotiation) //auto-negotiation is enabled
|
||||
{
|
||||
WCHNET_CheckPHYPN(300); //check PHY PN
|
||||
WCHNET_AccelerateLink(); //accelerate Link processing
|
||||
}
|
||||
else { //auto-negotiation is disabled
|
||||
if((phy_bcr & (1<<13)) == 0) // 10M
|
||||
{
|
||||
WCHNET_CheckPHYPN(200); //check PHY PN
|
||||
}
|
||||
}
|
||||
}
|
||||
else { //Link up
|
||||
WCHNET_CheckLinkVaild(); //check whether Link is valid
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_MainTask
|
||||
*
|
||||
* @brief library main task function
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void WCHNET_MainTask(void)
|
||||
{
|
||||
WCHNET_NetInput( ); /* Ethernet data input */
|
||||
WCHNET_PeriodicHandle( ); /* Protocol stack time-related task processing */
|
||||
WCHNET_QueryPhySta();
|
||||
WCHNET_LinkProcessing();
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_LinkUpCfg
|
||||
*
|
||||
* @brief When the PHY is connected, configure the relevant functions.
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void ETH_LinkUpCfg(void)
|
||||
{
|
||||
uint16_t phy_stat;
|
||||
|
||||
LinkSta = 1;
|
||||
AccelerateLinkFlag = 0;
|
||||
LinkProcessingStep = 0;
|
||||
LinkProcessingTime = 0;
|
||||
PhyWaitNegotiationSuc = 0;
|
||||
ETH_Start( );
|
||||
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE0 );
|
||||
phy_stat = 0x0;
|
||||
ETH_WritePHYRegister(gPHYAddress, 0x16, phy_stat );
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_LinkDownCfg
|
||||
*
|
||||
* @brief When the PHY is disconnected, configure the relevant functions.
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void ETH_LinkDownCfg(void)
|
||||
{
|
||||
LinkSta = 0;
|
||||
LinkVaildFlag = 0;
|
||||
LinkProcessingTime = 0;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_PHYLink
|
||||
*
|
||||
* @brief Configure MAC parameters after the PHY Link is successful.
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void ETH_PHYLink( void )
|
||||
{
|
||||
uint32_t phy_stat, phy_anlpar, phy_bcr;
|
||||
|
||||
phy_stat = ETH_ReadPHYRegister( PHY_ADDRESS, PHY_BSR );
|
||||
phy_anlpar = ETH_ReadPHYRegister( PHY_ADDRESS, PHY_ANLPAR);
|
||||
phy_bcr = ETH_ReadPHYRegister( gPHYAddress, PHY_BCR);
|
||||
WCHNET_PhyStatus( phy_stat );
|
||||
|
||||
if(phy_stat & PHY_Linked_Status) //LinkUp
|
||||
{
|
||||
if(phy_bcr & PHY_AutoNegotiation)
|
||||
{
|
||||
if(phy_anlpar == 0)
|
||||
{
|
||||
ETH_LinkUpCfg();
|
||||
}
|
||||
else {
|
||||
if(phy_stat & PHY_AutoNego_Complete)
|
||||
{
|
||||
ETH_LinkUpCfg();
|
||||
}
|
||||
else{
|
||||
PhyWaitNegotiationSuc = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
else {
|
||||
ETH_LinkUpCfg();
|
||||
}
|
||||
}
|
||||
else { //LinkDown
|
||||
/*Link down*/
|
||||
ETH_LinkDownCfg();
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_CheckPhyInterruptStatus
|
||||
*
|
||||
* @brief MAC check PHY interrupt status.
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void ETH_CheckPhyInterruptStatus( void )
|
||||
{
|
||||
uint16_t phyIntStat;
|
||||
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE17 );
|
||||
phyIntStat = ETH_ReadPHYRegister( gPHYAddress, PHY_WOL_STATUS);
|
||||
|
||||
if(phyIntStat & WOL_DONE_INT)
|
||||
{
|
||||
/* Wol done */
|
||||
}
|
||||
else /* Link status change*/
|
||||
{
|
||||
ETH_PHYLink();
|
||||
}
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE0 );
|
||||
phyIntStat = ETH_ReadPHYRegister( gPHYAddress, 0x1E); /* Clear the Interrupt status */
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn PHY_InterruptInit
|
||||
*
|
||||
* @brief Configure PHY interrupt function
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void PHY_InterruptInit(void)
|
||||
{
|
||||
uint16_t RegValue;
|
||||
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE7 );
|
||||
/* Configure interrupt function */
|
||||
RegValue = ETH_ReadPHYRegister(gPHYAddress, PHY_INTERRUPT_MASK);
|
||||
RegValue |= 0x01 << 13;
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_INTERRUPT_MASK, RegValue );
|
||||
/* Clear the Interrupt status */
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE0 );
|
||||
ETH_ReadPHYRegister( gPHYAddress, PHY_INTERRUPT_IND);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn PHY_LEDCfg
|
||||
*
|
||||
* @brief Configure PHY LED function
|
||||
*
|
||||
* @param none.
|
||||
*
|
||||
* @return none.
|
||||
*/
|
||||
void PHY_LEDCfg(void)
|
||||
{
|
||||
uint16_t RegValue;
|
||||
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_PAG_SEL, PHY_REG_PAGE7 );
|
||||
//turn on LED--PHY
|
||||
RegValue = ETH_ReadPHYRegister(gPHYAddress, PHY_INTERRUPT_MASK);
|
||||
RegValue |= 1<<9;
|
||||
ETH_WritePHYRegister(gPHYAddress, PHY_INTERRUPT_MASK, RegValue );
|
||||
|
||||
//<2F><>link_led<65><64>ӳ<EFBFBD>䵽PB17
|
||||
R32_AFIO_PCFR1 |= 1<<30;
|
||||
|
||||
//<2F><>act_led<65><64>ӳ<EFBFBD>䵽PB6
|
||||
R32_AFIO_PCFR2 |= 1<<1;
|
||||
|
||||
//turn on LED--MCU <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CH564RM V1.1<EFBFBD>ֲ<EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>ж<EFBFBD>Ӧ<EFBFBD><EFBFBD>˵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʳ<EFBFBD><EFBFBD><EFBFBD>
|
||||
ETH_LED_CTRL = 0x05;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_RegInit
|
||||
*
|
||||
* @brief ETH register initialization.
|
||||
*
|
||||
* @param ETH_InitStruct:initialization struct.
|
||||
* PHYAddress:PHY address.
|
||||
*
|
||||
* @return Initialization status.
|
||||
*/
|
||||
uint32_t ETH_RegInit( ETH_InitTypeDef* ETH_InitStruct, uint16_t PHYAddress )
|
||||
{
|
||||
uint32_t tmpreg = 0;
|
||||
|
||||
/*---------------------- Physical layer configuration -------------------*/
|
||||
/* Set the SMI interface clock, set as the main frequency divided by 42 */
|
||||
tmpreg = ETH->MACMIIAR;
|
||||
tmpreg &= MACMIIAR_CR_MASK;
|
||||
tmpreg |= (uint32_t)ETH_MACMIIAR_CR_Div42;
|
||||
ETH->MACMIIAR = (uint32_t)tmpreg;
|
||||
|
||||
/*------------------------ MAC register configuration ----------------------- --------------------*/
|
||||
tmpreg = ETH->MACCR;
|
||||
tmpreg &= MACCR_CLEAR_MASK;
|
||||
tmpreg |= (uint32_t)(ETH_InitStruct->ETH_Watchdog |
|
||||
ETH_InitStruct->ETH_Jabber |
|
||||
ETH_InitStruct->ETH_InterFrameGap |
|
||||
ETH_InitStruct->ETH_ChecksumOffload |
|
||||
ETH_InitStruct->ETH_AutomaticPadCRCStrip |
|
||||
ETH_InitStruct->ETH_DeferralCheck |
|
||||
(1 << 20));
|
||||
/* Write MAC Control Register */
|
||||
ETH->MACCR = (uint32_t)tmpreg;
|
||||
ETH->MACFFR = (uint32_t)(ETH_InitStruct->ETH_ReceiveAll |
|
||||
ETH_InitStruct->ETH_SourceAddrFilter |
|
||||
ETH_InitStruct->ETH_PassControlFrames |
|
||||
ETH_InitStruct->ETH_BroadcastFramesReception |
|
||||
ETH_InitStruct->ETH_DestinationAddrFilter |
|
||||
ETH_InitStruct->ETH_PromiscuousMode |
|
||||
ETH_InitStruct->ETH_MulticastFramesFilter |
|
||||
ETH_InitStruct->ETH_UnicastFramesFilter);
|
||||
/*--------------- ETHERNET MACHTHR and MACHTLR Configuration ---------------*/
|
||||
/* Write to ETHERNET MACHTHR */
|
||||
ETH->MACHTHR = (uint32_t)ETH_InitStruct->ETH_HashTableHigh;
|
||||
/* Write to ETHERNET MACHTLR */
|
||||
ETH->MACHTLR = (uint32_t)ETH_InitStruct->ETH_HashTableLow;
|
||||
/*----------------------- ETHERNET MACFCR Configuration --------------------*/
|
||||
/* Get the ETHERNET MACFCR value */
|
||||
tmpreg = ETH->MACFCR;
|
||||
/* Clear xx bits */
|
||||
tmpreg &= MACFCR_CLEAR_MASK;
|
||||
tmpreg |= (uint32_t)((ETH_InitStruct->ETH_PauseTime << 16) |
|
||||
ETH_InitStruct->ETH_UnicastPauseFrameDetect |
|
||||
ETH_InitStruct->ETH_ReceiveFlowControl |
|
||||
ETH_InitStruct->ETH_TransmitFlowControl);
|
||||
ETH->MACFCR = (uint32_t)tmpreg;
|
||||
|
||||
ETH->MACVLANTR = (uint32_t)(ETH_InitStruct->ETH_VLANTagComparison |
|
||||
ETH_InitStruct->ETH_VLANTagIdentifier);
|
||||
|
||||
tmpreg = ETH->DMAOMR;
|
||||
tmpreg &= DMAOMR_CLEAR_MASK;
|
||||
tmpreg |= (uint32_t)(ETH_InitStruct->ETH_DropTCPIPChecksumErrorFrame |
|
||||
ETH_InitStruct->ETH_FlushReceivedFrame |
|
||||
ETH_InitStruct->ETH_TransmitStoreForward |
|
||||
ETH_InitStruct->ETH_ForwardErrorFrames |
|
||||
ETH_InitStruct->ETH_ForwardUndersizedGoodFrames);
|
||||
ETH->DMAOMR = (uint32_t)tmpreg;
|
||||
|
||||
/* Reset the physical layer */
|
||||
ETH_WritePHYRegister(PHYAddress, PHY_BCR, PHY_Reset);
|
||||
return ETH_SUCCESS;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_Configuration
|
||||
*
|
||||
* @brief Ethernet configure.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void ETH_Configuration( uint8_t *macAddr )
|
||||
{
|
||||
ETH_InitTypeDef ETH_InitStructure;
|
||||
uint16_t timeout = 10000;
|
||||
|
||||
/* Configure Ethernet for normal operating mode*/
|
||||
ETH->PHY_CR |= 1<<31;
|
||||
ETH->PHY_CR &= ~(1<<30);
|
||||
|
||||
gPHYAddress = PHY_ADDRESS;
|
||||
|
||||
/* Software reset */
|
||||
ETH_SoftwareReset();
|
||||
|
||||
/* Wait for software reset */
|
||||
do{
|
||||
Delay_Us(10);
|
||||
if( !--timeout ) break;
|
||||
}while(ETH->DMABMR & ETH_DMABMR_SR);
|
||||
|
||||
/* ETHERNET Configuration */
|
||||
/* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
|
||||
ETH_StructInit(Ð_InitStructure);
|
||||
/* Fill ETH_InitStructure parameters */
|
||||
/*------------------------ MAC -----------------------------------*/
|
||||
#if HARDWARE_CHECKSUM_CONFIG
|
||||
ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
|
||||
#endif
|
||||
ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
|
||||
/* Filter function configuration */
|
||||
ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Enable;
|
||||
ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Enable;
|
||||
ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
|
||||
ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
|
||||
ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
|
||||
/*------------------------ DMA -----------------------------------*/
|
||||
/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
|
||||
the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
|
||||
if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
|
||||
ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
|
||||
ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
|
||||
ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Enable;
|
||||
ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Enable;
|
||||
/* Configure Ethernet */
|
||||
ETH_RegInit( Ð_InitStructure, gPHYAddress );
|
||||
|
||||
/* Configure MAC address */
|
||||
ETH->MACA0HR = (uint32_t)((macAddr[5]<<8) | macAddr[4]);
|
||||
ETH->MACA0LR = (uint32_t)(macAddr[0] | (macAddr[1]<<8) | (macAddr[2]<<16) | (macAddr[3]<<24));
|
||||
|
||||
/* Mask the interrupt that Tx good frame count counter reaches half the maximum value */
|
||||
ETH->MMCTIMR = ETH_MMCTIMR_TGFM;
|
||||
/* Mask the interrupt that Rx good unicast frames counter reaches half the maximum value */
|
||||
/* Mask the interrupt that Rx crc error counter reaches half the maximum value */
|
||||
ETH->MMCRIMR = ETH_MMCRIMR_RGUFM | ETH_MMCRIMR_RFAEM | ETH_MMCRIMR_RFCEM;
|
||||
|
||||
PHY_InterruptInit();
|
||||
|
||||
ETH_DMAITConfig(ETH_DMA_IT_NIS |\
|
||||
ETH_DMA_IT_R |\
|
||||
ETH_DMA_IT_T |\
|
||||
ETH_DMA_IT_AIS |\
|
||||
ETH_DMA_IT_RBU |\
|
||||
ETH_DMA_IT_PHYSR,\
|
||||
ENABLE);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_TxPktChainMode
|
||||
*
|
||||
* @brief Ethernet sends data frames in chain mode.
|
||||
*
|
||||
* @param len Send data length
|
||||
* pBuff send buffer pointer
|
||||
*
|
||||
* @return Send status.
|
||||
*/
|
||||
uint32_t ETH_TxPktChainMode(uint16_t len, uint32_t *pBuff )
|
||||
{
|
||||
/* Check if the descriptor is owned by the ETHERNET DMA (when set) or CPU (when reset) */
|
||||
if((DMATxDescToSet->Status & ETH_DMATxDesc_OWN) != (uint32_t)RESET)
|
||||
{
|
||||
/* Return ERROR: OWN bit set */
|
||||
return ETH_ERROR;
|
||||
}
|
||||
/* Setting the Frame Length: bits[12:0] */
|
||||
DMATxDescToSet->ControlBufferSize = (len & ETH_DMATxDesc_TBS1);
|
||||
DMATxDescToSet->Buffer1Addr = (uint32_t)pBuff;
|
||||
|
||||
/* Setting the last segment and first segment bits (in this case a frame is transmitted in one descriptor) */
|
||||
#if HARDWARE_CHECKSUM_CONFIG
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_LS | ETH_DMATxDesc_FS | ETH_DMATxDesc_CIC_TCPUDPICMP_Full;
|
||||
#else
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_LS | ETH_DMATxDesc_FS;
|
||||
#endif
|
||||
|
||||
/* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */
|
||||
DMATxDescToSet->Status |= ETH_DMATxDesc_OWN;
|
||||
|
||||
/* Clear TBUS ETHERNET DMA flag */
|
||||
ETH->DMASR = ETH_DMASR_TBUS;
|
||||
/* Resume DMA transmission*/
|
||||
ETH->DMATPDR = 0;
|
||||
|
||||
/* Update the ETHERNET DMA global Tx descriptor with next Tx descriptor */
|
||||
/* Chained Mode */
|
||||
/* Selects the next DMA Tx descriptor list for next buffer to send */
|
||||
DMATxDescToSet = (ETH_DMADESCTypeDef*) (DMATxDescToSet->Buffer2NextDescAddr);
|
||||
/* Return SUCCESS */
|
||||
return ETH_SUCCESS;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn WCHNET_ETHIsr
|
||||
*
|
||||
* @brief Ethernet Interrupt Service Routine
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void WCHNET_ETHIsr(void)
|
||||
{
|
||||
uint32_t intStat;
|
||||
|
||||
intStat = ETH->DMASR;
|
||||
if (intStat & ETH_DMA_FLAG_AIS)
|
||||
{
|
||||
if (intStat & ETH_DMA_FLAG_RBU)
|
||||
{
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_RBU);
|
||||
}
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_AIS);
|
||||
}
|
||||
|
||||
if( intStat & ETH_DMA_FLAG_NIS )
|
||||
{
|
||||
if( intStat & ETH_DMA_FLAG_R )
|
||||
{
|
||||
/*If you don't use the Ethernet library,
|
||||
* you can do some data processing operations here*/
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_R);
|
||||
}
|
||||
if( intStat & ETH_DMA_FLAG_T )
|
||||
{
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_T);
|
||||
}
|
||||
if( intStat & ETH_DMA_FLAG_PHYSR)
|
||||
{
|
||||
ETH_CheckPhyInterruptStatus( );
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_PHYSR);
|
||||
}
|
||||
ETH_DMAClearITPendingBit(ETH_DMA_FLAG_NIS);
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_Init
|
||||
*
|
||||
* @brief Ethernet initialization.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void ETH_Init( uint8_t *macAddr )
|
||||
{
|
||||
ETH_Configuration( macAddr );
|
||||
PHY_LEDCfg();
|
||||
ETH_DMATxDescChainInit(DMATxDscrTab, MACTxBuf, ETH_TXBUFNB);
|
||||
ETH_DMARxDescChainInit(DMARxDscrTab, MACRxBuf, ETH_RXBUFNB);
|
||||
pDMARxSet = DMARxDscrTab;
|
||||
pDMATxSet = DMATxDscrTab;
|
||||
NVIC_EnableIRQ(ETH_IRQn);
|
||||
NVIC_SetPriority(ETH_IRQn, 0);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ETH_LibInit
|
||||
*
|
||||
* @brief Ethernet library initialization program
|
||||
*
|
||||
* @return command status
|
||||
*/
|
||||
uint8_t ETH_LibInit( uint8_t *ip, uint8_t *gwip, uint8_t *mask, uint8_t *macaddr )
|
||||
{
|
||||
uint8_t s;
|
||||
struct _WCH_CFG cfg;
|
||||
|
||||
memset(&cfg,0,sizeof(cfg));
|
||||
cfg.TxBufSize = ETH_TX_BUF_SZE;
|
||||
cfg.TCPMss = WCHNET_TCP_MSS;
|
||||
cfg.HeapSize = WCHNET_MEM_HEAP_SIZE;
|
||||
cfg.ARPTableNum = WCHNET_NUM_ARP_TABLE;
|
||||
cfg.MiscConfig0 = WCHNET_MISC_CONFIG0;
|
||||
cfg.MiscConfig1 = WCHNET_MISC_CONFIG1;
|
||||
cfg.net_send = ETH_TxPktChainMode;
|
||||
cfg.CheckValid = WCHNET_CFG_VALID;
|
||||
s = WCHNET_ConfigLIB(&cfg);
|
||||
if( s ){
|
||||
return (s);
|
||||
}
|
||||
s = WCHNET_Init(ip,gwip,mask,macaddr);
|
||||
ETH_Init( macaddr );
|
||||
return (s);
|
||||
}
|
||||
|
||||
/******************************** endfile @ eth_driver ******************************/
|
||||
55
NetLib/eth_driver.h
Normal file
55
NetLib/eth_driver.h
Normal file
@@ -0,0 +1,55 @@
|
||||
/********************************** (C) COPYRIGHT ************* ******************
|
||||
* File Name : eth_driver.h
|
||||
* Author : WCH
|
||||
* Version : V1.3.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains the headers of the ETH Driver.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __ETH_DRIVER__
|
||||
#define __ETH_DRIVER__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "debug.h"
|
||||
#include "wchnet.h"
|
||||
|
||||
#define PHY_ADDRESS 1
|
||||
|
||||
#define ROM_CFG_USERADR_ID 0X30CC
|
||||
|
||||
#define PHY_ANLPAR_SELECTOR_FIELD 0x1F
|
||||
#define PHY_ANLPAR_SELECTOR_VALUE 0x01 /* 5B'00001 */
|
||||
|
||||
#ifndef WCHNETTIMERPERIOD
|
||||
#define WCHNETTIMERPERIOD 10 /* Timer period, in Ms. */
|
||||
#endif
|
||||
|
||||
extern ETH_DMADESCTypeDef *DMATxDescToSet;
|
||||
extern ETH_DMADESCTypeDef *DMARxDescToGet;
|
||||
extern SOCK_INF SocketInf[ ];
|
||||
extern uint8_t RemoteIp[4];
|
||||
|
||||
#define ETH_LED_CTRL (*((volatile uint32_t *)0x40400158))
|
||||
|
||||
void ETH_PHYLink( void );
|
||||
void WCHNET_ETHIsr( void );
|
||||
void WCHNET_MainTask( void );
|
||||
void ETH_LedConfiguration(void);
|
||||
void ETH_Init( uint8_t *macAddr );
|
||||
void ETH_LedLinkSet( uint8_t mode );
|
||||
void ETH_LedDataSet( uint8_t mode );
|
||||
void WCHNET_TimeIsr( uint16_t timperiod );
|
||||
void ETH_Configuration( uint8_t *macAddr );
|
||||
uint8_t ETH_LibInit( uint8_t *ip, uint8_t *gwip, uint8_t *mask, uint8_t *macaddr);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
BIN
NetLib/libCH56xNET.a
Normal file
BIN
NetLib/libCH56xNET.a
Normal file
Binary file not shown.
170
NetLib/net_config.h
Normal file
170
NetLib/net_config.h
Normal file
@@ -0,0 +1,170 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : net_config.h
|
||||
* Author : WCH
|
||||
* Version : V1.30
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains the configurations of
|
||||
* Ethernet protocol stack library
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __NET_CONFIG_H__
|
||||
#define __NET_CONFIG_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*********************************************************************
|
||||
* socket configuration, IPRAW + UDP + TCP + TCP_LISTEN = number of sockets
|
||||
*/
|
||||
#define WCHNET_NUM_IPRAW 1 /* Number of IPRAW connections */
|
||||
|
||||
#define WCHNET_NUM_UDP 4 /* The number of UDP connections */
|
||||
|
||||
#define WCHNET_NUM_TCP 1 /* Number of TCP connections */
|
||||
|
||||
#define WCHNET_NUM_TCP_LISTEN 1 /* Number of TCP listening */
|
||||
|
||||
/* The number of sockets, the maximum is 31 */
|
||||
#define WCHNET_MAX_SOCKET_NUM (WCHNET_NUM_IPRAW+WCHNET_NUM_UDP+WCHNET_NUM_TCP+WCHNET_NUM_TCP_LISTEN)
|
||||
|
||||
#define WCHNET_TCP_MSS 768 /* Size of TCP MSS Ĭ<><C4AC>:1460*/
|
||||
|
||||
#define WCHNET_NUM_POOL_BUF (WCHNET_NUM_TCP*2+2) /* The number of POOL BUFs, the number of receive queues */
|
||||
|
||||
/*********************************************************************
|
||||
* MAC queue configuration
|
||||
*/
|
||||
#define ETH_TXBUFNB 2 /* The number of descriptors sent by the MAC */
|
||||
|
||||
#define ETH_RXBUFNB 4 /* Number of MAC received descriptors */
|
||||
|
||||
#ifndef ETH_MAX_PACKET_SIZE
|
||||
#define ETH_RX_BUF_SZE 1520 /* MAC receive buffer length, an integer multiple of 4 */
|
||||
#define ETH_TX_BUF_SZE 1520 /* MAC send buffer length, an integer multiple of 4 */
|
||||
#else
|
||||
#define ETH_RX_BUF_SZE ETH_MAX_PACKET_SIZE
|
||||
#define ETH_TX_BUF_SZE ETH_MAX_PACKET_SIZE
|
||||
#endif
|
||||
|
||||
/*********************************************************************
|
||||
* Functional configuration
|
||||
*/
|
||||
#define WCHNET_PING_ENABLE 1 /* PING is enabled, PING is enabled by default */
|
||||
|
||||
#define TCP_RETRY_COUNT 20 /* The number of TCP retransmissions, the default value is 20 */
|
||||
|
||||
#define TCP_RETRY_PERIOD 10 /* TCP retransmission period, the default value is 10, the unit is 50ms */
|
||||
|
||||
#define SOCKET_SEND_RETRY 1 /* Send failed retry configuration, 1: enable, 0: disable */
|
||||
|
||||
#define HARDWARE_CHECKSUM_CONFIG 0 /* Hardware checksum checking and insertion configuration, 1: enable, 0: disable */
|
||||
|
||||
#define FINE_DHCP_PERIOD 8 /* Fine DHCP period, the default value is 8, the unit is 250ms */
|
||||
|
||||
#define CFG0_TCP_SEND_COPY 1 /* TCP send buffer copy, 1: copy, 0: not copy */
|
||||
|
||||
#define CFG0_TCP_RECV_COPY 1 /* TCP receive replication optimization, internal debugging use */
|
||||
|
||||
#define CFG0_TCP_OLD_DELETE 0 /* Delete oldest TCP connection, 1: enable, 0: disable */
|
||||
|
||||
#define CFG0_IP_REASS_PBUFS 0 /* Number of reassembled IP PBUFs */
|
||||
|
||||
#define CFG0_TCP_DEALY_ACK_DISABLE 1 /* 1: disable TCP delay ACK 0: enable TCP delay ACK */
|
||||
|
||||
/*********************************************************************
|
||||
* Memory related configuration
|
||||
*/
|
||||
/* If you want to achieve a higher transmission speed,
|
||||
* try to increase RECE_BUF_LEN to (WCHNET_TCP_MSS*4)
|
||||
* and increase WCHNET_NUM_TCP_SEG to (WCHNET_NUM_TCP*4)*/
|
||||
#define RECE_BUF_LEN (WCHNET_TCP_MSS*2) /* socket receive buffer size */
|
||||
|
||||
#define WCHNET_NUM_PBUF WCHNET_NUM_POOL_BUF /* Number of PBUF structures */
|
||||
|
||||
#define WCHNET_NUM_TCP_SEG (WCHNET_NUM_TCP*2) /* The number of TCP segments used to send */
|
||||
|
||||
#define WCHNET_MEM_HEAP_SIZE (((WCHNET_TCP_MSS+0x10+54+8)*WCHNET_NUM_TCP_SEG)+ETH_TX_BUF_SZE+64+2*0x18) /* memory heap size */
|
||||
|
||||
#define WCHNET_NUM_ARP_TABLE 50 /* Number of ARP lists */
|
||||
|
||||
#define WCHNET_MEM_ALIGNMENT 4 /* 4 byte alignment */
|
||||
|
||||
#if CFG0_IP_REASS_PBUFS
|
||||
#define WCHNET_NUM_IP_REASSDATA 2 /* Number of reassembled IP structures */
|
||||
/*1: When using the fragmentation function,
|
||||
* ensure that the size of WCHNET_SIZE_POOL_BUF is large enough to store a single fragmented packet*/
|
||||
#define WCHNET_SIZE_POOL_BUF (((1500 + 14 + 4) + 3) & ~3) /* Buffer size for receiving a single packet */
|
||||
/*2: When creating a socket that can receive fragmented packets,
|
||||
* ensure that "RecvBufLen" member of the "struct _SOCK_INF" structure
|
||||
* (the parameter initialized when calling WCHNET_SocketCreat) is sufficient
|
||||
* to receive a complete fragmented packet */
|
||||
#else
|
||||
#define WCHNET_NUM_IP_REASSDATA 0 /* Number of reassembled IP structures */
|
||||
#define WCHNET_SIZE_POOL_BUF (((WCHNET_TCP_MSS + 40 + 14 + 4) + 3) & ~3) /* Buffer size for receiving a single packet */
|
||||
#endif
|
||||
|
||||
/* Check receive buffer */
|
||||
#if(WCHNET_NUM_POOL_BUF * WCHNET_SIZE_POOL_BUF < ETH_RX_BUF_SZE)
|
||||
#error "WCHNET_NUM_POOL_BUF or WCHNET_TCP_MSS Error"
|
||||
#error "Please Increase WCHNET_NUM_POOL_BUF or WCHNET_TCP_MSS to make sure the receive buffer is sufficient"
|
||||
#endif
|
||||
/* Check the configuration of the SOCKET quantity */
|
||||
#if( WCHNET_NUM_TCP_LISTEN && !WCHNET_NUM_TCP )
|
||||
#error "WCHNET_NUM_TCP Error,Please Configure WCHNET_NUM_TCP >= 1"
|
||||
#endif
|
||||
/* Check byte alignment must be a multiple of 4 */
|
||||
#if((WCHNET_MEM_ALIGNMENT % 4) || (WCHNET_MEM_ALIGNMENT == 0))
|
||||
#error "WCHNET_MEM_ALIGNMENT Error,Please Configure WCHNET_MEM_ALIGNMENT = 4 * N, N >=1"
|
||||
#endif
|
||||
/* TCP maximum segment length */
|
||||
#if((WCHNET_TCP_MSS > 1460) || (WCHNET_TCP_MSS < 60))
|
||||
#error "WCHNET_TCP_MSS Error,Please Configure WCHNET_TCP_MSS >= 60 && WCHNET_TCP_MSS <= 1460"
|
||||
#endif
|
||||
/* Number of ARP cache tables */
|
||||
#if((WCHNET_NUM_ARP_TABLE > 0X7F) || (WCHNET_NUM_ARP_TABLE < 1))
|
||||
#error "WCHNET_NUM_ARP_TABLE Error,Please Configure WCHNET_NUM_ARP_TABLE >= 1 && WCHNET_NUM_ARP_TABLE <= 0X7F"
|
||||
#endif
|
||||
/* Check POOL BUF configuration */
|
||||
#if(WCHNET_NUM_POOL_BUF < 1)
|
||||
#error "WCHNET_NUM_POOL_BUF Error,Please Configure WCHNET_NUM_POOL_BUF >= 1"
|
||||
#endif
|
||||
/* Check PBUF structure configuration */
|
||||
#if(WCHNET_NUM_PBUF < 1)
|
||||
#error "WCHNET_NUM_PBUF Error,Please Configure WCHNET_NUM_PBUF >= 1"
|
||||
#endif
|
||||
/* Check IP Assignment Configuration */
|
||||
#if(CFG0_IP_REASS_PBUFS && ((WCHNET_NUM_IP_REASSDATA > 10) || (WCHNET_NUM_IP_REASSDATA < 1)))
|
||||
#error "WCHNET_NUM_IP_REASSDATA Error,Please Configure WCHNET_NUM_IP_REASSDATA < 10 && WCHNET_NUM_IP_REASSDATA >= 1 "
|
||||
#endif
|
||||
/* Check the number of reassembled IP PBUFs */
|
||||
#if(CFG0_IP_REASS_PBUFS > WCHNET_NUM_POOL_BUF)
|
||||
#error "WCHNET_NUM_POOL_BUF Error,Please Configure CFG0_IP_REASS_PBUFS < WCHNET_NUM_POOL_BUF"
|
||||
#endif
|
||||
/* Check Timer period, in Ms. */
|
||||
#if(WCHNETTIMERPERIOD > 50)
|
||||
#error "WCHNETTIMERPERIOD Error,Please Configure WCHNETTIMERPERIOD < 50"
|
||||
#endif
|
||||
|
||||
/* Configuration value 0 */
|
||||
#define WCHNET_MISC_CONFIG0 (((CFG0_TCP_SEND_COPY) << 0) |\
|
||||
((CFG0_TCP_RECV_COPY) << 1) |\
|
||||
((CFG0_TCP_OLD_DELETE) << 2) |\
|
||||
((CFG0_IP_REASS_PBUFS) << 3) |\
|
||||
((CFG0_TCP_DEALY_ACK_DISABLE) << 8))
|
||||
/* Configuration value 1 */
|
||||
#define WCHNET_MISC_CONFIG1 (((WCHNET_MAX_SOCKET_NUM)<<0)|\
|
||||
((WCHNET_PING_ENABLE) << 13) |\
|
||||
((TCP_RETRY_COUNT) << 14) |\
|
||||
((TCP_RETRY_PERIOD) << 19) |\
|
||||
((SOCKET_SEND_RETRY) << 25) |\
|
||||
((HARDWARE_CHECKSUM_CONFIG) << 26)|\
|
||||
((FINE_DHCP_PERIOD) << 27))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
1095
NetLib/net_function.c
Normal file
1095
NetLib/net_function.c
Normal file
File diff suppressed because it is too large
Load Diff
160
NetLib/net_function.h
Normal file
160
NetLib/net_function.h
Normal file
@@ -0,0 +1,160 @@
|
||||
/*
|
||||
* net_function.h
|
||||
*
|
||||
* Created on: May 21, 2025
|
||||
* Author: cc
|
||||
*/
|
||||
|
||||
#ifndef NET_FUNCTION_H_
|
||||
#define NET_FUNCTION_H_
|
||||
|
||||
#include "ch564.h"
|
||||
#include "eth_driver.h"
|
||||
#include "net_config.h"
|
||||
#include "debug.h"
|
||||
|
||||
#define KEEPALIVE_ENABLE 0 //Enable keep alive function ʹ<><CAB9>TCP<43><50><EFBFBD><EFBFBD><EEB9A6>
|
||||
#define NET_Socket_Num_Max 4 //<2F><><EFBFBD><EFBFBD>Ӧ<EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD>ഴ<EFBFBD><E0B4B4>4<EFBFBD><34><EFBFBD><EFBFBD><D7BD>֣<EFBFBD> <20><EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:WCHNET_MAX_SOCKET_NUM
|
||||
#define DOMAINNAME_MAX 64 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB3A4><EFBFBD><EFBFBD>
|
||||
|
||||
#define SERVER_NAME_DNS "www.boonlive-rcu.com" //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD> - Ĭ<><C4AC>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define TFTPSERVER_NAME_DNS "blv-tftp-log.blv-oa.com" //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - Ĭ<><C4AC>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define SERVER_COMM_Port 3339
|
||||
|
||||
#define SocketIdnex_BLVSeriver 0x00 //<2F><EFBFBD><D7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD>±<EFBFBD>
|
||||
|
||||
#define Net_DNS_Port 53 //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
|
||||
typedef enum
|
||||
{
|
||||
NET_INIT = 0,
|
||||
NET_PHY_WAIT,
|
||||
NET_DHCP,
|
||||
NET_DHCP_WAIT,
|
||||
NET_TFTP,
|
||||
NET_DNS,
|
||||
NET_DNS_WAIT,
|
||||
NET_WAIT,
|
||||
NET_COMPLETE,
|
||||
|
||||
NET_WAIT_MAC_RESTART,
|
||||
//NET_START_TO_INIT,
|
||||
NET_CON_WAIT,
|
||||
NET_SOCKET_WAIT,
|
||||
}NET_STA;
|
||||
|
||||
enum UDP_INTERNAL_STA{
|
||||
STA_INIT = 0,
|
||||
STA_INIT_WAIT = 1,
|
||||
STA_INIT_IDLE = 2,
|
||||
STA_Realy_Upgrade = 3,
|
||||
STA_INIT_CONNECT,
|
||||
STA_LOG,
|
||||
STA_SEND_WAIT,
|
||||
STA_SEND_LOG,
|
||||
STA_SEND_RETRY,
|
||||
STA_END,
|
||||
};
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t device_ip[4]; // <20>豸 IP
|
||||
uint8_t gateway[4]; // <20><><EFBFBD>ص<EFBFBD>ַ
|
||||
uint8_t subnet[4]; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t mac_addr[6]; // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD>MAC<41><43>ַ
|
||||
uint8_t dns_server_ip[4]; // DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ
|
||||
uint8_t dns_server2_ip[4]; // DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IP<49><50>ַ
|
||||
uint8_t SocketId[NET_Socket_Num_Max];
|
||||
|
||||
}WCHNET_INFO_T;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t init_flag:1; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ɱ<EFBFBD>־λ
|
||||
uint8_t register_flag:1; //ע<><D7A2><EFBFBD><EFBFBD>־λ
|
||||
uint8_t search_ack_flag:1; //<2F><><EFBFBD>ͱ<EFBFBD>־λ
|
||||
uint8_t dhcp_en:1; //DHCP<43>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t dns_sta:4; //DNS״̬
|
||||
|
||||
uint8_t dhcp_flg:1; //DHCP<43><50><EFBFBD><EFBFBD>ip<69>ɹ<EFBFBD><C9B9><EFBFBD>־
|
||||
uint8_t dns_flg:1; //DNS<4E><53>ȡip<69>ɹ<EFBFBD><C9B9><EFBFBD>־
|
||||
uint8_t Udp_Internal_sta:4; //UDP״̬<D7B4><CCAC>״̬
|
||||
uint8_t PHY_State:2; //NET PHY״̬ 0x00:<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD>ӣ<EFBFBD>0x01:<3A><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>DNS״̬
|
||||
|
||||
uint8_t register_num:4; //ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t dns_fail:4; //DNSʧ<53>ܼ<EFBFBD><DCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
|
||||
uint8_t server_dns_flag:1; //DNS<4E>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t tftp_dns_flag:1; //DNS<4E>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD>tftp<74><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t mqtt_dns_flag:1; //MQTT<54>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t online_state:3; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ 0:<3A><><EFBFBD><EFBFBD> 1:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2:<3A><><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 3:<3A>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t sync_tick:2; //ͬ<><CDAC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t udp_dns_flag:1; //udp<64><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t server_select:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1> 0x00:Ĭ<><C4AC><EFBFBD>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>,0x01:<3A><><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t net_retry_flag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ա<EFBFBD>־λ -
|
||||
uint8_t net_retry_num:5; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD> - <20><><EFBFBD><EFBFBD>DHCP<43><50><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>DNS<4E><53><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||
|
||||
uint8_t con_flag:1; //ֱ<><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t rcu_reboot_flag:1; //RCU<43><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
uint8_t udp_scan_cnt:6; //udpɨ<70><C9A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
uint8_t active_cmd_flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||
|
||||
uint8_t net_sta; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ǰ״̬
|
||||
uint8_t udp_sta; //UDP<44><50><EFBFBD><EFBFBD>״̬<D7B4><CCAC>
|
||||
uint8_t ServerDename[DOMAINNAME_MAX]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t dis_ip[4]; //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD>ip<69><70>ַ
|
||||
uint8_t tftp_ip[4]; //TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t goal_ip[4]; //Ŀ<><C4BF>ip,
|
||||
|
||||
uint8_t udp_send_flag; //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||
uint8_t udp_retry_cnt; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint8_t udp_retry_num; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint16_t local_port; //<2F><><EFBFBD>ض˿<D8B6>
|
||||
uint16_t goal_port; //Ŀ<><C4BF>port
|
||||
uint16_t dis_port; //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
uint16_t frame_no; //<2F><><EFBFBD>͵<EFBFBD>֡<EFBFBD><D6A1>
|
||||
uint16_t ack_frame; //ACK֡<4B><D6A1>
|
||||
|
||||
uint16_t udp_timesync_cnt; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1sһ<73><D2BB>
|
||||
uint16_t udp_periodic_cnt; //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> - 1sһ<73><D2BB>
|
||||
uint16_t udp_periodic_time; //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>λ:S
|
||||
|
||||
uint32_t udp_retry_tick; //<2F>ط<EFBFBD><D8B7><EFBFBD>ʱʱ<CAB1><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t udp_retry_time; //<2F>ط<EFBFBD><D8B7><EFBFBD>ʱʱ<CAB1><CAB1>
|
||||
|
||||
uint32_t con_tick; //ֱ<><D6B1>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> 2023-05-27
|
||||
|
||||
uint32_t udp_idle_tick; //UDP<44><50><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t udp_online_tick; //UDP<44><50><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||
uint32_t udp_online_time; //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
|
||||
uint32_t wait_cot; //<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>
|
||||
uint32_t register_tick; //ע<><D7A2><EFBFBD><EFBFBD>ʱ
|
||||
uint32_t search_ack_tick; //<2F><><EFBFBD>ͼ<EFBFBD>ʱ
|
||||
|
||||
}DEVICE_NET_APPINFO;
|
||||
|
||||
/*TFTP <20><><EFBFBD><EFBFBD>LOG<4F><47><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>*/
|
||||
#define TFTP_Destination_Port 69 //TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#define TFTP_LOG_Local_Port 65500 //TFTP LOG<4F><47><EFBFBD>䱾<EFBFBD>ض˿<D8B6>
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t Port; //TFTP LOG<4F><47><EFBFBD>䱾<EFBFBD>ض˿<D8B6>
|
||||
uint16_t Time; //<2F><>־<EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||
uint8_t DN_Lens; //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
char DomainName[DOMAINNAME_MAX]; //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}TFTP_LOG;
|
||||
|
||||
extern WCHNET_INFO_T g_netinfo;
|
||||
extern DEVICE_NET_APPINFO server_info;
|
||||
|
||||
uint8_t WCHNET_LIB_Init(void);
|
||||
void WCHNET_HandleGlobalInt(void);
|
||||
|
||||
void NetWork_Task(void);
|
||||
|
||||
#endif /* NET_FUNCTION_H_ */
|
||||
605
NetLib/wchnet.h
Normal file
605
NetLib/wchnet.h
Normal file
@@ -0,0 +1,605 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : wchnet.h
|
||||
* Author : WCH
|
||||
* Version : V1.90
|
||||
* Date : 2023/05/12
|
||||
* Description : This file contains the headers of
|
||||
* the Ethernet protocol stack library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __WCHNET_H__
|
||||
#define __WCHNET_H__
|
||||
|
||||
#include "stdint.h"
|
||||
#ifndef NET_LIB
|
||||
#include "net_config.h"
|
||||
#endif
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define WCHNET_LIB_VER 0x1A //the library version number
|
||||
#define WCHNET_CFG_VALID 0x12345678 //Configuration value valid flag
|
||||
|
||||
/* LED state @LED_STAT */
|
||||
#define LED_ON 0
|
||||
#define LED_OFF 1
|
||||
|
||||
/* PHY state @PHY_STAT */
|
||||
#define PHY_LINK_SUCCESS (1 << 2) //PHY connection success
|
||||
#define PHY_AUTO_SUCCESS (1 << 5) //PHY auto negotiation completed
|
||||
|
||||
/* Library initialization state @CFG_INIT_STAT */
|
||||
#define INIT_OK 0x00
|
||||
#define INIT_ERR_RX_BUF_SIZE 0x01
|
||||
#define INIT_ERR_TCP_MSS 0x02
|
||||
#define INIT_ERR_HEAP_SIZE 0x03
|
||||
#define INIT_ERR_ARP_TABLE_NEM 0x04
|
||||
#define INIT_ERR_MISC_CONFIG0 0x05
|
||||
#define INIT_ERR_MISC_CONFIG1 0x06
|
||||
#define INIT_ERR_FUNC_SEND 0x09
|
||||
#define INIT_ERR_CHECK_VALID 0xFF
|
||||
|
||||
/* Socket protocol type */
|
||||
#define PROTO_TYPE_IP_RAW 0 //IP layer raw data
|
||||
#define PROTO_TYPE_UDP 2 //UDP protocol
|
||||
#define PROTO_TYPE_TCP 3 //TCP protocol
|
||||
|
||||
/* interrupt status */
|
||||
/* The following are the states
|
||||
* that GLOB_INT will generate */
|
||||
#define GINT_STAT_UNREACH (1 << 0) //unreachable interrupt
|
||||
#define GINT_STAT_IP_CONFLI (1 << 1) //IP conflict interrupt
|
||||
#define GINT_STAT_PHY_CHANGE (1 << 2) //PHY state change interrupt
|
||||
#define GINT_STAT_SOCKET (1 << 4) //socket related interrupt
|
||||
|
||||
/* The following are the states
|
||||
* that Sn_INT will generate*/
|
||||
#define SINT_STAT_RECV (1 << 2) //the socket receives data or the receive buffer is not empty
|
||||
#define SINT_STAT_CONNECT (1 << 3) //connect successfully,generated in TCP mode
|
||||
#define SINT_STAT_DISCONNECT (1 << 4) //disconnect,generated in TCP mode
|
||||
#define SINT_STAT_TIM_OUT (1 << 6) //timeout disconnect,generated in TCP mode
|
||||
|
||||
|
||||
/* Definitions for error constants. @ERR_T */
|
||||
#define ERR_T
|
||||
#define WCHNET_ERR_SUCCESS 0x00 //No error, everything OK
|
||||
#define WCHNET_ERR_BUSY 0x10 //busy
|
||||
#define WCHNET_ERR_MEM 0x11 //Out of memory error
|
||||
#define WCHNET_ERR_BUF 0x12 //Buffer error
|
||||
#define WCHNET_ERR_TIMEOUT 0x13 //Timeout
|
||||
#define WCHNET_ERR_RTE 0x14 //Routing problem
|
||||
#define WCHNET_ERR_ABRT 0x15 //Connection aborted
|
||||
#define WCHNET_ERR_RST 0x16 //Connection reset
|
||||
#define WCHNET_ERR_CLSD 0x17 //Connection closed
|
||||
#define WCHNET_ERR_CONN 0x18 //Not connected
|
||||
#define WCHNET_ERR_VAL 0x19 //Illegal value
|
||||
#define WCHNET_ERR_ARG 0x1a //Illegal argument
|
||||
#define WCHNET_ERR_USE 0x1b //Address in use
|
||||
#define WCHNET_ERR_IF 0x1c //Low-level netif error
|
||||
#define WCHNET_ERR_ISCONN 0x1d //Already connected
|
||||
#define WCHNET_ERR_INPROGRESS 0x1e //Operation in progress
|
||||
#define WCHNET_ERR_SOCKET_MEM 0X20 //Socket information error
|
||||
#define WCHNET_ERR_UNSUPPORT_PROTO 0X21 //unsupported protocol type
|
||||
#define WCHNET_RET_ABORT 0x5F //command process fail
|
||||
#define WCHNET_ERR_UNKNOW 0xFA //unknow
|
||||
|
||||
/* unreachable condition related codes */
|
||||
#define UNREACH_CODE_HOST 0 //host unreachable
|
||||
#define UNREACH_CODE_NET 1 //network unreachable
|
||||
#define UNREACH_CODE_PROTOCOL 2 //protocol unreachable
|
||||
#define UNREACH_CODE_PROT 3 //port unreachable
|
||||
/*For other values, please refer to the RFC792 document*/
|
||||
|
||||
/* TCP disconnect related codes */
|
||||
#define TCP_CLOSE_NORMAL 0 //normal disconnect,a four-way handshake
|
||||
#define TCP_CLOSE_RST 1 //reset the connection and close
|
||||
#define TCP_CLOSE_ABANDON 2 //drop connection, and no termination message is sent
|
||||
|
||||
/* socket state code */
|
||||
#define SOCK_STAT_CLOSED 0X00 //socket close
|
||||
#define SOCK_STAT_OPEN 0X05 //socket open
|
||||
|
||||
/* TCP state code */
|
||||
#define TCP_CLOSED 0 //TCP close
|
||||
#define TCP_LISTEN 1 //TCP listening
|
||||
#define TCP_SYN_SENT 2 //SYN send, connect request
|
||||
#define TCP_SYN_RCVD 3 //SYN received, connection request received
|
||||
#define TCP_ESTABLISHED 4 //TCP connection establishment
|
||||
#define TCP_FIN_WAIT_1 5 //WAIT_1 state
|
||||
#define TCP_FIN_WAIT_2 6 //WAIT_2 state
|
||||
#define TCP_CLOSE_WAIT 7 //wait to close
|
||||
#define TCP_CLOSING 8 //closing
|
||||
#define TCP_LAST_ACK 9 //LAST_ACK
|
||||
#define TCP_TIME_WAIT 10 //2MSL wait
|
||||
|
||||
/* The following values are fixed and cannot be changed */
|
||||
#define WCHNET_MEM_ALIGN_SIZE(size) (((size) + WCHNET_MEM_ALIGNMENT - 1) & ~(WCHNET_MEM_ALIGNMENT - 1))
|
||||
#define WCHNET_SIZE_IPRAW_PCB 0x1C //IPRAW PCB size
|
||||
#define WCHNET_SIZE_UDP_PCB 0x20 //UDP PCB size
|
||||
#define WCHNET_SIZE_TCP_PCB 0xB4 //TCP PCB size
|
||||
#define WCHNET_SIZE_TCP_PCB_LISTEN 0x24 //TCP LISTEN PCB size
|
||||
#define WCHNET_SIZE_IP_REASSDATA 0x20 //IP reassembled Management
|
||||
#define WCHNET_SIZE_PBUF 0x10 //Packet Buf
|
||||
#define WCHNET_SIZE_TCP_SEG 0x14 //TCP SEG structure
|
||||
#define WCHNET_SIZE_MEM 0x08 //sizeof(struct mem)
|
||||
#define WCHNET_SIZE_ARP_TABLE 0x18 //sizeof ARP table
|
||||
|
||||
#define WCHNET_MEMP_SIZE ((WCHNET_MEM_ALIGNMENT - 1) + \
|
||||
(WCHNET_NUM_IPRAW * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IPRAW_PCB)) + \
|
||||
(WCHNET_NUM_UDP * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_UDP_PCB)) + \
|
||||
(WCHNET_NUM_TCP * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_PCB)) + \
|
||||
(WCHNET_NUM_TCP_LISTEN * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_PCB_LISTEN)) + \
|
||||
(WCHNET_NUM_TCP_SEG * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_TCP_SEG)) + \
|
||||
(WCHNET_NUM_IP_REASSDATA * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_IP_REASSDATA)) + \
|
||||
(WCHNET_NUM_PBUF * WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_PBUF)) + \
|
||||
(WCHNET_NUM_POOL_BUF * (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_PBUF) + WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_POOL_BUF))))
|
||||
|
||||
#define HEAP_MEM_ALIGN_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_MEM))
|
||||
#define WCHNET_RAM_HEAP_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_MEM_HEAP_SIZE) + HEAP_MEM_ALIGN_SIZE )
|
||||
#define WCHNET_RAM_ARP_TABLE_SIZE (WCHNET_MEM_ALIGN_SIZE(WCHNET_SIZE_ARP_TABLE) * WCHNET_NUM_ARP_TABLE)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32_t length;
|
||||
uint32_t buffer;
|
||||
}ETHFrameType;
|
||||
|
||||
/* LED callback type */
|
||||
typedef void (*led_callback)( uint8_t setbit );
|
||||
|
||||
/* net send callback type */
|
||||
typedef uint32_t (*eth_tx_set )( uint16_t len, uint32_t *pBuff );
|
||||
|
||||
/* net receive callback type */
|
||||
typedef uint32_t (*eth_rx_set )( ETHFrameType *pkt );
|
||||
|
||||
/* DNS callback type */
|
||||
typedef void (*dns_callback)( const char *name, uint8_t *ipaddr, void *callback_arg );
|
||||
|
||||
/* DHCP callback type */
|
||||
typedef uint8_t (*dhcp_callback)( uint8_t status, void * );
|
||||
|
||||
/* socket receive callback type */
|
||||
struct _SOCK_INF;
|
||||
typedef void (*pSockRecv)( struct _SOCK_INF *, uint32_t, uint16_t, uint8_t *, uint32_t);
|
||||
|
||||
/* Socket information struct */
|
||||
typedef struct _SOCK_INF
|
||||
{
|
||||
uint32_t IntStatus; //interrupt state
|
||||
uint32_t SockIndex; //Socket index value
|
||||
uint32_t RecvStartPoint; //Start pointer of the receive buffer
|
||||
uint32_t RecvBufLen; //Receive buffer length
|
||||
uint32_t RecvCurPoint; //current pointer to receive buffer
|
||||
uint32_t RecvReadPoint; //The read pointer of the receive buffer
|
||||
uint32_t RecvRemLen; //The length of the remaining data in the receive buffer
|
||||
uint32_t ProtoType; //protocol type
|
||||
uint32_t SockStatus; //Low byte Socket state, the next low byte is TCP state, only meaningful in TCP mode
|
||||
uint32_t DesPort; //destination port
|
||||
uint32_t SourPort; //Source port, protocol type in IPRAW mode
|
||||
uint8_t IPAddr[4]; //Socket destination IP address
|
||||
void *Resv1; //Reserved, for internal use, for saving individual PCBs
|
||||
void *Resv2; //Reserved, used internally, used by TCP Server
|
||||
pSockRecv AppCallBack; //receive callback function
|
||||
} SOCK_INF;
|
||||
|
||||
struct _WCH_CFG
|
||||
{
|
||||
uint32_t TxBufSize; //MAC send buffer size, reserved for use
|
||||
uint32_t TCPMss; //TCP MSS size
|
||||
uint32_t HeapSize; //heap memory size
|
||||
uint32_t ARPTableNum; //Number of ARP lists
|
||||
uint32_t MiscConfig0; //Miscellaneous Configuration 0
|
||||
/* Bit 0 TCP send buffer copy 1: copy, 0: not copy */
|
||||
/* Bit 1 TCP receive replication optimization, used for internal debugging */
|
||||
/* bit 2 delete oldest TCP connection 1: enable, 0: disable */
|
||||
/* Bits 3-7 Number of PBUFs of IP segments */
|
||||
/* Bit 8 TCP Delay ACK disable */
|
||||
uint32_t MiscConfig1; //Miscellaneous Configuration 1
|
||||
/* Bits 0-7 Number of Sockets*/
|
||||
/* Bits 8-12 Reserved */
|
||||
/* Bit 13 PING enable, 1: On 0: Off */
|
||||
/* Bits 14-18 TCP retransmission times */
|
||||
/* Bits 19-23 TCP retransmission period, in 50 milliseconds */
|
||||
/* bit 25 send failed retry, 1: enable, 0: disable */
|
||||
/* bit 26 Select whether to perform IPv4 checksum check on
|
||||
* the TCP/UDP/ICMP header of the received frame payload by hardware,
|
||||
* and calculate and insert the checksum of the IP header and payload of the sent frame by hardware.*/
|
||||
/* Bits 27-31 period (in 250 milliseconds) of Fine DHCP periodic process */
|
||||
led_callback led_link; //PHY Link Status Indicator
|
||||
led_callback led_data; //Ethernet communication indicator
|
||||
eth_tx_set net_send; //Ethernet send
|
||||
eth_rx_set net_recv; //Ethernet receive
|
||||
uint32_t CheckValid; //Configuration value valid flag, fixed value @WCHNET_CFG_VALID
|
||||
};
|
||||
|
||||
struct _NET_SYS
|
||||
{
|
||||
uint8_t IPAddr[4]; //IP address
|
||||
uint8_t GWIPAddr[4]; //Gateway IP address
|
||||
uint8_t MASKAddr[4]; //subnet mask
|
||||
uint8_t MacAddr[8]; //MAC address
|
||||
uint8_t UnreachIPAddr[4]; //Unreachable IP address
|
||||
uint32_t RetranCount; //number of retries,default is 10 times
|
||||
uint32_t RetranPeriod; //Retry period, unit MS, default 500MS
|
||||
uint32_t PHYStat; //PHY state code
|
||||
uint32_t NetStat; //The status of the Ethernet, including whether it is open, etc.
|
||||
uint32_t MackFilt; //MAC filtering, the default is to receive broadcasts, receive local MAC
|
||||
uint32_t GlobIntStatus; //global interrupt
|
||||
uint32_t UnreachCode; //unreachable code
|
||||
uint32_t UnreachProto; //unreachable protocol
|
||||
uint32_t UnreachPort; //unreachable port
|
||||
uint32_t SendFlag;
|
||||
uint32_t Flags;
|
||||
};
|
||||
|
||||
/* KEEP LIVE configuration structure */
|
||||
struct _KEEP_CFG
|
||||
{
|
||||
uint32_t KLIdle; //KEEPLIVE idle time, in ms
|
||||
uint32_t KLIntvl; //KEEPLIVE period, in ms
|
||||
uint32_t KLCount; //KEEPLIVE times
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Library initialization .
|
||||
*
|
||||
* @param ip - IP address pointer
|
||||
* @param gwip - Gateway address pointer
|
||||
* @param mask - Subnet mask pointer
|
||||
* @param macaddr - MAC address pointer
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_Init(const uint8_t *ip, const uint8_t *gwip, const uint8_t *mask, const uint8_t *macaddr);
|
||||
|
||||
/**
|
||||
* @brief get library version
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return library version
|
||||
*/
|
||||
uint8_t WCHNET_GetVer(void);
|
||||
|
||||
/**
|
||||
* @brief Get MAC address.
|
||||
*
|
||||
* @param(in) macaddr - MAC address
|
||||
*
|
||||
* @param(out) MAC address
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_GetMacAddr(uint8_t *macaddr);
|
||||
|
||||
/**
|
||||
* @brief Library parameter configuration.
|
||||
*
|
||||
* @param cfg - Configuration parameter @_WCH_CFG
|
||||
*
|
||||
* @return Library configuration initialization state @CFG_INIT_STAT
|
||||
*/
|
||||
uint8_t WCHNET_ConfigLIB(struct _WCH_CFG *cfg);
|
||||
|
||||
/**
|
||||
* @brief Handle periodic tasks in the protocol stack
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_PeriodicHandle(void);
|
||||
|
||||
/**
|
||||
* @brief Ethernet data input. Always called in the main program,
|
||||
* or called after the reception interrupt is detected.
|
||||
*
|
||||
* @param
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_NetInput( void );
|
||||
|
||||
/**
|
||||
* @brief Ethernet interrupt service function. Called after
|
||||
* Ethernet interrupt is generated.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_ETHIsr(void);
|
||||
|
||||
/**
|
||||
* @brief Get PHY status
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return PHY status @PHY_STAT
|
||||
*/
|
||||
uint8_t WCHNET_GetPHYStatus(void);
|
||||
|
||||
/**
|
||||
* @brief Query global interrupt status.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return GLOB_INT
|
||||
*/
|
||||
uint8_t WCHNET_QueryGlobalInt(void);
|
||||
|
||||
/**
|
||||
* @brief Read global interrupt and clear it.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return GLOB_INT
|
||||
*/
|
||||
uint8_t WCHNET_GetGlobalInt(void);
|
||||
|
||||
/**
|
||||
* @brief create socket
|
||||
*
|
||||
* @param(in) *socketid - socket variable pointer
|
||||
* @param socinf - Configuration parameters for creating sockets @SOCK_INF
|
||||
*
|
||||
* @param(out) *socketid - socket value
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketCreat( uint8_t *socketid, SOCK_INF *socinf);
|
||||
|
||||
/**
|
||||
* @brief Socket sends data.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param *buf - the first address of send buffer
|
||||
* @param(in) *len - pointer to the length of the data expected to be sent
|
||||
*
|
||||
* @param(out) *len - pointer to the length of the data sent actually
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketSend( uint8_t socketid, uint8_t *buf, uint32_t *len);
|
||||
|
||||
/**
|
||||
* @brief Socket receives data.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param *buf - the first address of receive buffer
|
||||
* @param(in) *len - pointer to the length of the data expected to be read
|
||||
*
|
||||
* @param(out) *buf - the first address of data buffer
|
||||
* @param(out) *len - pointer to the length of the data read actually
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketRecv( uint8_t socketid, uint8_t *buf, uint32_t *len);
|
||||
|
||||
/**
|
||||
* @brief Get socket interrupt, and clear socket interrupt.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
*
|
||||
* @return Sn_INT
|
||||
*/
|
||||
uint8_t WCHNET_GetSocketInt( uint8_t socketid );
|
||||
|
||||
/**
|
||||
* @brief Get the length of the data received by socket.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param(in) *bufaddr - the first address of receive buffer
|
||||
*
|
||||
* @param(out) *bufaddr - the first address of data buffer
|
||||
*
|
||||
* @return the length of the data
|
||||
*/
|
||||
uint32_t WCHNET_SocketRecvLen( uint8_t socketid, uint32_t *bufaddr);
|
||||
|
||||
/**
|
||||
* @brief TCP connect. Used in TCP Client mode.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketConnect( uint8_t socketid);
|
||||
|
||||
/**
|
||||
* @brief TCP listen. Used in TCP SERVER mode.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketListen( uint8_t socketid);
|
||||
|
||||
/**
|
||||
* @brief Close socket.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param mode - the way of disconnection.Used in TCP connection.
|
||||
* @TCP disconnect related codes
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketClose( uint8_t socketid, uint8_t mode );
|
||||
|
||||
/**
|
||||
* @brief Modify socket receive buffer.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param bufaddr - Address of the receive buffer
|
||||
* @param bufsize - Size of the receive buffer
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_ModifyRecvBuf( uint8_t socketid, uint32_t bufaddr, uint32_t bufsize);
|
||||
|
||||
/**
|
||||
* @brief UDP send, specify the target IP and target port
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param *buf - Address of the sent data
|
||||
* @param(in) *slen - Address of the sent length
|
||||
* @param *sip - destination IP address
|
||||
* @param port - destination port
|
||||
*
|
||||
* @param(out) *slen - actual length sent
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketUdpSendTo( uint8_t socketid, uint8_t *buf, uint32_t *slen, uint8_t *sip, uint16_t port);
|
||||
|
||||
/**
|
||||
* @brief Convert ASCII address to network address.
|
||||
*
|
||||
* @param *cp - ASCII address to be converted, such as "192.168.1.2"
|
||||
* @param(in) *addr - First address of the memory stored in the converted network address
|
||||
* @param(out) *addr - Converted network address, such as 0xC0A80102
|
||||
* @return 0 - Success. Others - Failure.
|
||||
*/
|
||||
uint8_t WCHNET_Aton(const char *cp, uint8_t *addr);
|
||||
|
||||
/**
|
||||
* @brief Convert network address to ASCII address.
|
||||
*
|
||||
* @param *ipaddr - socket id value
|
||||
*
|
||||
* @return Converted ASCII address
|
||||
*/
|
||||
uint8_t *WCHNET_Ntoa( uint8_t *ipaddr);
|
||||
|
||||
/**
|
||||
* @brief Set socket TTL.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param ttl - TTL value
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SetSocketTTL( uint8_t socketid, uint8_t ttl);
|
||||
|
||||
/**
|
||||
* @brief Start TCP retry sending immediately.
|
||||
*
|
||||
* @param socketid - TTL value
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_RetrySendUnack( uint8_t socketid);
|
||||
|
||||
/**
|
||||
* @brief Query the packets that are not sent successfully.
|
||||
*
|
||||
* @param socketid - TTL value
|
||||
* @param(in) *addrlist - pointer to the address of the address list
|
||||
* @param lislen - Length of the list
|
||||
*
|
||||
* @param(out) *addrlist - Address list of the data packets that are not sent successfully
|
||||
*
|
||||
* @return Number of unsent and unacknowledged segments
|
||||
*/
|
||||
uint8_t WCHNET_QueryUnack( uint8_t socketid, uint32_t *addrlist, uint16_t lislen );
|
||||
|
||||
/**
|
||||
* @brief Start DHCP.
|
||||
*
|
||||
* @param dhcp - Application layer callback function
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_DHCPStart( dhcp_callback dhcp );
|
||||
|
||||
/**
|
||||
* @brief Stop DHCP.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_DHCPStop( void );
|
||||
|
||||
/**
|
||||
* @brief Configure DHCP host name.
|
||||
*
|
||||
* @param *name - First address of DHCP host name
|
||||
*
|
||||
* @return 0 - Success. Others - Failure.
|
||||
*/
|
||||
uint8_t WCHNET_DHCPSetHostname(char *name);
|
||||
|
||||
/**
|
||||
* @brief Initialize the resolver: set up the UDP pcb and configure the default server
|
||||
*
|
||||
* @param *dnsip - the IP address of dns server
|
||||
* @param port - the port number of dns server
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_InitDNS( uint8_t *dnsip, uint16_t port);
|
||||
|
||||
/**
|
||||
* @brief Stop DNS.
|
||||
*
|
||||
* @param None
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_DNSStop(void);
|
||||
|
||||
/**
|
||||
* Resolve a hostname (string) into an IP address.
|
||||
*
|
||||
* @param hostname - the hostname that is to be queried
|
||||
* @param addr - pointer to a struct ip_addr where to store the address if it is already
|
||||
* cached in the dns_table (only valid if ERR_OK is returned!)
|
||||
* @param found - a callback function to be called on success, failure or timeout (only if
|
||||
* ERR_INPROGRESS is returned!)
|
||||
* @param arg - argument to pass to the callback function
|
||||
*
|
||||
* @return @ERR_T
|
||||
* WCHNET_ERR_SUCCESS if hostname is a valid IP address string or the host name is already in the local names table.
|
||||
* ERR_INPROGRESS enqueue a request to be sent to the DNS server for resolution if no errors are present.
|
||||
*/
|
||||
uint8_t WCHNET_HostNameGetIp( const char *hostname, uint8_t *addr, dns_callback found, void *arg );
|
||||
|
||||
/**
|
||||
* @brief Configure KEEP LIVE parameter.
|
||||
*
|
||||
* @param *cfg - KEEPLIVE configuration parameter
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_ConfigKeepLive( struct _KEEP_CFG *cfg );
|
||||
|
||||
/**
|
||||
* @brief Configure socket KEEP LIVE enable.
|
||||
*
|
||||
* @param socketid - socket id value
|
||||
* @param enable - 1: Enabled. 0: Disabled.
|
||||
*
|
||||
* @return @ERR_T
|
||||
*/
|
||||
uint8_t WCHNET_SocketSetKeepLive( uint8_t socketid, uint8_t enable );
|
||||
|
||||
/**
|
||||
* @brief Configure PHY state
|
||||
*
|
||||
* @param phy_stat - PHY state
|
||||
*
|
||||
* @return None
|
||||
*/
|
||||
void WCHNET_PhyStatus( uint32_t phy_stat );
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
1865
Peripheral/inc/ch564.h
Normal file
1865
Peripheral/inc/ch564.h
Normal file
File diff suppressed because it is too large
Load Diff
283
Peripheral/inc/ch564_adc.h
Normal file
283
Peripheral/inc/ch564_adc.h
Normal file
@@ -0,0 +1,283 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_adc.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* ADC firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_ADC_H
|
||||
#define __CH564_ADC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ADC_Channel0 = 0x00,
|
||||
ADC_Channel1,
|
||||
ADC_Channel2,
|
||||
ADC_Channel0_1,
|
||||
ADC_Channel3,
|
||||
ADC_Channel4,
|
||||
ADC_Channel5,
|
||||
ADC_Channel6,
|
||||
ADC_ChannelREF,
|
||||
ADC_ChannelCN
|
||||
} ADCChannelTypedef;
|
||||
/***********************************************************************************
|
||||
* @fn ADC_CMD
|
||||
*
|
||||
* @brief ADC Enable/Disable
|
||||
*
|
||||
* @param en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
*/
|
||||
#define ADC_CMD(en) \
|
||||
{ \
|
||||
(en) == ENABLE ? (R8_ADC_CTRL_MOD |= RB_ADC_POWER_ON) : (R8_ADC_CTRL_MOD &= ~RB_ADC_POWER_ON); \
|
||||
}
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_SAMPLE_WIDTH_2CLK
|
||||
*
|
||||
* @brief ADC Sample time 2clk enable
|
||||
*
|
||||
* @param en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_SAMPLE_WIDTH_2CLK(en) \
|
||||
{ \
|
||||
(en) == ENABLE ? (R8_ADC_CTRL_MOD |= RB_ADC_SAMPLE_WID) : (R8_ADC_CTRL_MOD &= RB_ADC_SAMPLE_WID); \
|
||||
}
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_SAMPLE_CYCLE
|
||||
*
|
||||
* @brief Config ADC sample cycle.
|
||||
*
|
||||
* @param val
|
||||
* - val = 0:Manual Control
|
||||
* - val = 0b000001 - 0b111111:Sampling every val clock
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_SAMPLE_CYCLE(val) \
|
||||
({ \
|
||||
R8_ADC_CTRL_MOD &= ~RB_ADC_CYCLE_CLK; \
|
||||
R8_ADC_CTRL_MOD |= (val) & RB_ADC_CYCLE_CLK; \
|
||||
R32_ADC_CTRL &= ~MASK_ADC_CYCLE_BIT_4_6; \
|
||||
R32_ADC_CTRL |= (((val) >> 4) << 25) & MASK_ADC_CYCLE_BIT_4_6; \
|
||||
})
|
||||
/***********************************************************************************
|
||||
* @fn ADC_DMA_CMD
|
||||
*
|
||||
* @brief Config the ADC DMA control and etc.
|
||||
*
|
||||
* @param RB_ADC_IE
|
||||
* - RB_ADC_IE_ADC_CMP
|
||||
* - RB_ADC_DMA_ENABLE
|
||||
* - RB_ADC_DMA_BURST
|
||||
* - RB_ADC_DMA_LOOP
|
||||
* - RB_ADC_CHAN_OE
|
||||
* - RB_ADC_MAN_SAMPLE
|
||||
*
|
||||
* en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_DMA_CMD(RB_ADC_DMA, en) \
|
||||
({ (en) == ENABLE ? (R8_ADC_CTRL_DMA |= (RB_ADC_DMA)) : (R8_ADC_CTRL_DMA &= ~(RB_ADC_DMA)); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_IT_CONFIG
|
||||
*
|
||||
* @brief ADC interrupt enable
|
||||
*
|
||||
* @param RB_ADC_IE
|
||||
* - RB_ADC_IE_ADC_CMP
|
||||
* - RB_ADC_IE_ADC_END
|
||||
* - RB_ADC_IE_FIFO_HF
|
||||
* - RB_ADC_IE_DMA_END
|
||||
* - RB_ADC_IE_FIFO_OV
|
||||
* - RB_ADC_IE_DMA_ERR
|
||||
* - RB_ADC_CMP_MOD_EQ
|
||||
* - RB_ADC_CMP_MOD_GT
|
||||
* en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_IT_CONFIG(RB_ADC_IE, en) \
|
||||
({ (en) == ENABLE ? (R8_ADC_INTER_EN |= (RB_ADC_IE)) : (R8_ADC_INTER_EN &= ~(RB_ADC_IE)); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_12BITRESOLUTION
|
||||
*
|
||||
* @brief ADC 12bit resolution enable
|
||||
*
|
||||
* @param en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_12BITRESOLUTION(en) \
|
||||
({ (en) == ENABLE ? (R32_ADC_CTRL |= MASK_ADC_BIT_MODE) : (R32_ADC_CTRL &= ~MASK_ADC_BIT_MODE); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_SAMPLE_TIME
|
||||
*
|
||||
* @brief Config ADC sample calibration time.
|
||||
*
|
||||
* @param val
|
||||
* - ADC sample calibration time
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_SAMPLE_TIME(val) \
|
||||
({ \
|
||||
R32_ADC_CTRL &= ~MASK_ADC_SMAPLE_TIME; \
|
||||
R32_ADC_CTRL |= MASK_ADC_SMAPLE_TIME & ((val) << 4); \
|
||||
})
|
||||
/***********************************************************************************
|
||||
* @fn ADC_DMA_SET_RANGE
|
||||
*
|
||||
* @brief Config ADC DMA transport range
|
||||
*
|
||||
* @param startAddress
|
||||
* - ADC DMA Handling Start Address
|
||||
* endAddress
|
||||
* - ADC DMA Handling End Address
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_DMA_SET_RANGE(startAddress, endAddress) \
|
||||
({ \
|
||||
R32_ADC_DMA_BEG = (uint32_t)(startAddress) & MASK_ADC_DMA_ADDR; \
|
||||
R32_ADC_DMA_END = (uint32_t)(endAddress) & MASK_ADC_DMA_ADDR; \
|
||||
})
|
||||
/***********************************************************************************
|
||||
* @fn ADC_DMA_GET_CURRENT
|
||||
*
|
||||
* @brief Get ADC DMA current transport address
|
||||
*
|
||||
* @return R32_ADC_DMA_NOW
|
||||
*/
|
||||
#define ADC_DMA_GET_CURRENT() (R32_ADC_DMA_NOW & MASK_ADC_DMA_ADDR)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_DMA_GET_BEGIN
|
||||
*
|
||||
* @brief Get ADC DMA start transport address
|
||||
*
|
||||
* @return R32_ADC_DMA_BEG
|
||||
*/
|
||||
#define ADC_DMA_GET_BEGIN() (R32_ADC_DMA_BEG & MASK_ADC_DMA_ADDR)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_DMA_GET_END
|
||||
*
|
||||
* @brief Get ADC DMA end transport address
|
||||
*
|
||||
* @return R32_ADC_DMA_END
|
||||
*/
|
||||
#define ADC_DMA_GET_END() (R32_ADC_DMA_END & MASK_ADC_DMA_ADDR)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_GET_FIFO
|
||||
*
|
||||
* @brief Get ADC's FIFO content
|
||||
*
|
||||
* @return R16_ADC_FIFO
|
||||
*/
|
||||
#define ADC_GET_FIFO() (R16_ADC_FIFO)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_COMPARE_VAL
|
||||
*
|
||||
* @brief Config ADC comparison reference value
|
||||
*
|
||||
* @param val
|
||||
* - ADC comparison reference value
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_COMPARE_VAL(val) ({ R16_ADC_CMP_VALUE = ADC_CMP_VALUE & (val); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_GET_FIFO_CNT
|
||||
*
|
||||
* @brief Get ADC's FIFO count
|
||||
*
|
||||
* @return R8_ADC_FIFO_COUNT
|
||||
*/
|
||||
#define ADC_GET_FIFO_CNT() (R8_ADC_FIFO_COUNT)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_GET_VAL
|
||||
*
|
||||
* @brief Get ADC's converted value
|
||||
*
|
||||
* @return R16_ADC_DATA
|
||||
*/
|
||||
#define ADC_GET_VAL() (R16_ADC_DATA)
|
||||
/***********************************************************************************
|
||||
* @fn ADC_SET_DIV
|
||||
*
|
||||
* @brief Config ADC crossover coefficients
|
||||
*
|
||||
* @param val
|
||||
* - ADC crossover coefficients
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_SET_DIV(value) ({ R8_ADC_CLOCK_DIV = (value); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_CLEAR_IT
|
||||
*
|
||||
* @brief Config ADC crossover coefficients
|
||||
*
|
||||
* @param RB_ADC_IF
|
||||
* - RB_ADC_IF_ADC_CMP
|
||||
* - RB_ADC_IF_ADC_END
|
||||
* - RB_ADC_IF_FIFO_HF
|
||||
* - RB_ADC_IF_DMA_END
|
||||
* - RB_ADC_IF_FIFO_OV
|
||||
* - RB_ADC_IF_DMA_ERR
|
||||
* - RB_ADC_EOC_FLAG
|
||||
* - RB_ADC_CHAN_INDEX
|
||||
* en
|
||||
* - ENABLE
|
||||
* - DISABLE
|
||||
*/
|
||||
#define ADC_CLEAR_IT(RB_ADC_IF) ({ R8_ADC_INT_FLAG |= (RB_ADC_IF); })
|
||||
/***********************************************************************************
|
||||
* @fn ADC_GET_IT
|
||||
*
|
||||
* @brief Config ADC crossover coefficients
|
||||
*
|
||||
* @param RB_ADC_IF
|
||||
* - RB_ADC_IF_ADC_CMP
|
||||
* - RB_ADC_IF_ADC_END
|
||||
* - RB_ADC_IF_FIFO_HF
|
||||
* - RB_ADC_IF_DMA_END
|
||||
* - RB_ADC_IF_FIFO_OV
|
||||
* - RB_ADC_IF_DMA_ERR
|
||||
* - RB_ADC_EOC_FLAG
|
||||
* - RB_ADC_CHAN_INDEX
|
||||
* @return 0:No Interrupt or interrupt flag
|
||||
*
|
||||
*/
|
||||
#define ADC_GET_IT(RB_ADC_IF) (R8_ADC_INT_FLAG & (RB_ADC_IF))
|
||||
/***********************************************************************************
|
||||
* @fn ADC_MEASURE
|
||||
*
|
||||
* @brief Manually initiated measurements
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
#define ADC_MEASURE() ({ R8_ADC_CTRL_DMA |= RB_ADC_MAN_SAMPLE; })
|
||||
|
||||
void ADC_SelectChannel(ADCChannelTypedef adcChannel);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
1446
Peripheral/inc/ch564_eth.h
Normal file
1446
Peripheral/inc/ch564_eth.h
Normal file
File diff suppressed because it is too large
Load Diff
237
Peripheral/inc/ch564_gpio.h
Normal file
237
Peripheral/inc/ch564_gpio.h
Normal file
@@ -0,0 +1,237 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_gpio.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* GPIO firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_GPIO_H
|
||||
#define __CH564_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define GPIO_Pin_0 (0x00000001)/*!< Pin 0 selected */
|
||||
#define GPIO_Pin_1 (0x00000002)/*!< Pin 1 selected */
|
||||
#define GPIO_Pin_2 (0x00000004)/*!< Pin 2 selected */
|
||||
#define GPIO_Pin_3 (0x00000008)/*!< Pin 3 selected */
|
||||
#define GPIO_Pin_4 (0x00000010)/*!< Pin 4 selected */
|
||||
#define GPIO_Pin_5 (0x00000020)/*!< Pin 5 selected */
|
||||
#define GPIO_Pin_6 (0x00000040)/*!< Pin 6 selected */
|
||||
#define GPIO_Pin_7 (0x00000080)/*!< Pin 7 selected */
|
||||
#define GPIO_Pin_8 (0x00000100)/*!< Pin 8 selected */
|
||||
#define GPIO_Pin_9 (0x00000200)/*!< Pin 9 selected */
|
||||
#define GPIO_Pin_10 (0x00000400)/*!< Pin 10 selected */
|
||||
#define GPIO_Pin_11 (0x00000800)/*!< Pin 11 selected */
|
||||
#define GPIO_Pin_12 (0x00001000)/*!< Pin 12 selected */
|
||||
#define GPIO_Pin_13 (0x00002000)/*!< Pin 13 selected */
|
||||
#define GPIO_Pin_14 (0x00004000)/*!< Pin 14 selected */
|
||||
#define GPIO_Pin_15 (0x00008000)/*!< Pin 15 selected */
|
||||
#define GPIO_Pin_16 (0x00010000)/*!< Pin 16 selected */
|
||||
#define GPIO_Pin_17 (0x00020000)/*!< Pin 17 selected */
|
||||
#define GPIO_Pin_18 (0x00040000)/*!< Pin 18 selected */
|
||||
#define GPIO_Pin_19 (0x00080000)/*!< Pin 19 selected */
|
||||
#define GPIO_Pin_20 (0x00100000)/*!< Pin 20 selected */
|
||||
#define GPIO_Pin_21 (0x00200000)/*!< Pin 21 selected */
|
||||
#define GPIO_Pin_22 (0x00400000)/*!< Pin 22 selected */
|
||||
#define GPIO_Pin_23 (0x00800000)/*!< Pin 23 selected */
|
||||
#define GPIO_Pin_24 (0x01000000)/*!< Pin 24 selected */
|
||||
#define GPIO_Pin_25 (0x02000000)/*!< Pin 25 selected */
|
||||
#define GPIO_Pin_26 (0x04000000)/*!< Pin 26 selected */
|
||||
#define GPIO_Pin_27 (0x08000000)/*!< Pin 27 selected */
|
||||
#define GPIO_Pin_28 (0x10000000)/*!< Pin 28 selected */
|
||||
#define GPIO_Pin_29 (0x20000000)/*!< Pin 29 selected */
|
||||
#define GPIO_Pin_30 (0x40000000)/*!< Pin 30 selected */
|
||||
#define GPIO_Pin_31 (0x80000000)/*!< Pin 31 selected */
|
||||
#define GPIO_Pin_All (0xFFFFFFFF)/*!< All pins selected */
|
||||
|
||||
#define GPIO_NoRemap_SPI0 (0x00020000)
|
||||
#define GPIO_PartialRemap1_SPI0 (0x00020001)
|
||||
#define GPIO_PartialRemap2_SPI0 (0x00020002)
|
||||
#define GPIO_FullRemap_SPI0 (0x00020003)
|
||||
|
||||
#define GPIO_NoRemap_UART0 (0x00220000)
|
||||
#define GPIO_PartialRemap2_UART0 (0x00220002)
|
||||
#define GPIO_FullRemap_UART0 (0x00220003)
|
||||
|
||||
#define GPIO_NoRemap_UART1 (0x00420000)
|
||||
#define GPIO_PartialRemap1_UART1 (0x00420001)
|
||||
#define GPIO_FullRemap_UART1 (0x00420003)
|
||||
|
||||
#define GPIO_NoRemap_UART2 (0x00620000)
|
||||
#define GPIO_PartialRemap1_UART2 (0x00620001)
|
||||
#define GPIO_PartialRemap2_UART2 (0x00620002)
|
||||
#define GPIO_FullRemap_UART2 (0x00620003)
|
||||
|
||||
#define GPIO_NoRemap_UART3 (0x00820000)
|
||||
#define GPIO_PartialRemap1_UART3 (0x00820001)
|
||||
#define GPIO_FullRemap_UART3 (0x00820003)
|
||||
|
||||
#define GPIO_NoRemap_UART0_MODEM (0x00a20000)
|
||||
#define GPIO_PartialRemap1_UART0_MODEM (0x00a20001)
|
||||
#define GPIO_PartialRemap2_UART0_MODEM (0x00a20002)
|
||||
#define GPIO_FullRemap_UART0_MODEM (0x00a20003)
|
||||
|
||||
#define GPIO_NoRemap_UART1_MODEM (0x00c20000)
|
||||
#define GPIO_PartialRemap1_UART1_MODEM (0x00c20001)
|
||||
#define GPIO_PartialRemap2_UART1_MODEM (0x00c20002)
|
||||
#define GPIO_FullRemap_UART1_MODEM (0x00c20003)
|
||||
|
||||
#define GPIO_NoRemap_UART2_MODEM (0x00e20000)
|
||||
#define GPIO_PartialRemap2_UART2_MODEM (0x00e20002)
|
||||
#define GPIO_FullRemap_UART2_MODEM (0x00e20003)
|
||||
|
||||
#define GPIO_NoRemap_I2C (0x01020000)
|
||||
#define GPIO_PartialRemap1_I2C (0x01020001)
|
||||
|
||||
#define GPIO_NoRemap_SLV_INTERUPT (0x01220000)
|
||||
#define GPIO_PartialRemap1_SLV_INTERUPT (0x01220001)
|
||||
#define GPIO_PartialRemap2_SLV_INTERUPT (0x01220002)
|
||||
#define GPIO_FullRemap_SLV_INTERUPT (0x01220003)
|
||||
|
||||
#define GPIO_NoRemap_SLV_CS (0x01420000)
|
||||
#define GPIO_PartialRemap1_SLV_CS (0x01420001)
|
||||
|
||||
#define GPIO_NoRemap_SLV_ADDR (0x01620000)
|
||||
#define GPIO_PartialRemap1_SLV_ADDR (0x01620001)
|
||||
#define GPIO_PartialRemap2_SLV_ADDR (0x01620002)
|
||||
|
||||
#define GPIO_NoRemap_SLV_ADDR1 (0x01820000)
|
||||
#define GPIO_PartialRemap2_SLV_ADDR1 (0x01820002)
|
||||
#define GPIO_FullRemap_SLV_ADDR1 (0x01820003)
|
||||
|
||||
#define GPIO_NoRemap_SLV_DATA (0x01a20000)
|
||||
#define GPIO_PartialRemap1_SLV_DATA (0x01a20001)
|
||||
|
||||
#define GPIO_NoRemap_SLV_RW (0x01c20000)
|
||||
#define GPIO_NolRemap_SLV_RW GPIO_NoRemap_SLV_RW
|
||||
#define GPIO_PartialRemap1_SLV_RW (0x01c20001)
|
||||
|
||||
#define GPIO_NoRemap_LINK_LED (0x01e20000)
|
||||
#define GPIO_PartialRemap1_LINK_LED (0x01e20001)
|
||||
#define GPIO_PartialRemap2_LINK_LED (0x01e20002)
|
||||
#define GPIO_FullRemap_LINK_LED (0x01e20003)
|
||||
|
||||
#define GPIO_NoRemap_ACT_LED (0x80020000)
|
||||
#define GPIO_PartialRemap1_ACT_LED (0x80020001)
|
||||
#define GPIO_PartialRemap2_ACT_LED (0x80020002)
|
||||
#define GPIO_FullRemap_ACT_LED (0x80020003)
|
||||
|
||||
#define GPIO_NoRemap_RST (0x80220000)
|
||||
#define GPIO_PartialRemap1_RST (0x80220001)
|
||||
#define GPIO_PartialRemap2_RST (0x80220002)
|
||||
#define GPIO_FullRemap_RST (0x80220003)
|
||||
|
||||
#define GPIO_NoRemap_TIMER0 (0x80410000)
|
||||
#define GPIO_FullRemap_TIMER0 (0x80410001)
|
||||
|
||||
#define GPIO_NoRemap_TIMER1 (0x80510000)
|
||||
#define GPIO_FullRemap_TIMER1 (0x80510001)
|
||||
|
||||
#define GPIO_NoRemap_BUSY (0x80610000)
|
||||
#define GPIO_FullRemap_BUSY (0x80610001)
|
||||
|
||||
#define GPIO_NoRemap_SPI1 (0x80820000)
|
||||
#define GPIO_FullRemap_SPI1 (0x80820003)
|
||||
|
||||
#define GPIO_NoRemap_TNOW0 (0x80a20000)
|
||||
#define GPIO_FullRemap_TNOW0 (0x80a20003)
|
||||
|
||||
#define GPIO_NoRemap_TNOW1 (0x80c20000)
|
||||
#define GPIO_FullRemap_TNOW1 (0x80c20003)
|
||||
|
||||
#define GPIO_NoRemap_TNOW2 (0x80e20000)
|
||||
#define GPIO_FullRemap_TNOW2 (0x80e20003)
|
||||
|
||||
#define GPIO_NoRemap_TNOW3 (0x81020000)
|
||||
#define GPIO_FullRemap_TNOW3 (0x81020003)
|
||||
|
||||
#define GPIO_NoRemap_UART3_MODEM (0x81220000)
|
||||
#define GPIO_FullRemap_UART3_MODEM (0x81220003)
|
||||
|
||||
/**
|
||||
* @brief GPIO mode structure configuration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_ModeIN_Floating = 0,
|
||||
GPIO_ModeIN_PU,
|
||||
GPIO_ModeIN_PD,
|
||||
GPIO_ModeOut_PP,
|
||||
GPIO_ModeOut_OP
|
||||
} GPIOModeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief GPIO interrupt structure configuration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
GPIO_ITMode_LowLevel = 0, // Low level trigger
|
||||
GPIO_ITMode_HighLevel, // High level trigger
|
||||
GPIO_ITMode_FallEdge, // Falling edge trigger
|
||||
GPIO_ITMode_RiseEdge, // Rising edge trigger
|
||||
GPIO_ITMode_None
|
||||
} GPIOITModeTpDef;
|
||||
|
||||
/**
|
||||
* @brief GPIO MCO structure configuration
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
MCO_125 = 0,
|
||||
MCO_25 = 4,
|
||||
MCO_2d5 = 0xC,
|
||||
} MCOMode;
|
||||
|
||||
void GPIOA_ModeCfg(uint32_t pin, GPIOModeTypeDef mode); /* GPIOA port pin mode configuration */
|
||||
void GPIOB_ModeCfg(uint32_t pin, GPIOModeTypeDef mode); /* GPIOB port pin mode configuration */
|
||||
void GPIOD_ModeCfg(uint32_t pin, GPIOModeTypeDef mode); /* GPIOB port pin mode configuration */
|
||||
#define GPIOA_ResetBits(pin) (R32_PA_CLR |= pin) /* GPIOA port pin output set low */
|
||||
#define GPIOA_SetBits(pin) (R32_PA_OUT |= pin) /* GPIOA port pin output set high */
|
||||
#define GPIOB_ResetBits(pin) (R32_PB_CLR |= pin) /* GPIOB port pin output set low */
|
||||
#define GPIOB_SetBits(pin) (R32_PB_OUT |= pin) /* GPIOB port pin output set high */
|
||||
#define GPIOD_ResetBits(pin) (R32_PD_OUT &= ~pin) /* GPIOA port pin output set low */
|
||||
#define GPIOD_SetBits(pin) (R32_PD_OUT |= pin) /* GPIOA port pin output set high */
|
||||
#define GPIOA_InverseBits(pin) (R32_PA_OUT ^= pin) /* GPIOA port pin output level flip */
|
||||
#define GPIOB_InverseBits(pin) (R32_PB_OUT ^= pin) /* GPIOB port pin output level flip */
|
||||
#define GPIOD_InverseBits(pin) (R32_PD_OUT ^= pin) /* GPIOB port pin output level flip */
|
||||
#define GPIOA_ReadPort() (R32_PA_PIN) /* The 32-bit data returned by the GPIOA port, the lower 16 bits are valid */
|
||||
#define GPIOB_ReadPort() (R32_PB_PIN) /* The 32-bit data returned by the GPIOB port, the lower 24 bits are valid */
|
||||
#define GPIOD_ReadPort() (R32_PD_PIN) /* The 32-bit data returned by the GPIOB port, the lower 24 bits are valid */
|
||||
#define GPIOA_ReadPortPin(pin) (R32_PA_PIN & pin) /* GPIOA port pin status, 0-pin low level, (!0)-pin high level */
|
||||
#define GPIOB_ReadPortPin(pin) (R32_PB_PIN & pin) /* GPIOB port pin status, 0-pin low level, (!0)-pin high level */
|
||||
#define GPIOD_ReadPortPin(pin) (R32_PD_PIN & pin) /* GPIOB port pin status, 0-pin low level, (!0)-pin high level */
|
||||
void GPIOA_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode); /* GPIOA pin interrupt mode configuration */
|
||||
void GPIOB_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode); /* GPIOB pin interrupt mode configuration */
|
||||
void GPIOD_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode); /* GPIOB pin interrupt mode configuration */
|
||||
#define GPIOA_ReadITFlagPort() (R32_INT_STATUS_PA) /* Read GPIOA port interrupt flag status */
|
||||
#define GPIOB_ReadITFlagPort() (R32_INT_STATUS_PB) /* Read GPIOB port interrupt flag status */
|
||||
#define GPIOD_ReadITFlagPort() (R32_INT_STATUS_PD) /* Read GPIOD port interrupt flag status */
|
||||
|
||||
/*************************************Read Interrupt Bit Flag************************************/
|
||||
#define GPIOA_ReadITFLAGBit(pin) (R32_INT_STATUS_PA & pin)
|
||||
#define GPIOB_ReadITFLAGBit(pin) (R32_INT_STATUS_PB & pin)
|
||||
#define GPIOD_ReadITFLAGBit(pin) (R32_INT_STATUS_PD & pin)
|
||||
|
||||
/*************************************Clear Interrupt Bit Flag************************************/
|
||||
#define GPIOA_ClearITFlagbit(pin) (R32_INT_STATUS_PA |= pin)
|
||||
#define GPIOB_ClearITFlagbit(pin) (R32_INT_STATUS_PB |= pin)
|
||||
#define GPIOD_ClearITFlagbit(pin) (R32_INT_STATUS_PD |= pin)
|
||||
|
||||
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewSTA);
|
||||
void GPIO_IPD_Unused(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
188
Peripheral/inc/ch564_i2c.h
Normal file
188
Peripheral/inc/ch564_i2c.h
Normal file
@@ -0,0 +1,188 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_i2c.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* I2C firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_I2C_H
|
||||
#define __CH564_I2C_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
/* I2C Init structure definition */
|
||||
typedef struct
|
||||
{
|
||||
uint32_t I2C_ClockSpeed; /* Specifies the clock frequency.
|
||||
This parameter must be set to a value lower than 400kHz */
|
||||
|
||||
uint16_t I2C_Mode; /* Specifies the I2C mode.
|
||||
This parameter can be a value of @ref I2C_mode */
|
||||
|
||||
uint16_t I2C_DutyCycle; /* Specifies the I2C fast mode duty cycle.
|
||||
This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
|
||||
|
||||
uint16_t I2C_OwnAddress1; /* Specifies the first device own address.
|
||||
This parameter can be a 7-bit or 10-bit address. */
|
||||
|
||||
uint16_t I2C_Ack; /* Enables or disables the acknowledgement.
|
||||
This parameter can be a value of @ref I2C_acknowledgement */
|
||||
|
||||
uint16_t I2C_AcknowledgedAddress; /* Specifies if 7-bit or 10-bit address is acknowledged.
|
||||
This parameter can be a value of @ref I2C_acknowledged_address */
|
||||
} I2C_InitTypeDef;
|
||||
|
||||
/* I2C_mode */
|
||||
#define I2C_Mode_I2C ((uint16_t)0x0000)
|
||||
|
||||
/* I2C_duty_cycle_in_fast_mode */
|
||||
#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /* I2C fast mode Tlow/Thigh = 16/9 */
|
||||
#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /* I2C fast mode Tlow/Thigh = 2 */
|
||||
|
||||
/* I2C_acknowledgement */
|
||||
#define I2C_Ack_Enable ((uint16_t)0x0400)
|
||||
#define I2C_Ack_Disable ((uint16_t)0x0000)
|
||||
|
||||
/* I2C_transfer_direction */
|
||||
#define I2C_Direction_Transmitter ((uint8_t)0x00)
|
||||
#define I2C_Direction_Receiver ((uint8_t)0x01)
|
||||
|
||||
/* I2C_acknowledged_address */
|
||||
#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
|
||||
#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
|
||||
|
||||
/* I2C_registers */
|
||||
#define I2C_Register_CTLR1 ((uint8_t)0x00)
|
||||
#define I2C_Register_CTLR2 ((uint8_t)0x04)
|
||||
#define I2C_Register_OADDR1 ((uint8_t)0x08)
|
||||
#define I2C_Register_OADDR2 ((uint8_t)0x0C)
|
||||
#define I2C_Register_DATAR ((uint8_t)0x10)
|
||||
#define I2C_Register_STAR1 ((uint8_t)0x14)
|
||||
#define I2C_Register_STAR2 ((uint8_t)0x18)
|
||||
#define I2C_Register_CKCFGR ((uint8_t)0x1C)
|
||||
|
||||
/* I2C_PEC_position */
|
||||
#define I2C_PECPosition_Next ((uint16_t)0x0800)
|
||||
#define I2C_PECPosition_Current ((uint16_t)0xF7FF)
|
||||
|
||||
/* I2C_NACK_position */
|
||||
#define I2C_NACKPosition_Next ((uint16_t)0x0800)
|
||||
#define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
|
||||
|
||||
/* I2C_interrupts_definition */
|
||||
#define I2C_IT_BUF ((uint16_t)0x0400)
|
||||
#define I2C_IT_EVT ((uint16_t)0x0200)
|
||||
#define I2C_IT_ERR ((uint16_t)0x0100)
|
||||
|
||||
/* I2C_interrupts_definition */
|
||||
#define I2C_IT_PECERR ((uint32_t)0x01001000)
|
||||
#define I2C_IT_OVR ((uint32_t)0x01000800)
|
||||
#define I2C_IT_AF ((uint32_t)0x01000400)
|
||||
#define I2C_IT_ARLO ((uint32_t)0x01000200)
|
||||
#define I2C_IT_BERR ((uint32_t)0x01000100)
|
||||
#define I2C_IT_TXE ((uint32_t)0x06000080)
|
||||
#define I2C_IT_RXNE ((uint32_t)0x06000040)
|
||||
#define I2C_IT_STOPF ((uint32_t)0x02000010)
|
||||
#define I2C_IT_ADD10 ((uint32_t)0x02000008)
|
||||
#define I2C_IT_BTF ((uint32_t)0x02000004)
|
||||
#define I2C_IT_ADDR ((uint32_t)0x02000002)
|
||||
#define I2C_IT_SB ((uint32_t)0x02000001)
|
||||
|
||||
/* STAR2 register flags */
|
||||
#define I2C_FLAG_DUALF ((uint32_t)0x00800000)
|
||||
#define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
|
||||
#define I2C_FLAG_TRA ((uint32_t)0x00040000)
|
||||
#define I2C_FLAG_BUSY ((uint32_t)0x00020000)
|
||||
#define I2C_FLAG_MSL ((uint32_t)0x00010000)
|
||||
|
||||
/* STAR1 register flags */
|
||||
#define I2C_FLAG_PECERR ((uint32_t)0x10001000)
|
||||
#define I2C_FLAG_OVR ((uint32_t)0x10000800)
|
||||
#define I2C_FLAG_AF ((uint32_t)0x10000400)
|
||||
#define I2C_FLAG_ARLO ((uint32_t)0x10000200)
|
||||
#define I2C_FLAG_BERR ((uint32_t)0x10000100)
|
||||
#define I2C_FLAG_TXE ((uint32_t)0x10000080)
|
||||
#define I2C_FLAG_RXNE ((uint32_t)0x10000040)
|
||||
#define I2C_FLAG_STOPF ((uint32_t)0x10000010)
|
||||
#define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
|
||||
#define I2C_FLAG_BTF ((uint32_t)0x10000004)
|
||||
#define I2C_FLAG_ADDR ((uint32_t)0x10000002)
|
||||
#define I2C_FLAG_SB ((uint32_t)0x10000001)
|
||||
|
||||
/****************I2C Master Events (Events grouped in order of communication)********************/
|
||||
|
||||
#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
|
||||
#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
|
||||
#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
|
||||
#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
|
||||
#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
|
||||
#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
|
||||
#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
|
||||
|
||||
/******************I2C Slave Events (Events grouped in order of communication)******************/
|
||||
|
||||
#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
|
||||
#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
|
||||
#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
|
||||
#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
|
||||
#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
|
||||
#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
|
||||
#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
|
||||
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
|
||||
#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
|
||||
#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
|
||||
|
||||
void I2C_DeInit(I2C_Typedef *I2Cx);
|
||||
void I2C_Init(I2C_Typedef *I2Cx, I2C_InitTypeDef *I2C_InitStruct);
|
||||
void I2C_StructInit(I2C_InitTypeDef *I2C_InitStruct);
|
||||
void I2C_Cmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_DMACmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_DMALastTransferCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_GenerateSTART(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_GenerateSTOP(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_AcknowledgeConfig(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_OwnAddress2Config(I2C_Typedef *I2Cx, uint8_t Address);
|
||||
void I2C_DualAddressCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_GeneralCallCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_ITConfig(I2C_Typedef *I2Cx, uint16_t I2C_IT, FunctionalState NewState);
|
||||
void I2C_SendData(I2C_Typedef *I2Cx, uint8_t Data);
|
||||
uint8_t I2C_ReceiveData(I2C_Typedef *I2Cx);
|
||||
void I2C_Send7bitAddress(I2C_Typedef *I2Cx, uint8_t Address, uint8_t I2C_Direction);
|
||||
uint16_t I2C_ReadRegister(I2C_Typedef *I2Cx, uint8_t I2C_Register);
|
||||
void I2C_SoftwareResetCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_NACKPositionConfig(I2C_Typedef *I2Cx, uint16_t I2C_NACKPosition);
|
||||
void I2C_TransmitPEC(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_PECPositionConfig(I2C_Typedef *I2Cx, uint16_t I2C_PECPosition);
|
||||
void I2C_CalculatePEC(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
uint8_t I2C_GetPEC(I2C_Typedef *I2Cx);
|
||||
void I2C_ARPCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_StretchClockCmd(I2C_Typedef *I2Cx, FunctionalState NewState);
|
||||
void I2C_FastModeDutyCycleConfig(I2C_Typedef *I2Cx, uint16_t I2C_DutyCycle);
|
||||
|
||||
/****************************************************************************************
|
||||
* I2C State Monitoring Functions
|
||||
****************************************************************************************/
|
||||
|
||||
ErrorStatus I2C_CheckEvent(I2C_Typedef *I2Cx, uint32_t I2C_EVENT);
|
||||
uint32_t I2C_GetLastEvent(I2C_Typedef *I2Cx);
|
||||
FlagStatus I2C_GetFlagStatus(I2C_Typedef *I2Cx, uint32_t I2C_FLAG);
|
||||
|
||||
void I2C_ClearFlag(I2C_Typedef *I2Cx, uint32_t I2C_FLAG);
|
||||
ITStatus I2C_GetITStatus(I2C_Typedef *I2Cx, uint32_t I2C_IT);
|
||||
void I2C_ClearITPendingBit(I2C_Typedef *I2Cx, uint32_t I2C_IT);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
67
Peripheral/inc/ch564_pwr.h
Normal file
67
Peripheral/inc/ch564_pwr.h
Normal file
@@ -0,0 +1,67 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_pwr.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* PWR firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_PWR_H
|
||||
#define __CH564_PWR_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
/* STOP_mode_entry */
|
||||
#define PWR_STOPEntry_WFI ((uint8_t)0x01)
|
||||
#define PWR_STOPEntry_WFE ((uint8_t)0x02)
|
||||
|
||||
#define WDOG_ENABLE() \
|
||||
{ \
|
||||
R8_SAFE_ACCESS_SIG = 0x57; \
|
||||
R8_SAFE_ACCESS_SIG = 0xA8; \
|
||||
R8_GLOB_RST_CFG |= (0x40 | RB_GLOB_WDOG_EN); \
|
||||
R8_SAFE_ACCESS_SIG = 0x00; \
|
||||
}
|
||||
#define WDOG_DISABLE() \
|
||||
{ \
|
||||
R8_SAFE_ACCESS_SIG = 0x57; \
|
||||
R8_SAFE_ACCESS_SIG = 0xA8; \
|
||||
R8_GLOB_RST_CFG = 0x40; \
|
||||
R8_SAFE_ACCESS_SIG = 0x00; \
|
||||
}
|
||||
#define FEED_DOG() (R8_WDOG_CLEAR = 0)
|
||||
#define VIO_PWN_INT_CMD(cmd) \
|
||||
{ \
|
||||
cmd == ENABLE ? (R32_EXTEN_CTLR1 |= RB_VIO_PWN_INT_EN) : (R32_EXTEN_CTLR1 &= ~RB_VIO_PWN_INT_EN); \
|
||||
}
|
||||
#define VIO_PWN_RST_CMD(cmd) \
|
||||
{ \
|
||||
cmd == ENABLE ? (R32_EXTEN_CTLR1 |= RB_VIO_PWN_RST_EN) : (R32_EXTEN_CTLR1 &= ~RB_VIO_PWN_RST_EN); \
|
||||
}
|
||||
#define VIO_PWN_IO_CMD(cmd) \
|
||||
{ \
|
||||
cmd == ENABLE ? (R32_EXTEN_CTLR1 |= RB_VIO_PWN_IO_EN) : (R32_EXTEN_CTLR1 &= ~RB_VIO_PWN_IO_EN); \
|
||||
}
|
||||
#define LDO_DORMENCY_EN(cmd) \
|
||||
{ \
|
||||
cmd == ENABLE ? (R32_EXTEN_CTLR1 |= RB_LDO_SLP_EN) : (R32_EXTEN_CTLR1 &= ~RB_LDO_SLP_EN); \
|
||||
}
|
||||
|
||||
|
||||
|
||||
void PWR_Sleep(uint8_t PWR_STOPEntry);
|
||||
void PWR_DeepSleep(uint8_t PWR_STOPEntry);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
133
Peripheral/inc/ch564_rcc.h
Normal file
133
Peripheral/inc/ch564_rcc.h
Normal file
@@ -0,0 +1,133 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_rcc.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* RCC firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_RCC_H
|
||||
#define __CH564_RCC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
#define RCC_UNLOCK_SAFE_ACCESS() \
|
||||
({ \
|
||||
R8_SAFE_ACCESS_SIG = 0x57; \
|
||||
R8_SAFE_ACCESS_SIG = 0xA8; \
|
||||
__NOP(); \
|
||||
})
|
||||
|
||||
#define RCC_LOCK_SAFE_ACCESS() ({ R8_SAFE_ACCESS_SIG = 0x0; })
|
||||
#define RCC_GET_ID_SAFELY() (R8_SAFE_ACCESS_ID)
|
||||
#define RCC_CLEAR_WDOG() ({ R8_WDOG_CLEAR = 0; })
|
||||
|
||||
#define HSI_ON() (R32_EXTEN_CTLR1 |= RB_HSION)
|
||||
#define HSE_ON() (R32_EXTEN_CTLR1 |= RB_HSEON)
|
||||
#define HSE_GET_STTATEUS() ((R32_EXTEN_CTLR1 & 0x8000) != 0 ? 1 : 0)
|
||||
#define HSI_OFF() (R32_EXTEN_CTLR1 &= ~RB_HSION)
|
||||
#define HSE_OFF() (R32_EXTEN_CTLR1 &= ~RB_HSEON)
|
||||
#define USB_PLL_ON() \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 |= (RB_USBPLLON); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
#define USB_PLL_OFF() \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 &= ~(RB_USBPLLON); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
#define USB_PLL_MUL_15 0x0000c000
|
||||
#define USB_PLL_MUL_16 0x00008000
|
||||
#define USB_PLL_MUL_20 0x00004000
|
||||
#define USB_PLL_MUL_24 0x00000000
|
||||
#define USB_PLL_MUL_SELECT(USB_PLL_MUL) \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 &= ~USB_PLL_MUL_15; \
|
||||
R32_EXTEN_CTLR0 |= (USB_PLL_MUL); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
#define USB_PLL_SOURCE_HSI 0x00000060
|
||||
#define USB_PLL_SOURCE_HSE 0x00000020
|
||||
#define USB_PLL_SOURCE_ETH_PLL_OUT 0x00000040
|
||||
#define USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE) \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 &= ~USB_PLL_SOURCE_HSI; \
|
||||
R32_EXTEN_CTLR0 |= (USB_PLL_SOURCE); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
|
||||
#define CLKSEL_HSI() \
|
||||
{ \
|
||||
R32_EXTEN_CTLR1 &= ~(RB_CLKSEL); \
|
||||
}
|
||||
#define CLKSEL_HSE() \
|
||||
{ \
|
||||
R32_EXTEN_CTLR1 |= (RB_CLKSEL); \
|
||||
}
|
||||
#define USB_PLL_ON() \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 |= (RB_USBPLLON); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
#define USB_PLL_OFF() \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R32_EXTEN_CTLR0 &= ~(RB_USBPLLON); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
#define SYSCLK_SOURCE_USBPLL 0
|
||||
#define SYSCLK_SOURCE_HSI_HSE 1
|
||||
#define SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE) \
|
||||
{ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
((SYSCLK_SOURCE) == SYSCLK_SOURCE_HSI_HSE) ? (R32_EXTEN_CTLR0 |= (RB_SW)) : (R32_EXTEN_CTLR0 &= ~(RB_SW)); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
}
|
||||
|
||||
#define RCC_GET_GLOB_RST_KEEP() (R8_GLOB_RESET_KEEP)
|
||||
#define RCC_SET_GLOB_RST_KEEP(val) (R8_GLOB_RESET_KEEP = (val);)
|
||||
#define RCC_SET_PLL_SYS_OUT_DIV(val) \
|
||||
({ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
R8_PLL_OUT_DIV = 0x04 | ((val) << 4); \
|
||||
RCC_LOCK_SAFE_ACCESS(); \
|
||||
})
|
||||
#define RCC_FLASH_CLK_PRE_DIV(sta) \
|
||||
({ \
|
||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||
((sta) == ENABLE) ? (R32_EXTEN_CTLR0 |= 0x00200000) : (R32_EXTEN_CTLR0 &= ~0x00200000) RCC_LOCK_SAFE_ACCESS(); \
|
||||
})
|
||||
|
||||
typedef enum
|
||||
{
|
||||
Code16k_Data128k = 0x0,
|
||||
Code48k_Data96k = 0x1,
|
||||
Code80k_Data64k = 0x2
|
||||
} GlobMem_Cfg;
|
||||
|
||||
void RCC_SetGlobalMemCFG(GlobMem_Cfg Cfg);
|
||||
void RCC_LockPort(uint8_t globport, FunctionalState NewSTA);
|
||||
void RCC_GlobleRstCFG(uint8_t cfg, FunctionalState NewSTA);
|
||||
void RCC_SlpClkOff(volatile uint8_t *reg, uint8_t slpclk, FunctionalState NewSTA);
|
||||
void RCC_SlpWakeCtrl(uint8_t slpwake, FunctionalState NewSTA);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
69
Peripheral/inc/ch564_slv.h
Normal file
69
Peripheral/inc/ch564_slv.h
Normal file
@@ -0,0 +1,69 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_slv.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* SLV firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_SLV_H
|
||||
#define __CH564_SLV_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
slv_data,
|
||||
slv_cmd,
|
||||
slv_timeout
|
||||
} SLV_STA;
|
||||
|
||||
#define SLV_CFG(cfglist, en) (BITS_CFG(R8_SLV_CONFIG, cfglist, en))
|
||||
#define SLV_SEND_DATA(data) (R8_SLV_DOUT = (data))
|
||||
#define SLV_SEND_STA(status) (R8_SLV_STATUS = (status))
|
||||
#define SLV_GET_IF(RB_IF_SLV) (R8_INT_FLAG_SLV & (RB_IF_SLV))
|
||||
#define SLV_CLEAR_IF(RB_IF_SLV) (R8_INT_FLAG_SLV |= (RB_IF_SLV))
|
||||
#define SLV_GET_DATA() (R8_INT_SLV_DIN)
|
||||
#define SLV_DMA_CFG(cfglist, en) (BITS_CFG(R8_DMA_EN_SLV, cfglist, en))
|
||||
#define SLV_SET_MODE_CTRL(cfglist, en) (BITS_CFG(R8_DMA_MODE_CTRL_SLV, cfglist, en))
|
||||
#define SLV_SET_MODE_EN(cfglist, en) (BITS_CFG(R8_DMA_MODE_EN_SLV, cfglist, en))
|
||||
|
||||
#define SLV_DMA_GET_IF(slv_dma_if) (R8_DMA_INT_FLAG_SLV & (slv_dma_if))
|
||||
#define SLV_DMA_CLEAR_IF(slv_dma_if) (R8_DMA_INT_FLAG_SLV |= (slv_dma_if))
|
||||
#define SLV_DMA_START_ADDR_RD(address) (R32_RD_DMA_START_ADDR_SLV = (uint32_t)(address))
|
||||
|
||||
#define SLV_DMA_END_ADDR_RD(address) (R32_RD_DMA_END_ADDR_SLV = (uint32_t)(address))
|
||||
|
||||
#define SLV_DMA_START_ADDR_WR(address) (R32_WR_DMA_START_ADDR_SLV = (uint32_t)(address))
|
||||
|
||||
#define SLV_DMA_END_ADDR_WR(address) (R32_WR_DMA_END_ADDR_SLV = (uint32_t)(address))
|
||||
|
||||
#define SLV_DMA_GET_NOW_ADDR() (R32_DMA_END_NOW_SLV)
|
||||
|
||||
#define SLV_SET_DMA_CMD0(cmd) (R8_DMA_CMD0_SLV = (cmd))
|
||||
|
||||
#define SLV_SET_DMA_CMD1(cmd) (R8_DMA_CMD1_SLV = (cmd))
|
||||
#define SLV_SET_RST_CMD(cmd) (R8_SLV_RESET_CMD = (cmd))
|
||||
|
||||
#define SLV_GET_OTHER_DATA() (R8_OTHER_DATA)
|
||||
#define SLV_GET_DMA_DEC_LEN() (R16_DMA_DEC_LEN)
|
||||
#define SLV_GET_DMA_DEC_OFFSET() (R16_DMA_DEC_OFFSET)
|
||||
|
||||
SLV_STA SLV_Read(uint8_t *dataAddress, uint16_t dataSize, uint16_t timeout);
|
||||
ErrorStatus SLV_SendDATA(uint8_t *data, uint16_t datasize);
|
||||
ErrorStatus SLV_SendSTA(uint8_t *sta, uint16_t datasize);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
141
Peripheral/inc/ch564_spi.h
Normal file
141
Peripheral/inc/ch564_spi.h
Normal file
@@ -0,0 +1,141 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_spi.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* SPI firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_SPI_H
|
||||
#define __CH564_SPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
/**
|
||||
* @brief SPI0 interrupt bit define
|
||||
*/
|
||||
#define SPI0_IT_FST_BYTE RB_SPI_IE_FST_BYTE
|
||||
#define SPI0_IT_FIFO_OV RB_SPI_IE_FIFO_OV
|
||||
#define SPI0_IT_DMA_END RB_SPI_IE_DMA_END
|
||||
#define SPI0_IT_FIFO_HF RB_SPI_IE_FIFO_HF
|
||||
#define SPI0_IT_BYTE_END RB_SPI_IE_BYTE_END
|
||||
#define SPI0_IT_CNT_END RB_SPI_IE_CNT_END
|
||||
|
||||
#define SPI_MAX_DELAY 0xffff
|
||||
|
||||
/**
|
||||
* @brief Configuration data mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
Mode0_HighBitINFront,
|
||||
Mode3_HighBitINFront,
|
||||
} ModeBitOrderTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Configuration SPI slave mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
Mode_DataStream = 0,
|
||||
Mose_FirstCmd,
|
||||
} Slave_ModeTypeDef;
|
||||
|
||||
/**************** SPI0 */
|
||||
void SPI0_MasterInit(uint32_t clockRate);
|
||||
void SPI0_DataMode(ModeBitOrderTypeDef mode);
|
||||
|
||||
void SPI0_MasterSendByte(uint8_t data);
|
||||
uint8_t SPI0_MasterRecvByte(void);
|
||||
|
||||
void SPI0_MasterTrans(uint8_t *pbuf, uint16_t len);
|
||||
void SPI0_MasterRecv(uint8_t *pbuf, uint16_t len);
|
||||
|
||||
void SPI0_DMATrans(uint8_t *pbuf, uint32_t len);
|
||||
void SPI0_DMARecv(uint8_t *pbuf, uint32_t len);
|
||||
void SPI0_MasterTransRecv(uint8_t *ptbuf, uint8_t *prbuf, uint16_t len);
|
||||
|
||||
void SPI0_SlaveInit();
|
||||
#define SetFirst0Data(data) (R8_SPI0_SLAVE_PRE = (data))
|
||||
void SPI0_SlaveSendByte(uint8_t data);
|
||||
uint8_t SPI0_SlaveRecvByte(void);
|
||||
|
||||
uint8_t SPI0_SlaveTrans(uint8_t *pbuf, uint16_t len,uint16_t timeouts);
|
||||
uint8_t SPI0_SlaveRecv(uint8_t *pbuf, uint16_t len,uint16_t timeouts);
|
||||
|
||||
// refer to SPI0 interrupt bit define
|
||||
#define SPI0_MODE_CFG(cfglist, en) BITS_CFG(R8_SPI0_CTRL_MOD, cfglist, en)
|
||||
#define SPI0_ITCfg(cfglist, en) BITS_CFG(R8_SPI0_INTER_EN, cfglist, en)
|
||||
#define SPI0_SET_CLOCK_DIV(div) (R8_SPI0_CLOCK_DIV = (div))
|
||||
#define SPI0_GetITFlag(f) (R8_SPI0_INT_FLAG & (f))
|
||||
#define SPI0_ClearITFlag(f) (R8_SPI0_INT_FLAG = (f))
|
||||
#define SPI0_SET_RST(dat) (R8_SPI0_RESET_CMD = (dat))
|
||||
#define SPI0_GET_RST() (R8_SPI0_RESET_CMD)
|
||||
#define SPI0_GET_BUSY() (R8_SPI0_BUSY)
|
||||
#define SPI0_GET_BUFFER() (R8_SPI0_BUFFER)
|
||||
#define SPI0_SET_BUFFER(dat) (R8_SPI0_BUFFER = (dat))
|
||||
#define SPI0_CLEAR_FIFO() (R8_SPI0_CTRL_MOD |= RB_SPI_ALL_CLEAR);
|
||||
#define SPI0_GET_FIFO() (R8_SPI0_FIFO)
|
||||
#define SPI0_SET_FIFO(dat) (R8_SPI0_FIFO = (dat))
|
||||
#define SPI0_SET_FIFO_CNT(cnt) (R8_SPI0_FIFO_COUNT = (cnt))
|
||||
#define SPI0_GET_FIFO_CNT() (R8_SPI0_FIFO_COUNT)
|
||||
#define SPI0_SET_TOTAL_CNT(cnt) (R16_SPI0_TOTAL_CNT = (cnt) )
|
||||
#define SPI0_GET_TOTAL_CNT() (R16_SPI0_TOTAL_CNT)
|
||||
|
||||
#define SPI0_SET_DMA_MODE(cfglist, en) BITS_CFG(R8_SPI0_CTRL_DMA, cfglist, en)
|
||||
#define SPI0_SET_DMA_RANGE(start, end) \
|
||||
({ \
|
||||
R32_SPI0_DMA_BEG = (uint32_t)(start) & MASK_SPI0_DMA_ADDR; \
|
||||
R32_SPI0_DMA_END = (uint32_t)(end) & MASK_SPI0_DMA_ADDR; \
|
||||
})
|
||||
|
||||
/**************** SPI1 */
|
||||
void SPI1_MasterInit(uint32_t clockRate);
|
||||
void SPI1_DataMode(ModeBitOrderTypeDef mode);
|
||||
|
||||
void SPI1_MasterSendByte(uint8_t data);
|
||||
uint8_t SPI1_MasterRecvByte(void);
|
||||
|
||||
void SPI1_MasterTrans(uint8_t *pbuf, uint16_t len);
|
||||
void SPI1_MasterRecv(uint8_t *pbuf, uint16_t len);
|
||||
|
||||
void SPI1_SlaveInit();
|
||||
#define SetFirst1Data(data) (R8_SPI1_SLAVE_PRE = (data))
|
||||
void SPI1_SlaveSendByte(uint8_t data);
|
||||
uint8_t SPI1_SlaveRecvByte(void);
|
||||
|
||||
uint8_t SPI1_SlaveTrans(uint8_t *pbuf, uint16_t len,uint16_t timeouts);
|
||||
uint8_t SPI1_SlaveRecv(uint8_t *pbuf, uint16_t len,uint16_t timeouts);
|
||||
|
||||
// refer to SPI1 interrupt bit define
|
||||
#define SPI1_MODE_CFG(cfglist, en) BITS_CFG(R8_SPI1_CTRL_MOD, cfglist, en)
|
||||
#define SPI1_ITCfg(cfglist, en) BITS_CFG(R8_SPI1_INTER_EN, cfglist, en)
|
||||
#define SPI1_SET_CLOCK_DIV(div) (R8_SPI1_CLOCK_DIV = (div))
|
||||
#define SPI1_GetITFlag(f) (R8_SPI1_INT_FLAG & (f))
|
||||
#define SPI1_ClearITFlag(f) (R8_SPI1_INT_FLAG = (f))
|
||||
#define SPI1_GET_BUFFER() (R8_SPI1_BUFFER)
|
||||
#define SPI1_SET_BUFFER(dat) (R8_SPI1_BUFFER = (dat))
|
||||
#define SPI1_CLEAR_FIFO() (R8_SPI1_CTRL_MOD |= RB_SPI_ALL_CLEAR);
|
||||
#define SPI1_GET_FIFO() (R8_SPI1_FIFO)
|
||||
#define SPI1_SET_FIFO(dat) (R8_SPI1_FIFO = (dat))
|
||||
#define SPI1_SET_FIFO_CNT(cnt) (R8_SPI1_FIFO_COUNT = (cnt))
|
||||
#define SPI1_GET_FIFO_CNT() (R8_SPI1_FIFO_COUNT)
|
||||
#define SPI1_SET_TOTAL_CNT(cnt) (R16_SPI1_TOTAL_CNT = (cnt))
|
||||
#define SPI1_GET_TOTAL_CNT() (R16_SPI1_TOTAL_CNT)
|
||||
|
||||
#define SPI1_SET_DMA_MODE(cfglist, en) BITS_CFG(R8_SPI1_CTRL_DMA, (cfglist), (en))
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
231
Peripheral/inc/ch564_tim.h
Normal file
231
Peripheral/inc/ch564_tim.h
Normal file
@@ -0,0 +1,231 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_tim.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* TIM firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_TIM_H
|
||||
#define __CH564_TIM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
/**
|
||||
* @brief Pulse Width Modulation Effective Output Words
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
PWM_Times_1 = 0, // PWM effective output repeats 1 times
|
||||
PWM_Times_4 = 1, // PWM effective output repeats 4 times
|
||||
PWM_Times_8 = 2, // PWM effective output repeats 8 times
|
||||
PWM_Times_16 = 3, // PWM effective output repeats 16 times
|
||||
} PWM_RepeatTsTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Input Capture Edge Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
CAP_NULL = 0, // not capture
|
||||
Edge_To_Edge = 1, // between any edge
|
||||
FallEdge_To_FallEdge = 2, // falling edge to falling edge
|
||||
RiseEdge_To_RiseEdge = 3, // rising edge to rising edge
|
||||
} CapModeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Input Capture Edge Mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
clock16 = 0,
|
||||
clock8
|
||||
} CapWidthTypedef;
|
||||
|
||||
/**
|
||||
* @brief Direct access memory loop mode
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
Mode_Single = 0, // single mode
|
||||
Mode_LOOP = 1, // cycle mode
|
||||
Mode_Burst = 2,
|
||||
Mode_Burst_Loop = 3
|
||||
} DMAModeTypeDef;
|
||||
|
||||
/**
|
||||
* @brief PWM output polarity
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
high_on_low = 0, // Default low level, high level is active
|
||||
low_on_high = 1, // Default high level, low level active
|
||||
} PWM_PolarTypeDef;
|
||||
|
||||
/****************** TMR0 */
|
||||
// Timing and counting
|
||||
void TMR0_TimerInit(uint32_t arr); /* Timing function initialization */
|
||||
#define TMR0_DeInit() (R8_TMR0_CTRL_MOD = 0)
|
||||
#define TMR0_GetCurrentCount() R32_TMR0_COUNT /* Get the current count value, 67108864 */
|
||||
#define TMR0_ClrCurrentCount() {R8_TMR0_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR0_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
|
||||
#define TMR0_SET_CNT_END(cnt_end) ({R32_TMR0_CNT_END = (cnt_end);})
|
||||
|
||||
// Pulse Width Modulation Function
|
||||
#define TMR0_PWMCycleCfg(cyc) \
|
||||
(R32_TMR0_CNT_END = (cyc)) /* PWM0 channel output waveform period configuration, maximum 67108864 */
|
||||
void TMR0_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM0 output initialization */
|
||||
#define TMR0_PWMActDataWidth(d) (R32_TMR0_FIFO = (d)) /* PWM0 effective data pulse width, maximum 67108864 */
|
||||
|
||||
// Catch pulse width
|
||||
#define TMR0_CAPTimeoutCfg(cyc) \
|
||||
(R32_TMR0_CNT_END = (cyc)) /* CAP0 capture level timeout configuration, maximum 33554432 */
|
||||
void TMR0_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
|
||||
#define TMR0_CAPGetData() R32_TMR0_FIFO /* Get pulse data */
|
||||
#define TMR0_CAPDataCounter() R8_TMR0_FIFO_COUNT /* Get the number of currently captured data */
|
||||
void TMR0_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
|
||||
|
||||
#define TMR0_Disable() (R8_TMR0_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR0 */
|
||||
#define TMR0_Enable() (R8_TMR0_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR0 */
|
||||
// refer to TMR0 interrupt bit define
|
||||
#define TMR0_ITCfg(cfglist, en) \
|
||||
BITS_CFG(R8_TMR0_INTER_EN, (cfglist), (en)) /* TMR0 corresponding interrupt bit on and off */
|
||||
// refer to TMR0 interrupt bit define
|
||||
#define TMR0_ClearITFlag(f) (R8_TMR0_INT_FLAG = (f)) /* Clear interrupt flag */
|
||||
#define TMR0_GetITFlag(f) (R8_TMR0_INT_FLAG & (f)) /* Query interrupt flag status */
|
||||
|
||||
#define TMR0_DMA_SET_RANGE(start, end) \
|
||||
({ \
|
||||
R32_TMR0_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
|
||||
R32_TMR0_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
|
||||
})
|
||||
#define TMR0_DMA_GET_BEG() (R32_TMR0_DMA_BEG)
|
||||
#define TMR0_DMA_GET_END() (R32_TMR0_DMA_END)
|
||||
#define TMR0_DMA_GET_NOW() (R32_TMR0_DMA_NOW)
|
||||
|
||||
/****************** TMR1 */
|
||||
// Timing and counting
|
||||
void TMR1_TimerInit(uint32_t arr); /* Timing function initialization */
|
||||
#define TMR1_DeInit() (R8_TMR1_CTRL_MOD = 0)
|
||||
#define TMR1_GetCurrentCount() R32_TMR1_COUNT /* Get the current count value, 67108864 */
|
||||
#define TMR1_ClrCurrentCount() {R8_TMR1_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR1_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
|
||||
#define TMR1_SET_CNT_END(cnt_end) ({R32_TMR1_CNT_END = (cnt_end);})
|
||||
|
||||
// Pulse Width Modulation Function
|
||||
#define TMR1_PWMCycleCfg(cyc) \
|
||||
(R32_TMR1_CNT_END = (cyc)) /* PWM1 channel output waveform period configuration, maximum 67108864 */
|
||||
void TMR1_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM1 output initialization */
|
||||
#define TMR1_PWMActDataWidth(d) (R32_TMR1_FIFO = (d)) /* PWM1 effective data pulse width, maximum 67108864 */
|
||||
|
||||
// Catch pulse width
|
||||
#define TMR1_CAPTimeoutCfg(cyc) \
|
||||
(R32_TMR1_CNT_END = (cyc)) /* CAP1 capture level timeout configuration, maximum 33554432 */
|
||||
void TMR1_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
|
||||
#define TMR1_CAPGetData() R32_TMR1_FIFO /* Get pulse data */
|
||||
#define TMR1_CAPDataCounter() R8_TMR1_FIFO_COUNT /* Get the number of currently captured data */
|
||||
|
||||
void TMR1_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
|
||||
|
||||
#define TMR1_Disable() (R8_TMR1_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR1 */
|
||||
#define TMR1_Enable() (R8_TMR1_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR1 */
|
||||
// refer to TMR1 interrupt bit define
|
||||
#define TMR1_ITCfg(cfglist, en) \
|
||||
BITS_CFG(R8_TMR1_INTER_EN, (cfglist), (en)) /* TMR1 corresponding interrupt bit on and off */
|
||||
// refer to TMR1 interrupt bit define
|
||||
#define TMR1_ClearITFlag(f) (R8_TMR1_INT_FLAG = (f)) /* Clear interrupt flag */
|
||||
#define TMR1_GetITFlag(f) (R8_TMR1_INT_FLAG & (f)) /* Query interrupt flag status */
|
||||
|
||||
#define TMR1_DMA_SET_RANGE(start, end) \
|
||||
({ \
|
||||
R32_TMR1_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
|
||||
R32_TMR1_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
|
||||
})
|
||||
#define TMR1_DMA_GET_BEG() (R32_TMR1_DMA_BEG)
|
||||
#define TMR1_DMA_GET_END() (R32_TMR1_DMA_END)
|
||||
#define TMR1_DMA_GET_NOW() (R32_TMR1_DMA_NOW)
|
||||
/****************** TMR2 */
|
||||
// Timing and counting
|
||||
void TMR2_TimerInit(uint32_t arr); /* Timing function initialization */
|
||||
#define TMR2_DeInit() (R8_TMR2_CTRL_MOD = 0)
|
||||
#define TMR2_GetCurrentCount() R32_TMR2_COUNT /* Get the current count value, 67108864 */
|
||||
#define TMR2_ClrCurrentCount() {R8_TMR2_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR2_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
|
||||
#define TMR2_SET_CNT_END(cnt_end) ({R32_TMR2_CNT_END = (cnt_end);})
|
||||
|
||||
// Pulse Width Modulation Function
|
||||
#define TMR2_PWMCycleCfg(cyc) \
|
||||
(R32_TMR2_CNT_END = (cyc)) /* PWM2 channel output waveform period configuration, maximum 67108864 */
|
||||
void TMR2_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM2 output initialization */
|
||||
#define TMR2_PWMActDataWidth(d) (R32_TMR2_FIFO = (d)) /* PWM2 effective data pulse width, maximum 67108864 */
|
||||
|
||||
// Catch pulse width
|
||||
#define TMR2_CAPTimeoutCfg(cyc) \
|
||||
(R32_TMR2_CNT_END = (cyc)) /* CAP2 capture level timeout configuration, maximum 33554432 */
|
||||
void TMR2_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
|
||||
#define TMR2_CAPGetData() R32_TMR2_FIFO /* Get pulse data */
|
||||
#define TMR2_CAPDataCounter() R8_TMR2_FIFO_COUNT /* Get the number of currently captured data */
|
||||
|
||||
void TMR2_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
|
||||
|
||||
#define TMR2_Disable() (R8_TMR2_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR2 */
|
||||
#define TMR2_Enable() (R8_TMR2_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR2 */
|
||||
// refer to TMR2 interrupt bit define
|
||||
#define TMR2_ITCfg(cfglist, en) \
|
||||
BITS_CFG(R8_TMR2_INTER_EN, (cfglist), (en)) /* TMR2 corresponding interrupt bit on and off */
|
||||
// refer to TMR2 interrupt bit define
|
||||
#define TMR2_ClearITFlag(f) (R8_TMR2_INT_FLAG = (f)) /* Clear interrupt flag */
|
||||
#define TMR2_GetITFlag(f) (R8_TMR2_INT_FLAG & (f)) /* Query interrupt flag status */
|
||||
|
||||
#define TMR2_DMA_SET_RANGE(start, end) \
|
||||
({ \
|
||||
R32_TMR2_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
|
||||
R32_TMR2_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
|
||||
})
|
||||
#define TMR2_DMA_GET_BEG() (R32_TMR2_DMA_BEG)
|
||||
#define TMR2_DMA_GET_END() (R32_TMR2_DMA_END)
|
||||
#define TMR2_DMA_GET_NOW() (R32_TMR2_DMA_NOW)
|
||||
/****************** TMR3 */
|
||||
// Timing and counting
|
||||
void TMR3_TimerInit(uint32_t arr); /* Timing function initialization */
|
||||
#define TMR3_DeInit() (R8_TMR3_CTRL_MOD = 0)
|
||||
void TMR3_EXTSignalCounterInit(uint32_t arr, CapModeTypeDef capedge,
|
||||
CapWidthTypedef capwidth); /* External signal counting function initialization */
|
||||
#define TMR3_GetCurrentCount() R32_TMR3_COUNT /* Get the current count value, 67108864 */
|
||||
#define TMR3_ClrCurrentCount() {R8_TMR3_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR3_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
|
||||
|
||||
#define TMR3_SET_CNT_END(cnt_end) ({R32_TMR3_CNT_END = (cnt_end);})
|
||||
|
||||
// Pulse Width Modulation Function
|
||||
#define TMR3_PWMCycleCfg(cyc) \
|
||||
(R32_TMR3_CNT_END = (cyc)) /* PWM2 channel output waveform period configuration, maximum 67108864 */
|
||||
void TMR3_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM2 output initialization */
|
||||
#define TMR3_PWMActDataWidth(d) (R32_TMR3_FIFO = (d)) /* PWM2 effective data pulse width, maximum 67108864 */
|
||||
|
||||
// Catch pulse width
|
||||
#define TMR3_CAPTimeoutCfg(cyc) \
|
||||
(R32_TMR3_CNT_END = (cyc)) /* CAP2 capture level timeout configuration, maximum 33554432 */
|
||||
void TMR3_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
|
||||
#define TMR3_CAPGetData() R32_TMR3_FIFO /* Get pulse data */
|
||||
#define TMR3_CAPDataCounter() R8_TMR3_FIFO_COUNT /* Get the number of currently captured data */
|
||||
|
||||
#define TMR3_Disable() (R8_TMR3_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR3 */
|
||||
#define TMR3_Enable() (R8_TMR3_CTRL_MOD |= RB_TMR_COUNT_EN) /* Close TMR3 */
|
||||
// refer to TMR3 interrupt bit define
|
||||
#define TMR3_ITCfg(cfglist, en) \
|
||||
BITS_CFG(R8_TMR3_INTER_EN, (cfglist), (en)) /* TMR3 corresponding interrupt bit on and off */
|
||||
// refer to TMR3 interrupt bit define
|
||||
#define TMR3_ClearITFlag(f) (R8_TMR3_INT_FLAG = (f)) /* Clear interrupt flag */
|
||||
#define TMR3_GetITFlag(f) (R8_TMR3_INT_FLAG & (f)) /* Query interrupt flag status */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
259
Peripheral/inc/ch564_uart.h
Normal file
259
Peripheral/inc/ch564_uart.h
Normal file
@@ -0,0 +1,259 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_uart.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* UART firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_UART_H
|
||||
#define __CH564_UART_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
/**
|
||||
* @brief Line Error Status Definition
|
||||
*/
|
||||
#define STA_ERR_BREAK RB_LSR_BREAK_ERR // Data Interval Error
|
||||
#define STA_ERR_FRAME RB_LSR_FRAME_ERR // DataFrame error
|
||||
#define STA_ERR_PAR RB_LSR_PAR_ERR // Parity bit error
|
||||
#define STA_ERR_FIFOOV RB_LSR_OVER_ERR // Receive Data Overflow
|
||||
|
||||
#define STA_TXFIFO_EMP RB_LSR_TX_FIFO_EMP // The current send FIFO is empty, you can continue to fill the send data
|
||||
#define STA_TXALL_EMP RB_LSR_TX_ALL_EMP // All currently sent data has been sent
|
||||
#define STA_RECV_DATA RB_LSR_DATA_RDY // Data is currently received
|
||||
|
||||
/**
|
||||
* @brief Serial port byte trigger configuration
|
||||
*/
|
||||
typedef enum {
|
||||
UART_1BYTE_TRIG = 0, // 1 byte trigger
|
||||
UART_2BYTE_TRIG = 1, // 2 byte trigger
|
||||
UART_4BYTE_TRIG = 2, // 4 byte trigger
|
||||
UART_7BYTE_TRIG = 3, // 7 byte trigger
|
||||
|
||||
} UARTByteTRIGTypeDef;
|
||||
|
||||
/****************** UART0 */
|
||||
void UART0_DefInit (void); /* Serial port default initialization configuration */
|
||||
void UART0_BaudRateCfg (uint32_t baudrate); /* Serial port baud rate configuration */
|
||||
void UART0_ByteTrigCfg (UARTByteTRIGTypeDef UARTByteTRIG); /* Serial byte trigger interrupt configuration */
|
||||
void UART0_INTCfg (FunctionalState NewSTA, uint8_t RB_IER); /* Serial port interrupt configuration */
|
||||
void UART0_Reset (void); /* Serial port software reset */
|
||||
|
||||
#define UART0_SET_DLV(dlv) ({ R8_UART0_DIV = (dlv); })
|
||||
|
||||
#define UART0_CLR_RXFIFO() (R8_UART0_FCR |= RB_FCR_RX_FIFO_CLR) /* Clear the current receive FIFO */
|
||||
#define UART0_CLR_TXFIFO() (R8_UART0_FCR |= RB_FCR_TX_FIFO_CLR) /* Clear the current transmit FIFO */
|
||||
|
||||
#define UART0_GetITFlag() (R8_UART0_IIR & (RB_IIR_NO_INT | RB_IIR_INT_MASK)) /* Get the current interrupt flag */
|
||||
|
||||
#define UART0_SET_FCR(cfglist, en) BITS_CFG (R8_UART0_FCR, (cfglist), (en))
|
||||
#define UART0_SET_LCR(cfglist, en) BITS_CFG (R8_UART0_LCR, (cfglist), (en))
|
||||
#define UART0_SET_MCR(cfglist, en) BITS_CFG (R8_UART0_MCR, (cfglist), (en))
|
||||
|
||||
#define UART0_SET_RTS() UART0_SET_MCR(RB_MCR_RTS,ENABLE)
|
||||
#define UART0_SET_DTR() UART0_SET_MCR(RB_MCR_DTR,ENABLE)
|
||||
#define UART0_RESET_RTS() UART0_SET_MCR(RB_MCR_RTS,DISABLE)
|
||||
#define UART0_RESET_DTR() UART0_SET_MCR(RB_MCR_DTR,DISABLE)
|
||||
|
||||
// please refer to LINE error and status define
|
||||
#define UART0_GetLinSTA() (R8_UART0_LSR) /* Get the current communication status */
|
||||
#define UART0_GetMSRSTA() (R8_UART0_MSR) /* Get the current flow control status, only applicable to UART0 */
|
||||
|
||||
#define UART0_DMACFG(cfglist, en) BITS_CFG (R8_UART0_DMA_CTRL, (cfglist), (en))
|
||||
#define UART0_DMA_SET_RD_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART0_DMA_RD_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART0_DMA_RD_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART0_DMA_GET_RD_CURRENT_ADDR() (R32_UART0_DMA_RD_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_GET_RD_BEG_ADDR() (R32_UART0_DMA_RD_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_GET_RD_END_ADDR() (R32_UART0_DMA_RD_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_SET_WR_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART0_DMA_WR_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART0_DMA_WR_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART0_DMA_GET_WR_CURRENT_ADDR() (R32_UART0_DMA_WR_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_GET_WR_BEG_ADDR() (R32_UART0_DMA_WR_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_GET_WR_END_ADDR() (R32_UART0_DMA_WR_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART0_DMA_GET_IT_FLAG(dmaif) (R8_UART0_DMA_IF & (dmaif))
|
||||
|
||||
#define UART0_SendByte(b) (R8_UART0_THR = (b)) /* Serial port single byte transmission */
|
||||
void UART0_SendString (uint8_t *buf, uint16_t length); /* Serial multi-byte transmission */
|
||||
void UART0_Send_DMA (uint8_t *buf, uint32_t lenth);
|
||||
void UART0_Recv_DMA (uint8_t *buf, uint32_t lenth);
|
||||
#define UART0_RecvByte() (R8_UART0_RBR) /* Serial port read single byte */
|
||||
uint16_t UART0_RecvString (uint8_t *buf); /* Serial port read multibyte */
|
||||
void UART0_DTRDSR_Cfg(FunctionalState en);
|
||||
void UART0_CTSRTS_Cfg(GPIO_Typedef* GPIOx, FunctionalState en,FunctionalState auto_ctrl_en);
|
||||
|
||||
/****************** UART1 */
|
||||
void UART1_DefInit (void); /* Serial port default initialization configuration */
|
||||
void UART1_BaudRateCfg (uint32_t baudrate); /* Serial port baud rate configuration */
|
||||
void UART1_ByteTrigCfg (UARTByteTRIGTypeDef UARTByteTRIG); /* Serial byte trigger interrupt configuration */
|
||||
void UART1_INTCfg (FunctionalState NewSTA, uint8_t RB_IER); /* Serial port interrupt configuration */
|
||||
void UART1_Reset (void); /* Serial port software reset */
|
||||
|
||||
#define UART1_SET_DLV(dlv) ({ R8_UART1_DIV = dlv; })
|
||||
|
||||
#define UART1_CLR_RXFIFO() (R8_UART1_FCR |= RB_FCR_RX_FIFO_CLR) /* Clear the current receive FIFO */
|
||||
#define UART1_CLR_TXFIFO() (R8_UART1_FCR |= RB_FCR_TX_FIFO_CLR) /* Clear the current transmit FIFO */
|
||||
|
||||
#define UART1_GetITFlag() (R8_UART1_IIR & (RB_IIR_NO_INT | RB_IIR_INT_MASK)) /* Get the current interrupt flag */
|
||||
|
||||
#define UART1_SET_FCR(cfglist, en) BITS_CFG (R8_UART1_FCR, (cfglist), (en))
|
||||
#define UART1_SET_LCR(cfglist, en) BITS_CFG (R8_UART1_LCR, (cfglist), (en))
|
||||
#define UART1_SET_MCR(cfglist, en) BITS_CFG (R8_UART1_MCR, (cfglist), (en))
|
||||
|
||||
#define UART1_SET_RTS() UART1_SET_MCR(RB_MCR_RTS,ENABLE)
|
||||
#define UART1_RESET_RTS() UART1_SET_MCR(RB_MCR_RTS,DISABLE)
|
||||
|
||||
// please refer to LINE error and status define
|
||||
#define UART1_GetLinSTA() (R8_UART1_LSR) /* Get the current communication status */
|
||||
#define UART1_GetMSRSTA() (R8_UART1_MSR) /* Get the current flow control status, only applicable to UART1 */
|
||||
|
||||
#define UART1_DMACFG(cfglist, en) BITS_CFG (R8_UART1_DMA_CTRL, (cfglist), (en))
|
||||
#define UART1_DMA_SET_RD_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART1_DMA_RD_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART1_DMA_RD_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART1_DMA_GET_RD_CURRENT_ADDR() (R32_UART1_DMA_RD_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_GET_RD_BEG_ADDR() (R32_UART1_DMA_RD_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_GET_RD_END_ADDR() (R32_UART1_DMA_RD_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_SET_WR_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART1_DMA_WR_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART1_DMA_WR_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART1_DMA_GET_WR_CURRENT_ADDR() (R32_UART1_DMA_WR_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_GET_WR_BEG_ADDR() (R32_UART1_DMA_WR_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_GET_WR_END_ADDR() (R32_UART1_DMA_WR_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART1_DMA_GET_IT_FLAG(dmaif) (R8_UART1_DMA_IF & (dmaif))
|
||||
|
||||
#define UART1_SendByte(b) (R8_UART1_THR = (b)) /* Serial port single byte transmission */
|
||||
void UART1_SendString (uint8_t *buf, uint16_t length); /* Serial multi-byte transmission */
|
||||
void UART1_Send_DMA (uint8_t *buf, uint32_t lenth);
|
||||
void UART1_Recv_DMA (uint8_t *buf, uint32_t lenth);
|
||||
#define UART1_RecvByte() (R8_UART1_RBR) /* Serial port read single byte */
|
||||
uint16_t UART1_RecvString (uint8_t *buf); /* Serial port read multibyte */
|
||||
void UART1_CTSRTS_Cfg(GPIO_Typedef* GPIOx, FunctionalState en,FunctionalState auto_ctrl_en);
|
||||
|
||||
/****************** UART2 */
|
||||
void UART2_DefInit (void); /* Serial port default initialization configuration */
|
||||
void UART2_BaudRateCfg (uint32_t baudrate); /* Serial port baud rate configuration */
|
||||
void UART2_ByteTrigCfg (UARTByteTRIGTypeDef UARTByteTRIG); /* Serial byte trigger interrupt configuration */
|
||||
void UART2_INTCfg (FunctionalState NewSTA, uint8_t RB_IER); /* Serial port interrupt configuration */
|
||||
void UART2_Reset (void); /* Serial port software reset */
|
||||
|
||||
#define UART2_SET_DLV(dlv) ({ R8_UART2_DIV = (dlv); })
|
||||
|
||||
#define UART2_CLR_RXFIFO() (R8_UART2_FCR |= RB_FCR_RX_FIFO_CLR) /* Clear the current receive FIFO */
|
||||
#define UART2_CLR_TXFIFO() (R8_UART2_FCR |= RB_FCR_TX_FIFO_CLR) /* Clear the current transmit FIFO */
|
||||
|
||||
#define UART2_GetITFlag() (R8_UART2_IIR & (RB_IIR_NO_INT | RB_IIR_INT_MASK)) /* Get the current interrupt flag */
|
||||
|
||||
#define UART2_SET_FCR(cfglist, en) BITS_CFG (R8_UART2_FCR, (cfglist), (en))
|
||||
#define UART2_SET_LCR(cfglist, en) BITS_CFG (R8_UART2_LCR, (cfglist), (en))
|
||||
#define UART2_SET_MCR(cfglist, en) BITS_CFG (R8_UART2_MCR, (cfglist), (en))
|
||||
|
||||
#define UART2_SET_RTS() UART2_SET_MCR(RB_MCR_RTS,ENABLE)
|
||||
#define UART2_RESET_RTS() UART2_SET_MCR(RB_MCR_RTS,DISABLE)
|
||||
|
||||
// please refer to LINE error and status define
|
||||
#define UART2_GetLinSTA() (R8_UART2_LSR) /* Get the current communication status */
|
||||
#define UART2_GetMSRSTA() (R8_UART2_MSR) /* Get the current flow control status, only applicable to UART2 */
|
||||
|
||||
#define UART2_DMACFG(cfglist, en) BITS_CFG (R8_UART2_DMA_CTRL, (cfglist), (en))
|
||||
#define UART2_DMA_SET_RD_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART2_DMA_RD_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART2_DMA_RD_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART2_DMA_GET_RD_CURRENT_ADDR() (R32_UART2_DMA_RD_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_GET_RD_BEG_ADDR() (R32_UART2_DMA_RD_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_GET_RD_END_ADDR() (R32_UART2_DMA_RD_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_SET_WR_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART2_DMA_WR_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART2_DMA_WR_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART2_DMA_GET_WR_CURRENT_ADDR() (R32_UART2_DMA_WR_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_GET_WR_BEG_ADDR() (R32_UART2_DMA_WR_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_GET_WR_END_ADDR() (R32_UART2_DMA_WR_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART2_DMA_GET_IT_FLAG(dmaif) (R8_UART2_DMA_IF & (dmaif))
|
||||
|
||||
#define UART2_SendByte(b) (R8_UART2_THR = (b)) /* Serial port single byte transmission */
|
||||
void UART2_SendString (uint8_t *buf, uint16_t length); /* Serial multi-byte transmission */
|
||||
void UART2_Send_DMA (uint8_t *buf, uint32_t lenth);
|
||||
void UART2_Recv_DMA (uint8_t *buf, uint32_t lenth);
|
||||
#define UART2_RecvByte() (R8_UART2_RBR) /* Serial port read single byte */
|
||||
uint16_t UART2_RecvString (uint8_t *buf); /* Serial port read multibyte */
|
||||
void UART2_CTSRTS_Cfg(GPIO_Typedef* GPIOx, FunctionalState en,FunctionalState auto_ctrl_en);
|
||||
|
||||
/****************** UART3 */
|
||||
void UART3_DefInit (void); /* Serial port default initialization configuration */
|
||||
void UART3_BaudRateCfg (uint32_t baudrate); /* Serial port baud rate configuration */
|
||||
void UART3_ByteTrigCfg (UARTByteTRIGTypeDef UARTByteTRIG); /* Serial byte trigger interrupt configuration */
|
||||
void UART3_INTCfg (FunctionalState NewSTA, uint8_t RB_IER); /* Serial port interrupt configuration */
|
||||
void UART3_Reset (void); /* Serial port software reset */
|
||||
|
||||
#define UART3_SET_DLV(dlv) ({ R8_UART3_DIV = dlv; })
|
||||
|
||||
#define UART3_CLR_RXFIFO() (R8_UART3_FCR |= RB_FCR_RX_FIFO_CLR) /* Clear the current receive FIFO */
|
||||
#define UART3_CLR_TXFIFO() (R8_UART3_FCR |= RB_FCR_TX_FIFO_CLR) /* Clear the current transmit FIFO */
|
||||
|
||||
#define UART3_GetITFlag() (R8_UART3_IIR & (RB_IIR_NO_INT | RB_IIR_INT_MASK)) /* Get the current interrupt flag */
|
||||
|
||||
#define UART3_SET_FCR(cfglist, en) BITS_CFG (R8_UART3_FCR, (cfglist), (en))
|
||||
#define UART3_SET_LCR(cfglist, en) BITS_CFG (R8_UART3_LCR, (cfglist), (en))
|
||||
#define UART3_SET_MCR(cfglist, en) BITS_CFG (R8_UART3_MCR, (cfglist), (en))
|
||||
|
||||
#define UART3_SET_RTS() UART3_SET_MCR(RB_MCR_RTS,ENABLE)
|
||||
#define UART3_RESET_RTS() UART3_SET_MCR(RB_MCR_RTS,DISABLE)
|
||||
|
||||
// please refer to LINE error and status define
|
||||
#define UART3_GetLinSTA() (R8_UART3_LSR) /* Get the current communication status */
|
||||
#define UART3_GetMSRSTA() (R8_UART3_MSR) /* Get the current flow control status, only applicable to UART3 */
|
||||
|
||||
#define UART3_DMACFG(cfglist, en) BITS_CFG (R8_UART3_DMA_CTRL, (cfglist), (en))
|
||||
#define UART3_DMA_SET_RD_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART3_DMA_RD_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART3_DMA_RD_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART3_DMA_GET_RD_CURRENT_ADDR() (R32_UART3_DMA_RD_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_GET_RD_BEG_ADDR() (R32_UART3_DMA_RD_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_GET_RD_END_ADDR() (R32_UART3_DMA_RD_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_SET_WR_RANGE(start, end) \
|
||||
({ \
|
||||
R32_UART3_DMA_WR_START_ADDR = (uint32_t)(start)&MASK_UART_DMA_ADDR; \
|
||||
R32_UART3_DMA_WR_END_ADDR = (uint32_t)(end)&MASK_UART_DMA_ADDR; \
|
||||
})
|
||||
#define UART3_DMA_GET_WR_CURRENT_ADDR() (R32_UART3_DMA_WR_NOW_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_GET_WR_BEG_ADDR() (R32_UART3_DMA_WR_START_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_GET_WR_END_ADDR() (R32_UART3_DMA_WR_END_ADDR & MASK_UART_DMA_ADDR)
|
||||
#define UART3_DMA_GET_IT_FLAG(dmaif) (R8_UART3_DMA_IF & (dmaif))
|
||||
|
||||
#define UART3_SendByte(b) (R8_UART3_THR = (b)) /* Serial port single byte transmission */
|
||||
void UART3_SendString (uint8_t *buf, uint16_t length); /* Serial multi-byte transmission */
|
||||
void UART3_Send_DMA (uint8_t *buf, uint32_t lenth);
|
||||
void UART3_Recv_DMA (uint8_t *buf, uint32_t lenth);
|
||||
#define UART3_RecvByte() (R8_UART3_RBR) /* Serial port read single byte */
|
||||
uint16_t UART3_RecvString (uint8_t *buf); /* Serial port read multibyte */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
659
Peripheral/inc/ch564_usb.h
Normal file
659
Peripheral/inc/ch564_usb.h
Normal file
@@ -0,0 +1,659 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_usb.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USB firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_USB_H
|
||||
#define __CH564_USB_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
|
||||
/* USB standard device request code */
|
||||
#ifndef USB_GET_DESCRIPTOR
|
||||
#define USB_GET_STATUS 0x00
|
||||
#define USB_CLEAR_FEATURE 0x01
|
||||
#define USB_SET_FEATURE 0x03
|
||||
#define USB_SET_ADDRESS 0x05
|
||||
#define USB_GET_DESCRIPTOR 0x06
|
||||
#define USB_SET_DESCRIPTOR 0x07
|
||||
#define USB_GET_CONFIGURATION 0x08
|
||||
#define USB_SET_CONFIGURATION 0x09
|
||||
#define USB_GET_INTERFACE 0x0A
|
||||
#define USB_SET_INTERFACE 0x0B
|
||||
#define USB_SYNCH_FRAME 0x0C
|
||||
#endif
|
||||
|
||||
#define DEF_STRING_DESC_LANG 0x00
|
||||
#define DEF_STRING_DESC_MANU 0x01
|
||||
#define DEF_STRING_DESC_PROD 0x02
|
||||
#define DEF_STRING_DESC_SERN 0x03
|
||||
|
||||
/* USB hub class request code */
|
||||
#ifndef HUB_GET_DESCRIPTOR
|
||||
#define HUB_GET_STATUS 0x00
|
||||
#define HUB_CLEAR_FEATURE 0x01
|
||||
#define HUB_GET_STATE 0x02
|
||||
#define HUB_SET_FEATURE 0x03
|
||||
#define HUB_GET_DESCRIPTOR 0x06
|
||||
#define HUB_SET_DESCRIPTOR 0x07
|
||||
#endif
|
||||
|
||||
/* USB HID class request code */
|
||||
#ifndef HID_GET_REPORT
|
||||
#define HID_GET_REPORT 0x01
|
||||
#define HID_GET_IDLE 0x02
|
||||
#define HID_GET_PROTOCOL 0x03
|
||||
#define HID_SET_REPORT 0x09
|
||||
#define HID_SET_IDLE 0x0A
|
||||
#define HID_SET_PROTOCOL 0x0B
|
||||
#endif
|
||||
|
||||
/* USB CDC Class request code */
|
||||
#ifndef CDC_GET_LINE_CODING
|
||||
#define CDC_GET_LINE_CODING 0x21 /* This request allows the host to find out the currently configured line coding */
|
||||
#define CDC_SET_LINE_CODING 0x20 /* Configures DTE rate, stop-bits, parity, and number-of-character */
|
||||
#define CDC_SET_LINE_CTLSTE 0x22 /* This request generates RS-232/V.24 style control signals */
|
||||
#define CDC_SEND_BREAK 0x23 /* Sends special carrier modulation used to specify RS-232 style break */
|
||||
#endif
|
||||
|
||||
/* Bit Define for USB Request Type */
|
||||
#ifndef USB_REQ_TYP_MASK
|
||||
#define USB_REQ_TYP_IN 0x80
|
||||
#define USB_REQ_TYP_OUT 0x00
|
||||
#define USB_REQ_TYP_READ 0x80
|
||||
#define USB_REQ_TYP_WRITE 0x00
|
||||
#define USB_REQ_TYP_MASK 0x60
|
||||
#define USB_REQ_TYP_STANDARD 0x00
|
||||
#define USB_REQ_TYP_CLASS 0x20
|
||||
#define USB_REQ_TYP_VENDOR 0x40
|
||||
#define USB_REQ_TYP_RESERVED 0x60
|
||||
#define USB_REQ_RECIP_MASK 0x1F
|
||||
#define USB_REQ_RECIP_DEVICE 0x00
|
||||
#define USB_REQ_RECIP_INTERF 0x01
|
||||
#define USB_REQ_RECIP_ENDP 0x02
|
||||
#define USB_REQ_RECIP_OTHER 0x03
|
||||
#define USB_REQ_FEAT_REMOTE_WAKEUP 0x01
|
||||
#define USB_REQ_FEAT_ENDP_HALT 0x00
|
||||
#endif
|
||||
|
||||
/* USB Descriptor Type */
|
||||
#ifndef USB_DESCR_TYP_DEVICE
|
||||
#define USB_DESCR_TYP_DEVICE 0x01
|
||||
#define USB_DESCR_TYP_CONFIG 0x02
|
||||
#define USB_DESCR_TYP_STRING 0x03
|
||||
#define USB_DESCR_TYP_INTERF 0x04
|
||||
#define USB_DESCR_TYP_ENDP 0x05
|
||||
#define USB_DESCR_TYP_QUALIF 0x06
|
||||
#define USB_DESCR_TYP_SPEED 0x07
|
||||
#define USB_DESCR_TYP_OTG 0x09
|
||||
#define USB_DESCR_TYP_BOS 0X0F
|
||||
#define USB_DESCR_TYP_HID 0x21
|
||||
#define USB_DESCR_TYP_REPORT 0x22
|
||||
#define USB_DESCR_TYP_PHYSIC 0x23
|
||||
#define USB_DESCR_TYP_CS_INTF 0x24
|
||||
#define USB_DESCR_TYP_CS_ENDP 0x25
|
||||
#define USB_DESCR_TYP_HUB 0x29
|
||||
#endif
|
||||
|
||||
/* USB Device Class */
|
||||
#ifndef USB_DEV_CLASS_HUB
|
||||
#define USB_DEV_CLASS_RESERVED 0x00
|
||||
#define USB_DEV_CLASS_AUDIO 0x01
|
||||
#define USB_DEV_CLASS_COMMUNIC 0x02
|
||||
#define USB_DEV_CLASS_HID 0x03
|
||||
#define USB_DEV_CLASS_MONITOR 0x04
|
||||
#define USB_DEV_CLASS_PHYSIC_IF 0x05
|
||||
#define USB_DEV_CLASS_POWER 0x06
|
||||
#define USB_DEV_CLASS_IMAGE 0x06
|
||||
#define USB_DEV_CLASS_PRINTER 0x07
|
||||
#define USB_DEV_CLASS_STORAGE 0x08
|
||||
#define USB_DEV_CLASS_HUB 0x09
|
||||
#define USB_DEV_CLASS_VEN_SPEC 0xFF
|
||||
#endif
|
||||
|
||||
/* USB Hub Class Request */
|
||||
#ifndef HUB_GET_HUB_DESCRIPTOR
|
||||
#define HUB_CLEAR_HUB_FEATURE 0x20
|
||||
#define HUB_CLEAR_PORT_FEATURE 0x23
|
||||
#define HUB_GET_BUS_STATE 0xA3
|
||||
#define HUB_GET_HUB_DESCRIPTOR 0xA0
|
||||
#define HUB_GET_HUB_STATUS 0xA0
|
||||
#define HUB_GET_PORT_STATUS 0xA3
|
||||
#define HUB_SET_HUB_DESCRIPTOR 0x20
|
||||
#define HUB_SET_HUB_FEATURE 0x20
|
||||
#define HUB_SET_PORT_FEATURE 0x23
|
||||
#endif
|
||||
|
||||
/* Hub Class Feature Selectors */
|
||||
#ifndef HUB_PORT_RESET
|
||||
#define HUB_C_HUB_LOCAL_POWER 0
|
||||
#define HUB_C_HUB_OVER_CURRENT 1
|
||||
#define HUB_PORT_CONNECTION 0
|
||||
#define HUB_PORT_ENABLE 1
|
||||
#define HUB_PORT_SUSPEND 2
|
||||
#define HUB_PORT_OVER_CURRENT 3
|
||||
#define HUB_PORT_RESET 4
|
||||
#define HUB_PORT_POWER 8
|
||||
#define HUB_PORT_LOW_SPEED 9
|
||||
#define HUB_C_PORT_CONNECTION 16
|
||||
#define HUB_C_PORT_ENABLE 17
|
||||
#define HUB_C_PORT_SUSPEND 18
|
||||
#define HUB_C_PORT_OVER_CURRENT 19
|
||||
#define HUB_C_PORT_RESET 20
|
||||
#endif
|
||||
|
||||
/* USB UDisk */
|
||||
#ifndef USB_BO_CBW_SIZE
|
||||
#define USB_BO_CBW_SIZE 0x1F
|
||||
#define USB_BO_CSW_SIZE 0x0D
|
||||
#endif
|
||||
#ifndef USB_BO_CBW_SIG0
|
||||
#define USB_BO_CBW_SIG0 0x55
|
||||
#define USB_BO_CBW_SIG1 0x53
|
||||
#define USB_BO_CBW_SIG2 0x42
|
||||
#define USB_BO_CBW_SIG3 0x43
|
||||
#define USB_BO_CSW_SIG0 0x55
|
||||
#define USB_BO_CSW_SIG1 0x53
|
||||
#define USB_BO_CSW_SIG2 0x42
|
||||
#define USB_BO_CSW_SIG3 0x53
|
||||
#endif
|
||||
|
||||
/*******************************************************************************/
|
||||
/* USBHS Related Register Macro Definition */
|
||||
|
||||
/* USBHS Device Register Definition */
|
||||
/* Bit definition for USB_CTRL register */
|
||||
#define DEV_LPM_EN 0x80 /* LPM enable */
|
||||
#define DEV_EN 0x20 /* USB device enabled */
|
||||
#define DEV_DMA_EN 0x10 /* DMA transfer enabled */
|
||||
#define PHY_SUSPENDM 0x08 /* USB PHY suspend */
|
||||
#define USB_ALL_CLR 0x04 /* clear all interrupt flags */
|
||||
#define SIE_RESET 0x02 /* USB protocol processor reset */
|
||||
#define LINK_RESET 0x01
|
||||
|
||||
/* Bit definition for usb_BASE_MODE register */
|
||||
#define EXP_SPD_MASK 0x03 /* bit[0:1] controls the desired device speed */
|
||||
#define EXP_FS_SPD 0x00 /* Full-speed mode */
|
||||
#define EXP_HS_SPD 0x01 /* High-speed mode */
|
||||
#define EXP_LOW_SPD 0x02 /* Low-speed mode */
|
||||
|
||||
/* Bit definition for USB_INT_EN register */
|
||||
#define FIFO_OVER_IE 0x80 /* USB Overflow interrupt enable */
|
||||
#define LINK_RDY_IE 0x40 /* USB connection interrupt enable */
|
||||
#define RX_SOF_IE 0x20 /* Receive SOF packet interrupt enable */
|
||||
#define RTX_ACT_IE 0x10 /* USB transfer end interrupt enabled */
|
||||
#define LPM_ACT_IE 0x08 /* LMP transfer end interrupt enabled */
|
||||
#define BUS_SLEEP_IE 0x04 /* USB bus sleep interrupt enabled */
|
||||
#define BUS_SUSP_IE 0x02 /* USB bus pause interrupt enabled */
|
||||
#define BUS_REST_IE 0x01 /* USB bus reset interrupt enabled */
|
||||
|
||||
/* Bit definition for USB_DEV_AD register */
|
||||
#define MASK_USB_ADDR 0x7f
|
||||
|
||||
/* Bit definition for USB_WAKE_CR register */
|
||||
#define RB_RMT_WAKE 0x01 /* remote wake up */
|
||||
|
||||
/* Bit definition for USB_TEST_MODE register */
|
||||
#define RB_TEST_EN 0x80 /* test mode enable */
|
||||
#define RB_TEST_SE0NAK 0x08 /* test mode,output SEO */
|
||||
#define RB_TEST_PKT 0x04 /* test mode,output a packet */
|
||||
#define RB_TEST_K 0x02 /* test mode,output K */
|
||||
#define RB_TEST_J 0x01 /* test mode,output J */
|
||||
|
||||
/* Bit definition for USB_LPM_DATA register */
|
||||
#define LPM_BUSY 0x8000
|
||||
#define LPM_DATA 0x07ff /* read-only power management data */
|
||||
|
||||
/* Bit definition for USB_INT_FG register */
|
||||
#define FIFO_OVER_IF 0x80 /* read-write USB Overflow interrupt flag */
|
||||
#define LINK_RDY_IF 0x40 /* read-write USB connection interrupt flag */
|
||||
#define RX_SOF_IF 0x20 /* read-write Receive SOF packet interrupt flag */
|
||||
#define RTX_ACT_IF 0x10 /* read-only USB transmission end interrupt flag */
|
||||
#define LPM_ACT_IF 0x08 /* read-write LPM transmission end interrupt flag */
|
||||
#define BUS_SLEEP_IF 0x04 /* read-write USB bus sleep interrupt flag */
|
||||
#define BUS_SUSP_IF 0x02 /* read-write USB bus suspend interrupt flag */
|
||||
#define BUS_REST_IF 0x01 /* read-write USB bus reset interrupt flag */
|
||||
|
||||
/* Bit definition for USB_INT_ST register */
|
||||
#define RB_UIS_EP_DIR 0x10 /* Endpoint data transmission direction */
|
||||
#define RB_UIS_EP_ID_MASK 0x07 /* The endpoint number at which the data transfer occurs */
|
||||
|
||||
/* Bit definition for USB_MIS_ST register */
|
||||
#define RB_UMS_HS_MOD 0x80 /* whether the host is high-speed */
|
||||
#define RB_UMS_SUSP_REQ 0x10 /* USB suspends the request */
|
||||
#define RB_UMS_FREE 0x08 /* USB free status */
|
||||
#define RB_UMS_SLEEP 0x04 /* USB sleep status */
|
||||
#define RB_UMS_SUSPEND 0x02 /* USB suspend status */
|
||||
#define RB_UMS_READY 0x01 /* USB connection status */
|
||||
|
||||
/* Bit definition for USB_FRAMME_NO register */
|
||||
#define MICRO_FRAME 0xe000 /* Received micro frame number */
|
||||
#define FRAME_NO 0x07ff /* Received frame number */
|
||||
|
||||
/* Bit definition for USB_BUS register */
|
||||
#define USB_DM_ST 0x0008 /* read-only UDM status */
|
||||
#define USB_DP_ST 0x0004 /* read-only UDP status */
|
||||
#define USB_WAKEUP 0x0001 /* read-only USB wakeup */
|
||||
|
||||
/* Bit definition for DEV_UEP_TX_EN & DEV_UEP_RX_EN register */
|
||||
#define RB_EP0_EN 0x0001
|
||||
#define RB_EP1_EN 0x0002
|
||||
#define RB_EP2_EN 0x0004
|
||||
#define RB_EP3_EN 0x0008
|
||||
#define RB_EP4_EN 0x0010
|
||||
#define RB_EP5_EN 0x0020
|
||||
#define RB_EP6_EN 0x0040
|
||||
#define RB_EP7_EN 0x0080
|
||||
#define RB_EP8_EN 0x0100
|
||||
#define RB_EP9_EN 0x0200
|
||||
#define RB_EP10_EN 0x0400
|
||||
#define RB_EP11_EN 0x0800
|
||||
#define RB_EP12_EN 0x1000
|
||||
#define RB_EP13_EN 0x2000
|
||||
#define RB_EP14_EN 0x4000
|
||||
#define RB_EP15_EN 0x8000
|
||||
|
||||
/* Bit definition for DEV_UEP_T_TOG_AUTO register */
|
||||
#define EP0_T_TOG_AUTO 0x01
|
||||
#define EP1_T_TOG_AUTO 0x02
|
||||
#define EP2_T_TOG_AUTO 0x04
|
||||
#define EP3_T_TOG_AUTO 0x08
|
||||
#define EP4_T_TOG_AUTO 0x10
|
||||
#define EP5_T_TOG_AUTO 0x20
|
||||
#define EP6_T_TOG_AUTO 0x40
|
||||
#define EP7_T_TOG_AUTO 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_R_TOG_AUTO register */
|
||||
#define EP0_R_TOG_AUTO 0x01
|
||||
#define EP1_R_TOG_AUTO 0x02
|
||||
#define EP2_R_TOG_AUTO 0x04
|
||||
#define EP3_R_TOG_AUTO 0x08
|
||||
#define EP4_R_TOG_AUTO 0x10
|
||||
#define EP5_R_TOG_AUTO 0x20
|
||||
#define EP6_R_TOG_AUTO 0x40
|
||||
#define EP7_R_TOG_AUTO 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_T_BURST register */
|
||||
#define EP0_T_BURST_EN 0x01
|
||||
#define EP1_T_BURST_EN 0x02
|
||||
#define EP2_T_BURST_EN 0x04
|
||||
#define EP3_T_BURST_EN 0x08
|
||||
#define EP4_T_BURST_EN 0x10
|
||||
#define EP5_T_BURST_EN 0x20
|
||||
#define EP6_T_BURST_EN 0x40
|
||||
#define EP7_T_BURST_EN 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_T_BURST_MODE register */
|
||||
#define EP0_T_BURST_MODE 0x01
|
||||
#define EP1_T_BURST_MODE 0x02
|
||||
#define EP2_T_BURST_MODE 0x04
|
||||
#define EP3_T_BURST_MODE 0x08
|
||||
#define EP4_T_BURST_MODE 0x10
|
||||
#define EP5_T_BURST_MODE 0x20
|
||||
#define EP6_T_BURST_MODE 0x40
|
||||
#define EP7_T_BURST_MODE 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_R_BURST register */
|
||||
#define EP0_R_BURST_EN 0x01
|
||||
#define EP1_R_BURST_EN 0x02
|
||||
#define EP2_R_BURST_EN 0x04
|
||||
#define EP3_R_BURST_EN 0x08
|
||||
#define EP4_R_BURST_EN 0x10
|
||||
#define EP5_R_BURST_EN 0x20
|
||||
#define EP6_R_BURST_EN 0x40
|
||||
#define EP7_R_BURST_EN 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_R_RES_MODE register */
|
||||
#define EP0_R_RES_MODE 0x01
|
||||
#define EP1_R_RES_MODE 0x02
|
||||
#define EP2_R_RES_MODE 0x04
|
||||
#define EP3_R_RES_MODE 0x08
|
||||
#define EP4_R_RES_MODE 0x10
|
||||
#define EP5_R_RES_MODE 0x20
|
||||
#define EP6_R_RES_MODE 0x40
|
||||
#define EP7_R_RES_MODE 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_AF_MODE register */
|
||||
#define EP1_T_AF 0x02
|
||||
#define EP2_T_AF 0x04
|
||||
#define EP3_T_AF 0x08
|
||||
#define EP4_T_AF 0x10
|
||||
#define EP5_T_AF 0x20
|
||||
#define EP6_T_AF 0x40
|
||||
#define EP7_T_AF 0x80
|
||||
|
||||
/* Bit definition for UEPx_TX_CTRL register */
|
||||
#define USBHS_UEP_T_RES_MASK 0x03 /* Response control mask for endpoint 0 transmission */
|
||||
#define USBHS_UEP_T_RES_NAK 0x00 /* UEP0_TX_CTRL[0:1] = 00, reply NAK to host */
|
||||
#define USBHS_UEP_T_RES_STALL 0x01 /* UEP0_TX_CTRL[0:1] = 01, reply STALL to host */
|
||||
#define USBHS_UEP_T_RES_ACK 0x02 /* UEP0_TX_CTRL[0:1] = 10, reply ACK to host */
|
||||
#define USBHS_UEP_T_RES_NYET 0x03 /* UEP0_TX_CTRL[0:1] = 11, reply NYET to host */
|
||||
#define USBHS_UEP_T_TOG_MASK 0x0C /* Synchronization trigger bit mask */
|
||||
#define USBHS_UEP_T_TOG_DATA0 0x00 /* UEP0_TX_CTRL[2:3] = 00, represents DATA0 */
|
||||
#define USBHS_UEP_T_TOG_DATA1 0x04 /* UEP0_TX_CTRL[2:3] = 01, represents DATA1 */
|
||||
#define USBHS_UEP_T_TOG_DATA2 0x08 /* UEP0_TX_CTRL[2:3] = 10, represents DATA2 */
|
||||
#define USBHS_UEP_T_TOG_MDATA 0x0C /* UEP0_TX_CTRL[2:3] = 11, represents MDATA */
|
||||
#define USBHS_UEP_ENDP_T_DONE 0x80 /* Writing 0 clears the interrupt */
|
||||
|
||||
/* Bit definition for UEPx_RX_CTRL register */
|
||||
#define USBHS_UEP_R_RES_MASK 0x03 /* Response control mask for endpoint 0 transmission */
|
||||
#define USBHS_UEP_R_RES_NAK 0x00 /* UEP0_TX_CTRL[0:1] = 00, reply NAK to host */
|
||||
#define USBHS_UEP_R_RES_STALL 0x01 /* UEP0_TX_CTRL[0:1] = 01, reply STALL to host */
|
||||
#define USBHS_UEP_R_RES_ACK 0x02 /* UEP0_TX_CTRL[0:1] = 10, reply ACK to host */
|
||||
#define USBHS_UEP_R_RES_NYET 0x03 /* UEP0_TX_CTRL[0:1] = 11, reply NYET to host */
|
||||
#define USBHS_UEP_R_TOG_MASK 0x0C /* Synchronization trigger bit mask */
|
||||
#define USBHS_UEP_R_TOG_DATA0 0x00 /* UEP0_TX_CTRL[2:3] = 00, represents DATA0 */
|
||||
#define USBHS_UEP_R_TOG_DATA1 0x04 /* UEP0_TX_CTRL[2:3] = 01, represents DATA1 */
|
||||
#define USBHS_UEP_R_TOG_DATA2 0x08 /* UEP0_TX_CTRL[2:3] = 10, represents DATA2 */
|
||||
#define USBHS_UEP_R_TOG_MDATA 0x0C /* UEP0_TX_CTRL[2:3] = 11, represents MDATA */
|
||||
#define USBHS_UEP_ENDP_T_DONE 0x80 /* Writing 0 clears the interrupt */
|
||||
#define USBHS_UEP_ENDP_R_DONE 0x80 /* Writing 0 clears the interrupt */
|
||||
#define USBHS_RB_SETUP_IS 0x08 /* Indicates whether the reception of endpoint 0 is a Setup transaction */
|
||||
#define USBHS_ENDP_R_TOG_MATCH 0x10
|
||||
|
||||
/* Bit definition for DEV_UEP_T_ISO register */
|
||||
#define EP1_T_ISO 0x02
|
||||
#define EP2_T_ISO 0x04
|
||||
#define EP3_T_ISO 0x08
|
||||
#define EP4_T_ISO 0x10
|
||||
#define EP5_T_ISO 0x20
|
||||
#define EP6_T_ISO 0x40
|
||||
#define EP7_T_ISO 0x80
|
||||
|
||||
/* Bit definition for DEV_UEP_R_ISO register */
|
||||
#define EP1_R_ISO 0x02
|
||||
#define EP2_R_ISO 0x04
|
||||
#define EP3_R_ISO 0x08
|
||||
#define EP4_R_ISO 0x10
|
||||
#define EP5_R_ISO 0x20
|
||||
#define EP6_R_ISO 0x40
|
||||
#define EP7_R_ISO 0x80
|
||||
|
||||
/* USBHS Host Register Definition */
|
||||
/* Bit definition for UHOST_CTRL register */
|
||||
#define root_LPM_EN (1<<7)
|
||||
#define ROOT_FORCE_FS (1<<6)
|
||||
#define ROOT_SOF_EN (1<<5)
|
||||
#define ROOT_DMA_EN (1<<4)
|
||||
#define ROOT_PHY_SUSPENDM (1<<3)
|
||||
#define ROOT_ALL_CLR (1<<2)
|
||||
#define ROOT_SIE_RESET (1<<1)
|
||||
#define ROOT_LINK_RESET (1<<0)
|
||||
|
||||
/* Bit definition for UH_INT_EN register */
|
||||
#define FIFO_OV_IE (1<<7)
|
||||
#define TX_HALT_IE (1<<6)
|
||||
#define SOF_ACT_IE (1<<5)
|
||||
#define USB_ACT_IE (1<<4)
|
||||
#define RESUME_ACT_IE (1<<3)
|
||||
#define WKUP_ACT_IE (1<<2)
|
||||
|
||||
/* Bit definition for UH_CONTROL register */
|
||||
#define RX_NO_RES (1<<23)
|
||||
#define TX_NO_RES (1<<22)
|
||||
#define RX_NO_DATA (1<<21)
|
||||
#define TX_NO_DATA (1<<20)
|
||||
#define TX_LOW_SPD (1<<19)
|
||||
#define SPLIT_VALID (1<<18)
|
||||
#define LPM_VALID (1<<17)
|
||||
#define HOST_ACTION (1<<16)
|
||||
#define BUF_MODE (1<<10)
|
||||
#define TOG_MASK (3<<8)
|
||||
#define TOG_MDATA (3<<8)
|
||||
#define TOG_DATA2 (2<<8)
|
||||
#define TOG_DATA1 (1<<8)
|
||||
#define TOG_DATA0 (0<<8)
|
||||
|
||||
/* Bit definition for UH_INT_FLAG register */
|
||||
#define RB_FIFO_OV_IF (1<<7)
|
||||
#define RB_TX_HALT_IF (1<<6)
|
||||
#define RB_SOF_ACT_IF (1<<5)
|
||||
#define RB_USB_ACT_IF (1<<4)
|
||||
#define RB_RESUME_ACT_IF (1<<3)
|
||||
#define RB_WKUP_IF (1<<2)
|
||||
|
||||
/* Bit definition for UH_INT_ST register */
|
||||
#define PORT_RX_RESUME (1<<4)
|
||||
#define USB_PID_MASK 0x0f
|
||||
#define USB_PID_TOUT 0x0
|
||||
#define USB_PID_ACK 0x2
|
||||
#define USB_PID_NAK 0xa
|
||||
#define USB_PID_STALL 0xe
|
||||
#define USB_PID_NYET 0x6
|
||||
#define USB_PID_DATA0 0x3
|
||||
#define USB_PID_DATA1 0xb
|
||||
#define USB_PID_DATA2 0x7
|
||||
#define USB_PID_MDATA 0xf
|
||||
|
||||
#define USB_PID_PRE 0xc
|
||||
#define USB_PID_ERR 0xc
|
||||
#define USB_PID_SPLIT 0x8
|
||||
#define USB_PID_PING 0x4
|
||||
#define USB_PID_SOF 0x5
|
||||
#define USB_PID_SETUP 0xd
|
||||
#define USB_PID_IN 0x9
|
||||
#define USB_PID_OUT 0x1
|
||||
|
||||
/* Bit definition for UH_MIS_ST register */
|
||||
#define RB_BUS_SE0 (1<<7)
|
||||
#define RB_BUS_J (1<<6)
|
||||
#define RB_LINESTATE_MASK (0x3<<4)
|
||||
#define RB_USB_WAKEUP (1<<3)
|
||||
#define RB_SOF_ST (1<<2)
|
||||
#define RB_SOF_PRE (1<<1)
|
||||
#define RB_SOF_FREE (1<<0)
|
||||
|
||||
/* Bit definition for UH_FRAME register */
|
||||
#define SOF_CNT_CLR (1<<25)
|
||||
#define SOF_CNT_EN (1<<24)
|
||||
|
||||
/* Bit definition for PORT_CTRL register */
|
||||
#define BUS_RST_LONG (1<<16)
|
||||
#define PORT_SLEEP_BESL (0xf<<12)
|
||||
#define CLR_PORT_SLEEP (1<<8)
|
||||
#define CLR_PORT_CONNECT (1<<5)
|
||||
#define CLR_PORT_EN (1<<4)
|
||||
#define SET_PORT_SLEEP (1<<3)
|
||||
#define CLR_PORT_SUSP (1<<2)
|
||||
#define SET_PORT_SUSP (1<<1)
|
||||
#define SET_PORT_RESET (1<<0)
|
||||
|
||||
/* Bit definition for PORT_CFG register */
|
||||
#define PORT_15K_RPD (1<<7)
|
||||
#define PORT_HOST_MODE (1<<0)//1: HOST function
|
||||
#define PORT_DEVICE_MODE (0<<0)//0: DEVICE function
|
||||
|
||||
/* Bit definition for PORT_INT_EN register */
|
||||
#define PORT_SLP_IE (1<<5)
|
||||
#define PORT_RESET_IE (1<<4)
|
||||
#define PORT_SUSP_IE (1<<2)
|
||||
#define PORT_EN_IE (1<<1)
|
||||
#define PORT_CONNECT_IE (1<<0)
|
||||
|
||||
/* Bit definition for PORT_TEST_CT register */
|
||||
#define TEST_FORCE_EN (1<<2)
|
||||
#define TEST_K (1<<1)
|
||||
#define TEST_J (1<<0)
|
||||
|
||||
/* Bit definition for PORT_STATUS register */
|
||||
#define PORT_TEST (1<<11)
|
||||
#define PORT_SPD_MASK (3<<9)
|
||||
#define PORT_HIGH_SPD (1<<10)
|
||||
#define PORT_LOW_SPD (1<<9)
|
||||
#define PORT_FULL_SPD (0<<9)
|
||||
#define PORT_SLP (1<<5)
|
||||
#define PORT_RESETTING (1<<4)
|
||||
#define PORT_OVC (1<<3)
|
||||
#define PORT_SUSP (1<<2)
|
||||
#define PORT_EN (1<<1)
|
||||
#define PORT_CONNECT (1<<0)
|
||||
|
||||
/* Bit definition for PORT_STATUS_CHG register */
|
||||
#define PORT_SLP_IF (1<<5)
|
||||
#define PORT_RESET_IF (1<<4)
|
||||
#define PORT_SUSP_IF (1<<2)
|
||||
#define PORT_EN_IF (1<<1)
|
||||
#define PORT_CONNECT_IF (1<<0)
|
||||
|
||||
/* Bit definition for ROOT_BC_CR register */
|
||||
#define UDM_VSRC_ACT (1<<10)
|
||||
#define UDM_BC_CMPE (1<<9)
|
||||
#define UDP_BC_CMPE (1<<8)
|
||||
#define BC_AUTO_MODE (1<<6)
|
||||
#define UDM_BC_VSRC (1<<5)
|
||||
#define UDP_BC_VSRC (1<<4)
|
||||
#define UDM_BC_CMPO (1<<1)
|
||||
#define UDP_BC_CMPO (1<<0)
|
||||
|
||||
/* Bit definition for HSI_CAL_CR register */
|
||||
#define CLK_SEL (1<<21)
|
||||
#define SOF_FREE (1<<3)
|
||||
#define SFT_RST (1<<2)
|
||||
#define CAL_EN (1<<1)
|
||||
#define CAL_RST (1<<0)
|
||||
|
||||
/*******************************************************************************/
|
||||
/* Struct Definition */
|
||||
|
||||
/* USB Setup Request */
|
||||
typedef struct __attribute__((packed)) _USB_SETUP_REQ
|
||||
{
|
||||
uint8_t bRequestType;
|
||||
uint8_t bRequest;
|
||||
uint16_t wValue;
|
||||
uint16_t wIndex;
|
||||
uint16_t wLength;
|
||||
} USB_SETUP_REQ, *PUSB_SETUP_REQ;
|
||||
|
||||
/* USB Device Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_DEVICE_DESCR
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint16_t idVendor;
|
||||
uint16_t idProduct;
|
||||
uint16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
} USB_DEV_DESCR, *PUSB_DEV_DESCR;
|
||||
|
||||
/* USB Configuration Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_CONFIG_DESCR
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t MaxPower;
|
||||
} USB_CFG_DESCR, *PUSB_CFG_DESCR;
|
||||
|
||||
/* USB Interface Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_INTERF_DESCR
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
} USB_ITF_DESCR, *PUSB_ITF_DESCR;
|
||||
|
||||
/* USB Endpoint Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_ENDPOINT_DESCR
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t wMaxPacketSizeL;
|
||||
uint8_t wMaxPacketSizeH;
|
||||
uint8_t bInterval;
|
||||
} USB_ENDP_DESCR, *PUSB_ENDP_DESCR;
|
||||
|
||||
/* USB Configuration Descriptor Set */
|
||||
typedef struct __attribute__((packed)) _USB_CONFIG_DESCR_LONG
|
||||
{
|
||||
USB_CFG_DESCR cfg_descr;
|
||||
USB_ITF_DESCR itf_descr;
|
||||
USB_ENDP_DESCR endp_descr[ 1 ];
|
||||
} USB_CFG_DESCR_LONG, *PUSB_CFG_DESCR_LONG;
|
||||
|
||||
/* USB HUB Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_HUB_DESCR
|
||||
{
|
||||
uint8_t bDescLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bNbrPorts;
|
||||
uint8_t wHubCharacteristicsL;
|
||||
uint8_t wHubCharacteristicsH;
|
||||
uint8_t bPwrOn2PwrGood;
|
||||
uint8_t bHubContrCurrent;
|
||||
uint8_t DeviceRemovable;
|
||||
uint8_t PortPwrCtrlMask;
|
||||
} USB_HUB_DESCR, *PUSB_HUB_DESCR;
|
||||
|
||||
/* USB HID Descriptor */
|
||||
typedef struct __attribute__((packed)) _USB_HID_DESCR
|
||||
{
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint16_t bcdHID;
|
||||
uint8_t bCountryCode;
|
||||
uint8_t bNumDescriptors;
|
||||
uint8_t bDescriptorTypeX;
|
||||
uint8_t wDescriptorLengthL;
|
||||
uint8_t wDescriptorLengthH;
|
||||
} USB_HID_DESCR, *PUSB_HID_DESCR;
|
||||
|
||||
/* USB UDisk */
|
||||
typedef struct __attribute__((packed)) _UDISK_BOC_CBW
|
||||
{
|
||||
uint32_t mCBW_Sig;
|
||||
uint32_t mCBW_Tag;
|
||||
uint32_t mCBW_DataLen;
|
||||
uint8_t mCBW_Flag;
|
||||
uint8_t mCBW_LUN;
|
||||
uint8_t mCBW_CB_Len;
|
||||
uint8_t mCBW_CB_Buf[ 16 ];
|
||||
} UDISK_BOC_CBW, *PXUDISK_BOC_CBW;
|
||||
|
||||
/* USB UDisk */
|
||||
typedef struct __attribute__((packed)) _UDISK_BOC_CSW
|
||||
{
|
||||
uint32_t mCBW_Sig;
|
||||
uint32_t mCBW_Tag;
|
||||
uint32_t mCSW_Residue;
|
||||
uint8_t mCSW_Status;
|
||||
} UDISK_BOC_CSW, *PXUDISK_BOC_CSW;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
321
Peripheral/inc/ch564_usbpd.h
Normal file
321
Peripheral/inc/ch564_usbpd.h
Normal file
@@ -0,0 +1,321 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_usbpd.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* USBPD firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_USBPD_H
|
||||
#define __CH564_USBPD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
/* Register Bit Definition */
|
||||
/* USBPD->CONFIG */
|
||||
#define PD_FILT_ED (1<<0) /* PD pin input filter enable */
|
||||
#define PD_ALL_CLR (1<<1) /* Clear all interrupt flags */
|
||||
#define CC_SEL (1<<2) /* Select PD communication port */
|
||||
#define PD_DMA_EN (1<<3) /* Enable DMA for USBPD */
|
||||
#define PD_RST_EN (1<<4) /* PD mode reset command enable */
|
||||
#define WAKE_POLAR (1<<5) /* PD port wake-up level */
|
||||
#define IE_PD_IO (1<<10) /* PD IO interrupt enable */
|
||||
#define IE_RX_BIT (1<<11) /* Receive bit interrupt enable */
|
||||
#define IE_RX_BYTE (1<<12) /* Receive byte interrupt enable */
|
||||
#define IE_RX_ACT (1<<13) /* Receive completion interrupt enable */
|
||||
#define IE_RX_RESET (1<<14) /* Reset interrupt enable */
|
||||
#define IE_TX_END (1<<15) /* Transfer completion interrupt enable */
|
||||
|
||||
/* USBPD->CONTROL */
|
||||
#define PD_TX_EN (1<<0) /* USBPD transceiver mode and transmit enable */
|
||||
#define BMC_START (1<<1) /* BMC send start signal */
|
||||
#define RX_STATE_0 (1<<2) /* PD received state bit 0 */
|
||||
#define RX_STATE_1 (1<<3) /* PD received state bit 1 */
|
||||
#define RX_STATE_2 (1<<4) /* PD received state bit 2 */
|
||||
#define DATA_FLAG (1<<5) /* Cache data valid flag bit */
|
||||
#define TX_BIT_BACK (1<<6) /* Indicates the current bit status of the BMC when sending the code */
|
||||
#define BMC_BYTE_HI (1<<7) /* Indicates the current half-byte status of the PD data being sent and received */
|
||||
|
||||
/* USBPD->TX_SEL */
|
||||
#define TX_SEL1 (0<<0)
|
||||
#define TX_SEL1_SYNC1 (0<<0) /* 0-SYNC1 */
|
||||
#define TX_SEL1_RST1 (1<<0) /* 1-RST1 */
|
||||
#define TX_SEL2_Mask (3<<2)
|
||||
#define TX_SEL2_SYNC1 (0<<2) /* 00-SYNC1 */
|
||||
#define TX_SEL2_SYNC3 (1<<2) /* 01-SYNC3 */
|
||||
#define TX_SEL2_RST1 (2<<2) /* 1x-RST1 */
|
||||
#define TX_SEL3_Mask (3<<4)
|
||||
#define TX_SEL3_SYNC1 (0<<4) /* 00-SYNC1 */
|
||||
#define TX_SEL3_SYNC3 (1<<4) /* 01-SYNC3 */
|
||||
#define TX_SEL3_RST1 (2<<4) /* 1x-RST1 */
|
||||
#define TX_SEL4_Mask (3<<6)
|
||||
#define TX_SEL4_SYNC2 (0<<6) /* 00-SYNC2 */
|
||||
#define TX_SEL4_SYNC3 (1<<6) /* 01-SYNC3 */
|
||||
#define TX_SEL4_RST2 (2<<6) /* 1x-RST2 */
|
||||
|
||||
/* USBPD->STATUS */
|
||||
#define BMC_AUX_Mask (3<<0) /* Clear BMC auxiliary information */
|
||||
#define BMC_AUX_INVALID (0<<0) /* 00-Invalid */
|
||||
#define BMC_AUX_SOP0 (1<<0) /* 01-SOP0 */
|
||||
#define BMC_AUX_SOP1_HRST (2<<0) /* 10-SOP1 hard reset */
|
||||
#define BMC_AUX_SOP2_CRST (3<<0) /* 11-SOP2 cable reset */
|
||||
#define BUF_ERR (1<<2) /* BUFFER or DMA error interrupt flag */
|
||||
#define IF_RX_BIT (1<<3) /* Receive bit or 5bit interrupt flag */
|
||||
#define IF_RX_BYTE (1<<4) /* Receive byte or SOP interrupt flag */
|
||||
#define IF_RX_ACT (1<<5) /* Receive completion interrupt flag */
|
||||
#define IF_RX_RESET (1<<6) /* Receive reset interrupt flag */
|
||||
#define IF_TX_END (1<<7) /* Transfer completion interrupt flag */
|
||||
|
||||
/* USBPD->PORT_CC1 */
|
||||
/* USBPD->PORT_CC2 */
|
||||
#define PA_CC_AI (1<<0) /* CC port comparator analogue input */
|
||||
#define CC_PD (1<<1) /* CC port pull-down resistor enable */
|
||||
#define CC_PU_Mask (3<<2) /* Clear CC port pull-up current */
|
||||
#define CC_NO_PU (0<<2) /* 00-Prohibit pull-up current */
|
||||
#define CC_PU_330 (1<<2) /* 01-330uA */
|
||||
#define CC_PU_180 (2<<2) /* 10-180uA */
|
||||
#define CC_PU_80 (3<<2) /* 11-80uA */
|
||||
#define CC_LVE (1<<4) /* CC port output low voltage enable */
|
||||
#define CC_CMP_Mask (7<<5) /* Clear CC_CMP*/
|
||||
#define CC_NO_CMP (0<<5) /* 000-closed */
|
||||
#define CC_CMP_22 (2<<5) /* 010-0.22V */
|
||||
#define CC_CMP_45 (3<<5) /* 011-0.45V */
|
||||
#define CC_CMP_55 (4<<5) /* 100-0.55V */
|
||||
#define CC_CMP_66 (5<<5) /* 101-0.66V */
|
||||
#define CC_CMP_95 (6<<5) /* 110-0.95V */
|
||||
#define CC_CMP_123 (7<<5) /* 111-1.23V */
|
||||
|
||||
/*********************************************************
|
||||
* PD pin PC14/PC15 high threshold input mode:
|
||||
* 1-High threshold input (2.2V typical), to reduce the I/O power consumption during PD communication
|
||||
* 0-Normal GPIO threshold input
|
||||
* *******************************************************/
|
||||
#define USBPD_PHY_V33 (1<<8)
|
||||
/**********************************************************
|
||||
* PD transceiver PHY pull-up limit configuration bits:
|
||||
* 1-Direct use of VDD for GPIO applications or PD applications with VDD voltage of 3.3V
|
||||
* 0-LDO buck enabled, limited to approx 3.3V, for PD applications with VDD more than 4V
|
||||
* ********************************************************/
|
||||
|
||||
/* Control Message Types */
|
||||
#define DEF_TYPE_RESERVED 0x00
|
||||
#define DEF_TYPE_GOODCRC 0x01 /* Send By: Source,Sink,Cable Plug */
|
||||
#define DEF_TYPE_GOTOMIN 0x02 /* Send By: Source */
|
||||
#define DEF_TYPE_ACCEPT 0x03 /* Send By: Source,Sink,Cable Plug */
|
||||
#define DEF_TYPE_REJECT 0x04 /* Send By: Source,Sink,Cable Plug */
|
||||
#define DEF_TYPE_PING 0x05 /* Send By: Source */
|
||||
#define DEF_TYPE_PS_RDY 0x06 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_GET_SRC_CAP 0x07 /* Send By: Sink,DRP */
|
||||
#define DEF_TYPE_GET_SNK_CAP 0x08 /* Send By: Source,DRP */
|
||||
#define DEF_TYPE_DR_SWAP 0x09 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_PR_SWAP 0x0A /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_VCONN_SWAP 0x0B /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_WAIT 0x0C /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_SOFT_RESET 0x0D /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_DATA_RESET 0x0E /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_DATA_RESET_CMP 0x0F /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_NOT_SUPPORT 0x10 /* Send By: Source,Sink,Cable Plug */
|
||||
#define DEF_TYPE_GET_SRC_CAP_EX 0x11 /* Send By: Sink,DRP */
|
||||
#define DEF_TYPE_GET_STATUS 0x12 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_GET_STATUS_R 0X02 /* ext=1 */
|
||||
#define DEF_TYPE_FR_SWAP 0x13 /* Send By: Sink */
|
||||
#define DEF_TYPE_GET_PPS_STATUS 0x14 /* Send By: Sink */
|
||||
#define DEF_TYPE_GET_CTY_CODES 0x15 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_GET_SNK_CAP_EX 0x16 /* Send By: Source,DRP */
|
||||
#define DEF_TYPE_GET_SRC_INFO 0x17 /* Send By: Sink,DRP */
|
||||
#define DEF_TYPE_GET_REVISION 0x18 /* Send By: Source,Sink */
|
||||
|
||||
/* Data Message Types */
|
||||
#define DEF_TYPE_SRC_CAP 0x01 /* Send By: Source,Dual-Role Power */
|
||||
#define DEF_TYPE_REQUEST 0x02 /* Send By: Sink */
|
||||
#define DEF_TYPE_BIST 0x03 /* Send By: Tester,Source,Sink */
|
||||
#define DEF_TYPE_SNK_CAP 0x04 /* Send By: Sink,Dual-Role Power */
|
||||
#define DEF_TYPE_BAT_STATUS 0x05 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_ALERT 0x06 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_GET_CTY_INFO 0x07 /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_ENTER_USB 0x08 /* Send By: DFP */
|
||||
#define DEF_TYPE_EPR_REQUEST 0x09 /* Send By: Sink */
|
||||
#define DEF_TYPE_EPR_MODE 0x0A /* Send By: Source,Sink */
|
||||
#define DEF_TYPE_SRC_INFO 0x0B /* Send By: Source */
|
||||
#define DEF_TYPE_REVISION 0x0C /* Send By: Source,Sink,Cable Plug */
|
||||
#define DEF_TYPE_VENDOR_DEFINED 0x0F /* Send By: Source,Sink,Cable Plug */
|
||||
|
||||
/* Vendor Define Message Command */
|
||||
#define DEF_VDM_DISC_IDENT 0x01
|
||||
#define DEF_VDM_DISC_SVID 0x02
|
||||
#define DEF_VDM_DISC_MODE 0x03
|
||||
#define DEF_VDM_ENTER_MODE 0x04
|
||||
#define DEF_VDM_EXIT_MODE 0x05
|
||||
#define DEF_VDM_ATTENTION 0x06
|
||||
#define DEF_VDM_DP_S_UPDATE 0x10
|
||||
#define DEF_VDM_DP_CONFIG 0x11
|
||||
|
||||
/* PD Revision */
|
||||
#define DEF_PD_REVISION_10 0x00
|
||||
#define DEF_PD_REVISION_20 0x01
|
||||
#define DEF_PD_REVISION_30 0x02
|
||||
|
||||
|
||||
/* PD PHY Channel */
|
||||
#define DEF_PD_CC1 0x00
|
||||
#define DEF_PD_CC2 0x01
|
||||
|
||||
#define PIN_CC1 GPIO_Pin_18
|
||||
#define PIN_CC2 GPIO_Pin_19
|
||||
|
||||
/* PD Tx Status */
|
||||
#define DEF_PD_TX_OK 0x00
|
||||
#define DEF_PD_TX_FAIL 0x01
|
||||
|
||||
/* PDO INDEX */
|
||||
#define PDO_INDEX_1 1
|
||||
#define PDO_INDEX_2 2
|
||||
#define PDO_INDEX_3 3
|
||||
#define PDO_INDEX_4 4
|
||||
#define PDO_INDEX_5 5
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
#define UPD_TMR_TX_48M (80-1) /* timer value for USB PD BMC transmittal @Fsys=48MHz */
|
||||
#define UPD_TMR_RX_48M (120-1) /* timer value for USB PD BMC receiving @Fsys=48MHz */
|
||||
#define UPD_TMR_TX_24M (40-1) /* timer value for USB PD BMC transmittal @Fsys=24MHz */
|
||||
#define UPD_TMR_RX_24M (60-1) /* timer value for USB PD BMC receiving @Fsys=24MHz */
|
||||
#define UPD_TMR_TX_12M (20-1) /* timer value for USB PD BMC transmittal @Fsys=12MHz */
|
||||
#define UPD_TMR_RX_12M (30-1) /* timer value for USB PD BMC receiving @Fsys=12MHz */
|
||||
|
||||
#define MASK_PD_STAT 0x03 /* Bit mask for current PD status */
|
||||
#define PD_RX_SOP0 0x01 /* SOP0 received */
|
||||
#define PD_RX_SOP1_HRST 0x02 /* SOP1 or Hard Reset received */
|
||||
#define PD_RX_SOP2_CRST 0x03 /* SOP2 or Cable Reset received */
|
||||
|
||||
#define UPD_SOP0 ( TX_SEL1_SYNC1 | TX_SEL2_SYNC1 | TX_SEL3_SYNC1 | TX_SEL4_SYNC2 ) /* SOP1 */
|
||||
#define UPD_SOP1 ( TX_SEL1_SYNC1 | TX_SEL2_SYNC1 | TX_SEL3_SYNC3 | TX_SEL4_SYNC3 ) /* SOP2 */
|
||||
#define UPD_SOP2 ( TX_SEL1_SYNC1 | TX_SEL2_SYNC3 | TX_SEL3_SYNC1 | TX_SEL4_SYNC3 ) /* SOP3 */
|
||||
#define UPD_HARD_RESET ( TX_SEL1_RST1 | TX_SEL2_RST1 | TX_SEL3_RST1 | TX_SEL4_RST2 ) /* Hard Reset*/
|
||||
#define UPD_CABLE_RESET ( TX_SEL1_RST1 | TX_SEL2_SYNC1 | TX_SEL3_RST1 | TX_SEL4_SYNC3 ) /* Cable Reset*/
|
||||
|
||||
|
||||
#define bCC_CMP_22 0X01
|
||||
#define bCC_CMP_45 0X02
|
||||
#define bCC_CMP_55 0X04
|
||||
#define bCC_CMP_66 0X08
|
||||
#define bCC_CMP_95 0X10
|
||||
#define bCC_CMP_123 0X20
|
||||
#define bCC_CMP_220 0X40
|
||||
|
||||
/******************************************************************************/
|
||||
/* PD State Machine */
|
||||
typedef enum
|
||||
{
|
||||
STA_IDLE = 0, /* 0: No task status */
|
||||
STA_DISCONNECT, /* 1: Disconnection */
|
||||
STA_SRC_CONNECT, /* 2: SRC connect */
|
||||
STA_RX_SRC_CAP_WAIT, /* 3: Waiting to receive SRC_CAP */
|
||||
STA_RX_SRC_CAP, /* 4: SRC_CAP received */
|
||||
STA_TX_REQ, /* 5: Send REQUEST */
|
||||
STA_RX_ACCEPT_WAIT, /* 6: Waiting to receive ACCEPT */
|
||||
STA_RX_ACCEPT, /* 7: ACCEPT received */
|
||||
STA_RX_REJECT, /* 8: REJECT received */
|
||||
STA_RX_PS_RDY_WAIT, /* 9: Waiting to receive PS_RDY */
|
||||
STA_RX_PS_RDY, /* 10: PS_RDY received */
|
||||
STA_SINK_CONNECT, /* 11: SNK access */
|
||||
STA_TX_SRC_CAP, /* 12: Send SRC_CAP */
|
||||
STA_RX_REQ_WAIT, /* 13: Waiting to receive REQUEST */
|
||||
STA_RX_REQ, /* 14: REQUEST received */
|
||||
STA_TX_ACCEPT, /* 15: Send ACCEPT */
|
||||
STA_TX_REJECT, /* 16: Send REJECT */
|
||||
STA_ADJ_VOL, /* 17: Adjustment of output voltage and current */
|
||||
STA_TX_PS_RDY, /* 18: Send PS_RDY */
|
||||
STA_TX_DR_SWAP, /* 19: Send DR_SWAP */
|
||||
STA_RX_DR_SWAP_ACCEPT, /* 20: Waiting to receive the answer ACCEPT from DR_SWAP */
|
||||
STA_TX_PR_SWAP, /* 21: Send PR_SWAP */
|
||||
STA_RX_PR_SWAP_ACCEPT, /* 22: Waiting to receive the answer ACCEPT from PR_SWAP */
|
||||
STA_RX_PR_SWAP_PS_RDY, /* 23: Waiting to receive the answer PS_RDY from PR_SWAP */
|
||||
STA_TX_PR_SWAP_PS_RDY, /* 24: Send answer PS_RDY for PR_SWAP */
|
||||
STA_PR_SWAP_RECON_WAIT, /* 25: Wait for PR_SWAP before reconnecting */
|
||||
STA_SRC_RECON_WAIT, /* 26: Waiting for SRC to reconnect */
|
||||
STA_SINK_RECON_WAIT, /* 27: Waiting for SNK to reconnect */
|
||||
STA_RX_APD_PS_RDY_WAIT, /* 28: Waiting for PS_RDY from the receiving adapter */
|
||||
STA_RX_APD_PS_RDY, /* 29: PS_RDY received from the adapter */
|
||||
STA_MODE_SWITCH, /* 30: Mode switching */
|
||||
STA_TX_SOFTRST, /* 31: Sending a software reset */
|
||||
STA_TX_HRST, /* 32: Send hardware reset */
|
||||
STA_PHY_RST, /* 33: PHY reset */
|
||||
STA_APD_IDLE_WAIT, /* 34: Waiting for the adapter to become idle */
|
||||
} CC_STATUS;
|
||||
|
||||
/******************************************************************************/
|
||||
/* PD Message Header Struct */
|
||||
typedef union
|
||||
{
|
||||
struct _Message_Header
|
||||
{
|
||||
UINT8 MsgType: 5; /* Message Type */
|
||||
UINT8 PDRole: 1; /* 0-UFP; 1-DFP */
|
||||
UINT8 SpecRev: 2; /* 00-Rev1.0; 01-Rev2.0; 10-Rev3.0; */
|
||||
UINT8 PRRole: 1; /* 0-Sink; 1-Source */
|
||||
UINT8 MsgID: 3;
|
||||
UINT8 NumDO: 3;
|
||||
UINT8 Ext: 1;
|
||||
}Message_Header;
|
||||
UINT16 Data;
|
||||
}_Message_Header;
|
||||
|
||||
/******************************************************************************/
|
||||
/* Bit definition */
|
||||
typedef union
|
||||
{
|
||||
struct _BITS_
|
||||
{
|
||||
UINT8 Msg_Recvd: 1; /* Notify the main program of the receipt of a PD packet */
|
||||
UINT8 Connected: 1; /* PD Physical Layer Connected Flag */
|
||||
UINT8 Stop_Det_Chk: 1; /* 0-Enable detection; 1-Disable disconnection detection */
|
||||
UINT8 PD_Role: 1; /* 0-UFP; 1-DFP */
|
||||
UINT8 PR_Role: 1; /* 0-Sink; 1-Source */
|
||||
UINT8 Auto_Ack_PRRole: 1; /* Role used by auto-responder 0:SINK; 1:SOURCE */
|
||||
UINT8 PD_Version: 1; /* PD version 0-PD2.0; 1-PD3.0 */
|
||||
UINT8 VDM_Version: 1; /* VDM Version 0-1.0 1-2.0 */
|
||||
UINT8 HPD_Connected: 1; /* HPD Physical Layer Connected Flag */
|
||||
UINT8 HPD_Det_Chk: 1; /* 0-turn off HPD connection detection; 1-turn on HPD connection detection */
|
||||
UINT8 CC_Sel_En: 1; /* 0-CC channel selection toggle enable; 1-CC channel selection toggle disable */
|
||||
UINT8 CC_Sel_State: 1; /* 0-CC channel selection switches to 0; 1-CC channel selection switches to 1 */
|
||||
UINT8 PD_Comm_Succ: 1; /* 0-PD communication unsuccessful; 1-PD communication successful; */
|
||||
UINT8 Recv: 3;
|
||||
}Bit;
|
||||
UINT16 Bit_Flag;
|
||||
}_BIT_FLAG;
|
||||
|
||||
/* PD control-related structures */
|
||||
typedef struct _PD_CONTROL
|
||||
{
|
||||
CC_STATUS PD_State; /* PD communication status machine */
|
||||
CC_STATUS PD_State_Last; /* PD communication status machine (last value) */
|
||||
UINT8 Msg_ID; /* ID of the message sent */
|
||||
UINT8 Det_Timer; /* PD connection status detection timing */
|
||||
UINT8 Det_Cnt; /* Number of PD connection status detections */
|
||||
UINT8 Det_Sel_Cnt; /* Number of SEL toggles for PD connection status detection */
|
||||
UINT8 HPD_Det_Timer; /* HPD connection detection timing */
|
||||
UINT8 HPD_Det_Cnt; /* HPD pin connection status detection count */
|
||||
UINT16 PD_Comm_Timer; /* PD shared timing variables */
|
||||
UINT8 ReqPDO_Idx; /* Index of the requested PDO, valid values 1-7 */
|
||||
UINT16 PD_BusIdle_Timer; /* Bus Idle Time Timer */
|
||||
UINT8 Mode_Try_Cnt; /* Number of retries for current mode, highest bit marks mode */
|
||||
UINT8 Err_Op_Cnt; /* Exception operation count */
|
||||
UINT8 Adapter_Idle_Cnt; /* Adapter communication idle timing */
|
||||
_BIT_FLAG Flag; /* Flag byte bit definition */
|
||||
}PD_CONTROL, *pPD_CONTROL;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
46
Peripheral/inc/ch564_xbus.h
Normal file
46
Peripheral/inc/ch564_xbus.h
Normal file
@@ -0,0 +1,46 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_xbus.h
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file contains all the functions prototypes for the
|
||||
* XBUS firmware library.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#ifndef __CH564_XBUS_H
|
||||
#define __CH564_XBUS_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#include "ch564.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
NoOutput = 0x0,
|
||||
AddrNum_6bit,
|
||||
AddrNum_12bit,
|
||||
AddrNum_ALL
|
||||
} XbusOutputADDrBit;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
Setuptime_1clk,
|
||||
Setuptime_2clk,
|
||||
} XbusSetupTime;
|
||||
|
||||
#define SET_XBUS_CYCLE(val) (R8_XBUS_CYCLE = XBUS_CYCLE_VALUE_MASK & (val))
|
||||
|
||||
void XbusInit(XbusOutputADDrBit AddrBit, FunctionalState Bit32En, FunctionalState Stat);
|
||||
void XbusHoldInit(XbusSetupTime setuptm, uint8_t holdtm);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
37
Peripheral/src/ch564_adc.c
Normal file
37
Peripheral/src/ch564_adc.c
Normal file
@@ -0,0 +1,37 @@
|
||||
/********************************** (C) COPYRIGHT *******************************
|
||||
* File Name : ch564_adc.c
|
||||
* Author : WCH
|
||||
* Version : V1.0.0
|
||||
* Date : 2024/05/05
|
||||
* Description : This file provides all the ADC firmware functions.
|
||||
*********************************************************************************
|
||||
* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
|
||||
* Attention: This software (modified or not) and binary are used for
|
||||
* microcontroller manufactured by Nanjing Qinheng Microelectronics.
|
||||
*******************************************************************************/
|
||||
#include "ch564_adc.h"
|
||||
|
||||
/*********************************************************************
|
||||
* @fn ADC_SelectChannel
|
||||
*
|
||||
* @brief The function sets the ADC channel for conversion.
|
||||
*
|
||||
* @param adcChannel The adcChannel parameter is of type ADCChannelTypedef, which is likely an
|
||||
* enumeration or a typedef for an integer value representing the desired ADC channel.
|
||||
*
|
||||
* @return none
|
||||
*/
|
||||
void ADC_SelectChannel(ADCChannelTypedef adcChannel)
|
||||
{
|
||||
if (adcChannel <= ADC_Channel0_1)
|
||||
{
|
||||
R32_ADC_CTRL &= ~MASK_ADC_CTL_MOD1;
|
||||
R8_ADC_CTRL_MOD &= ~RB_ADC_CHAN_MOD;
|
||||
R8_ADC_CTRL_MOD |= adcChannel << 4;
|
||||
}
|
||||
else
|
||||
{
|
||||
R32_ADC_CTRL &= ~MASK_ADC_CTL_MOD1;
|
||||
R32_ADC_CTRL |= adcChannel - 1;
|
||||
}
|
||||
}
|
||||
2487
Peripheral/src/ch564_eth.c
Normal file
2487
Peripheral/src/ch564_eth.c
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user