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6e19d0b451
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| Author | SHA1 | Date | |
|---|---|---|---|
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3041468aa7 | ||
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f16825ea2b | ||
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650073d366 | ||
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d10556b0d5 |
@@ -14,7 +14,7 @@
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</extensions>
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</extensions>
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||||||
</storageModule>
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</storageModule>
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||||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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||||||
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
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<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release" postbuildStep=" ${cross_prefix}${cross_objcopy}${cross_suffix} -O ihex "${ProjName}.elf" "${ProjName}.hex" && ${cross_prefix}${cross_objcopy}${cross_suffix} -O binary "${ProjName}.elf" "${ProjName}.bin"">
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||||||
<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074." name="/" resourcePath="">
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<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074." name="/" resourcePath="">
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||||||
<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.231146001" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
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<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.231146001" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
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||||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1311852988" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1311852988" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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||||||
@@ -117,7 +117,7 @@
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|||||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1292785366" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
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<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1292785366" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
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||||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1801165667" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
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<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1801165667" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
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||||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other.406870191" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other" useByScannerDiscovery="false" value="" valueType="string"/>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other.406870191" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other" useByScannerDiscovery="false" value="" valueType="string"/>
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||||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1719943455" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.ihex" valueType="enumerated"/>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1719943455" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.ihexAndbinary" valueType="enumerated"/>
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</tool>
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</tool>
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||||||
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1356766765" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
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<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1356766765" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
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||||||
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2052761852" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="false" valueType="boolean"/>
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<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2052761852" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="false" valueType="boolean"/>
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|||||||
@@ -334,6 +334,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_HVout_Group_Read(
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}
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}
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break;
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break;
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}
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}
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||||||
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||||||
}
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}
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||||||
}
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}
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break;
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break;
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@@ -368,6 +369,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_HVout_Group_Read(
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break;
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break;
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}
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}
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}
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}
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||||||
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return Ret;
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return Ret;
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}
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}
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@@ -201,7 +201,7 @@ void Dev_LVoutput_Dis(uint32_t DevAddr)
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BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVoutput,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
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BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVoutput,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
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BLV_Device_Info_Write_To_SRAM(DevLVoutputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BLV_Device_Info_Write_To_SRAM(DevLVoutputInfo.DevC5IOAddr,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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}
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@@ -78,6 +78,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
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if(DevInputType == DevLVinputInfo.DevReadBuf[DevInputLoop]) //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
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if(DevInputType == DevLVinputInfo.DevReadBuf[DevInputLoop]) //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
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{
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{
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DevLVinputInfo.DevReadBuf[DevInputLoop] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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DevLVinputInfo.DevReadBuf[DevInputLoop] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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Ret = CtrlValid;
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Ret = CtrlValid;
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||||||
}
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}
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||||||
@@ -239,7 +240,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
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BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVinput,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
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BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVinput,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
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/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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BLV_Device_Info_Write_To_SRAM(DevLVinputInfo.DevC5IOAddr+Dev_Privately,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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BLV_Device_Info_Write_To_SRAM(DevLVinputInfo.DevC5IOAddr,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
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}
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}
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}
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}
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@@ -355,7 +355,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
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{
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{
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if(Dev_Temp_State_Data(Rs485TemLoc) != Dev_Temp_State_Data(Rs485Tem.TemState))
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if(Dev_Temp_State_Data(Rs485TemLoc) != Dev_Temp_State_Data(Rs485Tem.TemState))
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{
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{
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x", Dev_Temp_State_Data(Rs485Tem.TemState));
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x", Dev_Temp_State_Data(Rs485Tem.TemState));
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Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemState);
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Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemState);
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Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrlLast,&Rs485TemLoc);
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Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrlLast,&Rs485TemLoc);
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@@ -373,7 +373,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
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{
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{
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Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485TemIn.TemState); //״̬<D7B4><CCAC>һ<EFBFBD>£<EFBFBD><C2A3>ÿ<EFBFBD><C3BF><EFBFBD>״̬
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Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485TemIn.TemState); //״̬<D7B4><CCAC>һ<EFBFBD>£<EFBFBD><C2A3>ÿ<EFBFBD><C3BF><EFBFBD>״̬
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}
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}
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||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x - %4x", Dev_Temp_State_Data(Rs485Tem.TemState),Dev_Temp_State_Data(Rs485TemIn.TemState));
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x - %x", Dev_Temp_State_Data(Rs485Tem.TemState),Dev_Temp_State_Data(Rs485TemIn.TemState));
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||||||
}
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}
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||||||
}
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}
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else //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD>
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else //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD>
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||||||
@@ -477,7 +477,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
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uint32_t Season;
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uint32_t Season;
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SRAM_DMA_Read_Buff((uint8_t *)&Season,4,SRAM_Register_Start_ADDRESS + Register_SeasonStatus_OFFSET);
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SRAM_DMA_Read_Buff((uint8_t *)&Season,4,SRAM_Register_Start_ADDRESS + Register_SeasonStatus_OFFSET);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӡ:%08X <20><>ǰ<EFBFBD>·<EFBFBD>:%x", Season, RTC_Raw_Data.month);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӡ:%X <20><>ǰ<EFBFBD>·<EFBFBD>:%x", Season, RTC_Raw_Data.month);
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switch((Season>>(HEX_Conversion_To_DEC(RTC_Raw_Data.month)-1)*2)&0x03) //<2F><>ǰ<EFBFBD>·ݵļ<DDB5><C4BC><EFBFBD>
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switch((Season>>(HEX_Conversion_To_DEC(RTC_Raw_Data.month)-1)*2)&0x03) //<2F><>ǰ<EFBFBD>·ݵļ<DDB5><C4BC><EFBFBD>
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{
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{
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@@ -580,7 +580,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
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if(0x01 == TemCtrlFlag)
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if(0x01 == TemCtrlFlag)
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{
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{
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x - %4x", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl),Dev_Temp_State_Data(Rs485TemLoc));
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x - %x", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl),Dev_Temp_State_Data(Rs485TemLoc));
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if(Rs485Tem.Carbon_Set_Temp != Rs485TemLoc.set_t){
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if(Rs485Tem.Carbon_Set_Temp != Rs485TemLoc.set_t){
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Rs485Tem.Carbon_Set_Temp = Rs485TemLoc.set_t;
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Rs485Tem.Carbon_Set_Temp = Rs485TemLoc.set_t;
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@@ -592,13 +592,13 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
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KeepFlag = 0x01;
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KeepFlag = 0x01;
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Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrl,&Rs485TemLoc);
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Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrl,&Rs485TemLoc);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"TemStateCtrl: %04X", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl));
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"TemStateCtrl: %X", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl));
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}
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}
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}
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}
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if(0x01 == KeepFlag)
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if(0x01 == KeepFlag)
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{
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{
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BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_PublicOut,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
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BLV_Device_Info_Write_To_SRAM(CfgDevAddOut,&BUS_PublicOut,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
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}
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}
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}
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}
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@@ -226,7 +226,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
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else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
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else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
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{
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{
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DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
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DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
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if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
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if( (0x00000000 != DevAdd) && (0xFFFFFFFF != DevAdd) )
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{
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{
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BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
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BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
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}else{
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}else{
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||||||
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|||||||
@@ -408,7 +408,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
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|||||||
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|
||||||
if(len > RECDATALENMAX)
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if(len > RECDATALENMAX)
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||||||
{
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{
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 Temp <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!!\r\n");
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 Temp <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!! %d\r\n",len);
|
||||||
return rev; //<2F><><EFBFBD><EFBFBD>
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return rev; //<2F><><EFBFBD><EFBFBD>
|
||||||
}
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}
|
||||||
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
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SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
|
||||||
@@ -420,6 +420,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
|
|||||||
if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee) || (len != data[3] + 0x03) || (0x03 != data[4]) ||BUS_Public.addr!=data[5] )
|
if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee) || (len != data[3] + 0x03) || (0x03 != data[4]) ||BUS_Public.addr!=data[5] )
|
||||||
{
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{
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s Addr:%d Check Error",__func__,BUS_Public.addr);
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Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s Addr:%d Check Error",__func__,BUS_Public.addr);
|
||||||
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Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"Recv Buff:",data,len);
|
||||||
return rev;
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return rev;
|
||||||
}
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}
|
||||||
crc_val = data[len-2] + (data[len-1]<<8);
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crc_val = data[len-2] + (data[len-1]<<8);
|
||||||
|
|||||||
@@ -666,18 +666,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_WriteRegister_DataDeal(ui
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
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/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
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|
||||||
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
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MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -800,34 +792,13 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_DataDeal(uint32_t
|
|||||||
back_data[PKT2_PARA] = 0x01; //<2F><><EFBFBD>óɹ<C3B3>
|
back_data[PKT2_PARA] = 0x01; //<2F><><EFBFBD>óɹ<C3B3>
|
||||||
back_data[PKT2_CHKSUM] = Data_CheckSum(back_data,temp_len);
|
back_data[PKT2_CHKSUM] = Data_CheckSum(back_data,temp_len);
|
||||||
|
|
||||||
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// if(g_pc_test.link_port == 0x00)
|
|
||||||
// {
|
|
||||||
// UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
// }else if(g_pc_test.link_port == 0x01)
|
|
||||||
// {
|
|
||||||
// MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
// }else if(g_pc_test.link_port == 0x02)
|
|
||||||
// {
|
|
||||||
// MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
|
||||||
// }else {
|
|
||||||
// return 0xF0;
|
|
||||||
// }
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -885,18 +856,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_DataDeal(uint32_t
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -936,24 +899,15 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_Data_Reported(uin
|
|||||||
send_buff[PKT2_PARA + 3 + i] = SRAM_Read_Byte(data_addr + i);
|
send_buff[PKT2_PARA + 3 + i] = SRAM_Read_Byte(data_addr + i);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
|
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -989,24 +943,15 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_Data_Reported2(ui
|
|||||||
send_buff[PKT2_PARA + 3 + i] = data_buff[i];
|
send_buff[PKT2_PARA + 3 + i] = data_buff[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
|
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1027,12 +972,8 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_TEST_TOUR_DATASEND(void)
|
|||||||
{
|
{
|
||||||
send_buff[i] = i;
|
send_buff[i] = i;
|
||||||
}
|
}
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,10); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,10); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif //USE_CORE_TYPE == CORE_TYPE_C1F
|
|
||||||
|
|
||||||
|
MCU485_SendString_0(send_buff,10); //<2F><><EFBFBD><EFBFBD>0
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@@ -1091,18 +1032,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_TEST_TOUR_ACKSend(uint8_t
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1165,18 +1098,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_SET_MCU_Revision_Data_Rep
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1218,18 +1143,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_MCU_Revision_Data_Re
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1307,18 +1224,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_RCU_Data_Reported(ui
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1403,18 +1312,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_RCU_VERSION_Reported
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1525,18 +1426,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_Device_Data_Reported
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1549,7 +1442,6 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_Device_Data_Reported
|
|||||||
|
|
||||||
__attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_t data_addr,uint16_t data_len)
|
__attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_t data_addr,uint16_t data_len)
|
||||||
{
|
{
|
||||||
// uint32_t utc_tick = 0;
|
|
||||||
uint16_t temp_len = 0x09;
|
uint16_t temp_len = 0x09;
|
||||||
uint8_t temp = 0;
|
uint8_t temp = 0;
|
||||||
uint32_t device_listaddr = 0;
|
uint32_t device_listaddr = 0;
|
||||||
@@ -1558,20 +1450,13 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
|
|||||||
memset(ack_buff,0,temp_len);
|
memset(ack_buff,0,temp_len);
|
||||||
|
|
||||||
set_time.year = SRAM_Read_Byte(data_addr + PKT2_PARA);
|
set_time.year = SRAM_Read_Byte(data_addr + PKT2_PARA);
|
||||||
|
|
||||||
set_time.month = SRAM_Read_Byte(data_addr + PKT2_PARA + 1);
|
set_time.month = SRAM_Read_Byte(data_addr + PKT2_PARA + 1);
|
||||||
|
|
||||||
set_time.day = SRAM_Read_Byte(data_addr + PKT2_PARA + 2);
|
set_time.day = SRAM_Read_Byte(data_addr + PKT2_PARA + 2);
|
||||||
|
|
||||||
set_time.hour = SRAM_Read_Byte(data_addr + PKT2_PARA + 3);
|
set_time.hour = SRAM_Read_Byte(data_addr + PKT2_PARA + 3);
|
||||||
|
|
||||||
set_time.minute = SRAM_Read_Byte(data_addr + PKT2_PARA + 4);
|
set_time.minute = SRAM_Read_Byte(data_addr + PKT2_PARA + 4);
|
||||||
|
|
||||||
set_time.second = SRAM_Read_Byte(data_addr + PKT2_PARA + 5);
|
set_time.second = SRAM_Read_Byte(data_addr + PKT2_PARA + 5);
|
||||||
|
|
||||||
set_time.week = SRAM_Read_Byte(data_addr + PKT2_PARA + 6);
|
set_time.week = SRAM_Read_Byte(data_addr + PKT2_PARA + 6);
|
||||||
|
|
||||||
|
|
||||||
temp = RTC_WriteDate(set_time);
|
temp = RTC_WriteDate(set_time);
|
||||||
|
|
||||||
//<2F>ҵ<EFBFBD>CSIO <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
//<2F>ҵ<EFBFBD>CSIO <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -1583,11 +1468,6 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// /*UTCʱ<43><CAB1>*/
|
|
||||||
// utc_tick = RTC_Conversion_To_Unix(&set_time);
|
|
||||||
// Unix_Conversion_To_RTC(&set_time,utc_tick);
|
|
||||||
|
|
||||||
/*<2A>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>*/
|
/*<2A>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>*/
|
||||||
ack_buff[PKT2_ADD_FM] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
ack_buff[PKT2_ADD_FM] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
ack_buff[PKT2_TYPE] = g_pc_test.DevSendSN;
|
ack_buff[PKT2_TYPE] = g_pc_test.DevSendSN;
|
||||||
@@ -1603,35 +1483,12 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
|
|||||||
ack_buff[PKT2_CHKSUM] = Data_CheckSum(ack_buff,temp_len);
|
ack_buff[PKT2_CHKSUM] = Data_CheckSum(ack_buff,temp_len);
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
|
||||||
{
|
|
||||||
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
|
||||||
{
|
|
||||||
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
|
||||||
}else {
|
|
||||||
return 0xF0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
if(g_pc_test.link_port == 0x00)
|
|
||||||
{
|
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1671,18 +1528,10 @@ __attribute__((section(".non_0_wait"))) uint16_t QueryTime_Relay_DATA_Packaging(
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
@@ -1715,18 +1564,10 @@ __attribute__((section(".non_0_wait"))) uint8_t TEST_GPIO_Relay_Fail(void)
|
|||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if(g_pc_test.link_port == 0x00)
|
if(g_pc_test.link_port == 0x00)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x01)
|
}else if(g_pc_test.link_port == 0x01)
|
||||||
{
|
{
|
||||||
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
|
|
||||||
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
||||||
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
|
|
||||||
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
|
|
||||||
#endif
|
|
||||||
}else if(g_pc_test.link_port == 0x02)
|
}else if(g_pc_test.link_port == 0x02)
|
||||||
{
|
{
|
||||||
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
|
||||||
|
|||||||
@@ -35,8 +35,9 @@ MEMORY
|
|||||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
||||||
*/
|
*/
|
||||||
|
|
||||||
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 80K
|
|
||||||
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 368K
|
FLASH (rx) : ORIGIN = 0x00001000 , LENGTH = 76K
|
||||||
|
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 336K
|
||||||
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
|
||||||
|
|
||||||
}
|
}
|
||||||
@@ -55,7 +56,7 @@ SECTIONS
|
|||||||
|
|
||||||
.vector :
|
.vector :
|
||||||
{
|
{
|
||||||
*(.vector);
|
KEEP(*(.vector));
|
||||||
_endof_Vector = .;
|
_endof_Vector = .;
|
||||||
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
|
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
|
|||||||
@@ -9,6 +9,8 @@
|
|||||||
#include "SPI_SRAM.h"
|
#include "SPI_SRAM.h"
|
||||||
#include "rw_logging.h"
|
#include "rw_logging.h"
|
||||||
#include "sram_mem_addr.h"
|
#include "sram_mem_addr.h"
|
||||||
|
#include "debug.h"
|
||||||
|
#include "rtc.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
BLV_AUTHORIZE sys_authorize;
|
BLV_AUTHORIZE sys_authorize;
|
||||||
@@ -89,4 +91,43 @@ __attribute__((section(".non_0_wait"))) uint32_t Get_Authorize_UnixTime(void)
|
|||||||
return sys_authorize.expires_time;
|
return sys_authorize.expires_time;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Authorize_Task
|
||||||
|
* Description : BLV<4C><56>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
__attribute__((section(".non_0_wait"))) void BLV_Authorize_Task(void)
|
||||||
|
{
|
||||||
|
static uint32_t sys_tick = 0;
|
||||||
|
uint32_t temp_unix = 0,curr_unix = 0;
|
||||||
|
|
||||||
|
if(SysTick_1ms - sys_tick > 10000)
|
||||||
|
{
|
||||||
|
sys_tick = SysTick_1ms;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"RTCʱ<EFBFBD><EFBFBD>: 20%02X-%02X-%02X %02X:%02X:%02X <20><><EFBFBD><EFBFBD>%X",RTC_Raw_Data.year,RTC_Raw_Data.month,RTC_Raw_Data.day,RTC_Raw_Data.hour,RTC_Raw_Data.minute,RTC_Raw_Data.second,RTC_Raw_Data.week);
|
||||||
|
|
||||||
|
temp_unix = RTC_Conversion_To_Unix(&RTC_Raw_Data);
|
||||||
|
|
||||||
|
BLV_Authorize_Processing(temp_unix);
|
||||||
|
|
||||||
|
if(Get_Authorize_Lock_Status() == 0x01)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU<EFBFBD><EFBFBD>Ȩ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%08X now:%08X-----",Get_Authorize_UnixTime(),temp_unix);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD>в<EFBFBD><D0B2><EFBFBD>12ʱ<32>䱣<EFBFBD>棬<EFBFBD><E6A3AC>ʱ<EFBFBD>䱣<EFBFBD>浽Flash<73><68>*/
|
||||||
|
curr_unix = SRAM_Read_DW(SRAM_Register_Start_ADDRESS + Register_CurrentUsageTime_OFFSET);
|
||||||
|
if(temp_unix - curr_unix > 43200)
|
||||||
|
{
|
||||||
|
SRAM_Write_DW(temp_unix,SRAM_Register_Start_ADDRESS + Register_CurrentUsageTime_OFFSET);
|
||||||
|
Retain_Flash_Register_Data();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -7,7 +7,7 @@
|
|||||||
#include "includes.h"
|
#include "includes.h"
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
uint8_t Global_Large_Buff[1100] = {0}; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ⲿSRAMӳ<4D><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>
|
uint8_t Global_Large_Buff[1100] = {0}; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>ⲿSRAMӳ<4D><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
||||||
uint32_t ProjectCode = 1001; //ģ<><C4A3><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
uint32_t ProjectCode = 1001; //ģ<><C4A3><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
||||||
uint8_t Versions[4] = {0,0,0,0}; //ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD>ð汾
|
uint8_t Versions[4] = {0,0,0,0}; //ģ<><C4A3><EFBFBD><EFBFBD><EFBFBD>ð汾
|
||||||
|
|
||||||
@@ -413,7 +413,7 @@ uint8_t Udp_Internal_BLVIAP_Logic(uint8_t* data,uint16_t DataLen, uint8_t *ip,ui
|
|||||||
uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
||||||
{
|
{
|
||||||
uint16_t frameno = UDP_Get_FrameNum(data);
|
uint16_t frameno = UDP_Get_FrameNum(data);
|
||||||
UINT32 sendlen = 0x00;
|
uint32_t sendlen = 0x00;
|
||||||
uint8_t buff[6];
|
uint8_t buff[6];
|
||||||
|
|
||||||
//У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
//У<><D0A3><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
@@ -421,6 +421,8 @@ uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint
|
|||||||
|
|
||||||
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
server_info.goal_port = port;
|
server_info.goal_port = port;
|
||||||
memcpy(server_info.goal_ip, ip, 4);
|
memcpy(server_info.goal_ip, ip, 4);
|
||||||
memcpy(buff, ip, 4);
|
memcpy(buff, ip, 4);
|
||||||
@@ -430,6 +432,7 @@ uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint
|
|||||||
|
|
||||||
memset(&IAPVarTypeStruct_Ptr, 0, sizeof(IAPVarTypeStruct));
|
memset(&IAPVarTypeStruct_Ptr, 0, sizeof(IAPVarTypeStruct));
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapFlag = 0x01;
|
||||||
IAPVarTypeStruct_Ptr.IapFileType = TFTP_IAP_DataType_APP; //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
IAPVarTypeStruct_Ptr.IapFileType = TFTP_IAP_DataType_APP; //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
//IAP <20><><EFBFBD><EFBFBD>APP<50><50>Ӧ<EFBFBD><D3A6>MD5 У<><D0A3>
|
//IAP <20><><EFBFBD><EFBFBD>APP<50><50>Ӧ<EFBFBD><D3A6>MD5 У<><D0A3>
|
||||||
@@ -467,11 +470,15 @@ uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint
|
|||||||
IAPVarTypeStruct_Ptr.Md5[12],IAPVarTypeStruct_Ptr.Md5[13],\
|
IAPVarTypeStruct_Ptr.Md5[12],IAPVarTypeStruct_Ptr.Md5[13],\
|
||||||
IAPVarTypeStruct_Ptr.Md5[14],IAPVarTypeStruct_Ptr.Md5[15]);
|
IAPVarTypeStruct_Ptr.Md5[14],IAPVarTypeStruct_Ptr.Md5[15]);
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"BlockSize:%d",IAPVarTypeStruct_Ptr.BlockSize);
|
||||||
|
|
||||||
sendlen = BLV_UDP_HEAD_LEN;
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
if( (0 < IAPVarTypeStruct_Ptr.BlockSize) || (IAPVarTypeStruct_Ptr.BlockSize <= APP_BLOCK_MAX) )
|
if( (0 < IAPVarTypeStruct_Ptr.BlockSize) || (IAPVarTypeStruct_Ptr.BlockSize <= APP_BLOCK_MAX) )
|
||||||
{
|
{
|
||||||
Global_Large_Buff[sendlen++] = TFTP_IAP_Status_Ready;
|
Global_Large_Buff[sendlen++] = TFTP_IAP_Status_Ready;
|
||||||
IAPVarTypeStruct_Ptr.enable = 0x01;
|
IAPVarTypeStruct_Ptr.enable = 0x01;
|
||||||
|
IAPVarTypeStruct_Ptr.FunType = TFTP_FUNTYPE_LocalIAP;
|
||||||
|
IAPVarTypeStruct_Ptr.Write_Block = 0x00;
|
||||||
}else {
|
}else {
|
||||||
Global_Large_Buff[sendlen++] = TFTP_IAP_Status_Error_Block;
|
Global_Large_Buff[sendlen++] = TFTP_IAP_Status_Error_Block;
|
||||||
}
|
}
|
||||||
@@ -484,6 +491,544 @@ uint8_t UDP_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint
|
|||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP_Cloud_IAP_Cmd_Processing
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - <20>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_Cloud_IAP_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
||||||
|
{
|
||||||
|
uint16_t frameno = UDP_Get_FrameNum(data);
|
||||||
|
uint32_t sendlen = 0x00;
|
||||||
|
uint8_t temp_buff[6];
|
||||||
|
uint16_t temp_len = 0;
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
temp_len = BLV_UDP_HEAD_LEN;
|
||||||
|
memcpy(server_info.goal_ip, &data[temp_len], 4);
|
||||||
|
temp_len += 4;
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.TFTP_Port = data[temp_len + 1];
|
||||||
|
IAPVarTypeStruct_Ptr.TFTP_Port <<= 8;
|
||||||
|
IAPVarTypeStruct_Ptr.TFTP_Port |= data[temp_len];
|
||||||
|
|
||||||
|
memcpy(temp_buff, ip, 4);
|
||||||
|
temp_buff[4] = data[temp_len];
|
||||||
|
temp_buff[5] = data[temp_len + 1];
|
||||||
|
SRAM_DMA_Write_Buff(temp_buff, 6, SRAM_IAP_IP_ADDRESS); //<2F><><EFBFBD><EFBFBD><EFBFBD>ù<EFBFBD><C3B9>ߵ<EFBFBD>ip<69><70>port<72><74><EFBFBD><EFBFBD>SRAM<41><4D><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱʹ<CAB1><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿ڣ<CBBF><DAA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD>
|
||||||
|
|
||||||
|
temp_len += 2;
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ƶ<EFBFBD>TFTP port:%X , IP:%d.%d.%d.%d",IAPVarTypeStruct_Ptr.TFTP_Port,temp_buff[0],temp_buff[1],temp_buff[2],temp_buff[3]);
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[0] = data[temp_len + 3];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[1] = data[temp_len + 2];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[2] = data[temp_len + 1];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[3] = data[temp_len + 0];
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[4] = data[temp_len + 7];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[5] = data[temp_len + 6];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[6] = data[temp_len + 5];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[7] = data[temp_len + 4];
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[8] = data[temp_len + 11];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[9] = data[temp_len + 10];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[10] = data[temp_len + 9];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[11] = data[temp_len + 8];
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[12] = data[temp_len + 15];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[13] = data[temp_len + 14];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[14] = data[temp_len + 13];
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[15] = data[temp_len + 12];
|
||||||
|
|
||||||
|
temp_len += 16;
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.BlockSize = data[temp_len + 1];
|
||||||
|
IAPVarTypeStruct_Ptr.BlockSize <<= 8;
|
||||||
|
IAPVarTypeStruct_Ptr.BlockSize |= data[temp_len];
|
||||||
|
|
||||||
|
temp_len += 2;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"BlockSize:%d ",IAPVarTypeStruct_Ptr.BlockSize);
|
||||||
|
|
||||||
|
if(data[temp_len] == 0x00) //<2F>̼<EFBFBD> - UDPЭ<50><D0AD><EFBFBD><EFBFBD> 0x00<30><30>ʾ<EFBFBD>̼<EFBFBD><CCBC><EFBFBD>0x01<30><31>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
|
||||||
|
{
|
||||||
|
IAPVarTypeStruct_Ptr.IapFileType = TFTP_IAP_DataType_APP;
|
||||||
|
|
||||||
|
}else if(data[temp_len] == 0x01) //<2F><><EFBFBD><EFBFBD>
|
||||||
|
{
|
||||||
|
IAPVarTypeStruct_Ptr.IapFileType = TFTP_IAP_DataType_CONFIG;
|
||||||
|
|
||||||
|
}else{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"IapFileType Error:%d ",data[temp_len]);
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
temp_len += 1;
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.FtpFileNameLen = DataLen - 42;
|
||||||
|
if(IAPVarTypeStruct_Ptr.FtpFileNameLen > TFTP_File_Name_Size)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"FtpFileNameLen Error:%d ",IAPVarTypeStruct_Ptr.FtpFileNameLen);
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
memcpy(IAPVarTypeStruct_Ptr.FtpFileName,&data[temp_len],IAPVarTypeStruct_Ptr.FtpFileNameLen);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ftp_name:%d - %s",IAPVarTypeStruct_Ptr.FtpFileNameLen,IAPVarTypeStruct_Ptr.FtpFileName);
|
||||||
|
|
||||||
|
if( (0 < IAPVarTypeStruct_Ptr.BlockSize) || (IAPVarTypeStruct_Ptr.BlockSize <= APP_BLOCK_MAX) )
|
||||||
|
{
|
||||||
|
IAPVarTypeStruct_Ptr.enable = 0x01;
|
||||||
|
IAPVarTypeStruct_Ptr.FunType = TFTP_FUNTYPE_CloudIAP;
|
||||||
|
IAPVarTypeStruct_Ptr.Write_Block = 0x00;
|
||||||
|
}else {
|
||||||
|
return 0x02;
|
||||||
|
}
|
||||||
|
|
||||||
|
//<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
|
||||||
|
Global_Large_Buff[sendlen++] = 0x00; //<2F><><EFBFBD><EFBFBD>״̬ - <20>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>(0x00)
|
||||||
|
sendlen += UDP_ADD_SoftwareVer(&Global_Large_Buff[sendlen]);
|
||||||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
if( IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_APP )
|
||||||
|
{
|
||||||
|
Global_Large_Buff[sendlen++] = 0x00;
|
||||||
|
}else if( IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_CONFIG ){
|
||||||
|
Global_Large_Buff[sendlen++] = 0x01;
|
||||||
|
}else {
|
||||||
|
Global_Large_Buff[sendlen++] = 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
sendlen += 2;
|
||||||
|
UDP_Add_Header(Global_Large_Buff, In_Cloud_IAP_Cmd, sendlen, frameno);
|
||||||
|
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver], Global_Large_Buff, &sendlen, ip, port);
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP__BLVIAPCheck_Cmd_Processing
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - IAP<41><50><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_BLVIAPCheck_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
||||||
|
{
|
||||||
|
uint8_t rev = 0;
|
||||||
|
uint16_t crcNumIndex = 0,temp_val = 0x00,deal_frame = 0;
|
||||||
|
uint32_t crc_data_len = 0,sendlen = 0;
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s - %d",__func__,DataLen);
|
||||||
|
|
||||||
|
if(DataLen <= BLV_UDP_HEAD_LEN) return 0x01;
|
||||||
|
|
||||||
|
/* У<><D0A3>֡<EFBFBD><D6A1> - ֡<>Ų<EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>*/
|
||||||
|
deal_frame = UDP_Get_FrameNum(data);
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s Frame:%d - %d",__func__,deal_frame,server_info.udp_frame);
|
||||||
|
if( server_info.udp_frame != deal_frame )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"BLVIapFlag:%d - %d %d",IAPVarTypeStruct_Ptr.BLVIapFlag,IAPVarTypeStruct_Ptr.BlockSize,tftp_args.block);
|
||||||
|
server_info.udp_frame = deal_frame;
|
||||||
|
/*<2A><>ǰ<EFBFBD><C7B0>BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD>ҵ<EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
if((IAPVarTypeStruct_Ptr.BLVIapFlag == 0x01) && (IAPVarTypeStruct_Ptr.BlockSize == IAPVarTypeStruct_Ptr.Write_Block))
|
||||||
|
{
|
||||||
|
uint8_t md5[16] = {0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0};
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.status = STA_END; //<2F>ͷ<EFBFBD>IAP<41><EFBFBD><D7BD><EFBFBD>
|
||||||
|
switch(IAPVarTypeStruct_Ptr.IapFileType)
|
||||||
|
{
|
||||||
|
case TFTP_IAP_DataType_APP:
|
||||||
|
MD5Digest_SRAM(SRAM_IAP_APP_FILE_ADDRESS, IAPVarTypeStruct_Ptr.TotalCount,(char *)&md5[0]);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"falshд<EFBFBD><EFBFBD><EFBFBD>ܳ<EFBFBD><EFBFBD>ȣ<EFBFBD>%dByte", IAPVarTypeStruct_Ptr.TotalCount );
|
||||||
|
|
||||||
|
if( bytes_cmp(md5,IAPVarTypeStruct_Ptr.Md5,16) == 0x00 )
|
||||||
|
{
|
||||||
|
//<2F>ļ<EFBFBD>MD5У<35><D0A3><EFBFBD>ɹ<EFBFBD>
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>Md5<EFBFBD><EFBFBD>ȷ");
|
||||||
|
|
||||||
|
if( IAPVarTypeStruct_Ptr.FunType == TFTP_FUNTYPE_LocalIAP )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
|
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD>¼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
|
SRAM_Write_Byte(TFTP_FUNTYPE_LocalIAP, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
|
||||||
|
}
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>APPд<EFBFBD><EFBFBD>Flash<EFBFBD><EFBFBD>..");
|
||||||
|
|
||||||
|
SPI_FLASH_APP_Data_Erase();
|
||||||
|
for(uint32_t i = 0;i < IAPVarTypeStruct_Ptr.BlockSize; i++ )
|
||||||
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
SRAM_DMA_Read_Buff(Global_Large_Buff,512,SRAM_IAP_APP_FILE_ADDRESS+i*512);
|
||||||
|
Flash_Write(Global_Large_Buff,512,SPIFLASH_APP_Data_Start_Addr+i*512);
|
||||||
|
}
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
/* <20><><EFBFBD><EFBFBD>APP<50><50>CRCУ<43><D0A3>ֵ <20><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
g_app_feature.app_flag = App_Procedure_Ready;
|
||||||
|
g_app_feature.app_crc_size = MCU_APP_Flash_PageSize;
|
||||||
|
g_app_feature.app_start_addr = MCU_APP_Flash_Start_Addr;
|
||||||
|
g_app_feature.app_end_addr = MCU_APP_Flash_Start_Addr + IAPVarTypeStruct_Ptr.TotalCount;
|
||||||
|
|
||||||
|
if( ( IAPVarTypeStruct_Ptr.TotalCount % g_app_feature.app_crc_size ) != 0x00 ){
|
||||||
|
g_app_feature.app_crc_len = ( (IAPVarTypeStruct_Ptr.TotalCount / g_app_feature.app_crc_size) + 1) * 2;
|
||||||
|
}else {
|
||||||
|
g_app_feature.app_crc_len = (IAPVarTypeStruct_Ptr.TotalCount / g_app_feature.app_crc_size) * 2;
|
||||||
|
}
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"App CRC BLock:%d ",g_app_feature.app_crc_len);
|
||||||
|
|
||||||
|
crcNumIndex = 0x00;
|
||||||
|
for(uint32_t crc_addr = g_app_feature.app_start_addr; crc_addr < g_app_feature.app_end_addr;crc_addr += g_app_feature.app_crc_size)
|
||||||
|
{
|
||||||
|
if( g_app_feature.app_end_addr - crc_addr >= g_app_feature.app_crc_size ) {
|
||||||
|
crc_data_len = g_app_feature.app_crc_size;
|
||||||
|
}else {
|
||||||
|
crc_data_len = g_app_feature.app_end_addr - crc_addr;
|
||||||
|
}
|
||||||
|
|
||||||
|
memset(Temp_Flash_Buff,0,sizeof(Temp_Flash_Buff));
|
||||||
|
|
||||||
|
if(crc_data_len > 2048)
|
||||||
|
{
|
||||||
|
Flash_Read(Temp_Flash_Buff,2048,crc_addr);
|
||||||
|
Flash_Read(&Temp_Flash_Buff[2048],(crc_data_len - 2048),crc_addr+2048);
|
||||||
|
}else {
|
||||||
|
Flash_Read(Temp_Flash_Buff,crc_data_len,crc_addr);
|
||||||
|
}
|
||||||
|
|
||||||
|
temp_val = NetCRC16_2(Temp_Flash_Buff,crc_data_len);
|
||||||
|
|
||||||
|
g_app_feature.app_crc[crcNumIndex] = temp_val & 0xFF;
|
||||||
|
g_app_feature.app_crc[crcNumIndex + 1] = (temp_val >> 8) & 0xFF;
|
||||||
|
crcNumIndex += 2;
|
||||||
|
}
|
||||||
|
|
||||||
|
g_app_feature.crc_check = 0x00;
|
||||||
|
Write_APP_Feature_Info(0x02,&g_app_feature); //д<><D0B4>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
WDT_Feed(); //<2F><>ֹ<EFBFBD><D6B9><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ!");
|
||||||
|
//ֱ<>ӿ<EFBFBD><D3BF>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x01; //IAP<41><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||||
|
}else{
|
||||||
|
//MD5У<35><D0A3>ʧ<EFBFBD><CAA7>
|
||||||
|
// switch(IAPVarTypeStruct_Ptr->IapType)
|
||||||
|
// {
|
||||||
|
// case IAPTFTPWRITE://IAP_AckState(IAP_Error_MD5, (uint8_t *)ip, (uint16_t)port); break; //<2F>ظ<EFBFBD>Md5<64><35><EFBFBD><EFBFBD>
|
||||||
|
// IAP_AckState(IAP_Error_MD5, (uint8_t *)ip_addr, (uint16_t)sever_port); //<2F>ظ<EFBFBD>Md5<64><35><EFBFBD><EFBFBD>
|
||||||
|
// break;
|
||||||
|
// case IAPTFTPREAD:
|
||||||
|
// CLOUD_IAP_AckState(CLOUD_IAP_Cmd, IAP_Error_MD5, (uint8_t *)ip, (uint16_t)port, DATATYPE_IAP);
|
||||||
|
// break;
|
||||||
|
// }
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x02; //IAP<41><50><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X", \
|
||||||
|
md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X", \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[0],IAPVarTypeStruct_Ptr.Md5[1], \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[2],IAPVarTypeStruct_Ptr.Md5[3], \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[4],IAPVarTypeStruct_Ptr.Md5[5], \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[6],IAPVarTypeStruct_Ptr.Md5[7], \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[8],IAPVarTypeStruct_Ptr.Md5[9], \
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[10],IAPVarTypeStruct_Ptr.Md5[11],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[12],IAPVarTypeStruct_Ptr.Md5[13],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[14],IAPVarTypeStruct_Ptr.Md5[15]);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
case TFTP_IAP_DataType_CONFIG:
|
||||||
|
MD5Digest_SRAM(SRAM_IAP_LOGIC_DataStart_ADDRESS, IAPVarTypeStruct_Ptr.TotalCount, (char *)&md5[0]);
|
||||||
|
if( bytes_cmp(md5,IAPVarTypeStruct_Ptr.Md5,16) == 0x00 )
|
||||||
|
{
|
||||||
|
// switch(IAPVarTypeStruct_Ptr->IapType)
|
||||||
|
// {
|
||||||
|
// case IAPTFTPWRITE: //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD><EFBFBD><DFBC>ļ<EFBFBD>д<EFBFBD><D0B4><EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
|
// LOGIC_Config_AckState(IAP_Finish, (uint8_t *)ip, (uint16_t)sever_port);
|
||||||
|
// break;
|
||||||
|
// case IAPTFTPREAD:
|
||||||
|
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD><EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD>ȡ<EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
|
// CLOUD_IAP_AckState(CLOUD_IAP_Cmd, IAP_Finish, (uint8_t *)ip, (uint16_t)sever_port, DATATYPE_CONFIG);
|
||||||
|
// break;
|
||||||
|
// }
|
||||||
|
|
||||||
|
SPI_FLASH_Logic_File_Erase(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
for(uint32_t i = 0; i < IAPVarTypeStruct_Ptr.BlockSize; i++)
|
||||||
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
temp_val = SRAM_IAP_LOGIC_DataStart_ADDRESS+i*512;
|
||||||
|
SRAM_DMA_Read_Buff(Global_Large_Buff,512,SRAM_IAP_LOGIC_DataStart_ADDRESS+i*512);
|
||||||
|
Flash_Write(Global_Large_Buff,512,SPIFLASH_LOGIC_DataStart_ADDRESS+i*512);
|
||||||
|
}
|
||||||
|
|
||||||
|
Global_Large_Buff[0] = 0x01;
|
||||||
|
Global_Large_Buff[1] = 0x00;
|
||||||
|
Global_Large_Buff[2] = 0x06;
|
||||||
|
Global_Large_Buff[3] = 0xCC;
|
||||||
|
|
||||||
|
Global_Large_Buff[4] = IAPVarTypeStruct_Ptr.TotalCount & 0xFF;
|
||||||
|
Global_Large_Buff[5] = (IAPVarTypeStruct_Ptr.TotalCount >> 8) & 0xFF;
|
||||||
|
Global_Large_Buff[6] = (IAPVarTypeStruct_Ptr.TotalCount >> 16) & 0xFF;
|
||||||
|
Global_Large_Buff[7] = (IAPVarTypeStruct_Ptr.TotalCount >> 24) & 0xFF;
|
||||||
|
|
||||||
|
memcpy(&Global_Large_Buff[8],IAPVarTypeStruct_Ptr.Md5,16);
|
||||||
|
Flash_Write(Global_Large_Buff,24,SPIFLASH_LOGIC_DataFlag_ADDRESS);
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ");
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x01; //IAP<41><50><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
|
||||||
|
}else{
|
||||||
|
// switch(IAPVarTypeStruct_Ptr->IapType)
|
||||||
|
// {
|
||||||
|
// case IAPTFTPWRITE: //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
// LOGIC_Config_AckState(IAP_Error_MD5, (uint8_t *)ip_addr, (uint16_t)sever_port);
|
||||||
|
// break;
|
||||||
|
// case IAPTFTPREAD:
|
||||||
|
// CLOUD_IAP_AckState(CLOUD_IAP_Cmd, IAP_Error_MD5, (uint8_t *)ip, (uint16_t)sever_port, DATATYPE_CONFIG);
|
||||||
|
// break;
|
||||||
|
// }
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x02; //IAP<41><50><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
|
||||||
|
md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[0],IAPVarTypeStruct_Ptr.Md5[1],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[2],IAPVarTypeStruct_Ptr.Md5[3],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[4],IAPVarTypeStruct_Ptr.Md5[5],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[6],IAPVarTypeStruct_Ptr.Md5[7],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[8],IAPVarTypeStruct_Ptr.Md5[9],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[10],IAPVarTypeStruct_Ptr.Md5[11],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[12],IAPVarTypeStruct_Ptr.Md5[13],\
|
||||||
|
IAPVarTypeStruct_Ptr.Md5[14],IAPVarTypeStruct_Ptr.Md5[15]);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x10; //IAP<41><50><EFBFBD><EFBFBD> - δ֪<CEB4><D6AA><EFBFBD><EFBFBD>
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ͳ<EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
}else if( (IAPVarTypeStruct_Ptr.BLVIapFlag == 0x01) && (IAPVarTypeStruct_Ptr.BlockSize != IAPVarTypeStruct_Ptr.Write_Block) )
|
||||||
|
{
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x03; //IAP<41><50><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>
|
||||||
|
}else {
|
||||||
|
IAPVarTypeStruct_Ptr.BLVIapResult = 0x10; //IAP<41><50><EFBFBD><EFBFBD> - δ֪<CEB4><D6AA><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
}else{
|
||||||
|
/*֡<><D6A1><EFBFBD><EFBFBD>ͬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ظ<EFBFBD>(<28>ظ<EFBFBD><D8B8>еĽ<D0B5><C4BD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>ʹ<EFBFBD>õĽ<C3B5><C4BD><EFBFBD>)*/
|
||||||
|
}
|
||||||
|
|
||||||
|
//<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
|
||||||
|
Global_Large_Buff[BLV_UDP_HEAD_LEN] = IAPVarTypeStruct_Ptr.BLVIapResult; //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
sendlen += 3;
|
||||||
|
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_BLVIAPCheck_Cmd,sendlen,deal_frame);
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
rev = WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver],Global_Large_Buff,&sendlen,ip,port);
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP_BLVIAPPlan_Cmd_Processing
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_BLVIAPPlan_Cmd_SendPack(uint8_t iap_state)
|
||||||
|
{
|
||||||
|
uint8_t rev = 0;
|
||||||
|
uint32_t sendlen = 0;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s -------",__func__);
|
||||||
|
|
||||||
|
if((server_info.frame_no < 0xfffe) && (server_info.frame_no >= 0x8000))
|
||||||
|
{
|
||||||
|
server_info.frame_no++;
|
||||||
|
} else {
|
||||||
|
server_info.frame_no = 0x8000;
|
||||||
|
}
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
Global_Large_Buff[sendlen++] = iap_state; //<2F><><EFBFBD><EFBFBD>״̬
|
||||||
|
Global_Large_Buff[sendlen++] = IAPVarTypeStruct_Ptr.IapFileType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
Global_Large_Buff[sendlen++] = (IAPVarTypeStruct_Ptr.BlockSize & 0xFF); //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>ܿ<EFBFBD><DCBF><EFBFBD>
|
||||||
|
Global_Large_Buff[sendlen++] = ((IAPVarTypeStruct_Ptr.BlockSize >> 8) & 0xFF); //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>ܿ<EFBFBD><DCBF><EFBFBD>
|
||||||
|
|
||||||
|
Global_Large_Buff[sendlen++] = (IAPVarTypeStruct_Ptr.Write_Block & 0xFF); //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
|
||||||
|
Global_Large_Buff[sendlen++] = ((IAPVarTypeStruct_Ptr.Write_Block >> 8) & 0xFF); //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
Global_Large_Buff[sendlen++] = IAPVarTypeStruct_Ptr.FtpFileNameLen;
|
||||||
|
|
||||||
|
memcpy(&Global_Large_Buff[sendlen],IAPVarTypeStruct_Ptr.FtpFileName,IAPVarTypeStruct_Ptr.FtpFileNameLen);
|
||||||
|
sendlen += IAPVarTypeStruct_Ptr.FtpFileNameLen;
|
||||||
|
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_BLVIAPPlan_Cmd,sendlen,server_info.frame_no);
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
rev = WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver], Global_Large_Buff, &sendlen, server_info.dis_ip, server_info.dis_port);
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP_BLVIAPJump_Cmd_Processing
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_BLVIAPJump_Cmd_Processing(uint8_t* data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
||||||
|
{
|
||||||
|
uint8_t rev = 0x00,result = 0x02;
|
||||||
|
uint16_t deal_frame = 0;
|
||||||
|
uint32_t sendlen = 0;
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s - %d",__func__,DataLen);
|
||||||
|
|
||||||
|
if(DataLen <= BLV_UDP_HEAD_LEN) return 0x01;
|
||||||
|
|
||||||
|
/* У<><D0A3>֡<EFBFBD><D6A1> - ֡<>Ų<EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>*/
|
||||||
|
deal_frame = UDP_Get_FrameNum(data);
|
||||||
|
if( server_info.udp_frame != deal_frame )
|
||||||
|
{
|
||||||
|
switch(data[BLV_UDP_HEAD_LEN])
|
||||||
|
{
|
||||||
|
case 0x01:
|
||||||
|
result = 0x01;
|
||||||
|
break;
|
||||||
|
case 0x02:
|
||||||
|
result = 0x01;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
//<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
Global_Large_Buff[BLV_UDP_HEAD_LEN] = IAPVarTypeStruct_Ptr.BLVIapResult; //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
sendlen += 3;
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_BLVIAPJump_Cmd,sendlen,deal_frame);
|
||||||
|
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
rev = WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver],Global_Large_Buff,&sendlen,ip,port);
|
||||||
|
|
||||||
|
/* - <20><><EFBFBD><EFBFBD><EFBFBD>Ǿ<EFBFBD><C7BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>λ<EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>־λ,
|
||||||
|
* - <20><>Ҫ<EFBFBD><D2AA>Ԥ<EFBFBD><D4A4>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<C9BA>û<EFBFBD>и<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
if( (SRAM_Read_Byte(SRAM_IAP_NET_UPGRADE_Flag_ADDRESS) == TFTP_FUNTYPE_LocalIAP) )
|
||||||
|
{
|
||||||
|
SRAM_Write_Byte(0x01, SRAM_IAP_IAP_Reset_Flag_ADDRESS);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s <20><><EFBFBD>þ<EFBFBD><C3BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>־ %d",__func__,SRAM_Read_Byte(SRAM_IAP_IAP_Reset_Flag_ADDRESS));
|
||||||
|
}
|
||||||
|
|
||||||
|
if(result == 0x01)
|
||||||
|
{
|
||||||
|
Delay_Ms(100);
|
||||||
|
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
|
switch(data[BLV_UDP_HEAD_LEN])
|
||||||
|
{
|
||||||
|
case 0x01: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ",__func__,DataLen);
|
||||||
|
RCC_SET_GLOB_RST_KEEP(0x03);
|
||||||
|
Delay_Ms(100);
|
||||||
|
|
||||||
|
NVIC_SystemReset();
|
||||||
|
while(1);
|
||||||
|
break;
|
||||||
|
case 0x02: //<2F><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ",__func__,DataLen);
|
||||||
|
RCC_SET_GLOB_RST_KEEP(0x04); //0x04<30><34>APP <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||||
|
Delay_Ms(100);
|
||||||
|
while(1);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP_ReplyIAP_SendPack
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - IAP<41><50><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD> <20><><EFBFBD>ݷ<EFBFBD><DDB7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_ReplyIAP_SendPack(void)
|
||||||
|
{
|
||||||
|
uint16_t frameno = 0x8001;
|
||||||
|
uint8_t R_IP[4] = {0};
|
||||||
|
uint16_t R_Port = 0;
|
||||||
|
uint32_t sendlen = 0x00;
|
||||||
|
uint8_t rev = 0;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
SRAM_DMA_Read_Buff(R_IP,4,SRAM_IAP_IP_ADDRESS);
|
||||||
|
R_Port = SRAM_Read_Byte(SRAM_IAP_PORT_ADDRESS);
|
||||||
|
R_Port |= SRAM_Read_Byte(SRAM_IAP_PORT_ADDRESS+1) << 8;
|
||||||
|
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
Global_Large_Buff[sendlen++] = 0x01; //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -
|
||||||
|
sendlen += UDP_ADD_SoftwareVer(&Global_Large_Buff[sendlen]); //<2F><><EFBFBD>ӹ̼<D3B9><CCBC>汾
|
||||||
|
|
||||||
|
sendlen += 2;
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_IAP_Cmd,sendlen,frameno);
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
rev = WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver],Global_Large_Buff,&sendlen,R_IP,R_Port);
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : UDP_ReplyCloudIAP_SendPack
|
||||||
|
* Description : BLVͨѶЭ<D1B6><D0AD> - <20>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD> <20><><EFBFBD>ݷ<EFBFBD><DDB7>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t UDP_ReplyCloudIAP_SendPack(void)
|
||||||
|
{
|
||||||
|
uint16_t frameno = 0x8001;
|
||||||
|
uint8_t R_IP[4] = {0};
|
||||||
|
uint16_t R_Port = 0;
|
||||||
|
uint32_t sendlen = 0x00;
|
||||||
|
uint8_t rev = 0;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
SRAM_DMA_Read_Buff(R_IP,4,SRAM_IAP_IP_ADDRESS);
|
||||||
|
R_Port = SRAM_Read_Byte(SRAM_IAP_PORT_ADDRESS);
|
||||||
|
R_Port |= SRAM_Read_Byte(SRAM_IAP_PORT_ADDRESS+1) << 8;
|
||||||
|
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
Global_Large_Buff[sendlen++] = 0x01; //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -
|
||||||
|
sendlen += UDP_ADD_SoftwareVer(&Global_Large_Buff[sendlen]); //<2F><><EFBFBD>ӹ̼<D3B9><CCBC>汾
|
||||||
|
Global_Large_Buff[sendlen++] = 0x00;
|
||||||
|
|
||||||
|
sendlen += 2;
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_Cloud_IAP_Cmd,sendlen,frameno);
|
||||||
|
NetCRC16(Global_Large_Buff,sendlen);
|
||||||
|
|
||||||
|
rev = WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver],Global_Large_Buff,&sendlen,server_info.dis_ip,server_info.dis_port);
|
||||||
|
|
||||||
|
return rev;
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : UDP_Search_Cmd_Processing
|
* Function Name : UDP_Search_Cmd_Processing
|
||||||
* Description : BLVͨѶЭ<D1B6><D0AD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : BLVͨѶЭ<D1B6><D0AD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -760,6 +1305,108 @@ uint8_t Udp_QueryTime_Cmd_Process(uint8_t *data, uint16_t DataLen, uint8_t *ip,u
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : Udp_WriteRegister_Cmd_Processing
|
||||||
|
* Description : UDPͨѶЭ<D1B6><D0AD> - д<><D0B4><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t Udp_WriteRegister_Cmd_Processing(uint8_t *data, uint16_t DataLen, uint8_t *ip,uint16_t port)
|
||||||
|
{
|
||||||
|
uint8_t i = 0,temp = 0,temp_num = 0;
|
||||||
|
uint32_t read_register = 0,temp_offset = 0,temp_data = 0;
|
||||||
|
uint16_t pack_frame = 0;
|
||||||
|
uint32_t sendlen = BLV_UDP_HEAD_LEN; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
|
|
||||||
|
memset(Global_Large_Buff,0,sizeof(Global_Large_Buff));
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
|
pack_frame = UDP_Get_FrameNum(data); //֡<><D6A1>
|
||||||
|
|
||||||
|
if( server_info.udp_frame != pack_frame )
|
||||||
|
{
|
||||||
|
//֡<>Ų<EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
temp = 0x01;
|
||||||
|
|
||||||
|
if(data[BLV_UDP_HEAD_LEN] > 35) temp_num = 35; //<2F><><EFBFBD>üĴ<C3BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>35<33><35>
|
||||||
|
else temp_num = data[BLV_UDP_HEAD_LEN];
|
||||||
|
|
||||||
|
for(i = 0;i<temp_num;i++)
|
||||||
|
{
|
||||||
|
temp_offset = data[BLV_UDP_HEAD_LEN+i*8+4];
|
||||||
|
temp_offset <<= 8;
|
||||||
|
temp_offset |= data[BLV_UDP_HEAD_LEN+i*8+3];
|
||||||
|
temp_offset <<= 8;
|
||||||
|
temp_offset |= data[BLV_UDP_HEAD_LEN+i*8+2];
|
||||||
|
temp_offset <<= 8;
|
||||||
|
temp_offset |= data[BLV_UDP_HEAD_LEN+i*8+1];
|
||||||
|
|
||||||
|
temp_data = data[BLV_UDP_HEAD_LEN+i*8+8];
|
||||||
|
temp_data <<= 8;
|
||||||
|
temp_data |= data[BLV_UDP_HEAD_LEN+i*8+7];
|
||||||
|
temp_data <<= 8;
|
||||||
|
temp_data |= data[BLV_UDP_HEAD_LEN+i*8+6];
|
||||||
|
temp_data <<= 8;
|
||||||
|
temp_data |= data[BLV_UDP_HEAD_LEN+i*8+5];
|
||||||
|
|
||||||
|
read_register = SRAM_Register_Start_ADDRESS + temp_offset;
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"temp_offset:%X data:%X",read_register,temp_data);
|
||||||
|
|
||||||
|
if(read_register > SRAM_Register_End_ADDRESS)
|
||||||
|
{
|
||||||
|
temp = 0x02; //д<><D0B4>ʧ<EFBFBD><CAA7>
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"Not In The Right Range");
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><>Ȩʱ<C8A8><CAB1>д<EFBFBD><D0B4>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>±<EFBFBD><C2B1><EFBFBD>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB>RTCʱ<43><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1>ʹ<EFBFBD><CAB9>UTCʱ<43>䱣<EFBFBD><E4B1A3><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD>*/
|
||||||
|
if(read_register == (SRAM_Register_Start_ADDRESS + Register_MandateUTC_OFFSET))
|
||||||
|
{
|
||||||
|
S_RTC write_rtc;
|
||||||
|
memset(&write_rtc,0,sizeof(write_rtc));
|
||||||
|
Unix_Conversion_To_RTC(&write_rtc,temp_data);
|
||||||
|
RTC_WriteDate(write_rtc);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>ˢ<EFBFBD><CBA2>*/
|
||||||
|
if(read_register == (SRAM_Register_Start_ADDRESS + Register_MandateExpiresTime_OFFSET))
|
||||||
|
{
|
||||||
|
BLV_Set_Authorize_Status(temp_data,0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*<2A><><EFBFBD><EFBFBD>MCU<43><55><EFBFBD><EFBFBD>״̬*/
|
||||||
|
if(read_register == (SRAM_Register_Start_ADDRESS + Register_MandateLock_OFFSET))
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"Set_Authorize_Lock_Status:%X",temp_data);
|
||||||
|
if(temp_data == 0x00000001)
|
||||||
|
{
|
||||||
|
Set_Authorize_Lock_Status(0x01);
|
||||||
|
}else if(temp_data == 0x00000000)
|
||||||
|
{
|
||||||
|
Set_Authorize_Lock_Status(0x00);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
SRAM_Write_DW(temp_data,read_register);
|
||||||
|
if(temp_data != SRAM_Read_DW(read_register)) temp = 0x02; //д<><D0B4>ʧ<EFBFBD><CAA7>
|
||||||
|
}
|
||||||
|
|
||||||
|
Retain_Flash_Register_Data(); //<2F><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1>浽Flash<73><68>
|
||||||
|
}else{
|
||||||
|
//֡<><D6A1><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
sendlen = BLV_UDP_HEAD_LEN;
|
||||||
|
Global_Large_Buff[sendlen++] = temp; //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
UDP_Add_Header(Global_Large_Buff,In_WriteRegister_Cmd,sendlen,pack_frame); //<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>
|
||||||
|
//<2F><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>
|
||||||
|
NetCRC16(&Global_Large_Buff[0],sendlen);
|
||||||
|
WCHNET_SocketUdpSendTo(g_netinfo.SocketId[SocketIdnex_BLVSeriver], &Global_Large_Buff[0], &sendlen, server_info.dis_ip, server_info.dis_port);
|
||||||
|
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Udp_Internal_GetRoomRent_CMD
|
* Function Name : Udp_Internal_GetRoomRent_CMD
|
||||||
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>̬
|
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>̬
|
||||||
@@ -1068,12 +1715,16 @@ __attribute__((section(".non_0_wait"))) uint8_t Udp_Internal_Read_MCU_System_Sen
|
|||||||
}else {
|
}else {
|
||||||
/*<2A><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>Launcher_ ǰ<C7B0><D7BA><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>Ĭ<EFBFBD><C4AC>ΪLauncher_C1F_V02*/
|
/*<2A><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>Launcher_ ǰ<C7B0><D7BA><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD>Ĭ<EFBFBD><C4AC>ΪLauncher_C1F_V02*/
|
||||||
memset(temp_data,0,sizeof(temp_data));
|
memset(temp_data,0,sizeof(temp_data));
|
||||||
snprintf((char *)temp_data,sizeof(temp_data),"Launcher_C1F_V02 ");
|
snprintf((char *)temp_data,sizeof(temp_data),"Launcher_C1F_V04 ");
|
||||||
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+67],temp_data,20);
|
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+67],temp_data,20);
|
||||||
}
|
}
|
||||||
|
|
||||||
UDP_Add_Mac(&Global_Large_Buff[BLV_UDP_HEAD_LEN+87]); //MAC<41><43>ַ
|
UDP_Add_Mac(&Global_Large_Buff[BLV_UDP_HEAD_LEN+87]); //MAC<41><43>ַ
|
||||||
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+93],4,SRAM_Register_Start_ADDRESS + Register_ProjectCode_OFFSET); //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
Global_Large_Buff[BLV_UDP_HEAD_LEN+93] = 0x3D;
|
||||||
|
Global_Large_Buff[BLV_UDP_HEAD_LEN+94] = 0x04;
|
||||||
|
Global_Large_Buff[BLV_UDP_HEAD_LEN+95] = 0x00;
|
||||||
|
Global_Large_Buff[BLV_UDP_HEAD_LEN+96] = 0x00;
|
||||||
|
//SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+93],4,SRAM_Register_Start_ADDRESS + Register_ProjectCode_OFFSET); //<2F><>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+97],4,SRAM_Register_Start_ADDRESS + Register_RoomNumber_OFFSET);
|
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+97],4,SRAM_Register_Start_ADDRESS + Register_RoomNumber_OFFSET);
|
||||||
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+101],4,SRAM_Register_Start_ADDRESS + Register_HouseType_OFFSET);
|
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+101],4,SRAM_Register_Start_ADDRESS + Register_HouseType_OFFSET);
|
||||||
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+105],4,SRAM_Register_Start_ADDRESS + Register_ConfigVersion_OFFSET); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾
|
SRAM_DMA_Read_Buff(&Global_Large_Buff[BLV_UDP_HEAD_LEN+105],4,SRAM_Register_Start_ADDRESS + Register_ConfigVersion_OFFSET); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>汾
|
||||||
@@ -1087,11 +1738,12 @@ __attribute__((section(".non_0_wait"))) uint8_t Udp_Internal_Read_MCU_System_Sen
|
|||||||
|
|
||||||
//<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
//<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
|
||||||
memset(temp_data,0,sizeof(temp_data));
|
memset(temp_data,0,sizeof(temp_data));
|
||||||
snprintf((char *)temp_data,sizeof(temp_data),"BLV-C1");
|
snprintf((char *)temp_data,sizeof(temp_data),"BLV-C1F");
|
||||||
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+257],temp_data,32);
|
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+257],temp_data,32);
|
||||||
memset(temp_data,0,sizeof(temp_data));
|
memset(temp_data,0,sizeof(temp_data));
|
||||||
snprintf((char *)temp_data,sizeof(temp_data),"BLV-V9");
|
snprintf((char *)temp_data,sizeof(temp_data),"BLV-V9");
|
||||||
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+321],temp_data,32);
|
memcpy(&Global_Large_Buff[BLV_UDP_HEAD_LEN+321],temp_data,32);
|
||||||
|
|
||||||
//<2F><>ȡFlash<73>е<EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
//<2F><>ȡFlash<73>е<EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
//Flash_Read(&Global_Large_Buff[BLV_UDP_HEAD_LEN+257],64,SPIFLASH_MCU_Model_Revision_ADDRESS);
|
//Flash_Read(&Global_Large_Buff[BLV_UDP_HEAD_LEN+257],64,SPIFLASH_MCU_Model_Revision_ADDRESS);
|
||||||
//Flash_Read(&Global_Large_Buff[BLV_UDP_HEAD_LEN+321],64,SPIFLASH_MCU_Control_Revision_ADDRESS);
|
//Flash_Read(&Global_Large_Buff[BLV_UDP_HEAD_LEN+321],64,SPIFLASH_MCU_Control_Revision_ADDRESS);
|
||||||
@@ -2222,6 +2874,7 @@ void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t po
|
|||||||
temp_val = data[len-1];
|
temp_val = data[len-1];
|
||||||
temp_val <<= 0x08;
|
temp_val <<= 0x08;
|
||||||
temp_val |= data[len-2];
|
temp_val |= data[len-2];
|
||||||
|
|
||||||
if(NetCRC16_2(data,len-2) != temp_val) return ; //CRCУ<43><D0A3>ʧ<EFBFBD><CAA7>,ֱ<><D6B1><EFBFBD>˳<EFBFBD>
|
if(NetCRC16_2(data,len-2) != temp_val) return ; //CRCУ<43><D0A3>ʧ<EFBFBD><CAA7>,ֱ<><D6B1><EFBFBD>˳<EFBFBD>
|
||||||
|
|
||||||
switch(data[CMD_OFFSET])
|
switch(data[CMD_OFFSET])
|
||||||
@@ -2232,25 +2885,43 @@ void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t po
|
|||||||
// case In_IAP_Cmd: //IAP APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// case In_IAP_Cmd: //IAP APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
// UDP_IAP_Cmd_Processing(data, len, ip, port);
|
// UDP_IAP_Cmd_Processing(data, len, ip, port);
|
||||||
// break;
|
// break;
|
||||||
// case In_Subgroup_Cmd: //IAP <20>̼<EFBFBD><CCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -- ȡ<><C8A1>û<EFBFBD><C3BB>ʹ<EFBFBD><CAB9>
|
|
||||||
// UDP_Subgroup_Cmd_Processing(data, len, ip, port);
|
case In_Cloud_IAP_Cmd: //<2F>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
||||||
// break;
|
|
||||||
|
UDP_Cloud_IAP_Cmd_Processing(data, len, ip, port);
|
||||||
|
|
||||||
|
break;
|
||||||
case In_Read_MCUSystem_Cmd: //<2F><>ȡMCU<43><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - Ҳ<><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
case In_Read_MCUSystem_Cmd: //<2F><>ȡMCU<43><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - Ҳ<><D2B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
UDP_Read_MCUSystem_Cmd_Processing(data, len, ip, port);
|
UDP_Read_MCUSystem_Cmd_Processing(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
case In_QueryTime_Cmd: //<2F><>ȡʱ<C8A1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
case In_QueryTime_Cmd: //<2F><>ȡʱ<C8A1><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Udp_QueryTime_Cmd_Process(data, len, ip, port);
|
Udp_QueryTime_Cmd_Process(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
|
case In_ReadRegister_Cmd:
|
||||||
|
|
||||||
|
break;
|
||||||
|
case In_WriteRegister_Cmd:
|
||||||
|
Udp_WriteRegister_Cmd_Processing(data, len, ip, port);
|
||||||
|
break;
|
||||||
case In_DevState_Cmd: //<2F>ϱ<EFBFBD><CFB1>豸״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
case In_DevState_Cmd: //<2F>ϱ<EFBFBD><CFB1>豸״̬<D7B4><CCAC><EFBFBD><EFBFBD>
|
||||||
Udp_Internal_RoomState_Process(data, len, ip, port);
|
Udp_Internal_RoomState_Process(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
case In_PeriodicReport_Cmd: //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>
|
case In_PeriodicReport_Cmd: //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Udp_Internal_Periodic_Report_Process(data, len, ip, port);
|
Udp_Internal_Periodic_Report_Process(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
case In_BLVIAPLogic_Cmd:
|
case In_BLVIAP_Cmd: //PC <20>̼<EFBFBD><CCBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
UDP_IAP_Cmd_Processing(data, len, ip, port);
|
||||||
|
break;
|
||||||
|
case In_BLVIAPCheck_Cmd: //PC У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
UDP_BLVIAPCheck_Cmd_Processing(data, len, ip, port);
|
||||||
|
break;
|
||||||
|
case In_BLVIAPJump_Cmd: //PC <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||||
|
UDP_BLVIAPJump_Cmd_Processing(data, len, ip, port);
|
||||||
|
break;
|
||||||
|
case In_BLVIAPLogic_Cmd: //PC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Udp_Internal_BLVIAP_Logic(data, len, ip, port);
|
Udp_Internal_BLVIAP_Logic(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
case In_BLVPCTestDevice_Cmd:
|
case In_BLVPCTestDevice_Cmd: //PC <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Udp_Internal_BLVPCTestDevice_Process(data, len, ip, port);
|
Udp_Internal_BLVPCTestDevice_Process(data, len, ip, port);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
@@ -2274,7 +2945,7 @@ void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t po
|
|||||||
__attribute__((section(".non_0_wait"))) void BLV_UDP_Comm_Task(void)
|
__attribute__((section(".non_0_wait"))) void BLV_UDP_Comm_Task(void)
|
||||||
{
|
{
|
||||||
static uint32_t udp_state_tick = 0;
|
static uint32_t udp_state_tick = 0;
|
||||||
uint32_t temp_val = 0;
|
uint32_t temp_val = 0,temp_rev = 0;
|
||||||
|
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
if( SysTick_1ms - udp_state_tick >= 100 )
|
if( SysTick_1ms - udp_state_tick >= 100 )
|
||||||
@@ -2283,16 +2954,6 @@ __attribute__((section(".non_0_wait"))) void BLV_UDP_Comm_Task(void)
|
|||||||
|
|
||||||
if( (WCHNET_Get_PHY_Linked_Status() == 0x01) || (server_info.init_flag == 0x00) ) return ; //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
|
if( (WCHNET_Get_PHY_Linked_Status() == 0x01) || (server_info.init_flag == 0x00) ) return ; //DNS<4E><53><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
|
||||||
|
|
||||||
/*<2A><><EFBFBD>Ҳ<EFBFBD><D2B2><EFBFBD>TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
|
||||||
// if(IAPVarTypeStruct_Ptr != NULL)
|
|
||||||
// {
|
|
||||||
// if(IAPSTART == IAPVarTypeStruct_Ptr->IapState)
|
|
||||||
// {
|
|
||||||
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"RoomState_Cmd<6D><64>ͣ,IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>..");
|
|
||||||
// return;
|
|
||||||
// }
|
|
||||||
// }
|
|
||||||
|
|
||||||
server_info.udp_scan_cnt++;
|
server_info.udp_scan_cnt++;
|
||||||
if(server_info.udp_scan_cnt >= 9)
|
if(server_info.udp_scan_cnt >= 9)
|
||||||
{
|
{
|
||||||
@@ -2322,6 +2983,8 @@ __attribute__((section(".non_0_wait"))) void BLV_UDP_Comm_Task(void)
|
|||||||
//UDP_ActSend_PowerChange_Scan_State(); //ɨ<><C9A8>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>
|
//UDP_ActSend_PowerChange_Scan_State(); //ɨ<><C9A8>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
//Udp_Scan_Roomstate(); //ɨ<>跿<EFBFBD><E8B7BF><EFBFBD>豸״̬
|
//Udp_Scan_Roomstate(); //ɨ<>跿<EFBFBD><E8B7BF><EFBFBD>豸״̬
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
switch(server_info.udp_sta)
|
switch(server_info.udp_sta)
|
||||||
@@ -2340,6 +3003,47 @@ __attribute__((section(".non_0_wait"))) void BLV_UDP_Comm_Task(void)
|
|||||||
}
|
}
|
||||||
|
|
||||||
return ;
|
return ;
|
||||||
|
}else{
|
||||||
|
//<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
|
||||||
|
if( (SRAM_Read_Byte(SRAM_IAP_NET_UPGRADE_Flag_ADDRESS) == TFTP_FUNTYPE_LocalIAP)
|
||||||
|
&& (SRAM_Read_Byte(SRAM_IAP_IAP_Reset_Flag_ADDRESS) == 0x01) )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD>-<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> ..");
|
||||||
|
temp_rev = UDP_ReplyIAP_SendPack();
|
||||||
|
if(temp_rev == WCHNET_ERR_SUCCESS)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
SRAM_Write_Byte(0xFF,SRAM_IAP_NET_UPGRADE_Flag_ADDRESS); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
SRAM_Write_Byte(0xFF,SRAM_IAP_IAP_Reset_Flag_ADDRESS);
|
||||||
|
}else {
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD>ʧ<EFBFBD><EFBFBD> %x<><78>",temp_rev);
|
||||||
|
temp_rev = SRAM_Read_Byte(SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
|
||||||
|
if(temp_rev > 5) SRAM_Write_Byte(0xFF,SRAM_IAP_NET_UPGRADE_Flag_ADDRESS); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
temp_rev++;
|
||||||
|
SRAM_Write_Byte(0xFF,SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ;
|
||||||
|
}else if( SRAM_Read_Byte(SRAM_IAP_NET_UPGRADE_Flag_ADDRESS) == TFTP_FUNTYPE_CloudIAP )
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD>-<2D>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD> -..");
|
||||||
|
temp_rev = UDP_ReplyCloudIAP_SendPack();
|
||||||
|
if(temp_rev == WCHNET_ERR_SUCCESS)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
SRAM_Write_Byte(0xFF,SRAM_IAP_NET_UPGRADE_Flag_ADDRESS); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
|
||||||
|
}else {
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ظ<EFBFBD>ʧ<EFBFBD><EFBFBD> %x<><78>",temp_rev);
|
||||||
|
temp_rev = SRAM_Read_Byte(SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
|
||||||
|
if(temp_rev > 5) SRAM_Write_Byte(0xFF,SRAM_IAP_NET_UPGRADE_Flag_ADDRESS); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
temp_rev++;
|
||||||
|
SRAM_Write_Byte(0xFF,SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
|
||||||
|
}
|
||||||
|
|
||||||
|
return ;
|
||||||
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDPע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><EFBFBD><EFBFBD>");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDPע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><EFBFBD><EFBFBD>");
|
||||||
|
|||||||
@@ -795,6 +795,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
Poll485_Info.Retry_Flag = 0x01;
|
Poll485_Info.Retry_Flag = 0x01;
|
||||||
|
|
||||||
/*2021 09 17 <20><><EFBFBD><EFBFBD><DEB8><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>жϣ<D0B6>RS485OCCUPYNOTIME<4D><45>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>û<EFBFBD>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸*/
|
/*2021 09 17 <20><><EFBFBD><EFBFBD><DEB8><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>жϣ<D0B6>RS485OCCUPYNOTIME<4D><45>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>û<EFBFBD>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸*/
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20><>ȡ<EFBFBD>豸 %x",Poll485_Info.n_list_read_addr);
|
||||||
|
|
||||||
if((Poll485_Info.n_polling_cf!=0x00000000) && (Poll485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)Poll485_Info.n_polling_cf)(Poll485_Info.n_list_read_addr);
|
if((Poll485_Info.n_polling_cf!=0x00000000) && (Poll485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)Poll485_Info.n_polling_cf)(Poll485_Info.n_list_read_addr);
|
||||||
|
|
||||||
@@ -851,7 +852,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
case Change_Dev:
|
case Change_Dev:
|
||||||
Poll485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
|
Poll485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
if(Poll485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_POLL_Device_List_Addr)) Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
|
if(Poll485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_POLL_Device_List_Addr)) Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20>л<EFBFBD><D0BB>豸 %x",Poll485_Info.n_list_read_addr);
|
||||||
Poll485_Info.POLL_Start = B_Polling;
|
Poll485_Info.POLL_Start = B_Polling;
|
||||||
break;
|
break;
|
||||||
case B_Retry:
|
case B_Retry:
|
||||||
@@ -868,6 +869,8 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
Poll485_Info.n_retry_num--;
|
Poll485_Info.n_retry_num--;
|
||||||
Poll485_Info.POLL_Start = Wait_Reply;
|
Poll485_Info.POLL_Start = Wait_Reply;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> %x",Poll485_Info.n_list_read_addr);
|
||||||
}else if((Poll485_Info.Retry_Flag == 0x01) && (Poll485_Info.n_retry_num == 0x00))
|
}else if((Poll485_Info.Retry_Flag == 0x01) && (Poll485_Info.n_retry_num == 0x00))
|
||||||
{
|
{
|
||||||
Poll485_Info.POLL_Start = Change_Dev; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><DCA3>л<EFBFBD><D0BB>¸<EFBFBD><C2B8>豸
|
Poll485_Info.POLL_Start = Change_Dev; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><DCA3>л<EFBFBD><D0BB>¸<EFBFBD><C2B8>豸
|
||||||
@@ -880,6 +883,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
if(g_uart[UART_0].RX_Buffer_WriteAddr != g_uart[UART_0].RX_Buffer_ReadAddr)
|
if(g_uart[UART_0].RX_Buffer_WriteAddr != g_uart[UART_0].RX_Buffer_ReadAddr)
|
||||||
{
|
{
|
||||||
data_len = SRAM_Read_Word(g_uart[UART_0].RX_Buffer_ReadAddr);
|
data_len = SRAM_Read_Word(g_uart[UART_0].RX_Buffer_ReadAddr);
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿ڽ<CBBF><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD> %x - %d",g_uart[UART_0].RX_Buffer_ReadAddr,data_len);
|
||||||
|
|
||||||
if((Poll485_Info.n_processing_cf!=0x00000000) && (Poll485_Info.n_processing_cf!=0xFFFFFFFF)) {
|
if((Poll485_Info.n_processing_cf!=0x00000000) && (Poll485_Info.n_processing_cf!=0xFFFFFFFF)) {
|
||||||
Poll485_Info.Retry_Flag = ((fun2_prt )Poll485_Info.n_processing_cf)(Poll485_Info.n_list_read_addr,g_uart[UART_0].RX_Buffer_ReadAddr + 2,data_len);
|
Poll485_Info.Retry_Flag = ((fun2_prt )Poll485_Info.n_processing_cf)(Poll485_Info.n_list_read_addr,g_uart[UART_0].RX_Buffer_ReadAddr + 2,data_len);
|
||||||
@@ -901,7 +905,10 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
/*<2A><><EFBFBD>ճ<EFBFBD>ʱ - <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>*/
|
/*<2A><><EFBFBD>ճ<EFBFBD>ʱ - <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>*/
|
||||||
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) Poll485_Info.POLL_Start = B_Retry;
|
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) {
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿ڽ<CBBF><DABD>ճ<EFBFBD>ʱ - <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>");
|
||||||
|
Poll485_Info.POLL_Start = B_Retry;
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
case B_Wait: //<2F><><EFBFBD>ͳɹ<CDB3><C9B9>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
|
case B_Wait: //<2F><><EFBFBD>ͳɹ<CDB3><C9B9>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
|
||||||
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) Poll485_Info.POLL_Start = Change_Dev;
|
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) Poll485_Info.POLL_Start = Change_Dev;
|
||||||
@@ -1344,6 +1351,75 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_ModeTask(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_Nor_Dev_Polling_Task
|
||||||
|
* Description : <20><>ͨ<EFBFBD>豸ɨ<E8B1B8><C9A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֮<><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5>豸
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLV_Nor_Dev_Polling_Task(void)
|
||||||
|
{
|
||||||
|
uint16_t i;
|
||||||
|
uint32_t Start_addr = SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ʼ<EFBFBD><CABC>ַ
|
||||||
|
uint32_t List_addr;
|
||||||
|
static uint8_t FlagDis = 0x01;
|
||||||
|
|
||||||
|
if(0x01 == FlagDis)
|
||||||
|
{
|
||||||
|
FlagDis = 0x00;
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ:%08X,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d",Start_addr,NorDevInfoGlobal.NorDeviceNum);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
for(i = 0; i < NorDevInfoGlobal.NorDeviceNum; i++) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸
|
||||||
|
{
|
||||||
|
List_addr = Start_addr + i*SRAM_Device_List_Size;
|
||||||
|
{
|
||||||
|
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
if(BLV_Device_PublicInfo_Read_To_Struct(List_addr,&BUS_Public) == 0x00)
|
||||||
|
{
|
||||||
|
switch(BUS_Public.type)
|
||||||
|
{
|
||||||
|
// case Dev_Host_HVout: //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
case Dev_Host_LVinput: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
case Dev_Host_LVoutput: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
case Dev_Host_Service: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
case Dev_NodeCurtain: //<2F>ɽڵ㴰<DAB5><E3B4B0> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
|
||||||
|
case Dev_Rs485_PB20_LD:
|
||||||
|
case Dev_Rs485_PB20_LS:
|
||||||
|
case Dev_Rs485_PB20_Relay:
|
||||||
|
case DEV_Virtual_NoCard:
|
||||||
|
case DEV_Virtual_Time:
|
||||||
|
case DEV_Virtual_Card:
|
||||||
|
case DEV_Virtual_ColorTemp:
|
||||||
|
case DEV_Carbon_Saved:
|
||||||
|
case Dev_Scene_Restore:
|
||||||
|
case Dev_Virtual_GlobalSet:
|
||||||
|
if(NULL != BUS_Public.DevFunInfo.Dev_Data_Process) //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD>벻Ϊ0
|
||||||
|
{
|
||||||
|
BUS_Public.DevFunInfo.Dev_Data_Process(List_addr); //<2F><><EFBFBD><EFBFBD>ת
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : BLV_NormalPort_ModeTask
|
||||||
|
* Description :
|
||||||
|
*******************************************************************************/
|
||||||
|
void BLV_Nor_Dev_ModeTask(void)
|
||||||
|
{
|
||||||
|
static uint32_t dev_Nor_processing_tick = 0;
|
||||||
|
|
||||||
|
if( SysTick_1ms - dev_Nor_processing_tick > 4) //5ms<6D><73><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
|
||||||
|
{
|
||||||
|
dev_Nor_processing_tick = SysTick_1ms;
|
||||||
|
BLV_Nor_Dev_Polling_Task();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : BLV_Active_Set_List_Addr
|
* Function Name : BLV_Active_Set_List_Addr
|
||||||
* Description : ActivePort <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
* Description : ActivePort <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
@@ -1572,7 +1648,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
|
|||||||
SRAM_Write_DW(read_addr,SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR);
|
SRAM_Write_DW(read_addr,SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR);
|
||||||
}
|
}
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s SRAM addr:%08X",__func__, write_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s SRAM addr:%X",__func__, write_addr);
|
||||||
|
|
||||||
memset(data,0x00,6); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>0
|
memset(data,0x00,6); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>0
|
||||||
|
|
||||||
@@ -1583,7 +1659,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
|
|||||||
|
|
||||||
if( (write_addr + 0x06) > SRAM_DEVICE_ONLINE_STATE_END_ADDR )
|
if( (write_addr + 0x06) > SRAM_DEVICE_ONLINE_STATE_END_ADDR )
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s overstep_1 %08X!!!",__func__,write_addr);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s overstep_1 %X!!!",__func__,write_addr);
|
||||||
len = SRAM_DEVICE_ONLINE_STATE_END_ADDR - write_addr;
|
len = SRAM_DEVICE_ONLINE_STATE_END_ADDR - write_addr;
|
||||||
SRAM_DMA_Write_Buff(data,len,write_addr);
|
SRAM_DMA_Write_Buff(data,len,write_addr);
|
||||||
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
|
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
|
||||||
@@ -1596,7 +1672,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
|
|||||||
|
|
||||||
if(write_addr > SRAM_DEVICE_ONLINE_STATE_END_ADDR)
|
if(write_addr > SRAM_DEVICE_ONLINE_STATE_END_ADDR)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s overstep:%08X",__func__,write_addr);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s overstep:%X",__func__,write_addr);
|
||||||
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
|
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -57,6 +57,9 @@
|
|||||||
#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
|
#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
|
||||||
#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
|
#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||||
|
|
||||||
|
#define DEV_ACTION_INFO_Size 864 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ܳ<EFBFBD> 864Byte
|
||||||
|
#define DevActionInfo_DevActionState_DevAddrIn_Index 59 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD>±<EFBFBD>
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
{
|
{
|
||||||
uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -67,8 +70,8 @@ typedef struct
|
|||||||
{
|
{
|
||||||
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
|
||||||
uint16_t inAddr; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
uint16_t DevLoop; //<2F>豸<EFBFBD><EFBFBD>·
|
||||||
uint16_t inType; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint16_t DevEvent; //<2F>豸<EFBFBD>¼<EFBFBD>
|
||||||
}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
|
}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
typedef struct
|
typedef struct
|
||||||
@@ -150,7 +153,6 @@ typedef struct CFG_Action_Add
|
|||||||
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
|
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
|
||||||
|
|
||||||
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
|
||||||
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
|
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
|
||||||
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
|
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
|
||||||
@@ -245,16 +247,11 @@ typedef struct
|
|||||||
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
||||||
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
|
||||||
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
uint32_t DlyExcuteTime; //<EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ʱ<EFBFBD>䱻<EFBFBD><EFBFBD>ֵ
|
uint32_t DlyExcuteTime; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ʱ<EFBFBD>䱻<EFBFBD><EFBFBD>ֵ
|
||||||
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
|
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
|
||||||
|
|
||||||
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
|
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
|
||||||
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
|
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
typedef struct{
|
typedef struct{
|
||||||
uint8_t Addr;
|
uint8_t Addr;
|
||||||
uint16_t ExpandReadState[32];
|
uint16_t ExpandReadState[32];
|
||||||
@@ -269,15 +266,10 @@ typedef struct{
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern BLV_DevAction_Manage_G DevActionGlobal;
|
extern BLV_DevAction_Manage_G DevActionGlobal;
|
||||||
|
|
||||||
|
uint8_t DevAction_Info_Write_To_SRAM(uint32_t addr,DEV_ACTION_INFO *DevAction_Info);
|
||||||
|
uint8_t DevAction_Info_Read_To_Struct(uint32_t addr,DEV_ACTION_INFO *DevAction_Info);
|
||||||
void Logic_DevAction_Add(uint8_t *data,uint16_t len);
|
void Logic_DevAction_Add(uint8_t *data,uint16_t len);
|
||||||
|
|
||||||
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
uint32_t DevAction_No_Get(uint16_t DevActionNo);
|
||||||
@@ -287,5 +279,6 @@ void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
|
|||||||
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
|
||||||
|
|
||||||
void BLV_DevAction_Task(void);
|
void BLV_DevAction_Task(void);
|
||||||
|
void BLV_DevDly_Task(void);
|
||||||
|
|
||||||
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */
|
||||||
|
|||||||
@@ -40,6 +40,8 @@
|
|||||||
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||||
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define In_Cloud_IAP_Cmd 0x68 //<2F>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
#define In_SeriaNet_Cmd 0x70 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
|
#define In_SeriaNet_Cmd 0x70 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
|
||||||
#define In_SeriaNetReported_Cmd 0x71 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
#define In_SeriaNetReported_Cmd 0x71 //<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
|
||||||
|
|
||||||
@@ -75,6 +77,12 @@
|
|||||||
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
|
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
|
||||||
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
|
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
|
||||||
|
|
||||||
|
#define IAPPlan_State_Starting 0x01 //<2F><><EFBFBD><EFBFBD>״̬ - <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define IAPPlan_State_Underway 0x02 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define IAPPlan_State_Checking 0x03 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>
|
||||||
|
#define IAPPlan_State_CheckSucc 0x04 //<2F><><EFBFBD><EFBFBD>״̬ - У<><D0A3><EFBFBD>ɹ<EFBFBD>,RCU<43><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
#define IAPPlan_State_IAPTimeout 0x05 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
|
||||||
|
|
||||||
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
|
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
|
||||||
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
|
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
|
||||||
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
|
||||||
@@ -96,8 +104,15 @@ uint8_t Udp_Internal_SeriaNet_Uploading(uint8_t port,uint32_t baud,uint32_t data
|
|||||||
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
|
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
|
||||||
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
|
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
|
||||||
|
|
||||||
|
uint8_t UDP_BLVIAPPlan_Cmd_SendPack(uint8_t iap_state);
|
||||||
|
|
||||||
|
uint8_t UDP_ReplyIAP_SendPack(void);
|
||||||
|
uint8_t UDP_ReplyCloudIAP_SendPack(void);
|
||||||
|
|
||||||
void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t port);
|
void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t port);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void BLV_UDP_Comm_Task(void);
|
void BLV_UDP_Comm_Task(void);
|
||||||
|
|
||||||
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */
|
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */
|
||||||
|
|||||||
@@ -346,6 +346,8 @@ void BLV_PollPort_ModeTask(void);
|
|||||||
void BLV_ActivePort_Task(void);
|
void BLV_ActivePort_Task(void);
|
||||||
void Act485Port_Passthrough_Task(void);
|
void Act485Port_Passthrough_Task(void);
|
||||||
void BLV_ActivePort_ModeTask(void);
|
void BLV_ActivePort_ModeTask(void);
|
||||||
|
void BLV_Nor_Dev_ModeTask(void);
|
||||||
|
|
||||||
void BLV_Active_Set_List_Addr(uint32_t addr);
|
void BLV_Active_Set_List_Addr(uint32_t addr);
|
||||||
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
|
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
|
||||||
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);
|
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);
|
||||||
|
|||||||
@@ -20,9 +20,11 @@
|
|||||||
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
|
||||||
|
|
||||||
|
|
||||||
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
|
#define SPIFLASH_UPDATE_FLAG_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
|
||||||
|
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000400 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
|
|
||||||
|
#define SPIFLASH_APP_Data_Start_Addr 0x00001000
|
||||||
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
|
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
|
||||||
|
|
||||||
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
#define SPIFLASH_APP_End_Addr 0x0006FFFF
|
||||||
|
|||||||
@@ -10,7 +10,7 @@
|
|||||||
|
|
||||||
#include "ch564.h"
|
#include "ch564.h"
|
||||||
|
|
||||||
#define SYS_LED_ON GPIOB_ResetBits(GPIO_Pin_12)
|
#define SYS_LED_ON GPIOA_ResetBits(GPIO_Pin_12)
|
||||||
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
|
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
|
||||||
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)
|
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)
|
||||||
|
|
||||||
|
|||||||
@@ -19,13 +19,13 @@
|
|||||||
#define App_Procedure_Not_Ready 0x44 //Appδ<CEB4><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
#define App_Procedure_Not_Ready 0x44 //Appδ<CEB4><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
|
||||||
|
|
||||||
//MCU Flash Address range(0x0 -- 0x6FFFF) Size(448K)
|
//MCU Flash Address range(0x0 -- 0x6FFFF) Size(448K)
|
||||||
#define MCU_APP_Flash_Start_Addr 0x00007000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
#define MCU_APP_Flash_Start_Addr 0x00001000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
#define MCU_APP_Data_Start_Addr 0x00007000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
#define MCU_APP_Data_Start_Addr 0x00001000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
||||||
#define MCU_APP_Data_End_Addr 0x00027DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Data_End_Addr 0x00067DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
#define MCU_APP_Feature_Addr 0x00027E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Feature_Addr 0x00067E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
#define MCU_APP_Flash_End_Addr 0x00027FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define MCU_APP_Flash_End_Addr 0x00067FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
#define MCU_APP_Feature_PageAddr 0x00027000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
|
#define MCU_APP_Feature_PageAddr 0x00067000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
|
||||||
#define MCU_APP_Feature_PageOffset 0x00000E00 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
#define MCU_APP_Feature_PageOffset 0x00000E00 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
|
||||||
#define APP_FEATURE_SIZE 0x0200 //512Byte
|
#define APP_FEATURE_SIZE 0x0200 //512Byte
|
||||||
|
|
||||||
|
|||||||
@@ -116,7 +116,8 @@
|
|||||||
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
|
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
|
||||||
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
|
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
|
||||||
|
|
||||||
|
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3> <20><>С:0x10 2026-01-14*/
|
||||||
|
#define SRAM_APP_Write_Count_Addr 0x0000E900
|
||||||
|
|
||||||
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
|
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
|
||||||
@@ -170,19 +171,9 @@
|
|||||||
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
|
||||||
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F><EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
|
||||||
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
|
|
||||||
|
|
||||||
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
|
||||||
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
|
||||||
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
|
|
||||||
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
|
|
||||||
|
|
||||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
|
||||||
|
|
||||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
#define SRAM_Register_Start_ADDRESS 0x0008E900
|
#define SRAM_Register_Start_ADDRESS 0x0004E000
|
||||||
#define SRAM_Register_End_ADDRESS 0x0008EFFF
|
#define SRAM_Register_End_ADDRESS 0x0004EFFF
|
||||||
|
|
||||||
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
|
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
|
||||||
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
|
||||||
@@ -222,29 +213,39 @@
|
|||||||
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
|
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
|
||||||
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
|
#define SRAM_IAP_APP_FILE_ADDRESS 0x00100000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ - 412K
|
||||||
|
#define SRAM_IAP_APP_FILE_End_ADDRESS 0x00167FFF //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
#define SRAM_IAP_IP_ADDRESS 0x00168000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_IAP_PORT_ADDRESS 0x00168004 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD><EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
|
||||||
|
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x00168006 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
|
||||||
|
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x00168007 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8>ķ<EFBFBD><C4B7>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɵ<EFBFBD><C9B5>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> - 1Byte
|
||||||
|
#define SRAM_IAP_IAP_Reset_Flag_ADDRESS 0x00168008 //SRAM<41>д<EFBFBD><D0B4>ž<EFBFBD><C5BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<C9BA>λ<EFBFBD><CEBB>־λ
|
||||||
|
|
||||||
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
|
||||||
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD><EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00190000 //SRAM<41><4D><EFBFBD><EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00190000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
|
||||||
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00190004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
|
||||||
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00190008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
|
||||||
|
|
||||||
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
|
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00190200
|
||||||
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
|
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x001FFFFF
|
||||||
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
|
||||||
|
|
||||||
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
|
||||||
#define SRAM_DevAction_List_Num 950
|
#define SRAM_DevAction_List_Num 950
|
||||||
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
#define SRAM_DevAction_List_Start_Addr 0x00200000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
|
||||||
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
#define SRAM_DevAction_List_End_Addr 0x002EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
|
|
||||||
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
|
|
||||||
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
|
||||||
|
|
||||||
|
#define SRAM_BlwMap_List_Start_Addr 0x002F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
|
||||||
|
#define SRAM_BlwMap_List_End_Addr 0x002F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
#define SRAM_DevDly_List_Start_Addr 0x002F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
|
||||||
|
#define SRAM_DevDly_List_End_Addr 0x002FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@@ -17,10 +17,10 @@
|
|||||||
#define USART_BUFFER_NUM 3
|
#define USART_BUFFER_NUM 3
|
||||||
#define USART_BUFFER_SIZE 100
|
#define USART_BUFFER_SIZE 100
|
||||||
|
|
||||||
#define MCU485_EN1_H
|
#define MCU485_EN1_H GPIOD_SetBits(GPIO_Pin_21)
|
||||||
#define MCU485_EN1_L
|
#define MCU485_EN1_L GPIOD_ResetBits(GPIO_Pin_21)
|
||||||
#define MCU485_EN2_H
|
#define MCU485_EN2_H GPIOB_SetBits(GPIO_Pin_15)
|
||||||
#define MCU485_EN2_L
|
#define MCU485_EN2_L GPIOB_ResetBits(GPIO_Pin_15)
|
||||||
#define MCU485_EN3_H
|
#define MCU485_EN3_H
|
||||||
#define MCU485_EN3_L
|
#define MCU485_EN3_L
|
||||||
|
|
||||||
@@ -70,7 +70,7 @@ void Uart2_Flush(uint16_t over_time);
|
|||||||
void Uart3_Flush(uint16_t over_time);
|
void Uart3_Flush(uint16_t over_time);
|
||||||
|
|
||||||
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||||
void MCU485_SendString_1(uint8_t *buf, uint16_t len);
|
void MCU485_SendString_0(uint8_t *buf, uint16_t len);
|
||||||
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
|
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
|
||||||
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
|
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
|
||||||
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
|
||||||
|
|||||||
@@ -8,6 +8,9 @@
|
|||||||
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
|
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
|
||||||
#define MCU_DRIVER_INC_WATCHDOG_H_
|
#define MCU_DRIVER_INC_WATCHDOG_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include "ch564.h"
|
||||||
|
|
||||||
void WDT_Init(void);
|
void WDT_Init(void);
|
||||||
void WDT_Feed(void);
|
void WDT_Feed(void);
|
||||||
void WDT_Reinit(void);
|
void WDT_Reinit(void);
|
||||||
|
|||||||
@@ -34,11 +34,12 @@ __attribute__((section(".non_0_wait"))) void Action_Coord_Get(uint32_t Dev_proce
|
|||||||
|
|
||||||
for(i = 0; i < DevActionGlobal.DevActionNum; i++) //
|
for(i = 0; i < DevActionGlobal.DevActionNum; i++) //
|
||||||
{
|
{
|
||||||
DevActionAddr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
|
DevActionAddr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size + DevActionInfo_DevActionState_DevAddrIn_Index;
|
||||||
|
|
||||||
if(SRAM_Read_DW(DevActionAddr+sizeof(Dev_Action_Core)+sizeof(Dev_Action_Input)+sizeof(Dev_Action_Cond)+sizeof(Dev_Action_State)-4) == Dev_processing_addr)
|
if(SRAM_Read_DW(DevActionAddr) == Dev_processing_addr)
|
||||||
{
|
{
|
||||||
BUS_Public->ActionCoord = i; //<2F><>ǰ<EFBFBD><C7B0>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>һ<EFBFBD>µĶ<C2B5><C4B6><EFBFBD>
|
BUS_Public->ActionCoord = i; //<2F><>ǰ<EFBFBD><C7B0>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>һ<EFBFBD>µĶ<C2B5><C4B6><EFBFBD>
|
||||||
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -74,8 +75,7 @@ __attribute__((section(".non_0_wait"))) void Dev_Coord_Get(void)
|
|||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
|
||||||
|
|
||||||
DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
|
DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%08X", DevHVoutInfo.DevC5IOAddr);
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%X", DevHVoutInfo.DevC5IOAddr);
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately); //<2F>̵<EFBFBD><CCB5><EFBFBD>˽<EFBFBD><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
|
|
||||||
BLV_Device_Info_Write_To_SRAM(Dev_processing_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
BLV_Device_Info_Write_To_SRAM(Dev_processing_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
|
||||||
}else {
|
}else {
|
||||||
@@ -106,28 +106,36 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
|
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
|
||||||
{
|
{
|
||||||
list_addri = SRAM_DevAction_List_Start_Addr + i * SRAM_DevAction_List_Size;
|
list_addri = SRAM_DevAction_List_Start_Addr + i * SRAM_DevAction_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoi, sizeof(DEV_ACTION_INFO), list_addri);
|
if(DevAction_Info_Read_To_Struct(list_addri, &DevActionInfoi) != 0x00)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addri);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%x",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%x",
|
||||||
DevActionInfoi.DevCtrlNum,
|
DevActionInfoi.DevCtrlNum, \
|
||||||
DevActionInfoi.DevActionInput.DevType,
|
DevActionInfoi.DevActionInput.DevType, \
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr, \
|
||||||
DevActionInfoi.DevActionState.DevAddrIn);
|
DevActionInfoi.DevActionState.DevAddrIn);
|
||||||
|
|
||||||
Dbg_Print_Buff(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>ӡ:",(uint8_t *)&DevActionInfoi,sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input)+sizeof(Dev_Action_Cond)+sizeof(Dev_Action_State));
|
|
||||||
|
|
||||||
for(j = 0; j < DevActionGlobal.DevActionNum ; j++)
|
for(j = 0; j < DevActionGlobal.DevActionNum ; j++)
|
||||||
{
|
{
|
||||||
if( j != i )
|
if( j != i )
|
||||||
{
|
{
|
||||||
list_addrj = SRAM_DevAction_List_Start_Addr + j * SRAM_DevAction_List_Size;
|
list_addrj = SRAM_DevAction_List_Start_Addr + j * SRAM_DevAction_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoj, sizeof(DEV_ACTION_INFO), list_addrj);
|
if(DevAction_Info_Read_To_Struct(list_addrj, &DevActionInfoj) != 0x00)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addrj);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
if( ( DevActionInfoi.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
|
if( ( DevActionInfoi.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
|
||||||
&& ( DevActionInfoj.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
|
&& ( DevActionInfoj.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
|
||||||
&& ( DevActionInfoi.DevActionInput.DevType == DevActionInfoj.DevActionInput.DevType )
|
&& ( DevActionInfoi.DevActionInput.DevType == DevActionInfoj.DevActionInput.DevType )
|
||||||
&& ( DevActionInfoi.DevActionInput.DevAddr == DevActionInfoj.DevActionInput.DevAddr )
|
&& ( DevActionInfoi.DevActionInput.DevAddr == DevActionInfoj.DevActionInput.DevAddr )
|
||||||
&& ( DevActionInfoi.DevActionInput.inAddr == DevActionInfoj.DevActionInput.inAddr )
|
&& ( DevActionInfoi.DevActionInput.DevLoop == DevActionInfoj.DevActionInput.DevLoop )
|
||||||
&& ( DevActionInfoi.DevActionInput.inType == DevActionInfoj.DevActionInput.inType ) )
|
&& ( DevActionInfoi.DevActionInput.DevEvent == DevActionInfoj.DevActionInput.DevEvent ) )
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X<><58>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X", list_addri, list_addrj);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X<><58>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X", list_addri, list_addrj);
|
||||||
DevActionInfoi.DevActionState.SceneReuseFlag = 0x01;
|
DevActionInfoi.DevActionState.SceneReuseFlag = 0x01;
|
||||||
@@ -146,7 +154,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevActionInfoi.DevActionState.MultiValidNo++;
|
DevActionInfoi.DevActionState.MultiValidNo++;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr,
|
||||||
DevActionInfoi.DevActionInput.inAddr,
|
DevActionInfoi.DevActionInput.DevLoop,
|
||||||
list_addri,
|
list_addri,
|
||||||
DevActionInfoi.DevActionState.MultiNumber);
|
DevActionInfoi.DevActionState.MultiNumber);
|
||||||
}
|
}
|
||||||
@@ -163,20 +171,12 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
|
||||||
DevActionInfoj.DevActionInput.DevAddr,
|
DevActionInfoj.DevActionInput.DevAddr,
|
||||||
DevActionInfoj.DevActionInput.inAddr,
|
DevActionInfoj.DevActionInput.DevLoop,
|
||||||
list_addrj,
|
list_addrj,
|
||||||
DevActionInfoj.DevActionState.MultiNumber);
|
DevActionInfoj.DevActionState.MultiNumber);
|
||||||
|
|
||||||
//<2F><><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD>
|
|
||||||
for(k = 0; k < SRAM_DevAction_List_Size; k++)
|
|
||||||
{
|
|
||||||
SRAM_Write_Byte(0x00,list_addrj+k);
|
|
||||||
}
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addrj);
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addrj);
|
||||||
DevActionInfoj.CheckVal = 0x00;
|
DevAction_Info_Write_To_SRAM(list_addrj, &DevActionInfoj); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoj, DevActionInfoj.data_len, list_addrj);
|
|
||||||
DevActionInfoj.CheckVal = DevAction_CheckSum(list_addrj,DevActionInfoj.data_len);
|
|
||||||
SRAM_Write_Byte(DevActionInfoj.CheckVal, ( list_addrj + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State) ) );
|
|
||||||
|
|
||||||
DevAdd = Find_AllDevice_List_Information2(Active_Port, DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
DevAdd = Find_AllDevice_List_Information2(Active_Port, DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
|
||||||
if(DevAdd != 0x00)
|
if(DevAdd != 0x00)
|
||||||
@@ -185,15 +185,15 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
|
||||||
if(DevActionInfoi.DevActionState.MultiValidNo <= 127)
|
if(DevActionInfoi.DevActionState.MultiValidNo <= 127)
|
||||||
{
|
{
|
||||||
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr] = DevActionInfoi.DevActionState.MultiValidNo;
|
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.DevLoop] = DevActionInfoi.DevActionState.MultiValidNo;
|
||||||
}
|
}
|
||||||
|
|
||||||
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>·:%d <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>·:%d <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>:%d",
|
||||||
DevActionInfoi.DevActionInput.DevAddr,
|
DevActionInfoi.DevActionInput.DevAddr,
|
||||||
DevActionInfoi.DevActionInput.inAddr,
|
DevActionInfoi.DevActionInput.DevLoop,
|
||||||
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr]);
|
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.DevLoop]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -210,7 +210,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
{
|
{
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr = DevAction_No_Get(DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr = DevAction_No_Get(DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
||||||
i,
|
i,
|
||||||
@@ -221,7 +221,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr);
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr);
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD>洢<EFBFBD><EFBFBD>ַ:%x",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>ַ:%d,<2C><>·:%d,SRAM<EFBFBD>洢<EFBFBD><EFBFBD>ַ:%x",
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop,
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop,
|
||||||
@@ -238,14 +238,14 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
|
|
||||||
if(Dev_Host_Invalid != DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType)
|
if(Dev_Host_Invalid != DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType)
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
i,
|
i,
|
||||||
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
|
||||||
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
|
||||||
}else{
|
}else{
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
|
||||||
list_addri,
|
list_addri,
|
||||||
i,
|
i,
|
||||||
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
|
||||||
@@ -257,17 +257,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
for(k = 0; k < SRAM_DevAction_List_Size; k++)
|
DevAction_Info_Write_To_SRAM(list_addri, &DevActionInfoi); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
{
|
|
||||||
SRAM_Write_Byte(0x00,list_addri+k);
|
|
||||||
}
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><EFBFBD>λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addri);
|
|
||||||
DevActionInfoi.CheckVal = 0x00;
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoi, DevActionInfoi.data_len, list_addri); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
DevActionInfoi.CheckVal = DevAction_CheckSum(list_addri,DevActionInfoi.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
|
||||||
|
|
||||||
SRAM_Write_Byte(DevActionInfoi.CheckVal,(list_addri + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)) ); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -287,7 +277,11 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
|
|||||||
{
|
{
|
||||||
KeepFlag = 0x00;
|
KeepFlag = 0x00;
|
||||||
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
|
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), list_addr);
|
if(DevAction_Info_Read_To_Struct(list_addr, &DevActionInfo) != 0x00)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addr);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
|
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
|
||||||
{
|
{
|
||||||
@@ -297,7 +291,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
|
|||||||
if( DevActionInfo.DevActionOutput[j].DevActionOutAddr != 0x00 )
|
if( DevActionInfo.DevActionOutput[j].DevActionOutAddr != 0x00 )
|
||||||
{
|
{
|
||||||
KeepFlag = 0x01;
|
KeepFlag = 0x01;
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
|
||||||
list_addr,DevActionInfo.DevActionOutput[j].DevActionOutAddr,
|
list_addr,DevActionInfo.DevActionOutput[j].DevActionOutAddr,
|
||||||
i,
|
i,
|
||||||
DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevOutputLoop);
|
DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevOutputLoop);
|
||||||
@@ -341,17 +335,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
|
|||||||
|
|
||||||
if( KeepFlag == 0x01 )
|
if( KeepFlag == 0x01 )
|
||||||
{
|
{
|
||||||
for(uint16_t k = 0;k<SRAM_DevAction_List_Size;k++)
|
DevAction_Info_Write_To_SRAM(list_addr, &DevActionInfo); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
{
|
|
||||||
SRAM_Write_Byte(0x00,list_addr+k);
|
|
||||||
}
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addr);
|
|
||||||
DevActionInfo.CheckVal = 0x00;
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
DevActionInfo.CheckVal = DevAction_CheckSum(list_addr,DevActionInfo.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
|
||||||
|
|
||||||
SRAM_Write_Byte(DevActionInfo.CheckVal,(list_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)) ); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -374,7 +358,13 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
|
|||||||
{
|
{
|
||||||
KeepFlag = 0x00;
|
KeepFlag = 0x00;
|
||||||
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
|
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
|
||||||
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), list_addr);
|
if(DevAction_Info_Read_To_Struct(list_addr, &DevActionInfo) != 0x00)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addr);
|
||||||
|
continue;
|
||||||
|
}else {
|
||||||
|
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>:%x",list_addr);
|
||||||
|
}
|
||||||
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
|
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
|
||||||
{
|
{
|
||||||
if( DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevDlyValue.DelayCont == 0x00 )
|
if( DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevDlyValue.DelayCont == 0x00 )
|
||||||
@@ -395,17 +385,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
|
|||||||
|
|
||||||
if(KeepFlag == 0x01)
|
if(KeepFlag == 0x01)
|
||||||
{
|
{
|
||||||
for(uint16_t k = 0;k<SRAM_DevAction_List_Size;k++)
|
DevAction_Info_Write_To_SRAM(list_addr, &DevActionInfo); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
{
|
|
||||||
SRAM_Write_Byte(0x00,list_addr+k);
|
|
||||||
}
|
|
||||||
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addr);
|
|
||||||
DevActionInfo.CheckVal = 0x00; //У<><D0A3><EFBFBD><EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
|
|
||||||
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
|
|
||||||
DevActionInfo.CheckVal = DevAction_CheckSum(list_addr,DevActionInfo.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
|
|
||||||
|
|
||||||
SRAM_Write_Byte(DevActionInfo.CheckVal,(list_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)));
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -7,6 +7,7 @@
|
|||||||
|
|
||||||
#include "spi_flash.h"
|
#include "spi_flash.h"
|
||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
#include "watchdog.h"
|
||||||
|
|
||||||
uint8_t Temp_Flash_Buff[4100]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
|
uint8_t Temp_Flash_Buff[4100]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
|
||||||
|
|
||||||
@@ -493,12 +494,22 @@ __attribute__((section(".non_0_wait"))) void Flash_Write(uint8_t* pBuffer,uint16
|
|||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : SPI_FLASH_APP_Data_Erase
|
* Function Name : SPI_FLASH_APP_Data_Erase
|
||||||
* Description : <20>ⲿFlash APP<50>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD>
|
* Description : <20>ⲿFlash APP<50>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
* APP<50>ռ<EFBFBD><D5BC><EFBFBD>С Size: 0x00070000 <20><>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00000000 ~ 0x0006FFFF
|
* APP<50>ռ<EFBFBD><D5BC><EFBFBD>С Size: 0x00070000 <20><>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00001000 ~ 0x0006FFFF
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void SPI_FLASH_APP_Data_Erase(void)
|
__attribute__((section(".non_0_wait"))) void SPI_FLASH_APP_Data_Erase(void)
|
||||||
{
|
{
|
||||||
for(uint8_t i = 0;i < 7;i++)
|
Flash_Erase_Page(0); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
for(uint8_t i = 1;i < 16;i++)
|
||||||
{
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
|
Flash_Erase_Sector(i);
|
||||||
|
}
|
||||||
|
for(uint8_t i = 1;i < 7;i++)
|
||||||
|
{
|
||||||
|
WDT_Feed();
|
||||||
|
|
||||||
Flash_Erase_Block(i);
|
Flash_Erase_Block(i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -22,7 +22,8 @@ void TIMER0_Init(void)
|
|||||||
volatile uint32_t Time0_100us = 0;
|
volatile uint32_t Time0_100us = 0;
|
||||||
volatile uint32_t Time0_1ms = 0;
|
volatile uint32_t Time0_1ms = 0;
|
||||||
|
|
||||||
void __attribute__((interrupt("WCH-Interrupt-fast"))) TIM0_IRQHandler()
|
void TIM0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||||
|
void TIM0_IRQHandler(void)
|
||||||
{
|
{
|
||||||
static uint8_t NUM_1 = 0;
|
static uint8_t NUM_1 = 0;
|
||||||
|
|
||||||
|
|||||||
@@ -33,10 +33,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
|
|
||||||
switch (uart_id) {
|
switch (uart_id) {
|
||||||
case UART_0:
|
case UART_0:
|
||||||
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD>ģʽ */
|
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD>ģʽ */
|
||||||
UART0_BaudRateCfg(buad);
|
UART0_BaudRateCfg(buad);
|
||||||
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||||
// FIFO open, trigger point 14 bytes
|
// FIFO open, trigger point 1 bytes
|
||||||
R8_UART0_LCR = RB_LCR_WORD_SZ;
|
R8_UART0_LCR = RB_LCR_WORD_SZ;
|
||||||
R8_UART0_IER = RB_IER_TXD_EN;
|
R8_UART0_IER = RB_IER_TXD_EN;
|
||||||
|
|
||||||
@@ -44,7 +44,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
|
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
|
||||||
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
|
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
|
||||||
|
|
||||||
|
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><>ѯ<EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
|
NVIC_SetPriority(UART0_IRQn, 0x80);
|
||||||
NVIC_EnableIRQ(UART0_IRQn);
|
NVIC_EnableIRQ(UART0_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
memset(&g_uart[UART_0],0,sizeof(UART_t));
|
||||||
@@ -58,8 +61,8 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
case UART_1:
|
case UART_1:
|
||||||
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
|
||||||
UART1_BaudRateCfg(buad);
|
UART1_BaudRateCfg(buad);
|
||||||
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||||
// FIFO open, trigger point 14 bytes
|
// FIFO open, trigger point 1 bytes
|
||||||
R8_UART1_LCR = RB_LCR_WORD_SZ;
|
R8_UART1_LCR = RB_LCR_WORD_SZ;
|
||||||
R8_UART1_IER = RB_IER_TXD_EN;
|
R8_UART1_IER = RB_IER_TXD_EN;
|
||||||
|
|
||||||
@@ -68,6 +71,7 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
|
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
|
||||||
|
|
||||||
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
|
NVIC_SetPriority(UART1_IRQn, 0x80);
|
||||||
NVIC_EnableIRQ(UART1_IRQn);
|
NVIC_EnableIRQ(UART1_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
memset(&g_uart[UART_1],0,sizeof(UART_t));
|
||||||
@@ -80,15 +84,18 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
break;
|
break;
|
||||||
case UART_2:
|
case UART_2:
|
||||||
UART2_BaudRateCfg(buad);
|
UART2_BaudRateCfg(buad);
|
||||||
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||||
// FIFO open, trigger point 14 bytes
|
// FIFO open, trigger point 1 bytes
|
||||||
R8_UART2_LCR = RB_LCR_WORD_SZ;
|
R8_UART2_LCR = RB_LCR_WORD_SZ;
|
||||||
R8_UART2_IER = RB_IER_TXD_EN;
|
R8_UART2_IER = RB_IER_TXD_EN;
|
||||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
|
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
|
||||||
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
|
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
|
||||||
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
|
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
|
||||||
|
|
||||||
|
GPIOD_ModeCfg(GPIO_Pin_21, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
|
NVIC_SetPriority(UART2_IRQn, 0x80);
|
||||||
NVIC_EnableIRQ(UART2_IRQn);
|
NVIC_EnableIRQ(UART2_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
memset(&g_uart[UART_2],0,sizeof(UART_t));
|
||||||
@@ -101,8 +108,8 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
break;
|
break;
|
||||||
case UART_3:
|
case UART_3:
|
||||||
UART3_BaudRateCfg(buad);
|
UART3_BaudRateCfg(buad);
|
||||||
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
|
||||||
// FIFO open, trigger point 14 bytes
|
// FIFO open, trigger point 1 bytes
|
||||||
R8_UART3_LCR = RB_LCR_WORD_SZ;
|
R8_UART3_LCR = RB_LCR_WORD_SZ;
|
||||||
R8_UART3_IER = RB_IER_TXD_EN;
|
R8_UART3_IER = RB_IER_TXD_EN;
|
||||||
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
|
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
|
||||||
@@ -110,6 +117,7 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
|
|||||||
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
|
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
|
||||||
|
|
||||||
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
|
||||||
|
NVIC_SetPriority(UART3_IRQn, 0x80);
|
||||||
NVIC_EnableIRQ(UART3_IRQn);
|
NVIC_EnableIRQ(UART3_IRQn);
|
||||||
|
|
||||||
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
memset(&g_uart[UART_3],0,sizeof(UART_t));
|
||||||
@@ -257,8 +265,8 @@ __attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
|
|||||||
{
|
{
|
||||||
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
|
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
|
||||||
|
|
||||||
g_uart[UART_0].Receiving = 0;
|
g_uart[UART_0].Receiving = 0;
|
||||||
|
|
||||||
@@ -291,8 +299,8 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
|
|||||||
{
|
{
|
||||||
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
|
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
|
||||||
|
|
||||||
g_uart[UART_1].Receiving = 0;
|
g_uart[UART_1].Receiving = 0;
|
||||||
|
|
||||||
@@ -327,8 +335,8 @@ __attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
|
|||||||
{
|
{
|
||||||
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
|
||||||
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
|
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
|
||||||
|
|
||||||
g_uart[UART_2].Receiving = 0;
|
g_uart[UART_2].Receiving = 0;
|
||||||
|
|
||||||
@@ -447,7 +455,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART1_ChangeBaud(uint32_t baudra
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART1_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -495,7 +503,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART2_ChangeBaud(uint32_t baudra
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART2_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -543,7 +551,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART3_ChangeBaud(uint32_t baudra
|
|||||||
|
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
if( UART3_GetLinSTA() & RB_LSR_TX_ALL_EMP )
|
||||||
{
|
{
|
||||||
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
|
||||||
__disable_irq();
|
__disable_irq();
|
||||||
@@ -693,26 +701,26 @@ __attribute__((section(".non_0_wait"))) void Uart_SendString(uint8_t uart_id,uin
|
|||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : MCU485_SendString_1
|
* Function Name : MCU485_SendString_0
|
||||||
* Description : 485_1 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
* Description : 485_0 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
|
||||||
* Input :
|
* Input :
|
||||||
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
|
||||||
* Return : None
|
* Return : None
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void MCU485_SendString_1(uint8_t *buf, uint16_t len)
|
__attribute__((section(".non_0_wait"))) void MCU485_SendString_0(uint8_t *buf, uint16_t len)
|
||||||
{
|
{
|
||||||
uint16_t delay_num = 0;
|
uint16_t delay_num = 0;
|
||||||
|
|
||||||
MCU485_EN1_H;
|
MCU485_EN1_H;
|
||||||
|
|
||||||
UART1_SendString(buf,len);
|
UART0_SendString(buf,len);
|
||||||
|
|
||||||
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
|
||||||
while(1)
|
while(1)
|
||||||
{
|
{
|
||||||
WDT_Feed();
|
WDT_Feed();
|
||||||
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
if( (R8_UART0_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
|
||||||
Delay_Us(100);
|
Delay_Us(100);
|
||||||
delay_num++;
|
delay_num++;
|
||||||
if(delay_num > 500) break;
|
if(delay_num > 500) break;
|
||||||
@@ -789,23 +797,24 @@ __attribute__((section(".non_0_wait"))) void MCU485_SendString_3(uint8_t *buf, u
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
__attribute__((section(".non_0_wait"))) void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
|
||||||
{
|
{
|
||||||
|
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s:%d - %d",__func__,uart_id,len);
|
||||||
switch(uart_id)
|
switch(uart_id)
|
||||||
{
|
{
|
||||||
case UART_1:
|
case Polling_Port:
|
||||||
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||||
{
|
{
|
||||||
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
|
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
|
||||||
}
|
}
|
||||||
MCU485_SendString_1(buff,len);
|
MCU485_SendString_0(buff,len);
|
||||||
break;
|
break;
|
||||||
case UART_2:
|
case Active_Port:
|
||||||
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||||
{
|
{
|
||||||
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
|
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
|
||||||
}
|
}
|
||||||
MCU485_SendString_2(buff,len);
|
MCU485_SendString_2(buff,len);
|
||||||
break;
|
break;
|
||||||
case UART_3:
|
case Bus_port:
|
||||||
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
|
||||||
{
|
{
|
||||||
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);
|
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);
|
||||||
|
|||||||
@@ -8,14 +8,14 @@
|
|||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : WDT_Init
|
* Function Name : WDT_Init
|
||||||
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>Ϊ4ms<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD><EFBFBD>100MHz <20><>ƵԼΪ84ms
|
||||||
* Input : None
|
* Input : None
|
||||||
* Return : None
|
* Return : None
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void WDT_Init(void)
|
__attribute__((section(".non_0_wait"))) void WDT_Init(void)
|
||||||
{
|
{
|
||||||
// WWDG_ResetCfg(ENABLE);
|
FEED_DOG();
|
||||||
// WWDG_SetCounter(WDT_NUM);
|
WDOG_ENABLE();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
@@ -26,17 +26,14 @@ __attribute__((section(".non_0_wait"))) void WDT_Init(void)
|
|||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void WDT_Feed(void)
|
__attribute__((section(".non_0_wait"))) void WDT_Feed(void)
|
||||||
{
|
{
|
||||||
//WWDG_ClearFlag();
|
FEED_DOG();
|
||||||
// WWDG_SetCounter(WDT_NUM);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : WDT_Reinit
|
* Function Name : WDT_Reinit
|
||||||
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
|
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC>
|
||||||
* Input : None
|
|
||||||
* Return : None
|
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
__attribute__((section(".non_0_wait"))) void WDT_Reinit(void)
|
__attribute__((section(".non_0_wait"))) void WDT_Reinit(void)
|
||||||
{
|
{
|
||||||
|
WDOG_DISABLE();
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -601,12 +601,12 @@ __attribute__((section(".non_0_wait"))) void NetWork_Parameter_Get(void)
|
|||||||
//MCU<43><55>ʼ<EFBFBD><CABC>IP
|
//MCU<43><55>ʼ<EFBFBD><CABC>IP
|
||||||
g_netinfo.device_ip[0] = 192;
|
g_netinfo.device_ip[0] = 192;
|
||||||
g_netinfo.device_ip[1] = 168;
|
g_netinfo.device_ip[1] = 168;
|
||||||
g_netinfo.device_ip[2] = MACAddr[4];
|
g_netinfo.device_ip[2] = g_netinfo.mac_addr[4];
|
||||||
g_netinfo.device_ip[3] = MACAddr[5];
|
g_netinfo.device_ip[3] = g_netinfo.mac_addr[5];
|
||||||
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
|
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
|
||||||
g_netinfo.gateway[0] = 192;
|
g_netinfo.gateway[0] = 192;
|
||||||
g_netinfo.gateway[1] = 168;
|
g_netinfo.gateway[1] = 168;
|
||||||
g_netinfo.gateway[2] = MACAddr[4];
|
g_netinfo.gateway[2] = g_netinfo.mac_addr[4];
|
||||||
g_netinfo.gateway[3] = 1;
|
g_netinfo.gateway[3] = 1;
|
||||||
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
g_netinfo.subnet[0] = 255;
|
g_netinfo.subnet[0] = 255;
|
||||||
@@ -775,9 +775,16 @@ __attribute__((section(".non_0_wait"))) uint8_t WCHNET_LIB_Init(void)
|
|||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"version error.\n");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"version error.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/*<2A><>ȡMAC <20><>ַ*/
|
||||||
|
g_netinfo.mac_addr[2] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET );
|
||||||
|
g_netinfo.mac_addr[3] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 1);
|
||||||
|
g_netinfo.mac_addr[4] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 2);
|
||||||
|
g_netinfo.mac_addr[5] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 3);
|
||||||
|
|
||||||
//<2F><>ȡоƬ<D0BE>Դ<EFBFBD><D4B4><EFBFBD>MAC <20><>ַ
|
//<2F><>ȡоƬ<D0BE>Դ<EFBFBD><D4B4><EFBFBD>MAC <20><>ַ
|
||||||
// GetMACAddress(MACAddr);
|
// GetMACAddress(MACAddr);
|
||||||
// Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit, "NET MAC:", MACAddr, 6);
|
|
||||||
|
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit, "NET MAC:", g_netinfo.mac_addr, 6);
|
||||||
|
|
||||||
NetWork_Parameter_Get();
|
NetWork_Parameter_Get();
|
||||||
|
|
||||||
@@ -814,6 +821,8 @@ __attribute__((section(".non_0_wait"))) uint8_t WCHNET_LIB_Init(void)
|
|||||||
|
|
||||||
server_info.net_sta = NET_PHY_WAIT;
|
server_info.net_sta = NET_PHY_WAIT;
|
||||||
|
|
||||||
|
SRAM_Write_Byte(0x00,SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -6,6 +6,7 @@
|
|||||||
*/
|
*/
|
||||||
#include "tftp_function.h"
|
#include "tftp_function.h"
|
||||||
#include "net_function.h"
|
#include "net_function.h"
|
||||||
|
#include "blv_netcomm_function.h"
|
||||||
#include "sram_mem_addr.h"
|
#include "sram_mem_addr.h"
|
||||||
#include "flash_mem_addr.h"
|
#include "flash_mem_addr.h"
|
||||||
#include "spi_flash.h"
|
#include "spi_flash.h"
|
||||||
@@ -125,9 +126,9 @@ __attribute__((section(".non_0_wait"))) uint8_t IAP_tftp_process_write(uint8_t s
|
|||||||
memcpy(&tftp_args.to_ip[0],to_ip,4);
|
memcpy(&tftp_args.to_ip[0],to_ip,4);
|
||||||
tftp_args.to_port = to_port;
|
tftp_args.to_port = to_port;
|
||||||
|
|
||||||
tftp_args.block = 0;
|
|
||||||
tftp_args.tot_bytes = 0;
|
tftp_args.tot_bytes = 0;
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.Write_Block = 0;
|
||||||
IAPVarTypeStruct_Ptr.TotalCount = 0;
|
IAPVarTypeStruct_Ptr.TotalCount = 0;
|
||||||
IAPVarTypeStruct_Ptr.IapErrFlag = 0;
|
IAPVarTypeStruct_Ptr.IapErrFlag = 0;
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",to_ip[0], to_ip[1], to_ip[2], to_ip[3], to_port);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",to_ip[0], to_ip[1], to_ip[2], to_ip[3], to_port);
|
||||||
@@ -147,7 +148,55 @@ __attribute__((section(".non_0_wait"))) uint8_t IAP_tftp_process_write(uint8_t s
|
|||||||
return 0x01;
|
return 0x01;
|
||||||
}
|
}
|
||||||
|
|
||||||
TFTP_send_ack_packet(g_netinfo.SocketId[SocketIdnex_TFTPDATA], to_ip, to_port, tftp_args.block); //ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD>
|
TFTP_send_ack_packet(g_netinfo.SocketId[SocketIdnex_TFTPDATA], to_ip, to_port, IAPVarTypeStruct_Ptr.Write_Block); //ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD>
|
||||||
|
return 0x00;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
* Function Name : IAP_tftp_process_read
|
||||||
|
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD> - <20><><EFBFBD>Ͷ<EFBFBD>ȡ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
|
||||||
|
*******************************************************************************/
|
||||||
|
uint8_t IAP_tftp_process_read(uint8_t s, uint8_t* to_ip, int to_port)
|
||||||
|
{
|
||||||
|
uint8_t data_buffer[150];
|
||||||
|
uint32_t sendlen = 0;
|
||||||
|
|
||||||
|
memset(data_buffer,0,sizeof(data_buffer));
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
|
||||||
|
|
||||||
|
IAPVarTypeStruct_Ptr.TotalCount = 0x00;
|
||||||
|
IAPVarTypeStruct_Ptr.IapErrFlag = 0x00;
|
||||||
|
|
||||||
|
if(IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_APP)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ");
|
||||||
|
IAPVarTypeStruct_Ptr.FlashWriteAddress = SRAM_IAP_APP_FILE_ADDRESS; //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ַ - <20><><EFBFBD><EFBFBD><EFBFBD>ȱ<EFBFBD><C8B1><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>
|
||||||
|
}else if(IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_CONFIG)
|
||||||
|
{
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ");
|
||||||
|
IAPVarTypeStruct_Ptr.FlashWriteAddress = SRAM_IAP_LOGIC_DataStart_ADDRESS; //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ַ - <20><><EFBFBD><EFBFBD><EFBFBD>ȱ<EFBFBD><C8B1><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>
|
||||||
|
}else{
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
data_buffer[0] = 0x00;
|
||||||
|
data_buffer[1] = 0x01;
|
||||||
|
memcpy(&data_buffer[2], IAPVarTypeStruct_Ptr.FtpFileName, IAPVarTypeStruct_Ptr.FtpFileNameLen); //<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ȥ<EFBFBD><C8A5>ȡ<EFBFBD>ļ<EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>
|
||||||
|
|
||||||
|
sendlen += IAPVarTypeStruct_Ptr.FtpFileNameLen+2;
|
||||||
|
data_buffer[sendlen++] = 0;
|
||||||
|
data_buffer[sendlen++] = 'o'; //octet <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<D7BC>ð<EFBFBD>λ<EFBFBD><CEBB>
|
||||||
|
data_buffer[sendlen++] = 'c';
|
||||||
|
data_buffer[sendlen++] = 't';
|
||||||
|
data_buffer[sendlen++] = 'e';
|
||||||
|
data_buffer[sendlen++] = 't';
|
||||||
|
data_buffer[sendlen++] = 0;
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"FtpFileNameLen:%d , name:%s",IAPVarTypeStruct_Ptr.FtpFileNameLen,IAPVarTypeStruct_Ptr.FtpFileName);
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"SocketId:%d , port:%d , len:%d , IP:%d.%d.%d.%d",s,to_port,sendlen,to_ip[0],to_ip[1],to_ip[2],to_ip[3]);
|
||||||
|
|
||||||
|
WCHNET_SocketUdpSendTo(s, data_buffer, &sendlen, to_ip, to_port);
|
||||||
return 0x00;
|
return 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -171,6 +220,11 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
|
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s block:%d - %d",__func__,IAPVarTypeStruct_Ptr.Write_Block,TFTP_Pack_Get_Block(pkt_buf));
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s block:%d - %d",__func__,IAPVarTypeStruct_Ptr.Write_Block,TFTP_Pack_Get_Block(pkt_buf));
|
||||||
|
|
||||||
|
if( pkt_buf_len > TFTP_DATA_LEN_MAX ) {
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s Data_len:%d Error",__func__,pkt_buf_len);
|
||||||
|
return ;
|
||||||
|
}
|
||||||
|
|
||||||
if( (pkt_buf_len > TFTP_DATA_PKT_HDR_LEN) && ( TFTP_Pack_Get_Block(pkt_buf) == (IAPVarTypeStruct_Ptr.Write_Block + 1) ) )
|
if( (pkt_buf_len > TFTP_DATA_PKT_HDR_LEN) && ( TFTP_Pack_Get_Block(pkt_buf) == (IAPVarTypeStruct_Ptr.Write_Block + 1) ) )
|
||||||
{
|
{
|
||||||
pkt_buf_len = pkt_buf_len - TFTP_DATA_PKT_HDR_LEN;
|
pkt_buf_len = pkt_buf_len - TFTP_DATA_PKT_HDR_LEN;
|
||||||
@@ -189,7 +243,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
if( IAPVarTypeStruct_Ptr.Write_Block == 0x00 )
|
if( IAPVarTypeStruct_Ptr.Write_Block == 0x00 )
|
||||||
{
|
{
|
||||||
temp_val = data_buffer[0] + (data_buffer[1]<<8) + (data_buffer[2]<<16) + (data_buffer[3]<<24);
|
temp_val = data_buffer[0] + (data_buffer[1]<<8) + (data_buffer[2]<<16) + (data_buffer[3]<<24);
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"temp_var : %08X ,block :%d",temp_val,IAPVarTypeStruct_Ptr.Write_Block);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"temp_var : %X ,block :%d",temp_val,IAPVarTypeStruct_Ptr.Write_Block);
|
||||||
if( (temp_val & 0x2FFE0000) != 0x20000000 )
|
if( (temp_val & 0x2FFE0000) != 0x20000000 )
|
||||||
{
|
{
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ڴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><EFBFBD>");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ڴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><EFBFBD>");
|
||||||
@@ -208,7 +262,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
// break;
|
// break;
|
||||||
// }
|
// }
|
||||||
|
|
||||||
IAPVarTypeStruct_Ptr.IapErrFlag = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
//IAPVarTypeStruct_Ptr.IapErrFlag = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> data_buffer[0] & 0x2FFE0000 = %X; data_buffer[1]=%X\n", (data_buffer[0] & 0x2FFE0000), data_buffer[1]);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> data_buffer[0] & 0x2FFE0000 = %X; data_buffer[1]=%X\n", (data_buffer[0] & 0x2FFE0000), data_buffer[1]);
|
||||||
|
|
||||||
}else if( IAPVarTypeStruct_Ptr.Write_Block > APP_BLOCK_MAX ){
|
}else if( IAPVarTypeStruct_Ptr.Write_Block > APP_BLOCK_MAX ){
|
||||||
@@ -253,7 +307,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
{
|
{
|
||||||
IAPVarTypeStruct_Ptr.Write_Block++;
|
IAPVarTypeStruct_Ptr.Write_Block++;
|
||||||
SRAM_DMA_Write_Buff(data_buffer,pkt_buf_len,IAPVarTypeStruct_Ptr.FlashWriteAddress); //д<><D0B4>SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SRAM_DMA_Write_Buff(data_buffer,pkt_buf_len,IAPVarTypeStruct_Ptr.FlashWriteAddress); //д<><D0B4>SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>%08X,д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: byte<74><65>%d", IAPVarTypeStruct_Ptr.FlashWriteAddress, pkt_buf_len);
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>%X,д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: byte<74><65>%d", IAPVarTypeStruct_Ptr.FlashWriteAddress, pkt_buf_len);
|
||||||
|
|
||||||
/*<2A>Գ<EFBFBD><D4B3>Ƚ<EFBFBD><C8BD><EFBFBD>4Byte<74><65><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ַƫ<D6B7><C6AB>ʹ<EFBFBD><CAB9> <20><><EFBFBD>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ֽڶ<D6BD><DAB6>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̫<EFBFBD><CCAB>Ҫ*/
|
/*<2A>Գ<EFBFBD><D4B3>Ƚ<EFBFBD><C8BD><EFBFBD>4Byte<74><65><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ַƫ<D6B7><C6AB>ʹ<EFBFBD><CAB9> <20><><EFBFBD>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ֽڶ<D6BD><DAB6>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̫<EFBFBD><CCAB>Ҫ*/
|
||||||
// pkt_buf_len = (pkt_buf_len + 3) / 4;
|
// pkt_buf_len = (pkt_buf_len + 3) / 4;
|
||||||
@@ -268,7 +322,16 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
|
|
||||||
TFTP_send_ack_packet(s, ip_addr, Port, IAPVarTypeStruct_Ptr.Write_Block); //<2F><>ÿ<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0>Ļظ<C4BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD> <20><>ַ <20>˿ںͿ<DABA><CDBF><EFBFBD>
|
TFTP_send_ack_packet(s, ip_addr, Port, IAPVarTypeStruct_Ptr.Write_Block); //<2F><>ÿ<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0>Ļظ<C4BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><D7BD><EFBFBD> <20><>ַ <20>˿ںͿ<DABA><CDBF><EFBFBD>
|
||||||
|
|
||||||
if( IAPVarTypeStruct_Ptr.Write_Block == IAPVarTypeStruct_Ptr.BlockSize )
|
if( (IAPVarTypeStruct_Ptr.BLVIapFlag != 0x01)
|
||||||
|
&& (IAPVarTypeStruct_Ptr.Write_Block != 0x00)
|
||||||
|
&& (IAPVarTypeStruct_Ptr.Write_Block % 50 == 0x00)
|
||||||
|
&& (IAPVarTypeStruct_Ptr.BlockSize != IAPVarTypeStruct_Ptr.Write_Block) )
|
||||||
|
{
|
||||||
|
/* <20><><EFBFBD>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
||||||
|
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_Underway); //<2F><><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
}
|
||||||
|
|
||||||
|
if( (IAPVarTypeStruct_Ptr.BLVIapFlag != 0x01) && (IAPVarTypeStruct_Ptr.Write_Block == IAPVarTypeStruct_Ptr.BlockSize) )
|
||||||
{
|
{
|
||||||
uint8_t md5[16] = {0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0};
|
uint8_t md5[16] = {0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0};
|
||||||
uint16_t crc_data_len = 0;
|
uint16_t crc_data_len = 0;
|
||||||
@@ -283,23 +346,17 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
{
|
{
|
||||||
//<2F>ļ<EFBFBD>MD5У<35><D0A3><EFBFBD>ɹ<EFBFBD>
|
//<2F>ļ<EFBFBD>MD5У<35><D0A3><EFBFBD>ɹ<EFBFBD>
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>Md5<EFBFBD><EFBFBD>ȷ");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>Md5<EFBFBD><EFBFBD>ȷ");
|
||||||
//Ϊɶ<CEAA><C9B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƶ˻ظ<CBBB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>һ<EFBFBD><D2BB>
|
|
||||||
// switch(IAPVarTypeStruct_Ptr->IapType)
|
if( IAPVarTypeStruct_Ptr.FunType == TFTP_FUNTYPE_CloudIAP )
|
||||||
// {
|
{
|
||||||
// case IAPTFTPWRITE: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>¼<EFBFBD>ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD>¼<EFBFBD>ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
||||||
// SRAM_Write_Byte(IAP_STATE_COMPLETE, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
|
SRAM_Write_Byte(TFTP_FUNTYPE_CloudIAP, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
|
||||||
// LOG_LogicInfo_DebugRecord("<22><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
}
|
||||||
// break;
|
|
||||||
// case IAPTFTPREAD: //<2F>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|
||||||
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
|
||||||
// LOG_LogicInfo_DebugRecord("<22><>¼<EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
|
|
||||||
// SRAM_Write_Byte(CLOUD_IAP_TFTP_STATE_COMPLETE, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
|
|
||||||
// break;
|
|
||||||
// }
|
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>APPд<EFBFBD><EFBFBD>Flash<EFBFBD><EFBFBD>..");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>APPд<EFBFBD><EFBFBD>Flash<EFBFBD><EFBFBD>..");
|
||||||
|
|
||||||
//Cloud_IAP_Plan_SendPack(args,IAPVarTypeStruct_Ptr,IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD>IAP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
SPI_FLASH_APP_Data_Erase();
|
SPI_FLASH_APP_Data_Erase();
|
||||||
for(uint32_t i = 0;i < IAPVarTypeStruct_Ptr.BlockSize; i++ )
|
for(uint32_t i = 0;i < IAPVarTypeStruct_Ptr.BlockSize; i++ )
|
||||||
@@ -358,6 +415,8 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
|
|
||||||
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ!");
|
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ!");
|
||||||
//ֱ<>ӿ<EFBFBD><D3BF>Ź<EFBFBD><C5B9><EFBFBD>λ
|
//ֱ<>ӿ<EFBFBD><D3BF>Ź<EFBFBD><C5B9><EFBFBD>λ
|
||||||
|
NVIC_SystemReset();
|
||||||
|
while(1);
|
||||||
|
|
||||||
}else{
|
}else{
|
||||||
//MD5У<35><D0A3>ʧ<EFBFBD><CAA7>
|
//MD5У<35><D0A3>ʧ<EFBFBD><CAA7>
|
||||||
@@ -401,7 +460,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
|
|||||||
// break;
|
// break;
|
||||||
// }
|
// }
|
||||||
|
|
||||||
//Cloud_IAP_Plan_SendPack(args,IAPVarTypeStruct_Ptr,IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD>IAP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
SPI_FLASH_Logic_File_Erase(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
SPI_FLASH_Logic_File_Erase(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
@@ -495,6 +554,11 @@ void UDPSocket_TFTP_CMD_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipaddr
|
|||||||
/*TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD><CFB4><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
/*TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD><CFB4><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
|
||||||
|
|
||||||
|
}else if( TFTP_Pack_Get_Opcode(buff) == TFTP_DATA )
|
||||||
|
{
|
||||||
|
/*TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
|
||||||
|
|
||||||
}else {
|
}else {
|
||||||
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD>*/
|
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD>*/
|
||||||
|
|
||||||
@@ -527,6 +591,8 @@ void UDPSocket_TFTP_DATA_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipadd
|
|||||||
// }
|
// }
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*******************************************************************************
|
/*******************************************************************************
|
||||||
* Function Name : Internal_TFTP_Task
|
* Function Name : Internal_TFTP_Task
|
||||||
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -563,14 +629,25 @@ __attribute__((section(".non_0_wait"))) void Internal_TFTP_Task(void)
|
|||||||
{
|
{
|
||||||
IAPVarTypeStruct_Ptr.processing_tick = SysTick_1ms;
|
IAPVarTypeStruct_Ptr.processing_tick = SysTick_1ms;
|
||||||
IAPVarTypeStruct_Ptr.status = STA_INIT_IDLE;
|
IAPVarTypeStruct_Ptr.status = STA_INIT_IDLE;
|
||||||
|
|
||||||
|
|
||||||
|
if(IAPVarTypeStruct_Ptr.FunType == TFTP_FUNTYPE_CloudIAP)
|
||||||
|
{
|
||||||
|
//<2F><><EFBFBD>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
|
||||||
|
//TFTP_CMD_ACK(server_info.goal_ip, server_info.goal_port); //<2F>ظ<EFBFBD>TFTP<54><50><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ƶ˷<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>...");
|
||||||
|
IAP_tftp_process_read(g_netinfo.SocketId[SocketIdnex_TFTPDATA], server_info.goal_ip, IAPVarTypeStruct_Ptr.TFTP_Port);
|
||||||
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case STA_INIT_IDLE:
|
case STA_INIT_IDLE:
|
||||||
//<2F><><EFBFBD>ƶ˷<C6B6><CBB7>Ͷ<EFBFBD>ȡ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
//<2F><><EFBFBD>ƶ˷<C6B6><CBB7>Ͷ<EFBFBD>ȡ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
if( SysTick_1ms - IAPVarTypeStruct_Ptr.processing_tick > 30000) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><D7BD><EFBFBD>
|
if( SysTick_1ms - IAPVarTypeStruct_Ptr.processing_tick > 60000 ) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><D7BD><EFBFBD>
|
||||||
{
|
{
|
||||||
//Cloud_IAP_Plan_SendPack(tftp_args,IAPVarTypeStruct_Ptr,IAPPlan_State_IAPTimeout); //<2F><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
|
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_IAPTimeout); //<2F><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ");
|
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ");
|
||||||
IAPVarTypeStruct_Ptr.status = STA_END;
|
IAPVarTypeStruct_Ptr.status = STA_END;
|
||||||
@@ -626,6 +703,7 @@ __attribute__((section(".non_0_wait"))) void Internal_TFTP_Task(void)
|
|||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case STA_INIT_CONNECT: //
|
case STA_INIT_CONNECT: //
|
||||||
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -61,7 +61,8 @@ typedef struct
|
|||||||
uint8_t enable; //TFTP <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>״̬ 0X01:ʹ<>ܣ<EFBFBD>0x00:ûʹ<C3BB><CAB9>
|
uint8_t enable; //TFTP <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>״̬ 0X01:ʹ<>ܣ<EFBFBD>0x00:ûʹ<C3BB><CAB9>
|
||||||
uint8_t FunType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x01:<3A><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:<3A>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x03:LOG<4F><47>־<EFBFBD>ϴ<EFBFBD>
|
uint8_t FunType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x01:<3A><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:<3A>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x03:LOG<4F><47>־<EFBFBD>ϴ<EFBFBD>
|
||||||
|
|
||||||
uint8_t NewIapFlag; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̱<EFBFBD>־λ - 2022-01-05
|
uint8_t BLVIapFlag; //BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̱<EFBFBD>־λ
|
||||||
|
uint8_t BLVIapResult; //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
uint8_t IapErrFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
uint8_t IapErrFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
|
||||||
|
|
||||||
@@ -105,7 +106,9 @@ typedef struct
|
|||||||
}tftp_connection_args;
|
}tftp_connection_args;
|
||||||
|
|
||||||
extern IAPVarTypeStruct IAPVarTypeStruct_Ptr;
|
extern IAPVarTypeStruct IAPVarTypeStruct_Ptr;
|
||||||
|
extern tftp_connection_args tftp_args;
|
||||||
|
|
||||||
|
uint8_t bytes_cmp(uint8_t *src,uint8_t *dat,uint32_t len);
|
||||||
void Internal_TFTP_Task(void);
|
void Internal_TFTP_Task(void);
|
||||||
|
|
||||||
#endif /* NETLIB_TFTP_FUNCTION_H_ */
|
#endif /* NETLIB_TFTP_FUNCTION_H_ */
|
||||||
|
|||||||
@@ -100,7 +100,7 @@ extern "C"
|
|||||||
}
|
}
|
||||||
|
|
||||||
#define RCC_GET_GLOB_RST_KEEP() (R8_GLOB_RESET_KEEP)
|
#define RCC_GET_GLOB_RST_KEEP() (R8_GLOB_RESET_KEEP)
|
||||||
#define RCC_SET_GLOB_RST_KEEP(val) (R8_GLOB_RESET_KEEP = (val);)
|
#define RCC_SET_GLOB_RST_KEEP(val) {R8_GLOB_RESET_KEEP = (val);}
|
||||||
#define RCC_SET_PLL_SYS_OUT_DIV(val) \
|
#define RCC_SET_PLL_SYS_OUT_DIV(val) \
|
||||||
({ \
|
({ \
|
||||||
RCC_UNLOCK_SAFE_ACCESS(); \
|
RCC_UNLOCK_SAFE_ACCESS(); \
|
||||||
|
|||||||
102
Readme.md
102
Readme.md
@@ -1,36 +1,94 @@
|
|||||||
#### 2026-01-05
|
|
||||||
|
|
||||||
1、CSIO 继电器单独一个设备存放在BUS设备列表中,应该将这个设备存放到虚拟设备上 - 不合理的地方,待修改
|
|
||||||
|
|
||||||
2、调试BUS总线通讯 - OK
|
```C
|
||||||
|
待完成事项:
|
||||||
|
1、Launcher 第一次跳转失败问题,待解决。
|
||||||
|
2、RS485主动端口增加避障功能,RS485轮询端口与BUS端口是轮询机制,不需要增加。
|
||||||
|
3、BLV-C1P 无启动原因,需另辟须经实现启动原因。
|
||||||
|
4、Launcher流程修改,MCU Flash只在升级后写入,其他原因启动不写入MCU Flash。
|
||||||
|
5、在每个设备驱动中增加读取软件版本号,
|
||||||
|
6、APP固件中串口升级 - 搜索命令、跳转命令
|
||||||
|
7、TFTP日志上传机制修改
|
||||||
|
|
||||||
3、动作执行 - 网络控制继电器 OK
|
待测试事项:
|
||||||
|
1、配置功能 - 睡眠功能
|
||||||
4、增加C5继电器设备
|
2、配置功能 - 多联开关
|
||||||
|
3、配置功能 - 无卡取电
|
||||||
|
4、配置功能 - 空调提示音
|
||||||
|
```
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#### 2025-12-25
|
### 2026-02-10
|
||||||
|
|
||||||
1、TFTP升级 - 配置文件初步测试没问题
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、局域网升级流程 - 初步测试OK
|
||||||
|
2、云端升级流程 - 初步测试OK
|
||||||
|
3、云端升级上报升级进度 - 初步测试OK
|
||||||
|
```
|
||||||
|
|
||||||
2、配置文件内容解析移植完毕,调试中
|
### 2026-01-08
|
||||||
|
|
||||||
3、TFTP升级 - 是否一个套接字搞定,不需要使用两个套接字
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、场景动作延时执行 - 初步测试OK
|
||||||
|
2、场景反馈灯控制 - 初步测试OK
|
||||||
|
3、开关、插卡取电、温控器设备模型 - 初步测试OK
|
||||||
|
```
|
||||||
|
|
||||||
|
### 2026-01-06
|
||||||
|
|
||||||
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、场景动作执行初步测试OK
|
||||||
|
```
|
||||||
|
|
||||||
|
### 2026-01-05
|
||||||
|
|
||||||
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、CSIO 继电器单独一个设备存放在BUS设备列表中,应该将这个设备存放到虚拟设备上 - 不合理的地方,待修改
|
||||||
|
2、调试BUS总线通讯 - OK
|
||||||
|
3、动作执行 - 网络控制继电器 OK
|
||||||
|
4、增加C5继电器设备
|
||||||
|
```
|
||||||
|
|
||||||
|
### 2025-12-25
|
||||||
|
|
||||||
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、TFTP升级 - 配置文件初步测试没问题
|
||||||
|
2、配置文件内容解析移植完毕,调试中
|
||||||
|
3、TFTP升级 - 是否一个套接字搞定,不需要使用两个套接字
|
||||||
|
```
|
||||||
|
|
||||||
|
### 2025-12-10
|
||||||
|
|
||||||
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、TFTP IAP升级功能移植完毕,待测试
|
||||||
|
2、优化代码编译的空间问题,目前零等待区的空间已满,需将除了库函数以外的代码及相关变量全部放置非零等待区中,否则项目编译不成功
|
||||||
|
```
|
||||||
|
|
||||||
|
### 2025-12-06
|
||||||
|
|
||||||
|
```C
|
||||||
|
修改人:曹聪
|
||||||
|
修改点:
|
||||||
|
1、动作执行函数初步实现完毕 - 待测试
|
||||||
|
2、开始移植TFTP功能
|
||||||
|
-> TFTP升级
|
||||||
|
-> TFTP日志文件传输
|
||||||
|
```
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#### 2025-12-10
|
|
||||||
|
|
||||||
1、TFTP IAP升级功能移植完毕,待测试
|
|
||||||
|
|
||||||
2、优化代码编译的空间问题,目前零等待区的空间已满,需将除了库函数以外的代码及相关变量全部放置非零等待区中,否则项目编译不成功
|
|
||||||
|
|
||||||
#### 2025-12-06
|
|
||||||
|
|
||||||
1. 动作执行函数初步实现完毕 - 待测试
|
|
||||||
2. 开始移植TFTP功能
|
|
||||||
1. TFTP升级
|
|
||||||
2. TFTP日志文件传输
|
|
||||||
|
|
||||||
|
|
||||||
@@ -65,7 +65,8 @@
|
|||||||
|
|
||||||
#define MCU_TYPE "BLV-C1F" //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
#define MCU_TYPE "BLV-C1F" //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
|
||||||
#define APP_NAME "App_L4_C1F_42" //APP<50><50><EFBFBD><EFBFBD> 16Byte
|
#define APP_NAME "App_L4_C1F_42" //APP<50><50><EFBFBD><EFBFBD> 16Byte
|
||||||
#define SoftwareVer "C1P_A_L4_01_251107" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte
|
|
||||||
|
#define SoftwareVer "C1P_A_L4_01_251109" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
20
User/main.c
20
User/main.c
@@ -14,6 +14,8 @@
|
|||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
uint32_t test_tick = 0;
|
uint32_t test_tick = 0;
|
||||||
uint8_t test_buff[10] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
|
uint8_t test_buff[10] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
|
||||||
|
|
||||||
@@ -30,10 +32,11 @@ int main(void)
|
|||||||
SystemCoreClockUpdate();
|
SystemCoreClockUpdate();
|
||||||
Systick_Init();
|
Systick_Init();
|
||||||
|
|
||||||
UARTx_Init(UART_0,512000);
|
WDT_Reinit();
|
||||||
UARTx_Init(UART_1,512000);
|
UARTx_Init(UART_0,9600); //RS485<38><35>ѯ<EFBFBD>˿<EFBFBD>
|
||||||
UARTx_Init(UART_2,512000);
|
UARTx_Init(UART_1,512000); //<2F><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
UARTx_Init(UART_3,512000);
|
UARTx_Init(UART_2,9600); //RS485<38><35><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||||
|
UARTx_Init(UART_3,115200); //BUS<55><53><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
SYS_LED_Init();
|
SYS_LED_Init();
|
||||||
|
|
||||||
@@ -41,6 +44,8 @@ int main(void)
|
|||||||
|
|
||||||
SPI_FLASH_Init();
|
SPI_FLASH_Init();
|
||||||
|
|
||||||
|
Read_Flash_Register_Data();
|
||||||
|
|
||||||
WCHNET_LIB_Init();
|
WCHNET_LIB_Init();
|
||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! \r\n");
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! \r\n");
|
||||||
@@ -48,6 +53,9 @@ int main(void)
|
|||||||
|
|
||||||
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"DEV_ACTION_INFO Size:%d \r\n",sizeof(DEV_ACTION_INFO));
|
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"DEV_ACTION_INFO Size:%d \r\n",sizeof(DEV_ACTION_INFO));
|
||||||
|
|
||||||
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev_Action_U64Cond Size:%d \r\n",sizeof(Dev_Action_U64Cond));
|
||||||
|
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Struct_Dev_Dly Size:%d \r\n",sizeof(Struct_Dev_Dly));
|
||||||
|
|
||||||
BLV_DevAction_AllData_Init();
|
BLV_DevAction_AllData_Init();
|
||||||
|
|
||||||
while (1)
|
while (1)
|
||||||
@@ -65,10 +73,12 @@ int main(void)
|
|||||||
|
|
||||||
BLV_ActivePort_ModeTask();
|
BLV_ActivePort_ModeTask();
|
||||||
|
|
||||||
//BLV_Nor_Dev_ModeTask();
|
BLV_Nor_Dev_ModeTask();
|
||||||
|
|
||||||
BLV_DevAction_Task();
|
BLV_DevAction_Task();
|
||||||
|
|
||||||
|
BLV_DevDly_Task();
|
||||||
|
|
||||||
NetWork_Task();
|
NetWork_Task();
|
||||||
|
|
||||||
WCHNET_MainTask();
|
WCHNET_MainTask();
|
||||||
|
|||||||
@@ -12,7 +12,6 @@
|
|||||||
|
|
||||||
#include "ch564.h"
|
#include "ch564.h"
|
||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Uncomment the line corresponding to the desired System clock (SYSCLK)
|
* Uncomment the line corresponding to the desired System clock (SYSCLK)
|
||||||
* frequency (after reset the HSI is used as SYSCLK source).
|
* frequency (after reset the HSI is used as SYSCLK source).
|
||||||
@@ -88,23 +87,8 @@ static void SetSysClockTo25_HSE(void);
|
|||||||
*/
|
*/
|
||||||
void SystemInit(void)
|
void SystemInit(void)
|
||||||
{
|
{
|
||||||
if ( SystemCoreClock >= 60000000 )
|
|
||||||
{
|
|
||||||
RCC_UNLOCK_SAFE_ACCESS();
|
|
||||||
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
|
||||||
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
|
|
||||||
RCC_LOCK_SAFE_ACCESS();
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
RCC_UNLOCK_SAFE_ACCESS();
|
|
||||||
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
|
|
||||||
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
|
|
||||||
RCC_LOCK_SAFE_ACCESS();
|
|
||||||
}
|
|
||||||
|
|
||||||
SystemCoreClockUpdate();
|
SystemCoreClockUpdate();
|
||||||
|
//Delay_Init();
|
||||||
HSI_ON();
|
HSI_ON();
|
||||||
|
|
||||||
/* Close ETH PHY */
|
/* Close ETH PHY */
|
||||||
@@ -192,6 +176,7 @@ void SystemCoreClockUpdate(void)
|
|||||||
static void SetSysClock(void)
|
static void SetSysClock(void)
|
||||||
{
|
{
|
||||||
SystemCoreClockUpdate();
|
SystemCoreClockUpdate();
|
||||||
|
//Delay_Init();
|
||||||
GPIO_IPD_Unused();
|
GPIO_IPD_Unused();
|
||||||
|
|
||||||
#ifdef SYSCLK_FREQ_120MHz_HSI
|
#ifdef SYSCLK_FREQ_120MHz_HSI
|
||||||
@@ -233,6 +218,10 @@ static void SetSysClockTo120_HSI(void)
|
|||||||
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
|
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us( PLL_STARTUP_TIME );
|
Delay_Us( PLL_STARTUP_TIME );
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
|
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -252,6 +241,10 @@ static void SetSysClockTo80_HSI(void)
|
|||||||
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
|
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us(PLL_STARTUP_TIME);
|
Delay_Us(PLL_STARTUP_TIME);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -271,6 +264,10 @@ static void SetSysClockTo60_HSI(void)
|
|||||||
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
|
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us(PLL_STARTUP_TIME);
|
Delay_Us(PLL_STARTUP_TIME);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -327,6 +324,10 @@ static void SetSysClockTo120_HSE(void)
|
|||||||
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us(PLL_STARTUP_TIME);
|
Delay_Us(PLL_STARTUP_TIME);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -349,6 +350,10 @@ static void SetSysClockTo80_HSE(void)
|
|||||||
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us(PLL_STARTUP_TIME);
|
Delay_Us(PLL_STARTUP_TIME);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -371,6 +376,10 @@ static void SetSysClockTo60_HSE(void)
|
|||||||
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
|
||||||
USB_PLL_ON();
|
USB_PLL_ON();
|
||||||
Delay_Us(PLL_STARTUP_TIME);
|
Delay_Us(PLL_STARTUP_TIME);
|
||||||
|
RCC_UNLOCK_SAFE_ACCESS();
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
|
||||||
|
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
|
||||||
|
RCC_LOCK_SAFE_ACCESS();
|
||||||
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user