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Boonlive_RD_Embedded:main

6 Commits
cc8783e9f8 ... main

Author SHA1 Message Date
caocong
3041468aa7 feat:网络升级流程完善 
1、局域网升级流程 - 初步测试OK
2、云端升级流程 - 初步测试OK
3、云端升级上报升级进度 - 初步测试OK
 2026-02-10 17:45:08 +08:00
caocong
f16825ea2b 修改:多联开关场景执行中增加回路判断 
多联开关场景执行中增加回路判断，删除部分调试信息
 2026-01-09 19:16:38 +08:00
caocong
650073d366 测试:场景中延时执行、反馈灯控制，初步测试OK 
场景执行基本功能都已测试通过，开关设备、插卡取电设备、温控器设备初步测试OK
 2026-01-08 21:32:11 +08:00
caocong
d10556b0d5 测试:场景执行初步测试OK 
场景执行-弱电输入触发控制继电器
 2026-01-06 21:02:22 +08:00
caocong
6e19d0b451 调试：CSIO继电器控制 
CSIO继电器控制初步测试OK
 2026-01-05 21:17:51 +08:00
caocong
63ebdb7baa feat:TFTP升级 - 配置文件OK 
1、TFTP升级 - 配置文件初步测试没问题

​ 2、配置文件内容解析移植完毕，调试中

​ 3、TFTP升级 - 是否一个套接字搞定，不需要使用两个套接字，待完成
 2025-12-25 20:25:57 +08:00
57 changed files with 5289 additions and 1748 deletions
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6
.cproject
View File

@@ -14,7 +14,7 @@
</extensions>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release">
<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074" name="obj" parent="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release" postbuildStep=" ${cross_prefix}${cross_objcopy}${cross_suffix} -O ihex &quot;${ProjName}.elf&quot; &quot;${ProjName}.hex&quot; &amp;&amp; ${cross_prefix}${cross_objcopy}${cross_suffix} -O binary &quot;${ProjName}.elf&quot; &quot;${ProjName}.bin&quot;">
<folderInfo id="ilg.gnumcueclipse.managedbuild.cross.riscv.config.elf.release.1008047074." name="/" resourcePath="">
<toolChain id="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release.231146001" name="RISC-V Cross GCC" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.toolchain.elf.release">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash.1311852988" name="Create flash image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
@@ -72,7 +72,7 @@
</option>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.2020844713" name="Language standard" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.std.gnu99" valueType="enumerated"/>
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs.177116515" name="Defined symbols (-D)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
<listOptionValue builtIn="false" value="DEBUG=1"/>
<listOptionValue builtIn="false" value="DEBUG=2"/>
</option>
<inputType id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input.2036806839" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.input"/>
</tool>
@@ -117,7 +117,7 @@
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver.1292785366" name="GNU RISC-V Cross Archiver" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.archiver"/>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash.1801165667" name="GNU RISC-V Cross Create Flash Image" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createflash">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other.406870191" name="Other flags" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.other" useByScannerDiscovery="false" value="" valueType="string"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1719943455" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.ihex" valueType="enumerated"/>
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.1719943455" name="Output file format (-O)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice" useByScannerDiscovery="false" value="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createflash.choice.ihexAndbinary" valueType="enumerated"/>
</tool>
<tool id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting.1356766765" name="GNU RISC-V Cross Create Listing" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.createlisting">
<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source.2052761852" name="Display source (--source|-S)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.createlisting.source" useByScannerDiscovery="false" value="false" valueType="boolean"/>

2
.settings/language.settings.xml
View File

@@ -5,7 +5,7 @@
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="115682257656385746" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="1281506000959020851" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>

68
BLV_485_Driver/blv_bus_dev_c5iofun.c
View File

@@ -117,7 +117,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
memset(&C5IO_Info,0,sizeof(BUS_C5IO_INFO));
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),csio_addr);
BLV_Device_PublicInfo_Read_To_Struct(csio_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
input_num = dev_info->input_num;
@@ -198,10 +198,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_CSIO_DI_For_Logic_Init(
temp_len += 4;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),csio_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),csio_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(csio_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
BLV_Nor_Dev_LVinput_Init(dev_info->addr,dev_info->input_num);
}
@@ -224,7 +221,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
@@ -232,10 +229,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
//Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>,ֻ<><D6BB><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
BUS_C5IO_Inquire_Datasend(dev_addr,&C5IO_Info);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
return RS485OCCUPYTIME;
}
@@ -332,10 +326,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Cycle_Call(uint32_t
C5IO_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
return RS485OCCUPYTIME;
}
@@ -413,7 +404,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
return 0x01; //<2F><>У<EFBFBD><D0A3>
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
memset(deal_buff,0,sizeof(deal_buff));
@@ -482,7 +473,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
Device_Public_Information_G BUS_Public;
C5IO_Info.DevOfflineLast = C5IO_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
}
if((DI_Init_flg == 0) && (deal_buff[PKT_PARA] != 0xF0)) //<2F><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>ѯ<EFBFBD>Ļظ<C4BB> 2024-04-01 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>Dz<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD>DI<44><49><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>DI<44><49><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -494,10 +485,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"IO VERSION:%d", C5IO_Info.C5IO_Version);
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DI_Control_Flag:%X", C5IO_Info.DI_Control_Flag);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
return 0x00;
}
@@ -753,10 +741,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5IO_Data_Processing(uin
LOG_Device_COMM_ASK_TO_Reply_Record2(dev_addr+Dev_port,dev_addr+Dev_baud,(SysTick_1ms - C5IO_Info.inquire_tick),deal_buff,deal_len);
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
return 0x00;
}
@@ -1219,7 +1204,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
@@ -1247,10 +1232,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay(uint32_t dev
}
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
/*******************************************************************************
@@ -1269,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
if(temp1 < C5IO_DO_CH_MAX)
@@ -1289,10 +1271,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Do(uint32_t dev_ad
}
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
/*******************************************************************************
@@ -1311,7 +1290,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
if(temp1 < C5IO_Relay_CH_MAX)
@@ -1334,10 +1313,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Control_Relay_Inching(uint
}
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
/*******************************************************************************
@@ -1355,7 +1331,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
for(uint8_t i=0;i<C5IO_Relay_CH_MAX;i++)
@@ -1375,10 +1351,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5IO_Group_Control_Relay(uint32
temp2 >>= 1;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
/*******************************************************************************
@@ -1397,16 +1370,13 @@ __attribute__((section(".non_0_wait"))) void BUS_CSIO_Set_RTC_Time(uint32_t dev_
Device_Public_Information_G BUS_Public;
BUS_C5IO_INFO C5IO_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
/*<2A><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>*/
C5IO_Info.rtc_set_flag = 0x01;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
/*******************************************************************************

234
BLV_485_Driver/blv_bus_dev_c5music.c
View File

@@ -113,7 +113,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
// temp = SRAM_Read_Byte(dev_addr+Dev_Type); //<2F>ж<EFBFBD><D0B6>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
// if(temp != DEV_C5MUSIC_Type) return 0x01;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
if((BUS_Public.port == Bus_port) && (BUS485_Info.BUS_Start == Baud_Wait)) {
@@ -122,10 +122,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
BUS_C5MUSIC_Playback_Status_Datasend(dev_addr,&C5Music_Info);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
return RS485OCCUPYTIME;
}
@@ -227,10 +224,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Cycle_Call(uint3
C5Music_Info.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
return RS485OCCUPYTIME;
}
@@ -253,7 +247,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
uint16_t deal_len = len;
@@ -487,10 +481,8 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_BUS_C5MUSIC_Data_Processing(
C5Music_Info.DevOfflineLast = C5Music_Info.DevOffline; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬
Write_Device_Fault_State(BUS_Public.type,BUS_Public.addr,In_ErrFun_LineState,DEV_IS_ONLINE); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬<D7B4><CCAC>SRAM
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
return 0x00;
}
@@ -1201,16 +1193,13 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Playback_Mode(uint3
if(devaddr == 0x00) return;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
C5Music_Info.playback_mode = play_mode;
C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
@@ -1230,7 +1219,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
C5Music_Info.playback_fun = playback;
@@ -1239,12 +1228,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback(uint32_t devad
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1260,7 +1244,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
C5Music_Info.assign_dir = BLV_C5MUSIC_Doorbell_Dir;
@@ -1268,11 +1252,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Doorbell_Dir(uint32_t d
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
@@ -1290,7 +1270,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
C5Music_Info.playback_fun = start;
@@ -1299,11 +1279,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Warning_Dir(uint32_t de
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
@@ -1321,23 +1297,17 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Greet_Dir(uint32_t deva
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
C5Music_Info.playback_fun = start;
C5Music_Info.assign_dir = BLV_C5MUSIC_Greet_Dir;
C5Music_Info.assign_playback_idx = id;
// C5Music_Info.set_playback_volume = 20; //<2F><>ӭ<EFBFBD><D3AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ15
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
@@ -1355,7 +1325,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
@@ -1385,12 +1355,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1408,7 +1373,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
@@ -1437,11 +1402,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Helpsleep_Dir(uint
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1458,7 +1419,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
/*<2A><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>*/
@@ -1487,12 +1448,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Helpsleep_Dir_Just(uint
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1507,7 +1463,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1517,11 +1473,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Stop_Playback(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
@@ -1537,7 +1489,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1559,14 +1511,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
// C5Music_Info.playback_mode = BLV_C5MUSIC_Folder_Loop;
// C5Music_Info.control_flag |= C5MUSIC_Set_Loop_Mode_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1581,7 +1526,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1600,11 +1545,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Next(uint
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d",__func__,C5Music_Info.assign_playback_idx);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1619,7 +1560,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1640,11 +1581,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Play_Playback_Last(uint
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1659,7 +1596,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1669,12 +1606,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Pause_Playback(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1691,7 +1623,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1701,12 +1633,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Next(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1723,7 +1650,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1733,12 +1660,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Playback_Prev(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Specify_Play_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1753,7 +1675,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ
@@ -1766,12 +1688,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Plus(ui
C5Music_Info.adjust_volume_loop = 0x03; //<2F><>·1<C2B7><31><EFBFBD><EFBFBD>·2
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1786,7 +1703,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
@@ -1800,11 +1717,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1819,7 +1732,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
@@ -1839,11 +1752,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_PlusVal
C5Music_Info.adjust_volume_type |= 0x10;
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1858,7 +1767,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
//<2F><><EFBFBD>Ե<EFBFBD><D4B5><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>value
@@ -1878,12 +1787,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Relative_Volume_Subtrac
C5Music_Info.adjust_volume_type |= 0x10;
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1898,7 +1802,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
/*<2A><><EFBFBD><EFBFBD>״̬ȡ<CCAC><C8A1>*/
@@ -1920,11 +1824,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode(uint32_t
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1942,7 +1842,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1962,11 +1862,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Quiet_Mode2(uint32_
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -1983,7 +1879,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
@@ -1999,11 +1895,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_Global_Volume(uint3
C5Music_Info.quiet_mode = 0x00;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -2024,7 +1916,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
switch(loop)
@@ -2046,11 +1938,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume(uint32_t
break;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
/*******************************************************************************
@@ -2071,7 +1959,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
if(devaddr == 0x00) return;
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
if((loop & 0x01)) //<2F><><EFBFBD><EFBFBD>
@@ -2096,11 +1984,7 @@ __attribute__((section(".non_0_wait"))) void BUS_C5MUSIC_Set_LoopVolume_2(uint32
C5Music_Info.adjust_volume_type |= 0x10;
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
}
}
@@ -2125,7 +2009,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Get_BUS_C5MUSIC_Loop_Volume(uint
Device_Public_Information_G BUS_Public;
BUS_C5MUSIC_INFO C5Music_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),devaddr+Dev_Privately);
switch(loop)
@@ -2197,7 +2081,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
return ;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddrOut);
BLV_Device_PublicInfo_Read_To_Struct(DevAddrOut,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
if(DevOutputLoop >= MUSICLOOPMAX)
@@ -2410,11 +2294,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Music_Ctrl(
C5Music_Info.control_flag |= C5MUSIC_Set_Volume_Flag;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&C5Music_Info, sizeof(BUS_C5MUSIC_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddrOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO),DevAddrOut+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddrOut,&BUS_Public,(uint8_t *)&C5Music_Info,sizeof(BUS_C5MUSIC_INFO));
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[0].CtrlCont.CtrlVoice);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"BLV<EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>%d", C5Music_Info.BackMusicState[1].CtrlCont.CtrlVoice);

197
BLV_485_Driver/blv_nor_dev_c5relay.c Normal file
View File

@@ -0,0 +1,197 @@
/*
* blv_nor_dev_c5relay.c
*
* Created on: Jan 5, 2026
* Author: cc
*/
#include "blv_nor_dev_c5relay.h"
#include "blv_bus_dev_c5iofun.h"
#include "blv_dev_action.h"
#include "spi_sram.h"
#include "check_fun.h"
#include "debug.h"
#define REPEATSENDTIMEMAX 0x03 //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define C5EXPANDTYPE 0xF1 //C5RELAY<41><59><EFBFBD><EFBFBD>
#define C5RelayAddrDefault 0x01 //Ĭ<><C4AC>Ϊ1<CEAA><31>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6>Ȼ<EFBFBD><C8BB>Ĭ<EFBFBD>ϵ<EFBFBD>ַ
#define C5RELAYSnMin 0x00 //<2F><>СSn<53><6E>
#define C5RELAYSnMax 0x0F //<2F><><EFBFBD><EFBFBD>Sn<53><6E>
/*******************************************************************************
* Function Name : BLW_RS485_C5RELAY_Data_Init
* Description : <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ѯ<EFBFBD>豸
* Input :
type : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
addr : <20><><EFBFBD>ӵ<EFBFBD><D3B5>豸<EFBFBD><E8B1B8>ַ
polling_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݷ<EFBFBD><DDB7>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
processing_cf <20><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
* Return : None
*******************************************************************************/
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo)
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s",__func__);
BUS_Public->polling_cf = (uint32_t)&BLW_C5RELAYCycleCtrl;
BUS_Public->processing_cf = (uint32_t)&BLW_Rs485_C5RELAY_Check;
/* <20>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ҫ֪<D2AA><D6AA>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>ܿ<EFBFBD><DCBF>Ƽ̵<C6BC><CCB5><EFBFBD>
<20><><EFBFBD>ڽ<EFBFBD><DABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡCSIO<49><4F>ַ<EFBFBD>ŵ<EFBFBD><C5B5>豸ȫ<E8B1B8><C8AB><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD><EFBFBD><EFBFBD>ȥ<EFBFBD><C8A5><EFBFBD><EFBFBD>CSIO<49><4F><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>浽<EFBFBD>ü̵<C3BC><CCB5><EFBFBD><EFBFBD>豸<EFBFBD>С<EFBFBD>
<20><><EFBFBD>Һ<EFBFBD><D2BA><EFBFBD><EFBFBD><EFBFBD>Dev_Coord_Get*/
}
#define C5EXPANDCTRLLEN 13 //<2F><>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD>
/**
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
* @para
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
* @return <20><>
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
*/
void BLW_Rs485_C5RELAY_Ctrl(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD><EFBFBD>CSIO<49><4F>*/
if( DevHVoutInfo->HVoutLoopValidNum >= HVoutNumMAX ) DevHVoutInfo->HVoutLoopValidNum = HVoutNumMAX; //<2F><>ֹ<EFBFBD><D6B9><EFBFBD><EFBFBD>
for(uint8_t i = 0; i < DevHVoutInfo->HVoutLoopValidNum; i++)
{
if( (DevHVoutInfo->DevChangeFlag & (0x01 << i)) != 0x00 )
{
switch(DevHVoutInfo->DevHVoutState[i])
{
case 0x01:
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_HIGH;
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
break;
case 0x00:
C5IO_Info->Relay_Control[i] = BUS_C5IO_OUT_LOW;
C5IO_Info->Relay_Control_Flag |= 0x00000001<<i;
break;
}
DevHVoutInfo->DevChangeFlag &= ~(0x01<<i);
}
}
}
/*******************************************************************************
* Function Name : BLW_C5RELAYCycleCtrl
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><C6B7>ͺ<EFBFBD><CDBA><EFBFBD>
*******************************************************************************/
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr)
{
uint8_t i; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>·
uint8_t Ret = RS485OCCUPYNOTIME;
uint8_t keep_flag = 0;
Device_Public_Information_G BUS_Public;
NOR_HVOUT_INFO DevHVoutInfo;
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
BUS_C5IO_INFO C5IO_Info;
BLV_Device_PublicInfo_Read_To_Struct(dev_addr, &BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),dev_addr+Dev_Privately);
if(0x00 == DevHVoutInfo.DevC5IOAddr)
{
return Ret;
}
BLV_Device_PublicInfo_Read_To_Struct(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevHVoutInfo.DevC5IOAddr+Dev_Privately);
if( (DevHVoutInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
DevHVoutInfo.init_flag = 0x01;
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
{
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
{
DevHVoutInfo.DevHVoutState[i] = 0x01;
DevHVoutInfo.DevHVoutStateLast[i] = 0x01;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
}else {
DevHVoutInfo.DevHVoutState[i] = 0x00;
DevHVoutInfo.DevHVoutStateLast[i] = 0x00;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
}
}
keep_flag = 0x01;
}
for(i = 0; i < DevHVoutInfo.HVoutLoopValidNum; i++)
{
if( DevHVoutInfo.DevHVoutStateLast[i] != DevHVoutInfo.DevHVoutState[i] )
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ʊ<EFBFBD>־<EFBFBD><EFBFBD>λ:<3A><>%d·", i);
DevHVoutInfo.DevChangeFlag |= 0x01 << i;
DevHVoutInfo.HVoutCtrlCnt = REPEATSENDTIMEMAX;
DevHVoutInfo.DevHVoutStateLast[i] = DevHVoutInfo.DevHVoutState[i];//ͬ<><CDAC>
keep_flag = 0x01;
}
}
if(keep_flag == 0x01)
{
BLW_Rs485_C5RELAY_Ctrl(&BUS_Public, &DevHVoutInfo, &C5IO_Info); //9·<39><C2B7><EFBFBD>ƣ<EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>
BLV_Device_Info_Write_To_SRAM(dev_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
BLV_Device_Info_Write_To_SRAM(DevHVoutInfo.DevC5IOAddr, &BUS_PublicC5IO, (uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
return Ret;
}
#define RECDATALENMAX 0x28 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󳤶<EFBFBD>
#define IsMyData 0x00
#define IsNotMyData 0x01
/*******************************************************************************
* Function Name : BLW_Rs485_C5RELAY_Check
* Description : BLWC5RELAY<41><59>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
dev_addr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
data_addr : <20><><EFBFBD>ݵ<EFBFBD>ַ
len <20><><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return :
0x00<30><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>
0x01<30><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
*******************************************************************************/
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len)
{
uint8_t rev = IsNotMyData;
return rev;
}
#define C5EXPANDREADLEN 7 //<2F>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
/**
* @name BLW <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
* @para
* dev_addr <20>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
* @return <20><>
* @attention <20><><EFBFBD><EFBFBD>ѭ<EFBFBD><D1AD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD>ж<EFBFBD>
*/
void BLW_Rs485_C5RELAY_Read(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO* DevHVoutInfo, BUS_C5IO_INFO *C5IO_Info)
{
}

26
BLV_485_Driver/blv_nor_dev_hvoutfun.c
View File

@@ -11,13 +11,15 @@
#include "debug.h"
#include "blv_bus_dev_c5iofun.h"
#include "blv_device_option.h"
#include "blv_nor_dev_c5relay.h"
#include <string.h>
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD>궨<EFBFBD><EAB6A8>*/
typedef void (*DevFunP)(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo); //<2F><><EFBFBD>ݹ<EFBFBD><DDB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> ˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>궨<EFBFBD>忪ʼ*/
#define RS485_DEV_PRO_FUN_01 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) //((DevFunP)NULL) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
#define RS485_DEV_PRO_FUN_01 DevExistJudgge(RS485_HVout_C5RELAY_Flag, BLW_RS485_C5RELAY_Data_Init) // C5<43><35>C12<31>Դ<EFBFBD><D4B4>̵<EFBFBD><CCB5><EFBFBD>
#define RS485_DEV_PRO_FUN_02 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_A9RELAY_Flag, BLW_RS485_A9RELAY_Data_Init) //((DevFunP)NULL) //A9IO<49>̵<EFBFBD><CCB5><EFBFBD>
#define RS485_DEV_PRO_FUN_03 ((DevFunP)NULL) //DevExistJudgge(RS485_HVout_SwiRELAY_Flag, BLW_RS485_SwiRELAY_Data_Init) //((DevFunP)NULL) //ǿ<>翪<EFBFBD>ؼ̵<D8BC><CCB5><EFBFBD>
#define RS485_DEV_PRO_FUN_04 ((DevFunP)NULL) //
@@ -46,6 +48,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
if(ENUM_RS485_DEV_PRO_01 == dev_info->version)
{
BUS_Public.retry_num = C5IO_REPEATSENDTIMEMAX; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
BUS_Public.wait_time = C5IO_SEND_WAIT_TIME; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1> - 100ms
}else{
@@ -68,6 +71,8 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
DevHVoutInfo.HVoutLoopValidNum = dev_info->output_num;
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"HVOUT loop:%d",DevHVoutInfo.HVoutLoopValidNum);
switch(BUS_Public.Protocol)
{
case ENUM_RS485_DEV_PRO_01: if(NULL!=RS485_DEV_PRO_FUN_01) RS485_DEV_PRO_FUN_01(&BUS_Public, &DevHVoutInfo);break; //
@@ -91,6 +96,7 @@ __attribute__((section(".non_0_wait"))) void BLV_Nor_Dev_HVout_For_Logic_Init(
Poll485_Info.device_num += 1;
break;
case Bus_port: //<2F><><EFBFBD>߶˿<DFB6>
BUS_Public.baud = 115200;
BUS_Public.port = Bus_port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
Add_BUS_Device_To_List(&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
BUS485_Info.device_num += 1;
@@ -152,7 +158,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
if(devaddr == 0x00) return;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
switch(start)
@@ -191,10 +197,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Control_State(
{
BLV_Active_Set_List_Addr(devaddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
}
}
@@ -224,7 +228,7 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
if(devaddr == 0x00) return;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
if(CtrlNum >= DevHVoutInfo.HVoutLoopValidNum)
@@ -270,10 +274,8 @@ __attribute__((section(".non_0_wait"))) void BLW_HVout_Group_Ctrl(
{
BLV_Active_Set_List_Addr(devaddr);
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevHVoutInfo, sizeof(NOR_HVOUT_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
}
}
@@ -332,6 +334,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_HVout_Group_Read(
}
break;
}
}
}
break;
@@ -366,6 +369,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_HVout_Group_Read(
break;
}
}
return Ret;
}

210
BLV_485_Driver/blv_nor_dev_lvoutput.c Normal file
View File

@@ -0,0 +1,210 @@
/*
* blv_nor_dev_lvoutput.c
*
* Created on: Dec 31, 2025
* Author: cc
*/
#include "includes.h"
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>*/
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr)
{
Device_Public_Information_G BUS_Public;
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
memset(&DevLVoutputInfo,0,sizeof(NOR_LVOUTPUT_INFO));
BUS_Public.addr = devaddr; //<2F>豸<EFBFBD><E8B1B8>ַ
BUS_Public.type = Dev_Host_LVoutput; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
// BUS_Public.port = Active_Port; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
// BUS_Public.baud = 9600; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
// BUS_Public.retry_num = 0x03; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
// BUS_Public.wait_time = 0x0064; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
// BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
// BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_LVoutput_Dis; //
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_LVoutput_Control_State; //
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = LVoutput_Loop_State; //
DevLVoutputInfo.LVoutputLoopValidNum = C1_LVOUTPUTNUMMAX;
DevLVoutputInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00);
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
}
/*******************************************************************************
* Function Name : LVoutput_Loop_State
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - ״̬<D7B4><CCAC>ȡ
* Input :
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
* Return : ״̬ 0x01<30><31> 0x02<30><32>
*******************************************************************************/
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
{
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
if(devaddr == 0x00) return 0x00;
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return 0x00;
if(DevLVoutputInfo.DevLVoutputState[DevOutputLoop] == 0x01)
{
return 0x01;
}else{
return 0x02;
}
}
/*******************************************************************************
* Function Name : BLW_LVoutput_Control_State
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
* Input :
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
start <20><>״̬ 0x01<30><31> 0x02<30><32>
* Return : <20><>
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
*******************************************************************************/
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType)
{
uint8_t temp1 = 0;
uint8_t state; //0<><30> 1<><31>
uint8_t CtrlWay;
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
if(devaddr == 0x00) return;
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),devaddr+Dev_Privately);
if(DevOutputLoop >= DevLVoutputInfo.LVoutputLoopValidNum) return ;
CtrlWay = DevOutputType&0x00ff; //ȡ<><C8A1><EFBFBD>ֽ<EFBFBD>
switch(CtrlWay)
{
case 0x01:state = 0x01;break; //<2F><><EFBFBD><EFBFBD>
case 0x02:state = 0x00;break; //<2F>ر<EFBFBD>
case 0x04: //<2F><>˸
if(0x01 == DevLVoutputInfo.DevLVoutputState[DevOutputLoop])
{
state = 0x00;
}else{
state = 0x01;
}
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD>ֵ,start:%d",state);
break;
default:return;
}
if( DevLVoutputInfo.DevLVoutputState[DevOutputLoop] != state )
{
switch(state)
{
case 0x00: //ָ<><D6B8>λ<EFBFBD><CEBB>0
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x00;
break;
case 0x01: //ָ<><D6B8>λ<EFBFBD><CEBB>һ
DevLVoutputInfo.DevLVoutputState[DevOutputLoop] = 0x01;
break;
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LVoutput loop:%d,state:%d",DevOutputLoop,state);
temp1++;
}
if(temp1 != 0x00)
{
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
}
}
void Dev_LVoutput_Dis(uint32_t DevAddr)
{
Device_Public_Information_G BUS_PublicLVoutput; //<2F><><EFBFBD><EFBFBD>
NOR_LVOUTPUT_INFO DevLVoutputInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
Device_Public_Information_G BUS_PublicC5IO; //<2F><><EFBFBD><EFBFBD>
BUS_C5IO_INFO C5IO_Info;
uint8_t KeepFlag = 0x00;
if(DevAddr == 0x00) return ;
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVoutput);
SRAM_DMA_Read_Buff((uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO),DevAddr+Dev_Privately);
if(DevLVoutputInfo.DevC5IOAddr == 0x00) return ;
BLV_Device_PublicInfo_Read_To_Struct(DevLVoutputInfo.DevC5IOAddr,&BUS_PublicC5IO);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVoutputInfo.DevC5IOAddr+Dev_Privately);
if( (DevLVoutputInfo.init_flag == 0x00) && (C5IO_Info.DI_Init_flag == 0x01) ){
/*DI<44><49>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><>ȡ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>ʼ<EFBFBD><CABC>״̬*/
DevLVoutputInfo.init_flag = 0x01;
for(uint32_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
{
if( (C5IO_Info.Relay_Level_Actual_Start & (0x01<<i)) != 0x00 )
{
DevLVoutputInfo.DevLVoutputState[i] = 0x01;
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x01;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
}else {
DevLVoutputInfo.DevLVoutputState[i] = 0x00;
DevLVoutputInfo.DevLVoutputStateLast[i] = 0x00;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DO <20><>ʼ<EFBFBD><CABC>:<3A><>%d· <20><>", i);
}
}
KeepFlag = 1;
}
for(uint16_t i = 0; i < DevLVoutputInfo.LVoutputLoopValidNum; i++)
{
if(DevLVoutputInfo.DevLVoutputStateLast[i] != DevLVoutputInfo.DevLVoutputState[i])
{
KeepFlag = 0x01;
DevLVoutputInfo.DevLVoutputStateLast[i] = DevLVoutputInfo.DevLVoutputState[i];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"׼<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevLVoutputInfo.DevLVoutputState[i]);
switch(DevLVoutputInfo.DevLVoutputState[i]) //
{
case 0x01: //<2F><>
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_HIGH;
C5IO_Info.DO_Control_Flag |= 0x01<<i;
break;
case 0x00: //<2F><>
C5IO_Info.DO_Control[i] = BUS_C5IO_OUT_LOW;
C5IO_Info.DO_Control_Flag |= 0x00000001<<i;
break;
}
}
}
if(0x01 == KeepFlag)
{
if(g_pc_test.test_flag == 0x12)
{
BLV_PC_Testing_Data_Reported(0x02,DEV_C5IO_Type,0x00,SRAM_LOG_Device_C5IO_Relay_Status,4);
}
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVoutput,(uint8_t *)&DevLVoutputInfo,sizeof(NOR_LVOUTPUT_INFO));
BLV_Device_Info_Write_To_SRAM(DevLVoutputInfo.DevC5IOAddr,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
}

476
BLV_485_Driver/blv_nor_dev_serviceinfo.c Normal file
View File

@@ -0,0 +1,476 @@
/*
* blv_nor_dev_servicefun.c
*
* Created on: Dec 31, 2025
* Author: cc
*/
#include "includes.h"
#include "blv_nor_dev_serviceinfo.h"
/*******************************************************************************
* Function Name : BLV_Nor_Dev_Service_For_Logic_Init
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><DFBC>ļ<EFBFBD>
*******************************************************************************/
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len)
{
Device_Public_Information_G BUS_Public;
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
memset(&BUS_Public,0,sizeof(Device_Public_Information_G));
memset(&DevServiceInfo,0,sizeof(NOR_SERVICE_INFO));
BUS_Public.addr = dev_info->addr; //<2F>豸<EFBFBD><E8B1B8>ַ
BUS_Public.type = Dev_Host_Service; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
BUS_Public.port = dev_info->type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͷ˿<CDB6>
BUS_Public.baud = dev_info->baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD><EFBFBD>
BUS_Public.retry_num = dev_info->retry; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
BUS_Public.wait_time = dev_info->writ_time; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ݷ<EFBFBD><DDB7>͵ȴ<CDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>
BUS_Public.polling_cf = (uint32_t)&BLW_Touch_SwitchCycleDis;
BUS_Public.processing_cf = (uint32_t)&BLW_Rs485_Touch_Swi_Check;
BUS_Public.DevFunInfo.Dev_Data_Process = Dev_Service_Dis;
BUS_Public.DevFunInfo.Dev_Input_Type_Get = Dev_Service_InType_Get;
BUS_Public.DevFunInfo.Dev_Output_Ctrl = BLW_Service_Control_State;
BUS_Public.DevFunInfo.Dev_Output_Loop_State_Get = Service_Loop_State;
DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
DevServiceInfo.Loop_State[Service_Warning] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>
DevServiceInfo.Loop_State[Service_Dnd] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
DevServiceInfo.Loop_State[Service_Clean] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_Luggage] = 0x02; //Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_Meals] = 0x02; //<2F>ر<EFBFBD>9<EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD>
DevServiceInfo.Loop_State[Service_CheckOut] = 0x02; //<2F>ر<EFBFBD><D8B1>˷<EFBFBD>
DevServiceInfo.Loop_State[Service_Strong] = 0x02; //<2F>رձ<D8B1><D5B1><EFBFBD><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_Wait] = 0x02; //<2F>ر<EFBFBD><D8B1>Ժ<EFBFBD>
DevServiceInfo.Loop_State[Service_Sos] = 0x02; //Ĭ<>Ϲر<CFB9>SOS<4F><53><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
DevServiceInfo.Loop_State[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
DevServiceInfo.Loop_State_Last[Service_Call] = 0x02; //<2F>رպ<D8B1><D5BA><EFBFBD>
DevServiceInfo.Loop_State_Last[Service_22] = 0x02; //<2F><><EFBFBD>ӿ<EFBFBD><D3BF>ط<EFBFBD><D8B7><EFBFBD>״̬
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>˽<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD><EFBFBD>:%d",sizeof(NOR_SERVICE_INFO));
/*RCU<43><55><EFBFBD><EFBFBD>MCU<43><55>λ״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC> -
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><C7BF>Ź<EFBFBD><C5B9><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>ⲿ<EFBFBD>ֶ<EFBFBD><D6B6><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>״̬<D7B4><CCAC>ʼ<EFBFBD><CABC>(Ĭ<><C4AC>״̬<D7B4><CCAC>ͨ<EFBFBD><CDA8>RCU_POWER_Deivce_State_Init <20>궨<EFBFBD><EAB6A8> <20>޸<EFBFBD>Ĭ<EFBFBD>ϳ<EFBFBD>ʼ<EFBFBD><CABC>״̬)
*/
if( (DevActionGlobal.sram_save_flag == 0xA8) && ((SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x01) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x03) || (SRAM_Read_DW(SRAM_LOG_RCU_Reboot_Reason) == 0x05)) )
{
DevServiceInfo.Loop_State[Service_Ele] = DevActionGlobal.Last_EleState;
DevServiceInfo.Loop_State_Last[Service_Ele] = DevActionGlobal.Last_EleState;
}else {
#if RCU_POWER_Deivce_State_Init
DevServiceInfo.Loop_State[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x01; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
#else
DevServiceInfo.Loop_State[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
DevServiceInfo.Loop_State_Last[Service_Ele] = 0x02; //Ĭ<>Ͽ<EFBFBD><CFBF><EFBFBD><EFBFBD><EFBFBD>ס<EFBFBD><D7A1><EFBFBD><EFBFBD> - <20><>
#endif
}
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
SRAM_Write_Byte(DevServiceInfo.Loop_State[Service_Ele],SRAM_UDP_ELEReport_EleState_Last); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
DevServiceInfo.is_first_power_on = 0x00; //<2F>ϵ<EFBFBD>Ĭ<EFBFBD><C4AC> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
Add_Nor_Device_To_List(&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
/*******************************************************************************
* Function Name : Service_Loop_State
* Description : <20><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ļ<EFBFBD>·״̬
*******************************************************************************/
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop)
{
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
if(devaddr == 0x00) return 0x00;
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
{
return 0x00;
}
return DevServiceInfo.Loop_State[DevOutputLoop];
}
/*******************************************************************************
* Function Name : BLW_Service_Control_State
* Description : BLW<4C><57><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ״̬<D7B4><CCAC><EFBFBD>ƺ<EFBFBD><C6BA><EFBFBD>
* Input :
devaddr : <20>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ַ
loop <20><><EFBFBD><EFBFBD>· <20><>·<EFBFBD><C2B7><EFBFBD>Ǵ<EFBFBD>0
start <20><>״̬ 0x01<30><31> 0x02<30><32> 0x04<30><34><EFBFBD><EFBFBD><EFBFBD>״α<D7B4>־λ 0x04
* Return : <20><>
* attention : temp1<70><31>0<EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>б<EFBFBD><D0B1><EFBFBD>
*******************************************************************************/
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start)
{
// uint16_t DataLen = 0;
uint8_t temp1 = 0; //crc_val = 0,
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
if(devaddr == 0x00) return;
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),devaddr+Dev_Privately);
if(DevOutputLoop >= DevServiceInfo.ServiceLoopValidNum)
{
return ;
}
switch(start)
{
case 0x01:
case 0x02:
if( DevServiceInfo.Loop_State[DevOutputLoop] != start )
{
if((DevOutputLoop == Service_16) && (start == 0x01)) //
{
if(0x01 == DevActionGlobal.DevActionU64Cond.NeightFlag) //ҹ<>ƴ<EFBFBD><C6B4><EFBFBD>
{
if(NightModeStart != DevActionGlobal.DevActionU64Cond.NeightState)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƣ<EFBFBD><EFBFBD>г<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>ߣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ"); //<2F>г<EFBFBD><D0B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevActionGlobal.DevActionU64Cond.NeightState = NightModeStart; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҹ
}
}
}
if((DevOutputLoop == Service_Dnd)&& (start == 0x01)) //2023-10-31 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
DevServiceInfo.Loop_State[DevOutputLoop+1] = 0x02;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop+1),0x02);
}
else if((DevOutputLoop == Service_Clean)&& (start == 0x01))
{
DevServiceInfo.Loop_State[DevOutputLoop-1] = 0x02;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",(DevOutputLoop-1),0x02);
}
else if((DevOutputLoop == Service_24) && (start == 0x01)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> -- <20><><EFBFBD>ʵ㣺Ϊɶ<CEAA><C9B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ24<32><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ14 <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
DevServiceInfo.Loop_State[Service_Warning] = 0x02;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
}
else if((DevOutputLoop == Service_24) && (start == 0x02)) //2023-12-05 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
DevServiceInfo.Loop_State[Service_Warning] = 0x01;
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
}
else if((DevOutputLoop == Service_Ele)&& (start == 0x01)) //2024-04-29
{
DevActionGlobal.CardInFlag = 0x01;
}
if(DevOutputLoop == Service_Ele){
/*ȡ<><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>¼ 2025-02-19*/
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d\r\n",DevOutputLoop,start);
LOG_LogicInfo_DebugRecord("DevService:loop:%d,start:%d",DevOutputLoop,start);
}
DevServiceInfo.Loop_State[DevOutputLoop] = start;//<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"SERVICE loop:%d,start:%d",DevOutputLoop,start);
temp1++;
}
break;
case 0x03: //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ <20><>λ Ŀǰֻ<C7B0><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x00) )
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"Service_Ele Set first_power_on");
DevServiceInfo.is_first_power_on = 0x01;
temp1++;
}
break;
case 0x04: //<2F><>ȡ<EFBFBD><C8A1>
/*
1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3>㴥<EFBFBD><E3B4A5><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
2<><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD><DAA3><EFBFBD><EFBFBD>޸<EFBFBD>ȡ<EFBFBD><C8A1>״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD>Ҵ<EFBFBD><D2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD>硱<EFBFBD>¼<EFBFBD>
*/
if( (DevOutputLoop == Service_Ele) && (DevServiceInfo.is_first_power_on == 0x01) )
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20>״<EFBFBD>ȡ<EFBFBD><C8A1>");
DevActionGlobal.CardInFlag = 0x01;
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
temp1++;
}else if( DevOutputLoop == Service_Ele ){
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>");
DevActionGlobal.CardInFlag = 0x01;
DevServiceInfo.Loop_State[DevOutputLoop] = 0x01;
DevServiceInfo.Loop_State_Last[DevOutputLoop] = 0x01;
DevServiceInfo.DevChangeFlag[DevOutputLoop] = 0x04; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
temp1++;
}
break;
}
if(temp1 != 0x00)
{
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
}
/*******************************************************************************
* Function Name : Dev_Service_InType_Get
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⺯<EFBFBD><E2BAAF>
* Input :
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
DevInputLoop <20><><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><>Χ0~ServiceLoopValidNum
DevInputType <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Return : <20><>
*******************************************************************************/
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType)
{
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(DevInputLoop >= DevServiceInfo.ServiceLoopValidNum)
{
return Ret;
}
if(DevInputType == DevServiceInfo.DevChangeFlag[DevInputLoop]) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͶԵ<CDB6><D4B5><EFBFBD> 1<><31> 2<><32>
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> %d - %d <20><><EFBFBD><EFBFBD>",DevInputLoop,DevInputType);
DevServiceInfo.DevChangeFlag[DevInputLoop] = 0x00; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0
Ret = CtrlValid;
}
if(CtrlValid == Ret)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
return Ret;
}
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>*/
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo)
{
DevActionGlobal.DevActionU64Cond.EleState = DevServiceInfo->Loop_State[Service_Ele];
DevActionGlobal.DevActionU64Cond.DndState = DevServiceInfo->Loop_State[Service_Dnd];
DevActionGlobal.DevActionU64Cond.CleanState = DevServiceInfo->Loop_State[Service_Clean];
DevActionGlobal.DevActionU64Cond.CallState = DevServiceInfo->Loop_State[Service_Call];
DevActionGlobal.DevActionU64Cond.WashState = DevServiceInfo->Loop_State[Service_Wash];
DevActionGlobal.DevActionU64Cond.CheckOutState = DevServiceInfo->Loop_State[Service_CheckOut];
DevActionGlobal.DevActionU64Cond.WaitState = DevServiceInfo->Loop_State[Service_Wait];
DevActionGlobal.DevActionU64Cond.SosState = DevServiceInfo->Loop_State[Service_Sos];
DevActionGlobal.DevActionU64Cond.RentState = DevServiceInfo->Loop_State[Service_Meals];
DevActionGlobal.DevActionU64Cond.LockState = DevServiceInfo->Loop_State[Service_Food_Plate];
DevActionGlobal.DevActionU64Cond.LuggageState = DevServiceInfo->Loop_State[Service_Luggage];
DevActionGlobal.DevActionU64Cond.StrongState = DevServiceInfo->Loop_State[Service_Strong];
DevActionGlobal.DevActionU64Cond.DoorState = DevServiceInfo->Loop_State[Service_Door];
DevActionGlobal.DevActionU64Cond.WarningState = DevServiceInfo->Loop_State[Service_Warning];
DevActionGlobal.Service_16 = DevServiceInfo->Loop_State[Service_16];
SRAM_Write_Byte(DevActionGlobal.DevActionU64Cond.EleState,SRAM_UDP_ELEReport_EleState); //<2F><>UDP <20>ϱ<EFBFBD>ȡ<EFBFBD><C8A1>״̬ʹ<CCAC><CAB9>
}
/*******************************************************************************
* Function Name : Dev_Service_Dis
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣɨ<CFA2>躯<EFBFBD><E8BAAF> <20>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ת<EFBFBD><D7AA>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
* Input :
devaddr : <20>豸<EFBFBD><E8B1B8>ַ
* Return : <20><>
*******************************************************************************/
void Dev_Service_Dis(uint32_t DevAddr)
{
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t KeepFlag = 0x00;
if(DevAddr == 0x00) return ;
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),DevAddr+Dev_Privately);
if( DevActionGlobal.SleepMode_State != 0x01 ) //2024-10-21 <20><>ҹ<EFBFBD>ر<EFBFBD>ҹ<EFBFBD>ƿ<EFBFBD><C6BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>⣬ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>16<31>ŷ<EFBFBD><C5B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
DevServiceInfo.Loop_State[Service_16] = 0x02;
KeepFlag = 0x01;
}
for(uint16_t i = 0; i < DevServiceInfo.ServiceLoopValidNum; i++)
{
if(DevServiceInfo.Loop_State_Last[i] != DevServiceInfo.Loop_State[i])
{
KeepFlag = 0x01;
DevServiceInfo.Loop_State_Last[i] = DevServiceInfo.Loop_State[i];
if( (i == Service_Ele) && ( DevServiceInfo.Loop_State[i] == 0x01 ) && (DevServiceInfo.is_first_power_on == 0x01) )
{
DevServiceInfo.is_first_power_on = 0x00;
DevServiceInfo.DevChangeFlag[i] = 0x03; //<2F><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>¼<EFBFBD>
}else {
DevServiceInfo.DevChangeFlag[i] = DevServiceInfo.Loop_State[i];
}
Udp_Addtion_Roomstate(Dev_Host_Service,0x00, i+1, DevServiceInfo.Loop_State[i]); //<2F>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"׼<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d ״̬:%d", i, DevServiceInfo.DevChangeFlag[i]);
}
}
if(0x01 == KeepFlag)
{
Dev_Action_CondService_Get(&DevServiceInfo); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>б仯<D0B1><E4BBAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬ͬ<CCAC><CDAC>
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
}
/*******************************************************************************
* Function Name : ServiceInfo_Set_first_power_on
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
* Input :
state : <20><><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD>ȡ<EFBFBD><C8A1>״̬
* Return : <20><>
*******************************************************************************/
uint8_t ServiceInfo_Set_first_power_on(uint8_t state)
{
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
if(DevServiceInfo.is_first_power_on != state)
{
DevServiceInfo.is_first_power_on = state;
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
return 0x00;
}
/*******************************************************************************
* Function Name : ServiceInfo_Get_ALL_Loop_State
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><>ȡȫ<C8A1><C8AB><EFBFBD><EFBFBD>·<EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>״̬
* Input :
read_buff : <20><>ȡ״̬<D7B4><CCAC><EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD><EFBFBD><EFBFBD>
* Return : <20><>
*******************************************************************************/
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff)
{
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t loop_offset = 0;
uint8_t loop_ide = 0;
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
if( DevServiceInfo.ServiceLoopValidNum >= ServiceNumMAX ) DevServiceInfo.ServiceLoopValidNum = ServiceNumMAX;
for(uint8_t i=0;i<DevServiceInfo.ServiceLoopValidNum;i++)
{
loop_ide = i / 8;
loop_offset = i % 8;
if(DevServiceInfo.Loop_State[i] == 0x01)
{
read_buff[loop_ide] |= 0x01 << loop_offset;
}
}
return 0x00;
}
/*******************************************************************************
* Function Name : ServiceInfo_Set_RoomState
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ - <20><><EFBFBD>÷<EFBFBD>̬<EFBFBD><CCAC>Ӧ<EFBFBD>Ļ<EFBFBD>·״̬ 2025-10-27
<20><><EFBFBD>Է<EFBFBD><D4B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PMS<4D><53><EFBFBD>͵ķ<CDB5>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7>󣬸ı<F3A3ACB8><C4B1><EFBFBD>Ӧ<EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·״̬<D7B4><CCAC><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD>¼<EFBFBD>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·25 - <20><><EFBFBD><EFBFBD>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·26 - <20>˷<EFBFBD>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·27 - <20><><EFBFBD><EFBFBD>
<20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·28 - <20>շ<EFBFBD>
<20><>4<EFBFBD><34><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>·<EFBFBD><C2B7><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>ҽ<EFBFBD><D2BD><EFBFBD>һ<EFBFBD><D2BB>״̬Ϊ<CCAC><CEAA><EFBFBD><EFBFBD>
* Input : state -0x01:<3A><><EFBFBD>⡢0x02:<3A>˷<EFBFBD><CBB7><EFBFBD>0x03:<3A><><EFBFBD>⡢0x04:<3A>շ<EFBFBD>
* Return : 0x00:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ:<3A><><EFBFBD><EFBFBD>ʧ<EFBFBD><CAA7>
*******************************************************************************/
uint8_t ServiceInfo_Set_RoomState(uint8_t state)
{
uint32_t dev_addr = Find_AllDevice_List_Information(Dev_Host_Service,0x00);
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_SERVICE_INFO DevServiceInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t keep_flag = 0;
if(dev_addr == 0x00) return 0x01; //δ<>ҵ<EFBFBD><D2B5>豸
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO),dev_addr+Dev_Privately);
switch(state)
{
case 0x01: //<2F><><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x01;
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
if(DevServiceInfo.is_first_power_on != 0x01)
{
DevServiceInfo.is_first_power_on = 0x01;
}
keep_flag = 0x01;
break;
case 0x02: //<2F>˷<EFBFBD>
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x01;
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
if(DevServiceInfo.is_first_power_on != 0x01)
{
DevServiceInfo.is_first_power_on = 0x01;
}
keep_flag = 0x01;
break;
case 0x03: //<2F><><EFBFBD><EFBFBD>
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x01;
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x02;
keep_flag = 0x01;
break;
case 0x04: //<2F>շ<EFBFBD>
DevServiceInfo.Loop_State[Service_PMS_Rented] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_CheckOut] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Waiting] = 0x02;
DevServiceInfo.Loop_State[Service_PMS_Vacant] = 0x01;
keep_flag = 0x01;
break;
}
if(keep_flag == 0x01)
{
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&DevServiceInfo,sizeof(NOR_SERVICE_INFO));
}
return 0x00;
}

24
BLV_485_Driver/blv_nor_dev_virtualcard.c
View File

@@ -270,7 +270,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
return ;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
/*<2A><>ʼ<EFBFBD><CABC>ӳ<EFBFBD><D3B3><EFBFBD>˿ڿ<CBBF>ʼ*/
@@ -517,7 +517,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
if(tempaddr != 0x00)
{
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),tempaddr);
BLV_Device_PublicInfo_Read_To_Struct(tempaddr,&BUS_Public);
if(BUS_Public.Protocol == 0x03) //<2F><><EFBFBD><EFBFBD>A9IO
{
//SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),tempaddr+Dev_Privately);
@@ -1238,10 +1238,7 @@ __attribute__((section(".non_0_wait"))) void Dev_VirtualCard_Dis(uint32_t DevAdd
if(0x01 == KeepFlag)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
}
}
@@ -1254,7 +1251,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
if(DevAddr == 0x00) return Ret;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
switch(DevInputType)
@@ -1284,11 +1281,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_VirtualCard_InType_Get(uint3
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"VirtualCard Action Clear!!!!");
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
}
return Ret;
@@ -1304,7 +1297,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
if(devaddr == 0x00) return;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
temp_start = start&0xFF;
@@ -1328,10 +1321,7 @@ __attribute__((section(".non_0_wait"))) void BLV_VirtualCard_Control_State(uint3
if(temp1 != 0x00)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&VCard_Info, sizeof(VIRTUALCARD_STRUCT));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&VCard_Info,sizeof(VIRTUALCARD_STRUCT));
}
}

24
BLV_485_Driver/blv_not_dev_lvinput.c
View File

@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
NOR_LVINPUT_INFO DevLVinputInfo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately); /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(DevInputLoop >= DevLVinputInfo.LVinputValidNum)
@@ -78,6 +78,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
if(DevInputType == DevLVinputInfo.DevReadBuf[DevInputLoop]) //<2F>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>
{
DevLVinputInfo.DevReadBuf[DevInputLoop] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Ret = CtrlValid;
}
@@ -85,11 +86,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_LVinput_InType_Get(uint32_t
if(CtrlValid == Ret)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s %d: %d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>",__func__,DevInputLoop, DevInputType);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
}
return Ret;
@@ -113,7 +110,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
{
return ;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicLVinput,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_PublicLVinput);
SRAM_DMA_Read_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
if( (0x00000000 == DevLVinputInfo.DevC5IOAddr) || (0xFFFFFFFF == DevAddr) )
@@ -121,7 +118,7 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
return ;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicC5IO,sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevLVinputInfo.DevC5IOAddr,&BUS_PublicC5IO);
SRAM_DMA_Read_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
for(uint8_t i = 0;i<C5IO_DI_CH_MAX;i++)
@@ -239,16 +236,11 @@ __attribute__((section(".non_0_wait"))) void Dev_LVinput_Dis(uint32_t DevAddr)
if(0x01 == KeepFlag)
{
BUS_PublicLVinput.check = 0x00;
BUS_PublicLVinput.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G), (uint8_t *)&DevLVinputInfo, sizeof(NOR_LVINPUT_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicLVinput, sizeof(Device_Public_Information_G),DevAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_PublicLVinput,(uint8_t *)&DevLVinputInfo,sizeof(NOR_LVINPUT_INFO));
/*<2A><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
BUS_PublicC5IO.check = 0x00;
BUS_PublicC5IO.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G), (uint8_t *)&C5IO_Info, sizeof(BUS_C5IO_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicC5IO, sizeof(Device_Public_Information_G),DevLVinputInfo.DevC5IOAddr); /*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO),DevLVinputInfo.DevC5IOAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevLVinputInfo.DevC5IOAddr,&BUS_PublicC5IO,(uint8_t *)&C5IO_Info,sizeof(BUS_C5IO_INFO));
}
}

10
BLV_485_Driver/blv_re485_dev_energymonitor.c Normal file
View File

@@ -0,0 +1,10 @@
/*
* blv_re485_dev_energymonitor.c
*
* Created on: Dec 20, 2025
* Author: cc
*/

14
BLV_485_Driver/blv_rs485_dev_c12dimming.c
View File

@@ -68,7 +68,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
RS485_LED_INFO Rs485LEDInfo;
uint8_t KeepFlag = 0x00;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
for(i = 0; i < Rs485LEDInfo.LEDLoopValidNum; i++)
@@ -187,10 +187,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_C12DimCycleCtrl(uint32_t dev
if(0x01 == KeepFlag)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
}
return Ret;
@@ -221,7 +218,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
}
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
if(( data[0] != C12Rs485AddrDefault ) || ( DEVC12DimTYPE != data[2] ) //
|| ( len != (data[4] ) )
@@ -293,10 +290,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_C12Dim_Check(uint32_t
break;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
}
return rev;

22
BLV_485_Driver/blv_rs485_dev_cardctrl.c
View File

@@ -200,7 +200,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
uint8_t keepflag = 0x00;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
if(Rs485CardInfo.DevPort != Rs485CardInfo.DevPort_Last)
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_RS485_Card_Cycle_Dis(uint32_
if(keepflag == 0x01)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
}
return ret;
@@ -302,7 +299,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
return 0x01;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
if(Rs485CardInfo.DevOffline == DEV_IS_OFFLINE)
@@ -396,10 +393,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_Rs485_Card_Check(uint32_t de
}
/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>*/
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
return 0x00;
}
@@ -443,7 +437,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr);
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
if(Rs485CardInfo.Rs485CardAction == DevInputType)
@@ -456,11 +450,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Rs485_Card_InType_Get(uint32
if(CtrlValid == Ret)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>忨ȡ<EFBFBD>綯<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485CardInfo, sizeof(RS485_CARD_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485CardInfo,sizeof(RS485_CARD_INFO));
}
return Ret;

21
BLV_485_Driver/blv_rs485_dev_ledctrl.c
View File

@@ -120,7 +120,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
if(devaddr == 0x00) return;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
if(loop >= Rs485LED.LEDLoopValidNum) //<2F><>Ч<EFBFBD><D0A7>·
@@ -216,10 +216,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Control_State(uint32_t CfgD
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevSendBuf loop:%d,start:%d",loop,start);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LED, sizeof(RS485_LED_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LED,sizeof(RS485_LED_INFO));
}
}
@@ -292,7 +289,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"LED<45><44><EFBFBD><EFBFBD>״̬Ⱥ<CCAC>ؿ<EFBFBD><D8BF>ƿ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>·<EFBFBD><C2B7>־<EFBFBD><D6BE>%04X <20><>·<EFBFBD><C2B7><EFBFBD><EFBFBD>%d ", CtrlFlag, CtrlNum);
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
if(CtrlNum >= Rs485LEDInfo.LEDLoopValidNum)
@@ -426,10 +423,7 @@ __attribute__((section(".non_0_wait"))) void BLW_LED_Group_Ctrl(uint32_t CfgDevA
}
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
}
/*******************************************************************************
@@ -455,7 +449,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
Device_Public_Information_G BUS_Public;
RS485_LED_INFO Rs485LEDInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),devaddr);
BLV_Device_PublicInfo_Read_To_Struct(devaddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
if(ReadNum >= Rs485LEDInfo.LEDLoopValidNum)
@@ -549,10 +543,7 @@ __attribute__((section(".non_0_wait"))) uint16_t BLW_LED_Group_Read(uint32_t dev
if(tempflag!=0)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485LEDInfo, sizeof(RS485_LED_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),devaddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO),devaddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(devaddr,&BUS_Public,(uint8_t *)&Rs485LEDInfo,sizeof(RS485_LED_INFO));
}
return Ret;

15
BLV_485_Driver/blv_rs485_dev_switchctrl.c
View File

@@ -133,7 +133,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
RS485_SWI_INFO Rs485SwiInfo; //<2F><><EFBFBD>ؾֲ<D8BE><D6B2><EFBFBD><EFBFBD><EFBFBD>
uint8_t Ret = CtrlInvalid; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(DevInputLoop >= RS_SWITCH_CH_MAX)
@@ -164,10 +164,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_Swi_InType_Get(uint32_t DevA
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>գ<EFBFBD>%d",Ret);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
}
return Ret;
@@ -198,7 +195,7 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
return ;
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAddr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(DevAddr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(DevOutputLoop >= Rs485SwiInfo.SwtOutputValidNum)
@@ -254,10 +251,8 @@ __attribute__((section(".non_0_wait"))) void Dev_Swi_Output_Ctrl(uint32_t CfgDev
{
BLV_Active_Set_List_Addr(DevAddr); //Ψ<><CEA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAddr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAddr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAddr,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
}
// BLW_Touch_Switch_Feedback(DevAddr, DevOutputLoop, State);

40
BLV_485_Driver/blv_rs485_dev_tempctrl.c
View File

@@ -160,7 +160,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
return 0; //<2F>ͷ<EFBFBD><CDB7><EFBFBD>
}
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAddIn);
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
Rs485Tem.TemCondCfg.IndoorFlag = DevInputType & 0x0001;
@@ -303,10 +303,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Dev_TEMPCTRL_InType_Get(uint32_t
if(CtrlValid == Ret)
{
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAddIn);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(CfgDevAddIn,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
}
return Ret;
@@ -347,9 +344,9 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
}
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicIn,sizeof(Device_Public_Information_G),CfgDevAddIn);
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddIn,&BUS_PublicIn);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TemIn,sizeof(RS485_TEMP_INFO),CfgDevAddIn+Dev_Privately);
SRAM_DMA_Read_Buff((uint8_t *)&BUS_PublicOut,sizeof(Device_Public_Information_G),CfgDevAddOut);
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAddOut,&BUS_PublicOut);
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<22>¿<EFBFBD><C2BF><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD>ͬ<EFBFBD><CDAC>485<38><35>ַ:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x<34><78><EFBFBD><EFBFBD><EFBFBD>Ʋ<EFBFBD><C6B2><EFBFBD>:%4x,<2C><><EFBFBD><EFBFBD>״̬:%d",BUS_PublicOut.addr, TEMSTATECONVER(Rs485Tem.TemStateCtrl), DevOutputType, Rs485Tem.DevOffline);
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemStateCtrl);
@@ -358,7 +355,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
{
if(Dev_Temp_State_Data(Rs485TemLoc) != Dev_Temp_State_Data(Rs485Tem.TemState))
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x", Dev_Temp_State_Data(Rs485Tem.TemState));
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x", Dev_Temp_State_Data(Rs485Tem.TemState));
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485Tem.TemState);
Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrlLast,&Rs485TemLoc);
@@ -376,7 +373,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
{
Dev_Temp_State_Sync(&Rs485TemLoc,&Rs485TemIn.TemState); //״̬<D7B4><CCAC>һ<EFBFBD>£<EFBFBD><C2A3>ÿ<EFBFBD><C3BF><EFBFBD>״̬
}
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x - %4x", Dev_Temp_State_Data(Rs485Tem.TemState),Dev_Temp_State_Data(Rs485TemIn.TemState));
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD>״̬ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x - %x", Dev_Temp_State_Data(Rs485Tem.TemState),Dev_Temp_State_Data(Rs485TemIn.TemState));
}
}
else //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><C2BF><EFBFBD>
@@ -480,7 +477,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
uint32_t Season;
SRAM_DMA_Read_Buff((uint8_t *)&Season,4,SRAM_Register_Start_ADDRESS + Register_SeasonStatus_OFFSET);
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӡ:%08X <20><>ǰ<EFBFBD>·<EFBFBD>:%x", Season, RTC_Raw_Data.month);
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>ӡ:%X <20><>ǰ<EFBFBD>·<EFBFBD>:%x", Season, RTC_Raw_Data.month);
switch((Season>>(HEX_Conversion_To_DEC(RTC_Raw_Data.month)-1)*2)&0x03) //<2F><>ǰ<EFBFBD>·ݵļ<DDB5><C4BC><EFBFBD>
{
@@ -583,7 +580,7 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
if(0x01 == TemCtrlFlag)
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%4x - %4x", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl),Dev_Temp_State_Data(Rs485TemLoc));
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬:%x - %x", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl),Dev_Temp_State_Data(Rs485TemLoc));
if(Rs485Tem.Carbon_Set_Temp != Rs485TemLoc.set_t){
Rs485Tem.Carbon_Set_Temp = Rs485TemLoc.set_t;
@@ -595,16 +592,13 @@ __attribute__((section(".non_0_wait"))) void Dev_TEMPCTRL_Ctrl(uint32_t CfgDevAd
KeepFlag = 0x01;
Dev_Temp_State_Sync(&Rs485Tem.TemStateCtrl,&Rs485TemLoc);
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"TemStateCtrl: %04X", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl));
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"TemStateCtrl: %X", Dev_Temp_State_Data(Rs485Tem.TemStateCtrl));
}
}
if(0x01 == KeepFlag)
{
BUS_PublicOut.check = 0x00;
BUS_PublicOut.check = DoubleData_CheckSum((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_PublicOut, sizeof(Device_Public_Information_G),CfgDevAddOut);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAddOut+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(CfgDevAddOut,&BUS_PublicOut,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
}
}
@@ -667,7 +661,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
Device_Public_Information_G BUS_Public;
RS485_TEMP_INFO Rs485TempT1;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(Rs485TempT1.TemStateCtrlLast.on_off != Rs485TempT1.TemStateCtrl.on_off) //<2F><><EFBFBD>ػ<EFBFBD>
@@ -799,10 +793,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemSingleJudge(uint32_t CfgDevAd
Rs485TempT1.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
}
return Ret;
@@ -826,7 +817,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
Device_Public_Information_G BUS_Public;
RS485_TEMP_INFO Rs485Tem;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),CfgDevAdd);
BLV_Device_PublicInfo_Read_To_Struct(CfgDevAdd,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(Dev_Temp_State_Data(Rs485Tem.TemStateCtrlLast) != Dev_Temp_State_Data(Rs485Tem.TemStateCtrl)) //<2F><><EFBFBD><EFBFBD>״̬<D7B4>ı<EFBFBD><C4B1><EFBFBD>
@@ -895,10 +886,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TemGlobalJudge(uint32_t CfgDevAd
Rs485Tem.DevSendCnt++; //<2F><><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD><EFBFBD>ۼ<EFBFBD>
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485Tem, sizeof(RS485_TEMP_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),CfgDevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO),CfgDevAdd+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(CfgDevAdd,&BUS_Public,(uint8_t *)&Rs485Tem,sizeof(RS485_TEMP_INFO));
}
return Ret;

20
BLV_485_Driver/blv_rs485_dev_touchswitch.c
View File

@@ -63,7 +63,7 @@ __attribute__((section(".non_0_wait"))) void BlwRelaySwtRecAsk(uint8_t *data)
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),device_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(device_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),device_addr+Dev_Privately);
if(DevHVoutInfo.HVSwitchFlag==0x01)
@@ -221,14 +221,14 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
if(data[0] == SRAM_Read_Byte(DevAdd+Dev_Addr)) //<2F><>ַ<EFBFBD>պ<EFBFBD>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>BUS_Public.addr
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>ַƥ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> DevAdd:%d,len:%d",data[0],DataLen);
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
}
else //<2F><>ַû<D6B7><C3BB>ƥ<EFBFBD><C6A5><EFBFBD><EFBFBD>
{
DevAdd = Find_AllDevice_List_Information2(Active_Port, 0x06, data[0]); //<2F><>ַ<EFBFBD><D6B7><EFBFBD>¸<EFBFBD>ֵ
if( (0x00000000 != DevAdd) || (0xFFFFFFFF != DevAdd) )
if( (0x00000000 != DevAdd) && (0xFFFFFFFF != DevAdd) )
{
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
}else{
return ret;
}
@@ -250,10 +250,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Rs485_Touch_Swi_Check(uint32
/*<2A><>־<EFBFBD><D6BE>¼*/
LOG_Device_COMM_Control_Reply_Record(BUS_Public.port,BUS_Public.baud,data,DataLen);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
return ret;
}
@@ -333,7 +330,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
uint8_t i;
uint8_t Ret = RS485OCCUPYNOTIME;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8><CBBD><EFBFBD><EFBFBD>Ϣ*/
if(DevActionGlobal.DevActionU64Cond.EleState==0x01)
@@ -385,10 +382,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLW_Touch_SwitchCycleDis(uint32_
/*ͨѶͳ<D1B6>Ƽ<EFBFBD>¼*/
BLV_Communication_Record(&Rs485SwiInfo.comm_record,0x01,0x00);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
}
return Ret;

10
BLV_485_Driver/blv_rs485_dev_touchtempt1.c
View File

@@ -408,11 +408,11 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
if(len > RECDATALENMAX)
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 Temp <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!!\r\n");
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"T1 Temp <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3>ȳ<EFBFBD><C8B3><EFBFBD><EFBFBD><EFBFBD>Χ!! %d\r\n",len);
return rev; //<2F><><EFBFBD><EFBFBD>
}
SRAM_DMA_Read_Buff(data,len,data_addr); //<2F><><EFBFBD><EFBFBD>482<38><32><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
if(len < 6) return rev;
@@ -420,6 +420,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee) || (len != data[3] + 0x03) || (0x03 != data[4]) ||BUS_Public.addr!=data[5] )
{
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"%s Addr:%d Check Error",__func__,BUS_Public.addr);
Dbg_Print_Buff(DBG_BIT_DEVICE_STATUS_bit,"Recv Buff:",data,len);
return rev;
}
crc_val = data[len-2] + (data[len-1]<<8);
@@ -490,10 +491,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLWOut_Rs485_TempT1_Check(uint32
break;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485TempT1, sizeof(RS485_TEMP_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&Rs485TempT1,sizeof(RS485_TEMP_INFO));
}
return rev;

20
BLV_485_Driver/inc/blv_nor_dev_c5relay.h Normal file
View File

@@ -0,0 +1,20 @@
/*
* blv_nor_dev_c5relay.h
*
* Created on: Jan 5, 2026
* Author: cc
*/
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_
#include <stdint.h>
#include "blv_rs485_protocol.h"
#include "logic_file_function.h"
#include "blv_nor_dev_hvoutfun.h"
void BLW_RS485_C5RELAY_Data_Init(Device_Public_Information_G *BUS_Public, NOR_HVOUT_INFO *DevHVoutInfo);
uint8_t BLW_C5RELAYCycleCtrl(uint32_t dev_addr);
uint8_t BLW_Rs485_C5RELAY_Check(uint32_t dev_addr,uint32_t data_addr,uint16_t len);
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_C5RELAY_H_ */

32
BLV_485_Driver/inc/blv_nor_dev_lvoutput.h Normal file
View File

@@ -0,0 +1,32 @@
/*
* blv_nor_dev_lvoutput.h
*
* Created on: Dec 31, 2025
* Author: cc
*/
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_
#define LVoutputNumMAX 32 //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define C1_LVOUTPUTNUMMAX 0x14 //C1Ϊ20·
typedef struct
{
uint8_t DevLVoutputState[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>Ǵ򿪻<C7B4><F2BFAABB>ǹر<C7B9>
uint8_t DevLVoutputStateLast[LVoutputNumMAX]; //<2F><>ǰǿ<C7B0><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
uint8_t LVoutputLoopValidNum; //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
uint8_t init_flag; //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>־λ
uint32_t DevC5IOAddr; //C5IO<49>ĵ<EFBFBD>ַ
}NOR_LVOUTPUT_INFO;
void BLV_Nor_Dev_LVoutput_Init(uint8_t devaddr);
uint16_t LVoutput_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
void BLW_LVoutput_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t DevOutputType);
void Dev_LVoutput_Dis(uint32_t DevAddr);
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_LVOUTPUT_H_ */

109
BLV_485_Driver/inc/blv_nor_dev_serviceinfo.h Normal file
View File

@@ -0,0 +1,109 @@
/*
* blv_nor_dev_serviceinfo.h
*
* Created on: Dec 20, 2025
* Author: cc
*/
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_
#include <stdint.h>
#include "blv_rs485_protocol.h"
#include "logic_file_function.h"
#define ServiceNumMAX 64 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
typedef enum //<2F><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
{
Service_Ele = 0, //0 LOOPCH01 ȡ<><C8A1>
Service_Dnd, //1 LOOPCH02 <20><><EFBFBD><EFBFBD>
Service_Clean, //2 LOOPCH03 <20><><EFBFBD><EFBFBD>
Service_Call, //3 LOOPCH04 <20><><EFBFBD><EFBFBD>
Service_Wash, //4 LOOPCH05 ϴ<><CFB4>
Service_CheckOut, //5 LOOPCH06 <20>˷<EFBFBD>
Service_Wait, //6 LOOPCH07 <20>Ժ<EFBFBD>
Service_Sos, //7 LOOPCH08 SOS
Service_Meals, //8 LOOPCH09 ԤԼ<D4A4><D4BC><EFBFBD><EFBFBD>
Service_Food_Plate, //9 LOOPCH10 <20><><EFBFBD><EFBFBD>
Service_Luggage, //10 LOOPCH11 <20><><EFBFBD><EFBFBD>
Service_Strong, //11 LOOPCH12 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ſں<C5BF><DABA><EFBFBD>ʹ<EFBFBD><CAB9>
Service_Door, //12 LOOPCH13 <20>Ŵ<EFBFBD>
Service_Warning, //13 LOOPCH14 <20><>ʾ<EFBFBD><CABE> <20><><EFBFBD>ھ<EFBFBD><DABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>͹ر<CDB9>
Service_15, //14 LOOPCH15 <20><><EFBFBD><EFBFBD>15 <20><><EFBFBD>ڱ<EFBFBD><DAB1>⿪<EFBFBD><E2BFAA><EFBFBD>͹ر<CDB9>
Service_16,
Service_17,
Service_18,
Service_19,
Service_20,
Service_21,
Service_22,
Service_23,
Service_24,
Service_PMS_Rented, //<2F><>̬ - <20><><EFBFBD><EFBFBD>
Service_PMS_CheckOut, //<2F><>̬ - <20>˷<EFBFBD>
Service_PMS_Waiting, //<2F><>̬ - <20><><EFBFBD><EFBFBD>
Service_PMS_Vacant, //<2F><>̬ - <20>շ<EFBFBD>
Service_29,
Service_30,
Service_31,
Service_32,
Service_33,
Service_34,
Service_35,
Service_36,
Service_37,
Service_38,
Service_39,
Service_40,
Service_41,
Service_42,
Service_43,
Service_44,
Service_45,
Service_46,
Service_47,
Service_48,
Service_49,
Service_50,
Service_51,
Service_52,
Service_53,
Service_54,
Service_55,
Service_56,
Service_57,
Service_58,
Service_59,
Service_60,
Service_61,
Service_62,
Service_63,
Service_64,
Service_Num_MAX, //<2F><><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}Enum_Dev_Service; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
typedef struct
{
uint8_t DevChangeFlag[ServiceNumMAX]; //<2F>豸<EFBFBD>仯<EFBFBD><E4BBAF>־ 1<><31><EFBFBD><EFBFBD> 2<>ر<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>
uint8_t Loop_State[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>״̬ <20><><EFBFBD><EFBFBD><EFBFBD>豸״̬<D7B4>仯<EFBFBD><E4BBAF>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ǵ򿪻<C7B4><F2BFAABB>ǹر<C7B9>
uint8_t Loop_State_Last[ServiceNumMAX]; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>״̬
uint8_t ServiceLoopValidNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>Ч<EFBFBD><D0A7>·<EFBFBD><C2B7>
uint8_t is_first_power_on; //<2F>״<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>־λ
}NOR_SERVICE_INFO; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>Ľṹ<C4BD><E1B9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void BLV_Nor_Dev_Service_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
uint16_t Service_Loop_State(uint32_t devaddr, uint16_t DevOutputLoop);
void BLW_Service_Control_State(uint32_t CfgDevAddIn, uint16_t DevInputAddr, uint32_t devaddr,uint16_t DevOutputLoop,uint16_t start);
uint8_t Dev_Service_InType_Get(uint32_t DevAddr, uint16_t DevInputLoop, uint16_t DevInputType);
void Dev_Action_CondService_Get(NOR_SERVICE_INFO *DevServiceInfo);
void Dev_Service_Dis(uint32_t DevAddr);
uint8_t ServiceInfo_Set_first_power_on(uint8_t state);
uint8_t ServiceInfo_Get_ALL_Loop_State(uint8_t *read_buff);
uint8_t ServiceInfo_Set_RoomState(uint8_t state);
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_SERVICEINFO_H_ */

12
BLV_485_Driver/inc/blv_nor_dec_virtualcard.h → BLV_485_Driver/inc/blv_nor_dev_virtualcard.h
View File

@@ -5,8 +5,12 @@
* Author: cc
*/
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
#define BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_
#ifndef BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
#define BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_
#include <stdint.h>
#include "blv_rs485_protocol.h"
#include "logic_file_function.h"
#define VC_CONDGROUP_MAX 10 //条件组最大支持数
#define VC_CONDSUB_MAX 10 //每组条件最大支持数
@@ -47,8 +51,6 @@
#define VC_Event_BrieflyLeaving_Flag 0x40 //短暂人离事件：条件逻辑判断有人->无人中，短暂判定人离
#define VC_Event_LongTermLeaving_Flag 0x80 //短暂人离事件：条件逻辑判断有人->无人中，长时间判定人离
typedef struct
{
uint8_t HPort_Type; //映射端口类型
@@ -141,4 +143,4 @@ typedef struct
void BLV_Nor_Dev_VirtualCard_For_Logic_Init(LOGICFILE_DEVICE_INFO *dev_info,uint8_t *data,uint16_t data_len);
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEC_VIRTUALCARD_H_ */
#endif /* BLV_485_DRIVER_INC_BLV_NOR_DEV_VIRTUALCARD_H_ */

65
BLV_485_Driver/inc/blv_rs485_dev_energymonitor.h Normal file
View File

@@ -0,0 +1,65 @@
/*
* blv_rs485_dev_energymonitor.h
*
* Created on: Dec 20, 2025
* Author: cc
*/
#ifndef BLV_485_DRIVER_INC_BLV_RS485_DEV_ENERGYMONITOR_H_
#define BLV_485_DRIVER_INC_BLV_RS485_DEV_ENERGYMONITOR_H_
#include <stdint.h>
#include "blv_rs485_protocol.h"
#include "logic_file_function.h"
#define BLV_Energy_Bus_Type 0xF4
#define BLV_Energy_RecvData_LenMax 30
#define BLV_Energy_RecvData_LenMin 8
#define BLV_Energy_DataHeard 0x8A
#define BLV_Energy_DataEnd 0xA8
#define BLV_Energy_PeriodicReport_CMD 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD>
#define BLV_Energy_Inquire_CMD 0x02 //<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>
#define BLV_Energy_SetInfo_CMD 0x03 //<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define BLV_Energy_ReadVer_CMD 0x04 //<2F><><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define BLV_Energy_ClearStat_CMD 0x13 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܺ<EFBFBD>ͳ<EFBFBD><CDB3>
#define BLV_Energy_Send_Flag_Max 4
#define BLV_Energy_SetInfo_Flag 0x0001
#define BLV_Energy_ClearStat_Flag 0x0002
#define BLV_Energy_ReadVer_Flag 0x0004
#define BLV_Energy_Inquire_Flag 0x0008
typedef struct
{
BLV_COMM_RECORD_G comm_record; //ͨѶ<CDA8><D1B6>¼
uint8_t DevSendCnt; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD>лظ<D0BB><D8B8><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>
uint8_t DevOffline; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevOfflineLast; //<2F>豸<EFBFBD><E8B1B8><EFBFBD>߱<EFBFBD>־ 1<><31><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 0<><30><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevSendSN; //<2F>豸ͨѶ SN
uint8_t periodic_enable; //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʹ<EFBFBD><CAB9>״̬
uint16_t voltage; //<2F><>ѹ
uint16_t current; //<2F><><EFBFBD><EFBFBD>
uint32_t active_power; //<2F>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD>
uint32_t phase_energy; //<2F>׶<EFBFBD><D7B6>ܺ<EFBFBD>
uint32_t total_energy; //<2F><><EFBFBD>ܺ<EFBFBD>
uint32_t send_flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
uint32_t periodic_time; //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>mS
uint32_t inquire_tick; //ѯ<><D1AF>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
}RS485_ENERGYMONITOR_INFO;
#endif /* BLV_485_DRIVER_INC_BLV_RS485_DEV_ENERGYMONITOR_H_ */

238
BLV_485_Driver/pc_devicetest_fun.c
View File

@@ -54,7 +54,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
Device_Public_Information_G BUS_Public;
PC_TEST_DEVICE_INFO PC_Test_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
if((PC_Test_Info.test_flag == 0x01) || (PC_Test_Info.test_flag == 0x02) || (PC_Test_Info.test_flag == 0x11) || (PC_Test_Info.test_flag == 0x12)) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>ж<EFBFBD>
@@ -66,11 +66,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test - The Input Test END");
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
}
}else if((PC_Test_Info.test_flag == 0x03) || (PC_Test_Info.test_flag == 0x13)) //<2F><><EFBFBD><EFBFBD>Ѳ<EFBFBD>ز<EFBFBD><D8B2>ԣ<EFBFBD><D4A3>رն˿<D5B6>1<EFBFBD><31><EFBFBD>񣬿<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
{
@@ -103,10 +99,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Cycle_Call(ui
g_pc_test.test_flag = PC_Test_Info.test_flag;
Dbg_Println(DBG_OPT_DEVICE_STATUS,"PC Test TOUR DATAS END<4E><44>%d num:%d SUCC:%d",PC_Test_Info.test_flag,g_pc_test.tour_num,g_pc_test.tour_succ);
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
}else {
g_pc_test.tour_num++;
@@ -267,10 +260,9 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
Device_Public_Information_G BUS_Public;
PC_TEST_DEVICE_INFO PC_Test_Info;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),dev_addr);
BLV_Device_PublicInfo_Read_To_Struct(dev_addr,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
/*У<><D0A3>Ѳ<EFBFBD><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(BLV_PC_TEST_TOUR_DATACheck(data_addr,len) == 0x00)
{
@@ -518,10 +510,7 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_DEVICE_TEST_Data_Processi
default: break;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&PC_Test_Info, sizeof(PC_TEST_DEVICE_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),dev_addr);/*<2A><><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD>*/
SRAM_DMA_Write_Buff((uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO),dev_addr+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(dev_addr,&BUS_Public,(uint8_t *)&PC_Test_Info,sizeof(PC_TEST_DEVICE_INFO));
return 0;
}
@@ -677,18 +666,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_WriteRegister_DataDeal(ui
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
@@ -811,34 +792,13 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_DataDeal(uint32_t
back_data[PKT2_PARA] = 0x01; //<2F><><EFBFBD>óɹ<C3B3>
back_data[PKT2_CHKSUM] = Data_CheckSum(back_data,temp_len);
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// if(g_pc_test.link_port == 0x00)
// {
// UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
// }else if(g_pc_test.link_port == 0x01)
// {
// MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
// }else if(g_pc_test.link_port == 0x02)
// {
// MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
// }else {
// return 0xF0;
// }
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
@@ -896,18 +856,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_DataDeal(uint32_t
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(back_data,temp_len); //<2F><><EFBFBD><EFBFBD>2
@@ -947,24 +899,15 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_Data_Reported(uin
send_buff[PKT2_PARA + 3 + i] = SRAM_Read_Byte(data_addr + i);
}
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1000,24 +943,15 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_Testing_Data_Reported2(ui
send_buff[PKT2_PARA + 3 + i] = data_buff[i];
}
send_buff[PKT2_CHKSUM] = Data_CheckSum(send_buff,send_buff[PKT2_LEN]);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1038,12 +972,8 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_TEST_TOUR_DATASEND(void)
{
send_buff[i] = i;
}
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,10); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,10); //<2F><><EFBFBD><EFBFBD>1
#endif //USE_CORE_TYPE == CORE_TYPE_C1F
MCU485_SendString_0(send_buff,10); //<2F><><EFBFBD><EFBFBD>0
return 0;
}
@@ -1102,18 +1032,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_TEST_TOUR_ACKSend(uint8_t
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1176,18 +1098,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_SET_MCU_Revision_Data_Rep
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1229,18 +1143,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_MCU_Revision_Data_Re
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1318,18 +1224,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_RCU_Data_Reported(ui
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1414,18 +1312,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_RCU_VERSION_Reported
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1536,18 +1426,10 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_Device_Data_Reported
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(send_buff,send_buff[PKT2_LEN]); //<2F><><EFBFBD><EFBFBD>2
@@ -1560,7 +1442,6 @@ __attribute__((section(".non_0_wait"))) uint8_t BLV_PC_READ_Device_Data_Reported
__attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_t data_addr,uint16_t data_len)
{
// uint32_t utc_tick = 0;
uint16_t temp_len = 0x09;
uint8_t temp = 0;
uint32_t device_listaddr = 0;
@@ -1569,20 +1450,13 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
memset(ack_buff,0,temp_len);
set_time.year = SRAM_Read_Byte(data_addr + PKT2_PARA);
set_time.month = SRAM_Read_Byte(data_addr + PKT2_PARA + 1);
set_time.day = SRAM_Read_Byte(data_addr + PKT2_PARA + 2);
set_time.hour = SRAM_Read_Byte(data_addr + PKT2_PARA + 3);
set_time.minute = SRAM_Read_Byte(data_addr + PKT2_PARA + 4);
set_time.second = SRAM_Read_Byte(data_addr + PKT2_PARA + 5);
set_time.week = SRAM_Read_Byte(data_addr + PKT2_PARA + 6);
temp = RTC_WriteDate(set_time);
//<2F>ҵ<EFBFBD>CSIO <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -1594,11 +1468,6 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
}
}
// /*UTCʱ<43><CAB1>*/
// utc_tick = RTC_Conversion_To_Unix(&set_time);
// Unix_Conversion_To_RTC(&set_time,utc_tick);
/*<2A>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>*/
ack_buff[PKT2_ADD_FM] = 0x00; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
ack_buff[PKT2_TYPE] = g_pc_test.DevSendSN;
@@ -1614,35 +1483,12 @@ __attribute__((section(".non_0_wait"))) uint8_t SyncTime_DATA_Processing(uint32_
ack_buff[PKT2_CHKSUM] = Data_CheckSum(ack_buff,temp_len);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
}else {
return 0xF0;
}
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
@@ -1682,18 +1528,10 @@ __attribute__((section(".non_0_wait"))) uint16_t QueryTime_Relay_DATA_Packaging(
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<><CAB9>C1F<31><46><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2
@@ -1726,18 +1564,10 @@ __attribute__((section(".non_0_wait"))) uint8_t TEST_GPIO_Relay_Fail(void)
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
if(g_pc_test.link_port == 0x00)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD>
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD> -- DEBUG
UART0_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
#endif
MCU485_SendString_0(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>0
}else if(g_pc_test.link_port == 0x01)
{
#if (USE_CORE_TYPE == 1) //ʹ<EFBFBD><EFBFBD>C1F<EFBFBD><EFBFBD><EFBFBD>İ<EFBFBD> -- DEBUG
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#elif (USE_CORE_TYPE == 2) //ʹ<><CAB9>C1<43><31><EFBFBD>İ<EFBFBD>
MCU485_SendString_1(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
#endif
UART1_SendString(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>1
}else if(g_pc_test.link_port == 0x02)
{
MCU485_SendString_2(ack_buff,temp_len); //<2F><><EFBFBD><EFBFBD>2

13
Ld/Link.ld
View File

@@ -35,8 +35,9 @@ MEMORY
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
*/
FLASH (rx) : ORIGIN = 0x00000000 , LENGTH = 80K
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 368K
FLASH (rx) : ORIGIN = 0x00001000 , LENGTH = 76K
FLASH1 (rx) : ORIGIN = 0x00014000 , LENGTH = 336K
RAM (xrw) : ORIGIN = 0x20000000 , LENGTH = 64K
}
@@ -55,7 +56,7 @@ SECTIONS
.vector :
{
*(.vector);
KEEP(*(.vector));
_endof_Vector = .;
ASSERT(_endof_Vector < ORIGIN(FLASH1), "The vector must maintain in 0-wait zone");
. = ALIGN(4);
@@ -75,8 +76,7 @@ SECTIONS
ASSERT(_endof_Flashlib < ORIGIN(FLASH1), "The Flash lib must maintain in 0-wait zone");
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
@@ -91,6 +91,9 @@ SECTIONS
*(.non_0_wait);
*(.non_0_wait.*);
*(.rodata)
*(.rodata*)
. = ALIGN(4);
} >FLASH1 AT>FLASH1

41
MCU_Driver/blv_authorize.c
View File

@@ -9,6 +9,8 @@
#include "SPI_SRAM.h"
#include "rw_logging.h"
#include "sram_mem_addr.h"
#include "debug.h"
#include "rtc.h"
#include <string.h>
BLV_AUTHORIZE sys_authorize;
@@ -89,4 +91,43 @@ __attribute__((section(".non_0_wait"))) uint32_t Get_Authorize_UnixTime(void)
return sys_authorize.expires_time;
}
/*******************************************************************************
* Function Name : BLV_Authorize_Task
* Description : BLV<4C><56>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void BLV_Authorize_Task(void)
{
static uint32_t sys_tick = 0;
uint32_t temp_unix = 0,curr_unix = 0;
if(SysTick_1ms - sys_tick > 10000)
{
sys_tick = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"RTCʱ<EFBFBD><EFBFBD>: 20%02X-%02X-%02X %02X:%02X:%02X <20><><EFBFBD><EFBFBD>%X",RTC_Raw_Data.year,RTC_Raw_Data.month,RTC_Raw_Data.day,RTC_Raw_Data.hour,RTC_Raw_Data.minute,RTC_Raw_Data.second,RTC_Raw_Data.week);
temp_unix = RTC_Conversion_To_Unix(&RTC_Raw_Data);
BLV_Authorize_Processing(temp_unix);
if(Get_Authorize_Lock_Status() == 0x01)
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU<EFBFBD><EFBFBD>Ȩ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%08X now:%08X-----",Get_Authorize_UnixTime(),temp_unix);
}
/*<2A><><EFBFBD>в<EFBFBD><D0B2><EFBFBD>12ʱ<32>䱣<EFBFBD>棬<EFBFBD><E6A3AC>ʱ<EFBFBD>䱣<EFBFBD>浽Flash<73><68>*/
curr_unix = SRAM_Read_DW(SRAM_Register_Start_ADDRESS + Register_CurrentUsageTime_OFFSET);
if(temp_unix - curr_unix > 43200)
{
SRAM_Write_DW(temp_unix,SRAM_Register_Start_ADDRESS + Register_CurrentUsageTime_OFFSET);
Retain_Flash_Register_Data();
}
}
}

1081
MCU_Driver/blv_dev_action.c
View File

File diff suppressed because it is too large Load Diff

1863
MCU_Driver/blv_netcomm_function.c
View File

File diff suppressed because it is too large Load Diff

548
MCU_Driver/blv_rs485_protocol.c
View File

@@ -14,6 +14,248 @@ BLV_NORDEV_Manage_G NorDevInfoGlobal; /*
uint8_t rs485_temp_buff[612];
/*******************************************************************************
* Function Name : BLV_Device_Info_Write_To_SRAM
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>д<EFBFBD>뵽SRAM<41><4D>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_Info_Write_To_SRAM(
uint32_t dev_addr,
Device_Public_Information_G *dev_info,
uint8_t *dev_data,
uint16_t data_len)
{
if(dev_info == NULL) return 1;
if( (Dev_Privately + data_len) > SRAM_Device_List_Size ) return 2;
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s :%x",__func__,dev_addr);
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
//BLV_Device_Public_Info_Printf(dev_info);
rs485_temp_buff[Dev_Type] = dev_info->type;
rs485_temp_buff[Dev_Addr] = dev_info->addr;
rs485_temp_buff[Dev_port] = dev_info->port;
rs485_temp_buff[Dev_baud] = dev_info->baud & 0xFF;
rs485_temp_buff[Dev_baud_8] = ( dev_info->baud >> 8 ) & 0xFF;
rs485_temp_buff[Dev_baud_16] = ( dev_info->baud >> 16 ) & 0xFF;
rs485_temp_buff[Dev_baud_24] = ( dev_info->baud >> 24 ) & 0xFF;
rs485_temp_buff[Dev_Retrynum] = dev_info->retry_num;
rs485_temp_buff[Dev_WaitTime] = dev_info->wait_time & 0xFF;
rs485_temp_buff[Dev_WaitTime_8] = ( dev_info->wait_time >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Protocol] = dev_info->Protocol;
rs485_temp_buff[Dev_Coord] = dev_info->DevCoord & 0xFF;
rs485_temp_buff[Dev_Coord_8] = ( dev_info->DevCoord >> 8 ) & 0xFF;
rs485_temp_buff[Dev_ActionCoord] = dev_info->ActionCoord & 0xFF;
rs485_temp_buff[Dev_ActionCoord_8] = ( dev_info->ActionCoord >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF] = dev_info->polling_cf & 0xFF;
rs485_temp_buff[Dev_Polling_CF_8] = ( dev_info->polling_cf >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF_16] = ( dev_info->polling_cf >> 16 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF_24] = ( dev_info->polling_cf >> 24 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF] = dev_info->processing_cf & 0xFF;
rs485_temp_buff[Dev_Processing_CF_8] = ( dev_info->processing_cf >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF_16] = ( dev_info->processing_cf >> 16 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF_24] = ( dev_info->processing_cf >> 24 ) & 0xFF;
memcpy(&rs485_temp_buff[Dev_Data_Process_0],(uint8_t *)&(dev_info->DevFunInfo),Dev_Fun_Ptr_Len);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->data_len = Dev_Privately + data_len;
rs485_temp_buff[Dev_DataLen] = dev_info->data_len & 0xFF;
rs485_temp_buff[Dev_DataLen_H] = ( dev_info->data_len >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Check] = 0x00;
rs485_temp_buff[Dev_Check] = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"W BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
return 0x00;
}
/*******************************************************************************
* Function Name : BLV_Device_PublicInfo_Read_To_Struct
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>SRAM<41><4D>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_PublicInfo_Read_To_Struct(
uint32_t dev_addr,
Device_Public_Information_G *dev_info)
{
if( (dev_info == NULL) || (dev_addr == 0x00) ) {
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x ptr_null",__func__,dev_addr);
return 1;
}
//<2F><><EFBFBD>ⲿSRAM<41>ж<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
dev_info->data_len = SRAM_Read_Word(dev_addr + Dev_DataLen);
SRAM_DMA_Read_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
if( dev_info->data_len > SRAM_Device_List_Size ) {
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x data_len error",__func__,dev_addr);
return 1; //<2F><><EFBFBD>ݳ<EFBFBD><DDB3>Ȳ<EFBFBD><C8B2>ԣ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
}
if( Data_CheckSum(rs485_temp_buff,dev_info->data_len) != 0x00 ) {
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s %x Check error",__func__,dev_addr);
return 2; //<2F><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ʧ<EFBFBD>ܣ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>˳<EFBFBD>
}
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"R BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
dev_info->type = rs485_temp_buff[Dev_Type];
dev_info->addr = rs485_temp_buff[Dev_Addr];
dev_info->port = rs485_temp_buff[Dev_port];
dev_info->baud = rs485_temp_buff[Dev_baud_24];
dev_info->baud <<= 8;
dev_info->baud |= rs485_temp_buff[Dev_baud_16];
dev_info->baud <<= 8;
dev_info->baud |= rs485_temp_buff[Dev_baud_8];
dev_info->baud <<= 8;
dev_info->baud |= rs485_temp_buff[Dev_baud];
dev_info->retry_num = rs485_temp_buff[Dev_Retrynum];
dev_info->wait_time = rs485_temp_buff[Dev_WaitTime_8];
dev_info->wait_time <<= 8;
dev_info->wait_time |= rs485_temp_buff[Dev_WaitTime];
dev_info->Protocol = rs485_temp_buff[Dev_Protocol];
dev_info->DevCoord = rs485_temp_buff[Dev_Coord_8];
dev_info->DevCoord <<= 8;
dev_info->DevCoord |= rs485_temp_buff[Dev_Coord];
dev_info->ActionCoord = rs485_temp_buff[Dev_ActionCoord_8];
dev_info->ActionCoord <<= 8;
dev_info->ActionCoord |= rs485_temp_buff[Dev_ActionCoord];
dev_info->polling_cf = rs485_temp_buff[Dev_Polling_CF_24];
dev_info->polling_cf <<= 8;
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF_16];
dev_info->polling_cf <<= 8;
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF_8];
dev_info->polling_cf <<= 8;
dev_info->polling_cf |= rs485_temp_buff[Dev_Polling_CF];
dev_info->processing_cf = rs485_temp_buff[Dev_Processing_CF_24];
dev_info->processing_cf <<= 8;
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF_16];
dev_info->processing_cf <<= 8;
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF_8];
dev_info->processing_cf <<= 8;
dev_info->processing_cf |= rs485_temp_buff[Dev_Processing_CF];
memcpy((uint8_t *)&(dev_info->DevFunInfo),&rs485_temp_buff[Dev_Data_Process_0],Dev_Fun_Ptr_Len);
//BLV_Device_Public_Info_Printf(dev_info);
return 0x00;
}
/*******************************************************************************
* Function Name : BLV_Device_PublicInfo_Update_To_Struct
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD>ݶ<EFBFBD>ȡ<EFBFBD><C8A1>SRAM<41><4D>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_PublicInfo_Update_To_Struct(
uint32_t dev_addr,
Device_Public_Information_G *dev_info)
{
if( (dev_info == NULL) || (dev_addr == 0x00) ) return 1;
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s :%x",__func__,dev_addr);
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
dev_info->data_len = SRAM_Read_Word(dev_addr + Dev_DataLen);
SRAM_DMA_Read_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
rs485_temp_buff[Dev_Type] = dev_info->type;
rs485_temp_buff[Dev_Addr] = dev_info->addr;
rs485_temp_buff[Dev_port] = dev_info->port;
rs485_temp_buff[Dev_baud] = dev_info->baud & 0xFF;
rs485_temp_buff[Dev_baud_8] = ( dev_info->baud >> 8 ) & 0xFF;
rs485_temp_buff[Dev_baud_16] = ( dev_info->baud >> 16 ) & 0xFF;
rs485_temp_buff[Dev_baud_24] = ( dev_info->baud >> 24 ) & 0xFF;
rs485_temp_buff[Dev_Retrynum] = dev_info->retry_num;
rs485_temp_buff[Dev_WaitTime] = dev_info->wait_time & 0xFF;
rs485_temp_buff[Dev_WaitTime_8] = ( dev_info->wait_time >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Protocol] = dev_info->Protocol;
rs485_temp_buff[Dev_Coord] = dev_info->DevCoord & 0xFF;
rs485_temp_buff[Dev_Coord_8] = ( dev_info->DevCoord >> 8 ) & 0xFF;
rs485_temp_buff[Dev_ActionCoord] = dev_info->ActionCoord & 0xFF;
rs485_temp_buff[Dev_ActionCoord_8] = ( dev_info->ActionCoord >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF] = dev_info->polling_cf & 0xFF;
rs485_temp_buff[Dev_Polling_CF_8] = ( dev_info->polling_cf >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF_16] = ( dev_info->polling_cf >> 16 ) & 0xFF;
rs485_temp_buff[Dev_Polling_CF_24] = ( dev_info->polling_cf >> 24 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF] = dev_info->processing_cf & 0xFF;
rs485_temp_buff[Dev_Processing_CF_8] = ( dev_info->processing_cf >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF_16] = ( dev_info->processing_cf >> 16 ) & 0xFF;
rs485_temp_buff[Dev_Processing_CF_24] = ( dev_info->processing_cf >> 24 ) & 0xFF;
memcpy(&rs485_temp_buff[Dev_Data_Process_0],(uint8_t *)&(dev_info->DevFunInfo),Dev_Fun_Ptr_Len);
rs485_temp_buff[Dev_DataLen] = dev_info->data_len & 0xFF;
rs485_temp_buff[Dev_DataLen_H] = ( dev_info->data_len >> 8 ) & 0xFF;
rs485_temp_buff[Dev_Check] = 0x00;
rs485_temp_buff[Dev_Check] = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
//Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"W BLV_Device_Info : ",rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
return 0x00;
}
/*******************************************************************************
* Function Name : BLV_Device_Public_Info_Printf
* Description : <20><>ӡ<EFBFBD>豸<EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD><EFBFBD><EFBFBD>Ϣ
* Input :
dev_info : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Return : None
*******************************************************************************/
void BLV_Device_Public_Info_Printf(Device_Public_Information_G *dev_info)
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info type : %d",dev_info->type);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info addr : %d",dev_info->addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info port : %d",dev_info->port);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info baud : %d",dev_info->baud);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info retry_num : %d",dev_info->retry_num);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info wait_time : %d",dev_info->wait_time);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Protocol : %d",dev_info->Protocol);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info DevCoord : %d",dev_info->DevCoord);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info ActionCoord : %d",dev_info->ActionCoord);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info polling_cf : %x",dev_info->polling_cf);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info processing_cf : %x",dev_info->processing_cf);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Data_Process : %x",dev_info->DevFunInfo.Dev_Data_Process);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Input_Type_Get : %x",dev_info->DevFunInfo.Dev_Input_Type_Get);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Ctrl : %x",dev_info->DevFunInfo.Dev_Output_Ctrl);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Loop_State_Get : %x",dev_info->DevFunInfo.Dev_Output_Loop_State_Get);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Group_Ctrl : %x",dev_info->DevFunInfo.Dev_Output_Group_Ctrl);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev Info Dev_Output_Loop_Group_State_Get_ptr : %x",dev_info->DevFunInfo.Dev_Output_Loop_Group_State_Get_ptr);
}
/*******************************************************************************
* Function Name : Add_BUS_Device_To_List
* Description : <20><><EFBFBD><EFBFBD>BUS<55>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -33,31 +275,9 @@ __attribute__((section(".non_0_wait"))) void Add_BUS_Device_To_List(
uint32_t list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr); //<2F><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
if((list_addr < SRAM_Device_List_Start_Addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = SRAM_Device_List_Start_Addr;
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->check = 0x00;
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_DMA_Write_Buff(rs485_temp_buff,Dev_Privately,list_addr);
//
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
//
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
// check_val = Dev_CheckSum(list_addr,dev_info->data_len);
// SRAM_Write_Byte(check_val,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
// for(uint16_t i = 0;i < write_len;i++)
// {
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
// }
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
BLV_Device_Public_Info_Printf(dev_info);
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
list_addr += SRAM_Device_List_Size;
@@ -91,42 +311,7 @@ __attribute__((section(".non_0_wait"))) void Add_POLL_Device_To_List(
}
if( (list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->check = 0x00;
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
// {
// SRAM_Write_Byte(0x00,list_addr+i);
// }
//
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
//
// /*<2A><><EFBFBD><EFBFBD>485<38>豸<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_Write_DW(dev_info->polling_cf,list_addr+Dev_Polling_CF);
//
// SRAM_Write_DW(dev_info->processing_cf,list_addr+Dev_Processing_CF);
//
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
//
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
// for(uint16_t i = 0;i < write_len;i++)
// {
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
// }
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
list_addr += SRAM_Device_List_Size;
@@ -161,41 +346,7 @@ __attribute__((section(".non_0_wait"))) void Add_ACT_Device_To_List(
}
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->check = 0x00;
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
// {
// SRAM_Write_Byte(0x00,list_addr+i);
// }
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
//
// /*<2A><><EFBFBD><EFBFBD>485<38>豸<EFBFBD>Ļص<C4BB><D8B5><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_Write_DW(dev_info->polling_cf,list_addr+Dev_Polling_CF);
//
// SRAM_Write_DW(dev_info->processing_cf,list_addr+Dev_Processing_CF);
//
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
//
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
// for(uint16_t i = 0;i < write_len;i++)
// {
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
// }
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
list_addr += SRAM_Device_List_Size;
@@ -231,66 +382,13 @@ __attribute__((section(".non_0_wait"))) void Add_Nor_Device_To_List(
}
if((list_addr < Start_addr) || (list_addr > SRAM_Device_List_End_Addr)) list_addr = Start_addr;
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->check = 0x00;
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,list_addr);
// /*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// for(uint16_t i = 0;i<SRAM_Device_List_Size;i++)
// {
// SRAM_Write_Byte(0x00,list_addr+i);
// }
//
// /*<2A><><EFBFBD>ӹ<EFBFBD><D3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// SRAM_DMA_Write_Buff((uint8_t *)dev_info,Dev_Privately,list_addr);
//
// /*<2A><><EFBFBD><EFBFBD><EFBFBD>豸˽<E8B1B8>б<EFBFBD><D0B1><EFBFBD>*/
// SRAM_DMA_Write_Buff(dev_data,data_len,list_addr+Dev_Privately);
//
// /*<2A><><EFBFBD><EFBFBD>У<EFBFBD><D0A3>ֵ*/
// dev_info->check = Dev_CheckSum(list_addr,dev_info->data_len);
// SRAM_Write_Byte(dev_info->check,list_addr+Dev_Check); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"data_len :%d ,dev Buffer:" , write_len);
// for(uint16_t i = 0;i < write_len;i++)
// {
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%02X " , SRAM_Read_Byte(list_addr + i));
// }
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"\r\n");
BLV_Device_Info_Write_To_SRAM(list_addr,dev_info,dev_data,data_len);
/*<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַƫ<D6B7><C6AB>*/
list_addr += SRAM_Device_List_Size;
SRAM_Write_DW(list_addr,SRAM_NORMAL_Device_List_Addr);
}
/*******************************************************************************
* Function Name : BLV_Device_Info_Write_To_SRAM
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>д<EFBFBD>뵽SRAM<41><4D>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) uint8_t BLV_Device_Info_Write_To_SRAM(
uint32_t dev_addr,
Device_Public_Information_G *dev_info,
uint8_t *dev_data,
uint16_t data_len)
{
if(dev_info == NULL) return 1;
memset(rs485_temp_buff,0,sizeof(rs485_temp_buff));
memcpy(rs485_temp_buff,(uint8_t *)dev_info,Dev_Privately);
memcpy(&rs485_temp_buff[Dev_Privately],(uint8_t *)dev_data,data_len);
dev_info->check = 0x00;
dev_info->check = Data_CheckSum(rs485_temp_buff,dev_info->data_len);
SRAM_DMA_Write_Buff(rs485_temp_buff,dev_info->data_len,dev_addr);
return 0x00;
}
/*******************************************************************************
* Function Name : Device_Data_Check
* Description : <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
@@ -319,11 +417,11 @@ __attribute__((section(".non_0_wait"))) uint8_t Device_Data_Check(uint32_t sram_
__attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
{
static uint32_t BLV_BUS_Wait = 0;
Device_Public_Information_G dev_info;
uint16_t data_len = 0;
uint8_t rev = 0;
if(BUS485_Info.device_num == 0x00) return ;
if(BUS485_Info.device_num == 0x00) return ;
switch(BUS485_Info.BUS_Start)
{
@@ -341,8 +439,8 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
BUS485_Info.n_list_read_addr = BUS485_Info.Last_list_addr;
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
Device_Public_Information_G dev_info;
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),BUS485_Info.n_list_read_addr);
BLV_Device_PublicInfo_Read_To_Struct(BUS485_Info.n_list_read_addr,&dev_info);
BUS485_Info.n_dev_type = dev_info.type;
BUS485_Info.n_dev_addr = dev_info.addr;
BUS485_Info.n_dev_datalen = dev_info.data_len;
@@ -354,12 +452,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
BUS485_Info.Retry_Flag = 0x01;
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>*/
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Polling");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Polling %x %x",BUS485_Info.n_polling_cf,BUS485_Info.n_processing_cf);
if(BUS485_Info.baud != dev_info.baud) //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뵱ǰͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD><CAB2><EFBFBD>
{
/*<2A>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS_Port Baud:%ld,Change Baud:%ld\r\n",BUS485_Info.baud,dev_info.baud);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS_Port Baud:%d,Change Baud:%d\r\n",BUS485_Info.baud,dev_info.baud);
BUS485_Info.baud = dev_info.baud;
if(BUS485_Info.BaudRateCfg != NULL) BUS485_Info.BaudRateCfg(BUS485_Info.baud);
@@ -374,7 +471,6 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
{
BUS485_Info.BUS_Start = Change_Dev;
/*BUS485<38><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>в<EFBFBD><D0B2><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD>ݵ<EFBFBD><DDB5>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4>ظ<EFBFBD><D8B8>׶<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD>л<EFBFBD><D0BB>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD><D8B7><EFBFBD>־λ<D6BE><CEBB><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>λ - 2022-05-04*/
BUS485_Info.Retry_Flag = 0x00;
BUS485_Info.n_retry_num = 0x00;
}else { //<2F><><EFBFBD>ݷ<EFBFBD><DDB7>ͳɹ<CDB3><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4>ظ<EFBFBD>
@@ -383,11 +479,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
}
}
}else {
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"[BLV_BUS_Polling_Task2]BLV_BUS_dev Check Fail:%08X",BUS485_Info.Last_list_addr);
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Check Fail:%08X",BUS485_Info.Last_list_addr);
BUS485_Info.BUS_Start = Change_Dev;
}
}else {
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Type Fail");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS_dev Type Fail");
BUS485_Info.BUS_Start = Change_Dev;
}
@@ -395,15 +491,14 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
case Change_Dev:
BUS485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
if(BUS485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_BUS_Device_List_Addr)) BUS485_Info.Last_list_addr = SRAM_Device_List_Start_Addr;
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Change_Dev");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Change_Dev %x %x",BUS485_Info.Last_list_addr,SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
BUS485_Info.BUS_Start = B_Polling;
break;
case B_Retry:
if((BUS485_Info.Retry_Flag == 0x01) && (BUS485_Info.n_retry_num != 0x00)) //<2F>ط<EFBFBD><D8B7><EFBFBD>־δ<D6BE><CEB4><EFBFBD>㣬<EFBFBD><E3A3AC>ʾû<CABE><C3BB><EFBFBD>ͳɹ<CDB3>
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Retransmitting Data:%d-%d-%08X...",BUS485_Info.n_dev_type,BUS485_Info.n_dev_addr,BUS485_Info.n_list_read_addr);
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS Retransmitting Data:%d-%d-%08X...",BUS485_Info.n_dev_type,BUS485_Info.n_dev_addr,BUS485_Info.n_list_read_addr);
//<2F>޸<EFBFBD>ʱ<EFBFBD><CAB1>:2022-07-12
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
@@ -431,19 +526,21 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
{
data_len = SRAM_Read_Word(g_uart[UART_3].RX_Buffer_ReadAddr);
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply Len:%d",data_len);
if((BUS485_Info.n_processing_cf!=0x00000000) && (BUS485_Info.n_processing_cf!=0xFFFFFFFF)) {
BUS485_Info.Retry_Flag = ((fun2_prt)BUS485_Info.n_processing_cf)(BUS485_Info.n_list_read_addr,g_uart[UART_3].RX_Buffer_ReadAddr + 2,data_len);
}
if(BUS485_Info.Retry_Flag == 0x00) {
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC\r\n");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC 1\r\n");
BUS485_Info.send_wait = SysTick_1ms;
BUS485_Info.BUS_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
}
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
{
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr); //<2F>ϱ<EFBFBD>
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr);
}
g_uart[UART_3].RX_Buffer_ReadAddr += SRAM_Uart_Buffer_Size;
@@ -462,21 +559,19 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
}
//BUS485_Info.BUS_Start = Change_Dev;
break;
/*2021-11-24 : <20><><EFBFBD><EFBFBD>C5IO<49><4F><EFBFBD><EFBFBD><EFBFBD>ʲ<EFBFBD>׼<EFBFBD><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ݵ<EFBFBD>ǰ<EFBFBD>豸ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3>л<EFBFBD><D0BB><EFBFBD><EFBFBD>Ͳ<EFBFBD><CDB2><EFBFBD><EFBFBD>ʣ<EFBFBD><CAA3>л<EFBFBD><D0BB>겨<EFBFBD><EAB2A8><EFBFBD>ʺ󣬵ȴ<F3A3ACB5>10ms<6D>ڽ<EFBFBD><DABD>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
2022-07-19 : <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ͨѶһ<D1B6>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>Ӷ<EFBFBD><D3B6><EFBFBD>
*/
case Baud_Wait: //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʵȴ<CAB5>ʱ<EFBFBD><CAB1>
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudWaitTime)
{
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Wait");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Wait %x",BUS485_Info.n_polling_cf);
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
if((BUS485_Info.n_polling_cf != 0x00000000) && (BUS485_Info.n_polling_cf != 0xFFFFFFFF)) {
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS Baud_Wait -- n_polling_cf %x",BUS485_Info.n_polling_cf);
rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
}
BUS485_Info.change_tick = SysTick_1ms;
BUS485_Info.BUS_Start = Baud_Comm;
}
break;
case Baud_Comm:
/*<2A><><EFBFBD>մ<EFBFBD><D5B4><EFBFBD>*/
@@ -491,12 +586,11 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
}
if(BUS485_Info.Retry_Flag == 0x00) //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>һ<EFBFBD><D2BB>ͨѶ
{
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm3");
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm3");
BUS485_Info.BUS_Start = Baud_SendWait;
BUS485_Info.change_tick = SysTick_1ms;
}
if(BUS485_Info.port_mode == Port_Monitoring_mode) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ڼ<EFBFBD><DABC><EFBFBD>ģʽ<C4A3><CABD>,<2C><><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD>PC<50><43>
{
Udp_Internal_SeriaNet_Uploading(Bus_port,BUS485_Info.baud,g_uart[UART_3].RX_Buffer_ReadAddr); //<2F>ϱ<EFBFBD>
@@ -516,7 +610,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
break;
case Baud_SendWait:
if(SysTick_1ms - BUS485_Info.change_tick > BLV_BUS485_ChangeBaudSendWaitTime) {
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm2");
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- Baud_Comm1");
BUS485_Info.change_tick = SysTick_1ms;
BUS485_Info.BUS_Start = B_Send;
}
@@ -524,10 +618,9 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
case B_Send: //<2F><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_BUS State -- send");
//if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) Convert_To_Fun_Prt(BUS485_Info.n_polling_cf,BUS485_Info.n_list_read_addr);
//<2F>޸<EFBFBD>ʱ<EFBFBD><CAB1>:2022-07-12
if((BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
if( (BUS485_Info.n_polling_cf!=0x00000000) && (BUS485_Info.n_polling_cf!=0xFFFFFFFF) ) {
rev = ((fun4_prt)BUS485_Info.n_polling_cf)(BUS485_Info.n_list_read_addr);
}
if(rev == RS485OCCUPYNOTIME) //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
{
@@ -552,7 +645,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS_Polling_Task(void)
{
if(SysTick_1s - BUS485_Info.mode_tick > BUS485_Info.mode_outtime)
{
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC");
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Mode:%d Outtime %d",BUS485_Info.port_mode,BUS485_Info.device_num);
BUS485_Info.mode_tick = SysTick_1s;
BUS485_Info.port_mode = Port_Normal_Mode; //<2F><><EFBFBD><EFBFBD>ģʽ
}
@@ -649,9 +742,7 @@ __attribute__((section(".non_0_wait"))) void BLV_BUS485Port_ModeTask(void)
break;
case Port_Normal_Mode:
case Port_Monitoring_mode:
BLV_BUS_Polling_Task(); //<2F><><EFBFBD><EFBFBD>ģʽ <20>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3>¼<EFBFBD><C2BC><EFBFBD>ģʽ
break;
}
}
@@ -691,7 +782,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
}else {
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
Device_Public_Information_G dev_info;
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Poll485_Info.n_list_read_addr);
BLV_Device_PublicInfo_Read_To_Struct(Poll485_Info.n_list_read_addr,&dev_info);
Poll485_Info.n_dev_type = dev_info.type;
Poll485_Info.n_dev_addr = dev_info.addr;
@@ -704,6 +795,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
Poll485_Info.Retry_Flag = 0x01;
/*2021 09 17 <20><><EFBFBD>޸<EFBFBD><DEB8><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7>ͺ<EFBFBD><CDBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>жϣ<D0B6>RS485OCCUPYNOTIME<4D><45>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>û<EFBFBD>з<EFBFBD><D0B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸*/
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20><>ȡ<EFBFBD>豸 %x",Poll485_Info.n_list_read_addr);
if((Poll485_Info.n_polling_cf!=0x00000000) && (Poll485_Info.n_polling_cf!=0xFFFFFFFF)) rev = ((fun4_prt)Poll485_Info.n_polling_cf)(Poll485_Info.n_list_read_addr);
@@ -731,7 +823,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
Device_Public_Information_G dev_info;
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Poll485_Info.n_list_read_addr);
BLV_Device_PublicInfo_Read_To_Struct(Poll485_Info.n_list_read_addr,&dev_info);
Poll485_Info.n_dev_type = dev_info.type;
Poll485_Info.n_dev_addr = dev_info.addr;
@@ -760,7 +852,7 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
case Change_Dev:
Poll485_Info.Last_list_addr += SRAM_Device_List_Size; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸
if(Poll485_Info.Last_list_addr >= SRAM_Read_DW(SRAM_POLL_Device_List_Addr)) Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20>л<EFBFBD><D0BB>豸 %x",Poll485_Info.n_list_read_addr);
Poll485_Info.POLL_Start = B_Polling;
break;
case B_Retry:
@@ -777,6 +869,8 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
Poll485_Info.n_retry_num--;
Poll485_Info.POLL_Start = Wait_Reply;
}
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿<EFBFBD> - <20>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> %x",Poll485_Info.n_list_read_addr);
}else if((Poll485_Info.Retry_Flag == 0x01) && (Poll485_Info.n_retry_num == 0x00))
{
Poll485_Info.POLL_Start = Change_Dev; //<2F><><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><DCA3>л<EFBFBD><D0BB>¸<EFBFBD><C2B8>豸
@@ -789,13 +883,13 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
if(g_uart[UART_0].RX_Buffer_WriteAddr != g_uart[UART_0].RX_Buffer_ReadAddr)
{
data_len = SRAM_Read_Word(g_uart[UART_0].RX_Buffer_ReadAddr);
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿ڽ<CBBF><DABD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD> %x - %d",g_uart[UART_0].RX_Buffer_ReadAddr,data_len);
if((Poll485_Info.n_processing_cf!=0x00000000) && (Poll485_Info.n_processing_cf!=0xFFFFFFFF)) {
Poll485_Info.Retry_Flag = ((fun2_prt )Poll485_Info.n_processing_cf)(Poll485_Info.n_list_read_addr,g_uart[UART_0].RX_Buffer_ReadAddr + 2,data_len);
}
if(Poll485_Info.Retry_Flag == 0x00) {
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Reply SUCC\r\n");
Poll485_Info.send_wait = SysTick_1ms;
Poll485_Info.POLL_Start = B_Wait; //<2F>ظ<EFBFBD><D8B8>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>߿<EFBFBD><DFBF>У<EFBFBD><D0A3><EFBFBD><EFBFBD>л<EFBFBD>Ϊ<EFBFBD><CEAA>һ<EFBFBD><D2BB><EFBFBD>豸
}
@@ -811,7 +905,10 @@ __attribute__((section(".non_0_wait"))) void BLV_PollPort_Task(void)
}
}
/*<2A><><EFBFBD>ճ<EFBFBD>ʱ - <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>*/
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) Poll485_Info.POLL_Start = B_Retry;
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) {
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<22><>ѯ<EFBFBD>˿ڽ<CBBF><DABD>ճ<EFBFBD>ʱ - <20><><EFBFBD><EFBFBD><EFBFBD>ط<EFBFBD>");
Poll485_Info.POLL_Start = B_Retry;
}
break;
case B_Wait: //<2F><><EFBFBD>ͳɹ<CDB3><C9B9>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
if(SysTick_1ms - BLV_POLL_Wait > Poll485_Info.n_dev_waittime) Poll485_Info.POLL_Start = Change_Dev;
@@ -1100,7 +1197,7 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_Task(void)
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
Device_Public_Information_G dev_info;
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Act485_Info.Last_list_addr);
BLV_Device_PublicInfo_Read_To_Struct(Act485_Info.Last_list_addr,&dev_info);
Act485_Info.n_polling_cf = dev_info.polling_cf;
Act485_Info.n_processing_cf = dev_info.processing_cf;
@@ -1119,7 +1216,7 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_Task(void)
{
/*<2A><>ȡ<EFBFBD>豸<EFBFBD><E8B1B8>Ϣ*/
Device_Public_Information_G dev_info;
SRAM_DMA_Read_Buff((uint8_t *)&dev_info,sizeof(Device_Public_Information_G),Act485_Info.n_list_read_addr);
BLV_Device_PublicInfo_Read_To_Struct(Act485_Info.n_list_read_addr,&dev_info);
Act485_Info.n_polling_cf = dev_info.polling_cf;
Act485_Info.n_processing_cf = dev_info.processing_cf;
@@ -1254,6 +1351,75 @@ __attribute__((section(".non_0_wait"))) void BLV_ActivePort_ModeTask(void)
}
}
/*******************************************************************************
* Function Name : BLV_Nor_Dev_Polling_Task
* Description : <20><>ͨ<EFBFBD>豸ɨ<E8B1B8><C9A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֮<><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5>豸
*******************************************************************************/
void BLV_Nor_Dev_Polling_Task(void)
{
uint16_t i;
uint32_t Start_addr = SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ʼ<EFBFBD><CABC>ַ
uint32_t List_addr;
static uint8_t FlagDis = 0x01;
if(0x01 == FlagDis)
{
FlagDis = 0x00;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ:%08X,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d",Start_addr,NorDevInfoGlobal.NorDeviceNum);
}
for(i = 0; i < NorDevInfoGlobal.NorDeviceNum; i++) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸
{
List_addr = Start_addr + i*SRAM_Device_List_Size;
{
Device_Public_Information_G BUS_Public; //<2F><><EFBFBD><EFBFBD>
if(BLV_Device_PublicInfo_Read_To_Struct(List_addr,&BUS_Public) == 0x00)
{
switch(BUS_Public.type)
{
// case Dev_Host_HVout: //ǿ<><C7BF><EFBFBD>̵<EFBFBD><CCB5><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
case Dev_Host_LVinput: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
case Dev_Host_LVoutput: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
case Dev_Host_Service: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
case Dev_NodeCurtain: //<2F>ɽڵ㴰<DAB5><E3B4B0> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>״̬
case Dev_Rs485_PB20_LD:
case Dev_Rs485_PB20_LS:
case Dev_Rs485_PB20_Relay:
case DEV_Virtual_NoCard:
case DEV_Virtual_Time:
case DEV_Virtual_Card:
case DEV_Virtual_ColorTemp:
case DEV_Carbon_Saved:
case Dev_Scene_Restore:
case Dev_Virtual_GlobalSet:
if(NULL != BUS_Public.DevFunInfo.Dev_Data_Process) //<2F><><EFBFBD><EFBFBD>ָ<EFBFBD>벻Ϊ0
{
BUS_Public.DevFunInfo.Dev_Data_Process(List_addr); //<2F><><EFBFBD><EFBFBD>ת
}
}
}
}
}
}
/*******************************************************************************
* Function Name : BLV_NormalPort_ModeTask
* Description :
*******************************************************************************/
void BLV_Nor_Dev_ModeTask(void)
{
static uint32_t dev_Nor_processing_tick = 0;
if( SysTick_1ms - dev_Nor_processing_tick > 4) //5ms<6D><73><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD>豸
{
dev_Nor_processing_tick = SysTick_1ms;
BLV_Nor_Dev_Polling_Task();
}
}
/*******************************************************************************
* Function Name : BLV_Active_Set_List_Addr
* Description : ActivePort <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
@@ -1482,7 +1648,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
SRAM_Write_DW(read_addr,SRAM_DEVICE_ONLINE_STATE_TEMP_ADDR);
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s SRAM addr:%08X",__func__, write_addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s SRAM addr:%X",__func__, write_addr);
memset(data,0x00,6); //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>0
@@ -1493,7 +1659,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
if( (write_addr + 0x06) > SRAM_DEVICE_ONLINE_STATE_END_ADDR )
{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s overstep_1 %08X!!!",__func__,write_addr);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s overstep_1 %X!!!",__func__,write_addr);
len = SRAM_DEVICE_ONLINE_STATE_END_ADDR - write_addr;
SRAM_DMA_Write_Buff(data,len,write_addr);
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
@@ -1506,7 +1672,7 @@ __attribute__((section(".non_0_wait"))) void Write_Device_Fault_State(
if(write_addr > SRAM_DEVICE_ONLINE_STATE_END_ADDR)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s overstep:%08X",__func__,write_addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s overstep:%X",__func__,write_addr);
write_addr = SRAM_DEVICE_ONLINE_STATE_START_ADDR;
}

2
MCU_Driver/debug.c
View File

@@ -221,7 +221,7 @@ __attribute__((section(".non_0_wait"))) void Dbg_NoTick_Print(int DbgOptBit ,con
fmt++;
}
va_end(ap);
printf("\r\n");
//printf("\r\n");
}
}

150
MCU_Driver/inc/blv_dev_action.h
View File

@@ -57,6 +57,9 @@
#define DevCtrlDlyLen 0x08 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4><EFBFBD>ʱ<EFBFBD>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> <20><>Ҫ<EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>ʱ<EFBFBD>ڵ<EFBFBD>
#define DevCtrlDlyLenAddr 0x10 //<2F>豸<EFBFBD><E8B1B8><EFBFBD>Ƴ<EFBFBD><C6B3>ȴ<EFBFBD><C8B4>豸<EFBFBD><E8B1B8>ַ<EFBFBD>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD><CAB9>
#define DEV_ACTION_INFO_Size 864 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ܳ<EFBFBD> 864Byte
#define DevActionInfo_DevActionState_DevAddrIn_Index 59 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ<EFBFBD>±<EFBFBD>
typedef struct
{
uint16_t ActionNo; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -67,8 +70,8 @@ typedef struct
{
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint16_t inAddr; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint16_t inType; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD>ʶ<EFBFBD><CAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint16_t DevLoop; //<2F>豸<EFBFBD><EFBFBD>·
uint16_t DevEvent; //<2F>豸<EFBFBD>¼<EFBFBD>
}Dev_Action_Input; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>6<EFBFBD><36><EFBFBD>ֽ<EFBFBD>
typedef struct
@@ -101,8 +104,8 @@ typedef struct
}Dev_Action_U64Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
typedef struct{
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t SceneExcute; //ִ<>з<EFBFBD>ʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9> <20><><EFBFBD><EFBFBD><EFBFBD>ɹر<C9B9>
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}Dev_Action_Cond; //<2F><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><C4B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD><39><EFBFBD>ֽ<EFBFBD>
typedef struct
@@ -114,15 +117,15 @@ typedef struct
typedef struct
{
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2>ʼ*/
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ
uint8_t DevType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
uint8_t DevAddr; //<2F>豸<EFBFBD><E8B1B8>ַ - 1Byte
uint16_t DevOutputLoop; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ - 2Byte
uint16_t DevCtrlState; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>״̬ - 2Byte
Dev_Dly_Value DevDlyValue; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD><CAB1>Ϣ - 2Byte
/*<2A><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
}Dev_Action_OutCfg; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
#define DEVACTIONOUTCFGLEN sizeof(Dev_Action_OutCfg) //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD>
#define DEVACTIONOUTCFGLEN 0x08 //<2F>̶<EFBFBD>8<EFBFBD><38><EFBFBD>ֽ<EFBFBD> Dev_Action_OutCfg<EFBFBD>ṹ<EFBFBD>峤<EFBFBD><EFBFBD>
typedef struct
{
@@ -150,7 +153,6 @@ typedef struct CFG_Action_Add
Dev_Action_Cond DevActionCond; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> һ<><D2BB>9<EFBFBD>ֽ<EFBFBD>
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD>Ƚ<EFBFBD><C8BD><EFBFBD> <20><><EFBFBD>ݿ<EFBFBD><DDBF><EFBFBD><EFBFBD>ܳ<EFBFBD>49<34>ֽ<EFBFBD> */
Dev_Action_State DevActionState; //<2F><><EFBFBD><EFBFBD>״̬<D7B4><CCAC><EFBFBD><EFBFBD> һ<><D2BB>11<31><31><EFBFBD>ֽ<EFBFBD>
uint8_t CheckVal; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>У<EFBFBD><D0A3> 1<><31><EFBFBD>ֽ<EFBFBD>
uint16_t data_len; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2<><32><EFBFBD>ֽ<EFBFBD>
@@ -159,68 +161,38 @@ typedef struct CFG_Action_Add
}DEV_ACTION_INFO; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9> <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>49+11+4+448 = 512<31>ֽ<EFBFBD>
typedef struct{
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
uint8_t BlwMapDevi; //<2F><EFBFBD><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
uint8_t DevNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevBusNum; //Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevPollNum; //<2F><>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
/*ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ*/
uint8_t TimeGetFlag; //ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><CAB1>
/*ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
uint16_t SleepActionNo; //˯<EFBFBD>߳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
uint32_t DevLockAddr; //΢<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ
uint8_t Lock485Addr; //΢<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ַ
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CheckTypeNum; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CheckMapList[4]; //Ѳ<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
uint8_t OffLineDevType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
uint8_t OffLineDevAddr; //<2F><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ 2023-10-08
uint8_t InputType; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2023-10-08
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
uint8_t People_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><CBB1><EFBFBD> 2024-03-01
uint8_t ServerCtrl; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CardInFlag; //<2F><>ס<EFBFBD><D7A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><DFB1><EFBFBD> 2024-04-29
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t TimeSyncFlag; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t VC_ConNToSGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConNToSSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_PortNum; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint8_t BlwMapDevi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
uint8_t DevNum; //<2F>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevBusNum; //Bus<75><73><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t DevPollNum; //<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevActiveNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DevNorNum; //<2F><>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Devi; //<2F><><EFBFBD>ڱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
uint8_t TimeGetFlag; //ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD>־ ÿ<><C3BF><EFBFBD>õ<EFBFBD>ʱ<EFBFBD>䣬<EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><D3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1>ʱ<EFBFBD><EFBFBD>
uint8_t Lock485Addr; //΢<><CEA2><EFBFBD><EFBFBD>485<38><35>ַ
uint8_t CheckTypeNum; //Ѳ<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CheckMapList[4]; //Ѳ<><D1B2><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>б<EFBFBD>
uint8_t OffLineDevType; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
uint8_t OffLineDevAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ 2023-10-08
uint8_t InputType; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2023-10-08
uint8_t InputAddr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ 2023-10-08
uint8_t InputLoop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>· 2023-10-08
uint8_t People_Flag; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˱<EFBFBD><EFBFBD><EFBFBD> 2024-03-01
uint8_t ServerCtrl; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t CardInFlag; //<EFBFBD><EFBFBD>ס<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˯<EFBFBD>߱<EFBFBD><EFBFBD><EFBFBD> 2024-04-29
uint8_t TimeSyncFlag; //ʱ<EFBFBD><EFBFBD>ͬ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t DayStart; //<2F><><EFBFBD>쿪ʼʱ<CABC><CAB1>
uint8_t DayEnd; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
uint8_t VC_ConNToSGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConNToSSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNGruop; //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_ConSToNSubset; //<2F>޿<EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t VC_PortNum; //<2F>޿<EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD><EFBFBD><EFBFBD>
uint8_t Dim_Lower_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Dim_Upper_limit; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t Service_16; //<2F><><EFBFBD><EFBFBD>16״̬
uint8_t sram_save_flag; //<2F>ⲿSRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
uint8_t Last_EleState; //<2F><>һ<EFBFBD><D2BB>ȡ<EFBFBD><C8A1>״̬
uint8_t SleepMode_State;
uint8_t Last_SleepMode_State;
@@ -229,9 +201,6 @@ typedef struct{
uint8_t Person_Detected; //<2F><><EFBFBD><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>е<EFBFBD> <20><><EFBFBD>˻<EFBFBD><CBBB><EFBFBD><EFBFBD><EFBFBD>״̬ <20><><EFBFBD>忨ȡ<E5BFA8>硢<EFBFBD><E7A1A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״<EFBFBD><D7B4><EFBFBD>ӦҲ<D3A6>㣩
uint8_t Last_Person_Detected;
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint8_t CardState; //<2F>忨״̬
uint8_t Last_CardState;
@@ -239,6 +208,23 @@ typedef struct{
uint8_t Last_Rs485CardType;
uint8_t Last_NeightState;
uint16_t SleepActionNo; //˯<>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Ϊ0<CEAA><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч
uint16_t CheckMapDevNum; //2023-11-27 Ѳ<><D1B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint16_t DimGlobalValue; //<2F><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint16_t CCTValue; //<2F><><EFBFBD><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint16_t Last_DimGlobalValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ֵ
uint16_t Last_CCTValue; //<2F>ϴα<CFB4><CEB1><EFBFBD><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD>ɫ<EFBFBD><C9AB>ֵ
uint16_t DevActionNum; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevActioni; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD> <20><>Χ0~(DevActionNumMax-1)
uint16_t DevDlyNum; //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint16_t DevDlyi; //<2F><><EFBFBD>ڱ<EFBFBD><DAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD><D0B5><EFBFBD>ʱ<EFBFBD>豸
uint16_t BlwMapDevNum; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> 2024-08-28 uint8_t <20><> uint16_t
uint32_t DevLockAddr; //΢<><CEA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint32_t pc_addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
Dev_Action_U64Cond DevActionU64Cond; //64λ<34><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD>
}BLV_DevAction_Manage_G;
#define DevDlyStructLen sizeof(Struct_Dev_Dly) //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ṹ<EFBFBD>峤<EFBFBD><E5B3A4>
@@ -261,44 +247,38 @@ typedef struct
uint8_t DlyExcuteFlag; //<2F><>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
uint8_t DlyBlinkFlag; //<2F><>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>˸<EFBFBD><CBB8>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һʱ<D2BB><CAB1><EFBFBD><EFBFBD>ʱִ<CAB1>б<EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD>һ Ҳ<>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־ 0Ϊ<30><CEAA><EFBFBD><EFBFBD> 1Ϊ<31><CEAA><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ֱ<><D6B1>ִ<EFBFBD><D6B4><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint16_t DevOutputType; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸ִ<E8B1B8>з<EFBFBD>ʽ<EFBFBD><CABD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint32_t DlyExcuteTime; //<EFBFBD><EFBFBD>ʱִ<EFBFBD><EFBFBD>ʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ʱ<EFBFBD>䱻<EFBFBD><EFBFBD>ֵ
uint32_t DlyExcuteTime; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<EFBFBD>䣬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>ʱ<EFBFBD>䱻<EFBFBD><EFBFBD>ֵ
Struct_Dev_Dly_Core DevDlyCore; //<2F><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> <20>ؼ<EFBFBD><D8BC><EFBFBD>Ϣ
Dev_Dly_Value DlyBlinkTime; //<2F><>˸Ƶ<CBB8><C6B5> 0201 Ϊ1S<31>л<EFBFBD> 0202 Ϊ2S<32>л<EFBFBD> <20><>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD> Ϊ<><CEAA>ǰ<EFBFBD><C7B0>Ҫִ<D2AA>е<EFBFBD><D0B5><EFBFBD>չ<EFBFBD>豸<EFBFBD>±<EFBFBD>
}Struct_Dev_Dly; //<2F>豸<EFBFBD><E8B1B8>ʱ<EFBFBD>ṹ<EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>չ<EFBFBD><D5B9><EFBFBD><EFBFBD><EFBFBD>豸 <20>̶<EFBFBD>16<31><36><EFBFBD>ֽ<EFBFBD>
typedef struct{
uint8_t Addr;
uint32_t ExpandReadFlag;
uint16_t ExpandReadState[32];
uint32_t ExpandReadFlag;
}EXPAND_TYPE_G; //<2F>̵<EFBFBD><CCB5><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
typedef struct{
uint8_t Addr;
uint32_t DimmReadFlag;
uint16_t DimmReadState[32];
uint32_t DimmReadFlag;
}DIMM_TYPE_G; //<2F><><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>״̬<D7B4>ṹ<EFBFBD><E1B9B9>
extern BLV_DevAction_Manage_G DevActionGlobal;
uint8_t DevAction_Info_Write_To_SRAM(uint32_t addr,DEV_ACTION_INFO *DevAction_Info);
uint8_t DevAction_Info_Read_To_Struct(uint32_t addr,DEV_ACTION_INFO *DevAction_Info);
void Logic_DevAction_Add(uint8_t *data,uint16_t len);
uint32_t DevAction_No_Get(uint16_t DevActionNo);
uint32_t Add_DevDly_To_List(uint8_t DevType, uint32_t DevDlyAddr, uint16_t DevOutputLoop);
uint32_t DevDlyAddr_Get(uint32_t DevDlyAddr, uint16_t DevOutputLoop);
void DevAction_No_Ctrl(uint16_t DevActionNo, uint8_t Mode, uint16_t CtrlState);
uint8_t DevActionCtrl(uint8_t *p, uint8_t DataLen);
void BLV_DevAction_Task(void);
void BLV_DevDly_Task(void);
#endif /* MCU_DRIVER_INC_BLV_DEV_ACTION_H_ */

27
MCU_Driver/inc/blv_netcomm_function.h
View File

@@ -19,9 +19,12 @@
#define SeriaNet_Cmd_Send_Len 19 //<2F><>ͷ<EFBFBD><CDB7>15Byte+<2B><><EFBFBD>ݣ<EFBFBD>2Byte+CRC<52><43>2Byte
#define Search_Cmd 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define Heart_Cmd 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_Search_Cmd 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_Heart_Cmd 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_QueryTime_Cmd 0x08 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
#define In_IAP_Cmd 0x0A //IAP APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_RoomState_Cmd 0x0E //״̬<D7B4>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> 2025-09-25 ȡ<><C8A1>
#define In_DevCtr_Cmd 0x0F //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƺ͵<C6BA><CDB5><EFBFBD>
#define In_SingleAirCtrl_Cmd 0x13 //<2F>¿<EFBFBD><C2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -37,9 +40,14 @@
#define In_Power_Change_Cmd 0x35 //ȡ<><C8A1>״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_DevState_Cmd 0x36 //<2F>豸״̬<D7B4>ϱ<EFBFBD> 2025-09-25 <20><><EFBFBD><EFBFBD>
#define In_Cloud_IAP_Cmd 0x68 //<2F>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_SeriaNet_Cmd 0x70 //͸<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD>
#define In_SeriaNetReported_Cmd 0x71 //͸<><CDB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD>
#define In_Subgroup_Cmd 0xA2 //<2F><>Ⱥ<EFBFBD><C8BA><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_Read_MCUSystem_Cmd 0xB1 //<2F><>ȡϵͳ<CFB5><CDB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
#define In_BLVIAP_Cmd 0xB2 //BLV_Cx<43><78><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Aϵ<41><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̣<EFBFBD><CCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EEA3AC><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>ִ<EFBFBD>е<EFBFBD>BLV_Cxϵ<78>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define In_BLVIAPCheck_Cmd 0xB3 //BLV_Cx<43><78><EFBFBD><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -69,6 +77,12 @@
#define UDP_ActSend_TimeSync_Flag 0x20 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - ʱ<><CAB1>ͬ<EFBFBD><CDAC> <20><>־λ
#define UDP_ActSend_Heart_Flag 0x40 //UDP<44><50><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>־λ
#define IAPPlan_State_Starting 0x01 //<2F><><EFBFBD><EFBFBD>״̬ - <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define IAPPlan_State_Underway 0x02 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define IAPPlan_State_Checking 0x03 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD>
#define IAPPlan_State_CheckSucc 0x04 //<2F><><EFBFBD><EFBFBD>״̬ - У<><D0A3><EFBFBD>ɹ<EFBFBD>,RCU<43><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define IAPPlan_State_IAPTimeout 0x05 //<2F><><EFBFBD><EFBFBD>״̬ - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
#define USER_NET_Register_Timeout 30 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>ʱ,<2C><>λ<EFBFBD><CEBB>S
#define USER_NET_Send_Timeout 20 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵȴ<DDB5><C8B4>ظ<EFBFBD>ʱ<EFBFBD><CAB1>,<2C><>λ<EFBFBD><CEBB>S
#define USER_NET_Register_Times 10 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CDB4><EFBFBD>
@@ -90,6 +104,15 @@ uint8_t Udp_Internal_SeriaNet_Uploading(uint8_t port,uint32_t baud,uint32_t data
uint8_t Udp_Internal_SeriaNet_Uploading2(uint8_t port,uint32_t baud,uint8_t* data, uint16_t DataLen);
uint8_t Udp_Internal_SeriaNet_Response_Timeout(void);
uint8_t UDP_BLVIAPPlan_Cmd_SendPack(uint8_t iap_state);
uint8_t UDP_ReplyIAP_SendPack(void);
uint8_t UDP_ReplyCloudIAP_SendPack(void);
void Udp_Internal_Analysis(uint8_t *data, uint32_t len, uint8_t* ip, uint16_t port);
void BLV_UDP_Comm_Task(void);
#endif /* MCU_DRIVER_INC_BLV_NETCOMM_FUNCTION_H_ */

46
MCU_Driver/inc/blv_rs485_protocol.h
View File

@@ -172,7 +172,8 @@ typedef void (*Dev_Output_Group_Ctrl_ptr)(uint32_t CfgDevAddIn, uint16_t DevInpu
typedef uint16_t (*Dev_Output_Loop_Group_State_Get_ptr)(uint32_t devaddr, uint8_t SceneType, uint32_t ReadFlag, uint8_t ReadNum,uint16_t *start);
/*<2A><><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD>Ͷ<EFBFBD><CDB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
#define Dev_Fun_Ptr_Len sizeof(Struct_Dev_Fun_Info) //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸<EFBFBD>ĸ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> һ<><D2BB>16<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
#define Dev_Fun_Ptr_Len 24 //Ŀǰÿ<C7B0><C3BF><EFBFBD>豸6<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><EFBFBD> һ<><D2BB>24<EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
typedef struct
{
@@ -226,30 +227,35 @@ typedef struct{
typedef struct{
uint8_t port_mode; //<2F>˿<EFBFBD>ģʽ - 0x01:<3A><><EFBFBD><EFBFBD>ģʽ 0x02:͸<><CDB8>ģʽ 0x03:<3A><><EFBFBD><EFBFBD>ģʽ
uint8_t pass_state; //͸<><CDB8>״̬<D7B4><CCAC>
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint32_t mode_tick; //ģʽ<C4A3><CABD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t mode_outtime; //ģʽ<C4A3><CABD>ʱʱ<CAB1><CAB1>
uint32_t pass_tick; //͸<><CDB8><EFBFBD><EFBFBD>ǰʱ<C7B0><CAB1><EFBFBD><EFBFBD>
uint32_t pass_outtime; //͸<><CDB8><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint32_t baud; //<2F><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
uint8_t BUS_Start; //BUS״̬<D7B4><CCAC>
uint8_t device_num; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint32_t n_list_read_addr; //<2F><>ǰ<EFBFBD><C7B0>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t Last_list_addr; //<2F><>һ<EFBFBD><D2BB><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
uint32_t send_wait; //<2F><><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t Process_Flag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
uint8_t Retry_Flag; //<2F>ط<EFBFBD><D8B7><EFBFBD><EFBFBD>ǣ<EFBFBD><C7A3><EFBFBD><EFBFBD><EFBFBD>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD>,<2C>յ<EFBFBD><D5B5>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD>Ǻ<EFBFBD><C7BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㣬
uint32_t change_tick; //<2F>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t n_dev_type; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t n_dev_addr; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t n_dev_datalen; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
uint32_t n_dev_waittime; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>͵ȴ<CDB5>ʱ<EFBFBD><CAB1>
uint8_t n_retry_num; //<2F><>ǰ<EFBFBD>豸<EFBFBD>ط<EFBFBD><D8B7><EFBFBD>
uint32_t n_polling_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8>ѯ<EFBFBD><D1AF><EFBFBD>ͻص<CDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
uint32_t n_processing_cf; //<2F><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
fun4_prt BaudRateCfg; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD>
}BLV_BUS_Manage_G;
typedef struct{
@@ -320,10 +326,16 @@ extern BLV_POLL_Manage_G Poll485_Info;
extern BLV_ACTIVE_Manage_G Act485_Info;
extern BLV_NORDEV_Manage_G NorDevInfoGlobal;
uint8_t BLV_Device_Info_Write_To_SRAM( uint32_t dev_addr, Device_Public_Information_G *dev_info, uint8_t *dev_data, uint16_t data_len);
uint8_t BLV_Device_PublicInfo_Read_To_Struct( uint32_t dev_addr, Device_Public_Information_G *dev_info);
void BLV_Device_Public_Info_Printf(Device_Public_Information_G *dev_info);
uint8_t BLV_Device_PublicInfo_Update_To_Struct( uint32_t dev_addr, Device_Public_Information_G *dev_info);
void Add_BUS_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_POLL_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_ACT_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
void Add_Nor_Device_To_List(Device_Public_Information_G *dev_info,uint8_t *dev_data,uint16_t data_len);
uint8_t Device_Data_Check(uint32_t sram_addr);
void BLV_BUS_Polling_Task(void);
void BUS485Port_Passthrough_Task(void);
@@ -334,6 +346,8 @@ void BLV_PollPort_ModeTask(void);
void BLV_ActivePort_Task(void);
void Act485Port_Passthrough_Task(void);
void BLV_ActivePort_ModeTask(void);
void BLV_Nor_Dev_ModeTask(void);
void BLV_Active_Set_List_Addr(uint32_t addr);
uint32_t Find_Device_List_Information(uint8_t dev_type,uint8_t addr);
uint32_t Find_AllDevice_List_Information(uint8_t dev_type,uint8_t addr);

6
MCU_Driver/inc/flash_mem_addr.h
View File

@@ -20,9 +20,11 @@
#define SPIFLASH_APP_FEATURE_Addr 0x00000000 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 512Byte
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
#define SPIFLASH_UPDATE_FLAG_Addr 0x00000200 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ - 512Byte
#define SPIFLASH_UPDATE_RECORD_Addr 0x00000400 //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD>Ʊ<EFBFBD><C6B1><EFBFBD><EFBFBD><EFBFBD>ַ
#define SPIFLASH_APP_Data_Start_Addr 0x00004000
#define SPIFLASH_APP_Data_Start_Addr 0x00001000
#define SPIFLASH_APP_Data_End_Addr 0x0006FFFF
#define SPIFLASH_APP_End_Addr 0x0006FFFF

2
MCU_Driver/inc/led.h
View File

@@ -10,7 +10,7 @@
#include "ch564.h"
#define SYS_LED_ON GPIOB_ResetBits(GPIO_Pin_12)
#define SYS_LED_ON GPIOA_ResetBits(GPIO_Pin_12)
#define SYS_LED_OFF GPIOA_SetBits(GPIO_Pin_12)
#define SYS_LED_FLIP GPIOA_InverseBits(GPIO_Pin_12)

10
MCU_Driver/inc/logic_file_function.h
View File

@@ -73,10 +73,8 @@ typedef struct {
uint8_t type; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t addr; //<2F>豸<EFBFBD><E8B1B8>ַ
uint8_t port; //<2F>豸<EFBFBD>˿<EFBFBD>
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t version; //<2F>豸Э<E8B1B8><D0AD><EFBFBD>汾
uint8_t retry; //ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD>
uint16_t writ_time; //ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1>
uint8_t ipaddr[4]; //<2F><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t parent_type; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t parent_addr; //<2F><><EFBFBD>豸<EFBFBD><E8B1B8>ַ
@@ -86,7 +84,9 @@ typedef struct {
uint8_t remain[42]; //<2F><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD>
uint16_t input_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
uint16_t output_num; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·
}LOGICFILE_DEVICE_INFO; //<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ
uint16_t writ_time; //ͨѶ<EFBFBD>ȴ<EFBFBD>ʱ<EFBFBD><EFBFBD>
uint32_t baud; //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}LOGICFILE_DEVICE_INFO; //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ(ע<>Ᵽ<EFBFBD><E2B1A3>Flash<73>б<EFBFBD><D0B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ<DDBD>붨<EFBFBD><EBB6A8><EFBFBD>IJ<EFBFBD><C4B2><EFBFBD>ͬ)
typedef struct{
uint64_t DevActionOutFlag:1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
@@ -114,14 +114,15 @@ typedef struct{
uint64_t Reserve1:2; //<2F><><EFBFBD><EFBFBD>2λ
}LOGIC_ACTIVE_CONDITION_G; //<2F>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ṹ
typedef struct {
uint8_t type; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>
uint8_t addr; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ַ
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
uint8_t execute; //<2F>豸ִ<E8B1B8>з<EFBFBD>ʽ
uint8_t content; //<2F>豸ִ<E8B1B8><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t delay_time; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>
uint8_t delay_unit; //ִ<><D6B4><EFBFBD><EFBFBD>ʱʱ<CAB1>䵥λ
uint16_t loop; //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>·
}LOGIC_DEVICE_ACTIVE_G; //<2F>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݽṹ
#if C8_TYPE
@@ -163,6 +164,7 @@ typedef struct {
void BLV_DevAction_AllData_Init(void);
uint8_t Read_LogicFile_Information(uint8_t select,uint8_t *buff);
void Logic_Device_Action_Data_Analysis(uint8_t *data);
uint8_t LOGIC_FILE_Check(void);

12
MCU_Driver/inc/mcu_flash.h
View File

@@ -19,13 +19,13 @@
#define App_Procedure_Not_Ready 0x44 //Appδ׼<CEB4><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ
//MCU Flash Address range(0x0 -- 0x6FFFF) Size(448K)
#define MCU_APP_Flash_Start_Addr 0x00007000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define MCU_APP_Data_Start_Addr 0x00007000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define MCU_APP_Data_End_Addr 0x00027DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Feature_Addr 0x00027E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Flash_End_Addr 0x00027FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Flash_Start_Addr 0x00001000 //MCU Flash<73><68>APP<50><50><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define MCU_APP_Data_Start_Addr 0x00001000 //MCU Flash APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
#define MCU_APP_Data_End_Addr 0x00067DFF //MCU Flash APP<50><50><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Feature_Addr 0x00067E00 //MCU Flash <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Flash_End_Addr 0x00067FFF //MCU Flash<73><68>APP<50>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>ַ
#define MCU_APP_Feature_PageAddr 0x00027000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
#define MCU_APP_Feature_PageAddr 0x00067000 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ҳ<EFBFBD>ĵ<EFBFBD>ַ
#define MCU_APP_Feature_PageOffset 0x00000E00 //MCU APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3>ƫ<EFBFBD><C6AB><EFBFBD><EFBFBD>
#define APP_FEATURE_SIZE 0x0200 //512Byte

1
MCU_Driver/inc/rtc.h
View File

@@ -48,6 +48,7 @@ uint32_t RTC_Conversion_To_Unix(S_RTC *rtc_time);
void Unix_Conversion_To_RTC(S_RTC *rtc_time,uint32_t utc_tick);
uint8_t RTC_ReadDate(S_RTC *psRTC);
uint8_t RTC_WriteDate(S_RTC SetRTC);
uint8_t NetRTC_WriteDate(S_RTC SetRTC);
void RTC_TASK(void);
uint8_t RTC_TimeDate_Correct_Figure(uint8_t data);

56
MCU_Driver/inc/sram_mem_addr.h
View File

@@ -116,7 +116,8 @@
/*<2A><>¼Launcher<65>汾<EFBFBD><E6B1BE>Ϣ <20><>С<EFBFBD><D0A1>0x20 2025-07-07*/
#define SRAM_Launcher_SoftwareVer_Addr 0x0000E800
/*Launcherʹ<72><CAB9> <20><><EFBFBD>ڼ<EFBFBD>¼APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳ<EFBFBD><CDB3> <20><>С:0x10 2026-01-14*/
#define SRAM_APP_Write_Count_Addr 0x0000E900
/**********SRAM Uart<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_Uart_Buffer_Size 0x0400 //<2F><><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>С
@@ -170,19 +171,9 @@
#define SRAM_VCard_Property_Start_Addr 0x0004D000 //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>1K
#define SRAM_VCard_Property_End_Addr 0x0004D3FF //<2F>޿<EFBFBD>ȡ<EFBFBD><C8A1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD>
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_IAP_APP_FILE_ADDRESS 0x00050000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD><C4BC>ĵ<EFBFBD>ַ - 218K
#define SRAM_IAP_IP_ADDRESS 0x0008E600 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_PORT_ADDRESS 0x0008E604 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x0008E606 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x0008E607 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD> - 1Byte
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_Register_Start_ADDRESS 0x0008E900
#define SRAM_Register_End_ADDRESS 0x0008EFFF
#define SRAM_Register_Start_ADDRESS 0x0004E000
#define SRAM_Register_End_ADDRESS 0x0004EFFF
#define Register_OFFSET_LEN 0x0400 //<2F><>ǰ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ռ䳤<D5BC><E4B3A4> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˣ<EFBFBD><CBA3>ⳤ<EFBFBD><E2B3A4>ҲӦ<D2B2>ñ仯
//<2F><>Ŀ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>ƫ<EFBFBD>Ƶ<EFBFBD>ַ
@@ -222,28 +213,39 @@
#define Register_TFTPDmName_OFFSET 0x0185 //TFTP<54><50>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 64Byte
/**********<2A><>Ŀӳ<C4BF><D3B3><EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_IAP_APP_FILE_ADDRESS 0x00100000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD> <20><>ʼ<EFBFBD><CABC>ַ - 412K
#define SRAM_IAP_APP_FILE_End_ADDRESS 0x00167FFF //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>APP<50>ļ<EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define SRAM_IAP_IP_ADDRESS 0x00168000 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>IP - 4Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_PORT_ADDRESS 0x00168004 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD>port - 2Byte <20><>ʱ<EFBFBD><CAB1>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD>ſռ䣬<D5BC><E4A3AC><EFBFBD><EFBFBD>ͬʱ<CDAC><CAB1><EFBFBD><EFBFBD>͸<EFBFBD><CDB8>UDP<44><50>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD>
#define SRAM_IAP_NET_UPGRADE_Flag_ADDRESS 0x00168006 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־λ - 1Byte
#define SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS 0x00168007 //SRAM<41>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8>ķ<EFBFBD><C4B7>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>APP<50><50>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɵ<EFBFBD><C9B5>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> - 1Byte
#define SRAM_IAP_IAP_Reset_Flag_ADDRESS 0x00168008 //SRAM<41>д<EFBFBD><D0B4>ž<EFBFBD><C5BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɺ󣬸<C9BA>λ<EFBFBD><CEBB>־λ
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2>ַ <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><>ʼ**********/
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00090000 //SRAM<41><4D><EFBFBD>߼<EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
#define SRAM_IAP_LOGIC_FILE_ADDRESS 0x00190000 //SRAM<41><4D><EFBFBD>߼<EFBFBD><DFBC>·<EFBFBD><C2B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׵<EFBFBD>ַ
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00090000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00090004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00090008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SRAM_IAP_LOGIC_DataFlag_ADDRESS 0x00190000 //<2F>ļ<EFBFBD><C4BC><EFBFBD>־λ - 4Byte
#define SRAM_IAP_LOGIC_DataSize_ADDRESS 0x00190004 //<2F>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> - 4Byte
#define SRAM_IAP_LOGIC_DataMD5_ADDRESS 0x00190008 //<2F>ļ<EFBFBD>MD5У<35><D0A3>ֵ - 16Byte
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00090200
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x000FFFFF
#define SRAM_IAP_LOGIC_DataStart_ADDRESS 0x00190200
#define SRAM_IAP_LOGIC_DataEnd_ADDRESS 0x001FFFFF
/**********SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC>·<EFBFBD> <20><><EFBFBD>ض<EFBFBD><D8B6><EFBFBD> - <20><><EFBFBD><EFBFBD>**********/
#define SRAM_DevAction_List_Size 0x0400 //ÿ<><C3BF><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5>洢<EFBFBD>ռ<EFBFBD><D5BC><EFBFBD>С - <20><>ǰ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>
#define SRAM_DevAction_List_Start_Addr 0x00100000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
#define SRAM_DevAction_List_End_Addr 0x001EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_BlwMap_List_Start_Addr 0x001F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
#define SRAM_BlwMap_List_End_Addr 0x001F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_DevDly_List_Start_Addr 0x001F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
#define SRAM_DevDly_List_End_Addr 0x001FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
#define SRAM_DevAction_List_Num 950
#define SRAM_DevAction_List_Start_Addr 0x00200000 //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>960K
#define SRAM_DevAction_List_End_Addr 0x002EFFFF //<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_BlwMap_List_Start_Addr 0x002F0000 //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ <20><><EFBFBD><EFBFBD> һ<><D2BB>32K
#define SRAM_BlwMap_List_End_Addr 0x002F7FFF //ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SRAM_DevDly_List_Start_Addr 0x002F8000 //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ һ<><D2BB>32K
#define SRAM_DevDly_List_End_Addr 0x002FFFFF //<2F><>ʱ<EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ

10
MCU_Driver/inc/uart.h
View File

@@ -17,10 +17,10 @@
#define USART_BUFFER_NUM 3
#define USART_BUFFER_SIZE 100
#define MCU485_EN1_H
#define MCU485_EN1_L
#define MCU485_EN2_H
#define MCU485_EN2_L
#define MCU485_EN1_H GPIOD_SetBits(GPIO_Pin_21)
#define MCU485_EN1_L GPIOD_ResetBits(GPIO_Pin_21)
#define MCU485_EN2_H GPIOB_SetBits(GPIO_Pin_15)
#define MCU485_EN2_L GPIOB_ResetBits(GPIO_Pin_15)
#define MCU485_EN3_H
#define MCU485_EN3_L
@@ -70,7 +70,7 @@ void Uart2_Flush(uint16_t over_time);
void Uart3_Flush(uint16_t over_time);
void Uart_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);
void MCU485_SendString_1(uint8_t *buf, uint16_t len);
void MCU485_SendString_0(uint8_t *buf, uint16_t len);
void MCU485_SendString_2(uint8_t *buf, uint16_t len);
void MCU485_SendString_3(uint8_t *buf, uint16_t len);
void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len);

3
MCU_Driver/inc/watchdog.h
View File

@@ -8,6 +8,9 @@
#ifndef MCU_DRIVER_INC_WATCHDOG_H_
#define MCU_DRIVER_INC_WATCHDOG_H_
#include <stdint.h>
#include "ch564.h"
void WDT_Init(void);
void WDT_Feed(void);
void WDT_Reinit(void);

418
MCU_Driver/logic_file_function.c
View File

@@ -9,6 +9,8 @@
#include <stdint.h>
#include <string.h>
#define LOGIC_DEBUG_INFO_EN 1
/*******************************************************************************
* Function Name : DevAction_CondData_Init
* Description : <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
@@ -32,11 +34,12 @@ __attribute__((section(".non_0_wait"))) void Action_Coord_Get(uint32_t Dev_proce
for(i = 0; i < DevActionGlobal.DevActionNum; i++) //
{
DevActionAddr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
DevActionAddr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size + DevActionInfo_DevActionState_DevAddrIn_Index;
if(SRAM_Read_DW(DevActionAddr+sizeof(Dev_Action_Core)+sizeof(Dev_Action_Input)+sizeof(Dev_Action_Cond)+sizeof(Dev_Action_State)-4) == Dev_processing_addr)
if(SRAM_Read_DW(DevActionAddr) == Dev_processing_addr)
{
BUS_Public->ActionCoord = i; //<2F><>ǰ<EFBFBD><C7B0>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>һ<EFBFBD>µĶ<C2B5><C4B6><EFBFBD>
break;
}
}
@@ -44,7 +47,7 @@ __attribute__((section(".non_0_wait"))) void Action_Coord_Get(uint32_t Dev_proce
/*******************************************************************************
* Function Name : Action_Coord_Get
* Description : <20>豸<EFBFBD>±<EFBFBD><C2B1>õ<EFBFBD>
* Description : <20>豸<EFBFBD>±<EFBFBD><C2B1>õ<EFBFBD> - <20><><EFBFBD>ʵ㣺<CAB5><E3A3BA>ʲôʹ<C3B4>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Input :
Dev_processing_addr :<3A>豸<EFBFBD>ڵ<EFBFBD><DAB5><EFBFBD>ַ
BUS_Public :<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -58,33 +61,33 @@ __attribute__((section(".non_0_wait"))) void Dev_Coord_Get(void)
for(i = 0; i < DevActionGlobal.DevNum; i++)
{
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), Dev_processing_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(Dev_processing_addr,&BUS_Public);
BUS_Public.DevCoord = i; //<2F>õ<EFBFBD><C3B5>豸<EFBFBD>±<EFBFBD>
Action_Coord_Get(Dev_processing_addr, &BUS_Public); //<2F>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d<><64><EFBFBD>豸<EFBFBD>±<EFBFBD>:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d", Dev_processing_addr, BUS_Public.type, BUS_Public.addr, BUS_Public.DevCoord, BUS_Public.ActionCoord);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X<><58><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d<><64><EFBFBD>豸<EFBFBD>±<EFBFBD>:%d<><64><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d", Dev_processing_addr, BUS_Public.type, BUS_Public.addr, BUS_Public.DevCoord, BUS_Public.ActionCoord);
switch(BUS_Public.type)
{
case Dev_Host_HVout: //<2F><><EFBFBD><EFBFBD>Ϊ<EFBFBD>̵<EFBFBD><CCB5><EFBFBD>
if((ENUM_RS485_DEV_PRO_01 == BUS_Public.Protocol)&&(0x00 == BUS_Public.addr)) //1<><31>Э<EFBFBD><D0AD> <20><>ַΪ0
{
// NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
// SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
//
// DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
// Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%08X", DevHVoutInfo.DevC5IOAddr);
// SRAM_DMA_Write_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately); //<2F>̵<EFBFBD><CCB5><EFBFBD>˽<EFBFBD><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
NOR_HVOUT_INFO DevHVoutInfo; //<2F>̵<EFBFBD><CCB5><EFBFBD><EFBFBD>ֲ<EFBFBD><D6B2><EFBFBD><EFBFBD><EFBFBD>
SRAM_DMA_Read_Buff((uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO),Dev_processing_addr+Dev_Privately);
DevHVoutInfo.DevC5IOAddr = Find_AllDevice_List_Information(DEV_C5IO_Type, 0x00); //<2F>õ<EFBFBD>C5IO<49>洢<EFBFBD><E6B4A2>ַ
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"DevHVoutInfo.DevC5IOAddr:%X", DevHVoutInfo.DevC5IOAddr);
BLV_Device_Info_Write_To_SRAM(Dev_processing_addr, &BUS_Public, (uint8_t *)&DevHVoutInfo,sizeof(NOR_HVOUT_INFO));
}else {
BLV_Device_PublicInfo_Update_To_Struct(Dev_processing_addr,&BUS_Public);
}
break;
default:
/*<2A><><EFBFBD>±<EFBFBD><C2B1>浱ǰ<E6B5B1>豸*/
BLV_Device_PublicInfo_Update_To_Struct(Dev_processing_addr,&BUS_Public);
break;
}
/*<2A><><EFBFBD>±<EFBFBD><C2B1>浱ǰ<E6B5B1>豸*/
BUS_Public.check = 0x00;
SRAM_Write_Byte(BUS_Public.check, Dev_processing_addr+Dev_Check); //<2F><>У<EFBFBD><D0A3>
SRAM_Write_Word(BUS_Public.DevCoord, Dev_processing_addr+Dev_Coord); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD>豸<EFBFBD>±<EFBFBD>
SRAM_Write_Word(BUS_Public.ActionCoord, Dev_processing_addr+Dev_ActionCoord); //<2F><><EFBFBD><EFBFBD>д<EFBFBD>붯<EFBFBD><EBB6AF><EFBFBD>±<EFBFBD>
BUS_Public.check = Log_CheckSum(Dev_processing_addr,BUS_Public.data_len); //<2F><><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3> DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_Write_Byte(BUS_Public.check, Dev_processing_addr+Dev_Check); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>У<EFBFBD><D0A3>
}
}
@@ -103,30 +106,38 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
{
list_addri = SRAM_DevAction_List_Start_Addr + i * SRAM_DevAction_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoi, sizeof(DEV_ACTION_INFO), list_addri);
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%04x",
DevActionInfoi.DevCtrlNum,
DevActionInfoi.DevActionInput.DevType,
DevActionInfoi.DevActionInput.DevAddr,
DevActionInfoi.DevActionState.DevAddrIn);
if(DevAction_Info_Read_To_Struct(list_addri, &DevActionInfoi) != 0x00)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addri);
continue;
}
Dbg_Print_Buff(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD>ӡ:",(uint8_t *)&DevActionInfoi,sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input)+sizeof(Dev_Action_Cond)+sizeof(Dev_Action_State));
DevActionInfoi.DevActionState.DevAddrIn = Find_AllDevice_List_Information(DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%x",
DevActionInfoi.DevCtrlNum, \
DevActionInfoi.DevActionInput.DevType, \
DevActionInfoi.DevActionInput.DevAddr, \
DevActionInfoi.DevActionState.DevAddrIn);
for(j = 0; j < DevActionGlobal.DevActionNum ; j++)
{
if( j != i )
{
list_addrj = SRAM_DevAction_List_Start_Addr + j * SRAM_DevAction_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfoj, sizeof(DEV_ACTION_INFO), list_addrj);
if(DevAction_Info_Read_To_Struct(list_addrj, &DevActionInfoj) != 0x00)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addrj);
continue;
}
if( ( DevActionInfoi.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
&& ( DevActionInfoj.DevActionCond.DevActionU64Cond.DevActionOutFlag == 0x00 )
&& ( DevActionInfoi.DevActionInput.DevType == DevActionInfoj.DevActionInput.DevType )
&& ( DevActionInfoi.DevActionInput.DevAddr == DevActionInfoj.DevActionInput.DevAddr )
&& ( DevActionInfoi.DevActionInput.inAddr == DevActionInfoj.DevActionInput.inAddr )
&& ( DevActionInfoi.DevActionInput.inType == DevActionInfoj.DevActionInput.inType ) )
&& ( DevActionInfoi.DevActionInput.DevLoop == DevActionInfoj.DevActionInput.DevLoop )
&& ( DevActionInfoi.DevActionInput.DevEvent == DevActionInfoj.DevActionInput.DevEvent ) )
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X<EFBFBD><EFBFBD>֮ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X", list_addri, list_addrj);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X<><58>֮ǰ<D6AE><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X", list_addri, list_addrj);
DevActionInfoi.DevActionState.SceneReuseFlag = 0x01;
if( (DevActionInfoi.DevActionInput.DevType == DEV_RS485_SWT)
&& (DevActionInfoi.DevActionCond.SceneExcute == ACTION_SCENE_MULTI)
@@ -141,9 +152,9 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
DevActionInfoi.DevActionState.MultiSetFlag = 0x01;
DevActionInfoi.DevActionState.MultiNumber = 0x01;
DevActionInfoi.DevActionState.MultiValidNo++;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
DevActionInfoi.DevActionInput.DevAddr,
DevActionInfoi.DevActionInput.inAddr,
DevActionInfoi.DevActionInput.DevLoop,
list_addri,
DevActionInfoi.DevActionState.MultiNumber);
}
@@ -158,42 +169,31 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
DevActionInfoj.DevActionState.MultiNumber = DevActionInfoi.DevActionState.MultiValidNo;
DevActionInfoj.DevActionState.MultiSetFlag = 0x01;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d <20><>·:%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǰ<EFBFBD><C7B0>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD>:%d",
DevActionInfoj.DevActionInput.DevAddr,
DevActionInfoj.DevActionInput.inAddr,
DevActionInfoj.DevActionInput.DevLoop,
list_addrj,
DevActionInfoj.DevActionState.MultiNumber);
//<EFBFBD><EFBFBD><EFBFBD>Ż<EFBFBD><EFBFBD><EFBFBD>
for(k = 0; k < SRAM_DevAction_List_Size; k++)
{
SRAM_Write_Byte(0x00,list_addrj+k);
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addrj);
DevActionInfoj.CheckVal = 0x00;
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoj, DevActionInfoj.data_len, list_addrj);
DevActionInfoj.CheckVal = DevAction_CheckSum(list_addrj,DevActionInfoj.data_len);
SRAM_Write_Byte(DevActionInfoj.CheckVal, ( list_addrj + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State) ) );
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>λ׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X", list_addrj);
DevAction_Info_Write_To_SRAM(list_addrj, &DevActionInfoj); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevAdd = Find_AllDevice_List_Information2(Active_Port, DevActionInfoi.DevActionInput.DevType, DevActionInfoi.DevActionInput.DevAddr);
if(DevAdd != 0x00)
{
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public,sizeof(Device_Public_Information_G),DevAdd);
BLV_Device_PublicInfo_Read_To_Struct(DevAdd,&BUS_Public);
SRAM_DMA_Read_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
if(DevActionInfoi.DevActionState.MultiValidNo <= 127)
{
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr] = DevActionInfoi.DevActionState.MultiValidNo;
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.DevLoop] = DevActionInfoi.DevActionState.MultiValidNo;
}
BUS_Public.check = 0x00;
BUS_Public.check = DoubleData_CheckSum((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), (uint8_t *)&Rs485SwiInfo, sizeof(RS485_SWI_INFO));
SRAM_DMA_Write_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G),DevAdd);
SRAM_DMA_Write_Buff((uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO),DevAdd+Dev_Privately);
BLV_Device_Info_Write_To_SRAM(DevAdd,&BUS_Public,(uint8_t *)&Rs485SwiInfo,sizeof(RS485_SWI_INFO));
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%d <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>·:%d <20><>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD>:%d",
DevActionInfoi.DevActionInput.DevAddr,
DevActionInfoi.DevActionInput.inAddr,
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.inAddr]);
DevActionInfoi.DevActionInput.DevLoop,
Rs485SwiInfo.MultiValidNo[DevActionInfoi.DevActionInput.DevLoop]);
}
}
}
@@ -210,7 +210,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
{
DevActionInfoi.DevActionOutput[k].DevActionOutAddr = DevAction_No_Get(DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20>±<EFBFBD>:%d <20><>·:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD>ij<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
list_addri,
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
i,
@@ -221,7 +221,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>չ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD><E8B1B8>·<EFBFBD><C2B7>ַ:%d,<2C><>չ<EFBFBD>豸<EFBFBD>洢<EFBFBD><EFBFBD>ַ:%04x",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD><EFBFBD>ַ:%d,<2C><>·:%d,SRAM<EFBFBD>洢<EFBFBD><EFBFBD>ַ:%x",
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType,
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevAddr,
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop,
@@ -238,14 +238,14 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
if(Dev_Host_Invalid != DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevType)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>豸׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>,׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
list_addri,
i,
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
DevActionInfoi.DevActionOutput[k].DevActionOutAddr,
DevActionInfoi.DevActionOutput[k].DevActionOutCfg.DevOutputLoop);
}else{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
list_addri,
i,
DevActionInfoi.DevActionOutput[k].DevDlyAddr,
@@ -257,17 +257,7 @@ __attribute__((section(".non_0_wait"))) void DevAction_ReuseFlag_Get(void)
}
}
for(k = 0; k < SRAM_DevAction_List_Size; k++)
{
SRAM_Write_Byte(0x00,list_addri+k);
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD><EFBFBD>ñ<EFBFBD>־<EFBFBD><EFBFBD>λ׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addri);
DevActionInfoi.CheckVal = 0x00;
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfoi, DevActionInfoi.data_len, list_addri); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevActionInfoi.CheckVal = DevAction_CheckSum(list_addri,DevActionInfoi.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
SRAM_Write_Byte(DevActionInfoi.CheckVal,(list_addri + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)) ); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
DevAction_Info_Write_To_SRAM(list_addri, &DevActionInfoi); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
@@ -287,7 +277,11 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
{
KeepFlag = 0x00;
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), list_addr);
if(DevAction_Info_Read_To_Struct(list_addr, &DevActionInfo) != 0x00)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addr);
continue;
}
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
{
@@ -297,7 +291,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
if( DevActionInfo.DevActionOutput[j].DevActionOutAddr != 0x00 )
{
KeepFlag = 0x01;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20>±<EFBFBD>:%d <20><>·:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20>±<EFBFBD>:%d <20><>·:%d",
list_addr,DevActionInfo.DevActionOutput[j].DevActionOutAddr,
i,
DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevOutputLoop);
@@ -341,17 +335,7 @@ __attribute__((section(".non_0_wait"))) void Expand_Scene_Get(void)
if( KeepFlag == 0x01 )
{
for(uint16_t k = 0;k<SRAM_DevAction_List_Size;k++)
{
SRAM_Write_Byte(0x00,list_addr+k);
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addr);
DevActionInfo.CheckVal = 0x00;
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevActionInfo.CheckVal = DevAction_CheckSum(list_addr,DevActionInfo.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
SRAM_Write_Byte(DevActionInfo.CheckVal,(list_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)) ); //У<><D0A3>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
DevAction_Info_Write_To_SRAM(list_addr, &DevActionInfo); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
}
@@ -368,13 +352,19 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
uint32_t list_addr = 0;
DEV_ACTION_INFO DevActionInfo;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĶ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%08X",DevActionGlobal.DevActionNum, SRAM_DevAction_List_Start_Addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еĶ<EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ:%X",DevActionGlobal.DevActionNum, SRAM_DevAction_List_Start_Addr);
for(i = 0; i < DevActionGlobal.DevActionNum; i++)
{
KeepFlag = 0x00;
list_addr = SRAM_DevAction_List_Start_Addr + i*SRAM_DevAction_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&DevActionInfo, sizeof(DEV_ACTION_INFO), list_addr);
if(DevAction_Info_Read_To_Struct(list_addr, &DevActionInfo) != 0x00)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>δͨ<EFBFBD><EFBFBD>:%x",list_addr);
continue;
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD>ͨ<EFBFBD><EFBFBD>:%x",list_addr);
}
for(j = 0; j < DevActionInfo.DevCtrlNum; j++)
{
if( DevActionInfo.DevActionOutput[j].DevActionOutCfg.DevDlyValue.DelayCont == 0x00 )
@@ -383,7 +373,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
if(DevActionInfo.DevActionOutput[j].DevDlyAddr != 0x00)
{
KeepFlag = 0x01;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%08X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%08X, <20><>·:%d",
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%X <20>±<EFBFBD>:%d,<2C><>ʱ<EFBFBD>ڵ<EFBFBD>:%X <20><><EFBFBD>漰<EFBFBD><E6BCB0><EFBFBD><EFBFBD>ʱ<EFBFBD>豸<EFBFBD><E8B1B8>ַ:%X, <20><>·:%d",
list_addr,
i,
DevActionInfo.DevActionOutput[j].DevDlyAddr,
@@ -395,17 +385,7 @@ __attribute__((section(".non_0_wait"))) void Expand_DevDly_Get(void)
if(KeepFlag == 0x01)
{
for(uint16_t k = 0;k<SRAM_DevAction_List_Size;k++)
{
SRAM_Write_Byte(0x00,list_addr+k);
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><EFBFBD><EFBFBD>,<2C><>ַ:%08X", list_addr);
DevActionInfo.CheckVal = 0x00; //У<><D0A3><EFBFBD><EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD>д<EFBFBD><D0B4>
SRAM_DMA_Write_Buff((uint8_t *)&DevActionInfo, DevActionInfo.data_len, list_addr); //д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevActionInfo.CheckVal = DevAction_CheckSum(list_addr,DevActionInfo.data_len); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>
SRAM_Write_Byte(DevActionInfo.CheckVal,(list_addr + sizeof(Dev_Action_Core) + sizeof(Dev_Action_Input) + sizeof(Dev_Action_Cond) + sizeof(Dev_Action_State)));
DevAction_Info_Write_To_SRAM(list_addr, &DevActionInfo); //<2F><><EFBFBD>涯<EFBFBD><E6B6AF><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
}
}
@@ -422,6 +402,8 @@ __attribute__((section(".non_0_wait"))) void BLV_DevAction_AllData_Init(void)
memset((void *)&NorDevInfoGlobal,0,sizeof(BLV_NORDEV_Manage_G));
memset((void *)&DevActionGlobal,0,sizeof(BLV_DevAction_Manage_G)); //ȫ<>ֲ<EFBFBD><D6B2><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>0
BUS485_Info.port_mode = Port_Normal_Mode;
//SRAM_PowerOn_Restore_ParaInfo();
DevAction_CondData_Init(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD>ʼ<EFBFBD><CABC>
@@ -1041,7 +1023,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_LogicInfo_TempProce
strncpy(temp_str,(const char *)&data[temp_len],7);
temp_data = temp_str[0]*256+temp_str[1];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>: %04d-%02d-%02d %02d:%02d:%02d \r\n",temp_data,temp_str[2],temp_str[3],temp_str[4],temp_str[5],temp_str[6]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>: %d-%d-%d %d:%d:%d \r\n",temp_data,temp_str[2],temp_str[3],temp_str[4],temp_str[5],temp_str[6]);
temp_len += 7;
strncpy(temp_str,(const char *)&data[temp_len],32);
@@ -1131,7 +1113,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Read_LogicFile_Information(uint8
if(temp != LOGIC_DataFlag)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>־λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%08X",temp);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD>־λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X",temp);
return 0x01;
}
@@ -1145,7 +1127,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Read_LogicFile_Information(uint8
if((file_len != 0x00) &&(file_len > 0x70000))
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%08X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%X",file_len);
return 0x01;
}
@@ -1155,9 +1137,9 @@ __attribute__((section(".non_0_wait"))) uint8_t Read_LogicFile_Information(uint8
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>!");
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󣬲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Len:%08X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X%02X,%02X,%02X,%02X,%02X,%02X",md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"File Md5:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X",\
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󣬲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Len:%X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X%X,%X,%X,%X,%X,%X",md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"File Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
file_info[8],file_info[9],\
file_info[10],file_info[11],\
file_info[12],file_info[13],\
@@ -1258,10 +1240,10 @@ __attribute__((section(".non_0_wait"))) uint8_t Read_LogicFile_Information(uint8
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!");
}
}else{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",temp_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",temp_len);
}
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ!%02X %02X",Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_L) , Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_H));
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ!%X %X",Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_L) , Flash_read_Byte(SPIFLASH_LOGIC_DataStart_ADDRESS+Logic_D_Hear_H));
}
return rev;
@@ -1492,6 +1474,67 @@ __attribute__((section(".non_0_wait"))) uint8_t Logic_DeviceType_Legal_Judgment(
return rev;
}
/*******************************************************************************
* Function Name : LogicFile_Device_Info_Struct_Assignment
* Description : <20>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>ṹ<EFBFBD>帳ֵ
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
- *<2A>豸<EFBFBD><E8B1B8>ַ - 1Byte
- *<2A>豸<EFBFBD>˿<EFBFBD> - 1Byte
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 4Byte
- *<2A>豸Э<E8B1B8><D0AD><EFBFBD>汾 - 1Byte
- *<2A>豸ͨѶ<CDA8>ط<EFBFBD><D8B7><EFBFBD><EFBFBD><EFBFBD> - 1Byte
- *<2A>豸ͨѶ<CDA8>ȴ<EFBFBD>ʱ<EFBFBD><CAB1> - 2Byte
- *<2A><><EFBFBD><EFBFBD><EFBFBD>п<EFBFBD><D0BF>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 4Byte
- *<2A><><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> - 1Byte
- *<2A><><EFBFBD>豸<EFBFBD><E8B1B8>ַ - 1Byte
- *<2A><><EFBFBD>豸<EFBFBD>˿<EFBFBD> - 1Byte
- *<2A>޿<EFBFBD><DEBF>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>· - 5Byte
- *˽<><CBBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 10Byte
- *<2A><><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD> - 42Byte
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> - 1Byte
- *<2A>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7> - 1Byte
* Return :
*******************************************************************************/
uint8_t LogicFile_Device_Info_Struct_Assignment(uint8_t *data,LOGICFILE_DEVICE_INFO *dev_info)
{
dev_info->type = data[0];
dev_info->addr = data[1];
dev_info->port = data[2];
dev_info->baud = data[6];
dev_info->baud <<= 8;
dev_info->baud |= data[5];
dev_info->baud <<= 8;
dev_info->baud |= data[4];
dev_info->baud <<= 8;
dev_info->baud |= data[3];
dev_info->version = data[7];
dev_info->retry = data[8];
dev_info->writ_time = data[10];
dev_info->writ_time <<= 8;
dev_info->writ_time |= data[9];
memcpy(dev_info->ipaddr,&data[11],4);
dev_info->parent_type = data[15];
dev_info->parent_addr = data[16];
dev_info->parent_port = data[17];
memcpy(dev_info->lin,&data[18],5);
memcpy(dev_info->priproperty,&data[23],10);
memcpy(dev_info->remain,&data[33],42);
dev_info->input_num = data[76];
dev_info->input_num <<= 8;
dev_info->input_num |= data[75];
dev_info->output_num = data[78];
dev_info->output_num <<= 8;
dev_info->output_num |= data[77];
return 0x00;
}
/*******************************************************************************
* Function Name : Logic_FrameType_DeviceExist_TempProcessing
* Description : <20>߼<EFBFBD><DFBC>ļ<EFBFBD><C4BC><EFBFBD> - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
@@ -1505,11 +1548,13 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceExist_TempPro
uint16_t len)
{
uint32_t temp_len = 0;
char temp_str[38] = {0};
//char temp_str[38] = {0};
LOGICFILE_DEVICE_INFO temp_dev_info;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
memcpy(&temp_dev_info,data,sizeof(LOGICFILE_DEVICE_INFO));
if(len < LogicFile_DeviceInfo_InputSet) return;
LogicFile_Device_Info_Struct_Assignment(data,&temp_dev_info);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_dev_info.type,Logic_Info_DeviceType_To_String(temp_dev_info.type));
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_dev_info.addr);
@@ -1535,12 +1580,12 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceExist_TempPro
temp_len += temp_dev_info.input_num*4;
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·*32Byte 2022-06-07 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȸ<EFBFBD>Ϊ32Byte*/
for(uint16_t i=0;i<temp_dev_info.output_num;i++)
{
memcpy(temp_str,&data[temp_len],32);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d - %s",i+1,temp_str);
temp_len += 32;
}
// for(uint16_t i=0;i<temp_dev_info.output_num;i++)
// {
// memcpy(temp_str,&data[temp_len],32);
// Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·:%d - %s",i+1,temp_str);
// temp_len += 32;
// }
Lfile_info->device_num += 1;
@@ -1731,6 +1776,17 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Action_Data_Analysis(u
LOGIC_DEVICE_ACTIVE_G temp_active;
memcpy(&temp_active,data,sizeof(LOGIC_DEVICE_ACTIVE_G));
temp_active.type = data[0];
temp_active.addr = data[1];
temp_active.loop = data[3];
temp_active.loop <<= 8;
temp_active.loop |= data[2];
temp_active.execute = data[4];
temp_active.content = data[5];
temp_active.delay_time = data[6];
temp_active.delay_unit = data[7];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"****************************");
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d - %s",temp_active.type,Logic_Info_DeviceType_To_String(temp_active.type));
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD>ַ:%d",temp_active.addr);
@@ -2426,7 +2482,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
char temp_str[38] = {0};
uint32_t temp_len = 0;
uint32_t temp_data = 0;
uint8_t temp_num = 0;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"%s",__func__);
Lfile_info->active_num += 1;
@@ -2448,46 +2504,46 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
temp_len += 2;
temp_data = Data_Uint8_Convert_To_Uint16(&data[temp_len]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>:0x%04x",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD>:0x%x",temp_data);
temp_len += 2;
temp_data = data[temp_len];
Logic_Info_DeviceAction_Condition_To_String(&data[temp_len]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>2:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>3:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>4:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>5:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>5:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>7:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>7:%X",temp_data);
temp_len += 1;
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8:%X",temp_data);
temp_len += 1;
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>32Byte
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>з<EFBFBD>ʽ:%X",temp_data);
temp_len += 1;
strncpy(temp_str,(const char *)&data[temp_len],32);
@@ -2502,7 +2558,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
temp_len += 32; //2022-05-29 <20><><EFBFBD><EFBFBD>
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X",temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X",temp_data);
temp_len += 1;
if((temp_len + temp_data*8) > len)
@@ -2510,18 +2566,8 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_DeviceAction_TempPr
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%d - %d",temp_len + temp_data*8,len);
return ;
}
temp_num = temp_data;
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(uint16_t i=0;i<temp_num;i++)
{
Logic_Device_Action_Data_Analysis(&data[temp_len]);
temp_len+=8;
}
#if LOGIC_FILE_EN
Logic_DevAction_Add(data, len);
#endif
}
/*******************************************************************************
@@ -2675,7 +2721,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
for(uint8_t i = 0; i < 11; i++)
{
temp_data = data[temp_len];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>˿<EFBFBD>%02d״̬:%d",i,temp_data);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>˿<EFBFBD>%d״̬:%d",i,temp_data);
temp_len += 1;
}
@@ -2700,7 +2746,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
DevActionGlobal.VC_ConNToSGruop = data[1];
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConNToSSubset);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConNToSSubset);
}
else
{
@@ -2719,7 +2765,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCCondition_TempPro
{
DevActionGlobal.VC_ConSToNGruop = data[1];
}
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%08X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConSToNSubset);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ:%X <20><>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_ConSToNSubset);
}
else
{
@@ -2778,7 +2824,7 @@ __attribute__((section(".non_0_wait"))) void Logic_FrameType_VCPortInfor_TempPro
SRAM_DMA_Write_Buff(data,sizeof(VPORT_INFO_STRUCT), list_addr); //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
DevActionGlobal.VC_PortNum++;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD>˿ڵ<CBBF>ַ:%08X <20><>ǰ<EFBFBD>˿ڼ<CBBF><DABC><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_PortNum); //
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>޿<EFBFBD>ȡ<EFBFBD><EFBFBD> ӳ<><D3B3><EFBFBD><EFBFBD><EFBFBD>ӳɹ<D3B3>,<2C><>ǰ<EFBFBD>˿ڵ<CBBF>ַ:%X <20><>ǰ<EFBFBD>˿ڼ<CBBF><DABC><EFBFBD>:%d ",list_addr ,DevActionGlobal.VC_PortNum); //
}
else
{
@@ -2940,7 +2986,7 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
data_crc <<= 8;
data_crc |= Temp_Flash_Buff[Logic_D_CRC_L];
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>:%04X %04X",data_crc,temp_crc);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>:%X %X",data_crc,temp_crc);
if(data_crc == temp_crc)
{
@@ -2968,19 +3014,19 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
switch(Temp_Flash_Buff[Logic_D_FrameType])
{
case Logic_FrameType_LogicInfo:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_LogicInfo - <20>߼<EFBFBD><DFBC><EFBFBD>Ϣ");
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_LogicInfo - <20>߼<EFBFBD><DFBC><EFBFBD>Ϣ");
Logic_FrameType_LogicInfo_TempProcessing(&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
case Logic_FrameType_Global:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_Global - ȫ<><C8AB><EFBFBD><EFBFBD>Ϣ");
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_Global - ȫ<><C8AB><EFBFBD><EFBFBD>Ϣ");
Logic_FrameType_Global_TempProcessing(&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
case Logic_FrameType_DeviceExist:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceExist - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceExist - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
Logic_FrameType_DeviceExist_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
case Logic_FrameType_DeviceAction:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceAction - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_DeviceAction - <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
Logic_FrameType_DeviceAction_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
#if RS485_MUSIC_BLW_Flag
@@ -2996,33 +3042,38 @@ __attribute__((section(".non_0_wait"))) void LOGIC_FILE_Analysis(LOGICFILE_Conte
#endif
#if Dev_Nor_VirtualCard_Flag
case Logic_FrameType_VCCondition:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCCondition - <20>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ");
Logic_FrameType_VCCondition_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
case Logic_FrameType_VCPortInfor:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCPortInfor - <20>޿<EFBFBD>ȡ<EFBFBD><C8A1>ӳ<EFBFBD><D3B3><EFBFBD>˿<EFBFBD><CBBF><EFBFBD>Ϣ");
Logic_FrameType_VCPortInfor_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
case Logic_FrameType_VCProperty:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_VCProperty - <20>޿<EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>");
Logic_FrameType_VCProperty_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
#endif
case Logic_FrameType_ColorTempMap:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_ColorTempMap - ɫ<><C9AB>ӳ<EFBFBD><D3B3>");
Logic_FrameType_ColorTempMap_TempProcessing(read_addr,Lfile_info,&Temp_Flash_Buff[Logic_D_Para],temp_len - Logic_D_Para);
break;
default:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Logic_FrameType_Error - %d",Temp_Flash_Buff[Logic_D_FrameType]);
break;
}
read_addr+=temp_len-1;
i+=temp_len - 1;
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!%04X %04X",data_crc,temp_crc);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"CRCУ<EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>!%X %X",data_crc,temp_crc);
}
}else{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",read_addr,temp_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",read_addr,temp_len);
}
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %08x",i,read_addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %x",i,read_addr);
}
read_addr++;
@@ -3034,7 +3085,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
{
LOGICFILE_DEVICE_INFO temp_dev_info;
memcpy(&temp_dev_info,data,sizeof(LOGICFILE_DEVICE_INFO));
LogicFile_Device_Info_Struct_Assignment(data,&temp_dev_info);
if(temp_dev_info.port != type)
{
@@ -3048,16 +3099,16 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
switch(temp_dev_info.type)
{
case Dev_Host_HVout:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Bus<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǿ<EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
break;
case Dev_BUS_C5IO:
BLV_BUS_CSIO_For_Logic_Init(&temp_dev_info,data,len);
break;
case DEV_C5MUSIC_Type:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_BUS_C5MUSIC_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLV_BUS_C5MUSIC_For_Logic_Init(&temp_dev_info,data,len);
break;
#if RS485_LED_Flag
case DEV_RS485_PWM:
@@ -3084,21 +3135,21 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
switch(temp_dev_info.type)
{
case Dev_Host_HVout:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
break;
case DEV_RS485_SWT: //<2F><><EFBFBD><EFBFBD>
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
break;
case DEV_RS485_TEMP:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLW_RS485_TempFun_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLW_RS485_TempFun_For_Logic_Init(&temp_dev_info,data,len);
break;
#if Dev_485_Card_Polling_Flag
case DEV_RS485_CARD:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>Ӳ忨ȡ<EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_RS485_Card_Data_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>Ӳ忨ȡ<EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLV_RS485_Card_Data_For_Logic_Init(&temp_dev_info,data,len);
break;
#endif
#if Dev_485_IrSend_Polling_Flag
@@ -3174,8 +3225,8 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
switch(temp_dev_info.type)
{
case Dev_Host_HVout:
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
BLV_Nor_Dev_HVout_For_Logic_Init(&temp_dev_info,data,len);
break;
#if RS485_Dev_IN_CH6
case Dev_Host_LVinput:
@@ -3192,8 +3243,8 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
#endif
case DEV_RS485_SWT:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>485<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLW_RS485_Switch_Init(DEVDATALEN, &DevBuf[DEVDATALEN*i]);//<2F><>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD><EFBFBD>˿ڼ<CBBF><DABC><EFBFBD><EFBFBD>ں<EFBFBD><DABA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
BLW_RS485_Switch_For_Logic_Init(&temp_dev_info,data,len);
break;
case DEV_RS485_TEMP:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>¿<EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
@@ -3303,7 +3354,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
case Dev_Host_Service:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ӷ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_Nor_Dev_Service_For_Logic_Init(&temp_dev_info,data,len);
BLV_Nor_Dev_Service_For_Logic_Init(&temp_dev_info,data,len);
NorDevInfoGlobal.NorDeviceNum += 1;
break;
case Dev_Host_LVinput:
@@ -3317,7 +3368,7 @@ __attribute__((section(".non_0_wait"))) void Logic_Device_Add_To_List(uint8_t ty
break;
case Dev_Host_LVoutput:
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸 <20><>ַ: %d",temp_dev_info.addr);
//BLV_Nor_Dev_LVoutput_Init(temp_dev_info.addr);
BLV_Nor_Dev_LVoutput_Init(temp_dev_info.addr);
NorDevInfoGlobal.NorDeviceNum += 1;
break;
case Dev_NodeCurtain:
@@ -3478,10 +3529,10 @@ __attribute__((section(".non_0_wait"))) void Logic_File_Device_Init(LOGICFILE_Co
}
}else{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%08X - %d",read_addr,temp_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ȡ<EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD>ڷ<EFBFBD>Χ<EFBFBD><EFBFBD>:%X - %d",read_addr,temp_len);
}
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %08x",i,read_addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>ͷ! %d - %x",i,read_addr);
}
read_addr++;
@@ -3503,9 +3554,9 @@ __attribute__((section(".non_0_wait"))) void SRAM_Dev_Data_Check(void)
for(i = 0; i < DevActionGlobal.DevNum; i++)
{
Dev_processing_addr = SRAM_Device_List_Start_Addr + i*SRAM_Device_List_Size;
SRAM_DMA_Read_Buff((uint8_t *)&BUS_Public, sizeof(Device_Public_Information_G), Dev_processing_addr); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>й<EFBFBD><D0B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
BLV_Device_PublicInfo_Read_To_Struct(Dev_processing_addr,&BUS_Public);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD>±<EFBFBD>:%d,<2C><>ַ:%08X<EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d", i, Dev_processing_addr, BUS_Public.type, BUS_Public.addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ǰ<EFBFBD>豸<EFBFBD>±<EFBFBD>:%d,<2C><>ַ:%X<><58><EFBFBD>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD>:%d<><64><EFBFBD>豸<EFBFBD><E8B1B8>ַ:%d", i, Dev_processing_addr, BUS_Public.type, BUS_Public.addr);
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit,"BUS_Public Data:",(uint8_t *)&BUS_Public, sizeof(BUS_Public));
}
}
@@ -3551,7 +3602,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
if((file_len != 0x00) &&(file_len >= 0x70000))
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%08X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD>߼<EFBFBD><EFBFBD>ļ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ȳ<EFBFBD><EFBFBD><EFBFBD>:%X",file_len);
return 0x01;
}
@@ -3561,9 +3612,9 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
{
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>!");
}else {
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󣬲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Len:%08X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X%02X,%02X,%02X,%02X,%02X,%02X",md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"UDP Md5:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X",\
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"MD5У<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>󣬲<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Len:%X",file_len);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"UDP Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
file_info[8],file_info[9],\
file_info[10],file_info[11],\
file_info[12],file_info[13],\
@@ -3658,10 +3709,10 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
/*BLV_BUS<55>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
UARTx_Init(UART_3,BUS485_Info.baud);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Device Info Endaddr:%08X ---",SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BUS485 Device Info Endaddr:%X ---",SRAM_Read_DW(SRAM_BUS_Device_List_Addr));
Poll485_Info.Last_list_addr = SRAM_Read_DW(SRAM_BUS_Device_List_Addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Poll485_Info addr:%08X ----",Poll485_Info.Last_list_addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Poll485_Info addr:%X ----",Poll485_Info.Last_list_addr);
SRAM_Write_DW(Poll485_Info.Last_list_addr,SRAM_POLL_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC>Polling<6E><67>ʼ<EFBFBD><CABC>ַ
@@ -3716,7 +3767,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD>ѯ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Poll485_Info.device_num);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_POLL_dev END:%08X",SRAM_Read_DW(SRAM_POLL_Device_List_Addr));
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"BLV_POLL_dev END:%X",SRAM_Read_DW(SRAM_POLL_Device_List_Addr));
/*<2A>˿ڳ<CBBF>ʼ<EFBFBD><CABC>*/
Poll485_Info.port_mode = Port_Normal_Mode;
@@ -3733,7 +3784,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
Act485_Info.Last_list_addr = SRAM_Read_DW(SRAM_POLL_Device_List_Addr); //<2F><><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>ʼ<EFBFBD><CABC>ַ
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485_Info addr:%08X ----",Act485_Info.Last_list_addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485_Info addr:%X ----",Act485_Info.Last_list_addr);
SRAM_Write_DW(Act485_Info.Last_list_addr,SRAM_ACTIVE_Device_List_Addr); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><E8B1B8>Ϣ<EFBFBD><CFA2>ʼ<EFBFBD><CABC>ַ
Act485_Info.device_num = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸
@@ -3781,15 +3832,15 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
}
}
/*<2A><><EFBFBD>Ӳ<EFBFBD><D3B2>Խӿ<D4BD>*/
//Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PC<EFBFBD><EFBFBD><EFBFBD>Խӿ<EFBFBD> ");
//BLV_PC_DEVICE_TEST_Init();
//Act485_Info.device_num += 1;
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"Ĭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PC<EFBFBD><EFBFBD><EFBFBD>Խӿ<EFBFBD> ");
BLV_PC_DEVICE_TEST_Init();
Act485_Info.device_num += 1;
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Ĭ<><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>忨״̬ͬ<CCAC><CDAC><EFBFBD>豸");
//BLW_RS485_CardState_AddTo_ActivePort(); //2023-10-31
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%d", Act485_Info.device_num);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Active Device End List:%08X" , SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr));
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Active Device End List:%X" , SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr));
Act485_Info.Act_Start = B_IDLE;
Act485_Info.baud = 9600;
@@ -3798,12 +3849,11 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>*/
UARTx_Init(UART_2,Act485_Info.baud);
temp = SRAM_Read_DW(SRAM_ACTIVE_Device_List_Addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485 Device Info Endaddr:%08X ----",temp);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Act485 Device Info Endaddr:%X ----",temp);
SRAM_Write_DW(temp,SRAM_NORMAL_Device_List_Addr);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%08X",temp);
Dbg_Println(DBG_BIT_LOGIC_STATUS_bit,"<EFBFBD><EFBFBD>ͨ<EFBFBD>豸<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X",temp);
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD>豸
for(uint8_t i=0;i<Lfile_stat.Nor_device_num;i++)
{
@@ -3855,7 +3905,7 @@ __attribute__((section(".non_0_wait"))) uint8_t LOGIC_FILE_Check(void)
//NorDevInfoGlobal.NorDeviceNum++;
temp = SRAM_Read_DW(SRAM_NORMAL_Device_List_Addr);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Nor Device Info Endaddr:%08X ----",temp);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Nor Device Info Endaddr:%X ----",temp);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD> - ɫ<>µ<EFBFBD><C2B5>ڻ<EFBFBD>·ӳ<C2B7><D3B3><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>*/
// if(Lfile_stat.ColorTemp_Map_Addr != 0x00)

2
MCU_Driver/rw_logging.c
View File

@@ -151,7 +151,7 @@ __attribute__((section(".non_0_wait"))) uint8_t Log_write_sram(uint8_t data_type
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD>־д<D6BE><D0B4><EFBFBD><EFBFBD>ַ*/
Last_add = Last_add + write_len;
Set_Log_Current_Address(Last_add);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SRAM LOG Addr : %08X",Last_add);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SRAM LOG Addr : %X",Last_add);
return 0;
}

15
MCU_Driver/spi_flash.c
View File

@@ -7,6 +7,7 @@
#include "spi_flash.h"
#include "debug.h"
#include "watchdog.h"
uint8_t Temp_Flash_Buff[4100]; //FLash д<>뻺<EFBFBD><EBBBBA>BUFF
@@ -493,12 +494,22 @@ __attribute__((section(".non_0_wait"))) void Flash_Write(uint8_t* pBuffer,uint16
/*******************************************************************************
* Function Name : SPI_FLASH_APP_Data_Erase
* Description : <20>ⲿFlash APP<50>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD><EFBFBD>
* APP<50>ռ<EFBFBD><D5BC><EFBFBD>С Size: 0x00070000 <20><>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00000000 ~ 0x0006FFFF
* APP<50>ռ<EFBFBD><D5BC><EFBFBD>С Size: 0x00070000 <20><>ַ<EFBFBD><D6B7>Χ<EFBFBD><CEA7>0x00001000 ~ 0x0006FFFF
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void SPI_FLASH_APP_Data_Erase(void)
{
for(uint8_t i = 0;i < 7;i++)
Flash_Erase_Page(0); //<2F><><EFBFBD><EFBFBD>APP<50><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
for(uint8_t i = 1;i < 16;i++)
{
WDT_Feed();
Flash_Erase_Sector(i);
}
for(uint8_t i = 1;i < 7;i++)
{
WDT_Feed();
Flash_Erase_Block(i);
}
}

3
MCU_Driver/timer.c
View File

@@ -22,7 +22,8 @@ void TIMER0_Init(void)
volatile uint32_t Time0_100us = 0;
volatile uint32_t Time0_1ms = 0;
void __attribute__((interrupt("WCH-Interrupt-fast"))) TIM0_IRQHandler()
void TIM0_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void TIM0_IRQHandler(void)
{
static uint8_t NUM_1 = 0;

124
MCU_Driver/uart.c
View File

@@ -33,10 +33,10 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
switch (uart_id) {
case UART_0:
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD>ģʽ */
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<EFBFBD><EFBFBD>ģʽ */
UART0_BaudRateCfg(buad);
R8_UART0_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART0_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART0_LCR = RB_LCR_WORD_SZ;
R8_UART0_IER = RB_IER_TXD_EN;
@@ -44,18 +44,25 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
GPIOB_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_Floating);
GPIOB_ModeCfg(GPIO_Pin_15, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><>ѯ<EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
UART0_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_SetPriority(UART0_IRQn, 0x80);
NVIC_EnableIRQ(UART0_IRQn);
memset(&g_uart[UART_0],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_0],buad);
g_uart[UART_0].RX_Buffer_ReadAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].TX_Buffer_ReadAddr = SRAM_UART0_SendBuffer_Start_Addr;
g_uart[UART_0].TX_Buffer_WriteAddr = SRAM_UART0_SendBuffer_Start_Addr;
break;
case UART_1:
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IO<49><4F>ģʽ */
UART1_BaudRateCfg(buad);
R8_UART1_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART1_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART1_LCR = RB_LCR_WORD_SZ;
R8_UART1_IER = RB_IER_TXD_EN;
@@ -64,33 +71,45 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
GPIOB_ModeCfg(GPIO_Pin_10, GPIO_ModeIN_Floating);
UART1_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_SetPriority(UART1_IRQn, 0x80);
NVIC_EnableIRQ(UART1_IRQn);
memset(&g_uart[UART_1],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_1],buad);
g_uart[UART_1].RX_Buffer_ReadAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].TX_Buffer_ReadAddr = SRAM_UART1_SendBuffer_Start_Addr;
g_uart[UART_1].TX_Buffer_WriteAddr = SRAM_UART1_SendBuffer_Start_Addr;
break;
case UART_2:
UART2_BaudRateCfg(buad);
R8_UART2_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART2_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART2_LCR = RB_LCR_WORD_SZ;
R8_UART2_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART2,ENABLE);
GPIOB_ModeCfg(GPIO_Pin_14, GPIO_ModeOut_PP);
GPIOB_ModeCfg(GPIO_Pin_12, GPIO_ModeIN_Floating);
GPIOD_ModeCfg(GPIO_Pin_21, GPIO_ModeOut_PP); //RS485<38><35><EFBFBD>ų<EFBFBD>ʼ<EFBFBD><CABC> - <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD> RS485 ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
UART2_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_SetPriority(UART2_IRQn, 0x80);
NVIC_EnableIRQ(UART2_IRQn);
memset(&g_uart[UART_2],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_2],buad);
g_uart[UART_2].RX_Buffer_ReadAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].TX_Buffer_ReadAddr = SRAM_UART2_SendBuffer_Start_Addr;
g_uart[UART_2].TX_Buffer_WriteAddr = SRAM_UART2_SendBuffer_Start_Addr;
break;
case UART_3:
UART3_BaudRateCfg(buad);
R8_UART3_FCR = RB_FCR_FIFO_TRIG | RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 14 bytes
R8_UART3_FCR = RB_FCR_TX_FIFO_CLR | RB_FCR_RX_FIFO_CLR | RB_FCR_FIFO_EN;
// FIFO open, trigger point 1 bytes
R8_UART3_LCR = RB_LCR_WORD_SZ;
R8_UART3_IER = RB_IER_TXD_EN;
GPIO_PinRemapConfig(GPIO_PartialRemap1_UART3,ENABLE);
@@ -98,11 +117,16 @@ __attribute__((section(".non_0_wait"))) void UARTx_Init(UART_IDX uart_id, uint32
GPIOB_ModeCfg(GPIO_Pin_18, GPIO_ModeIN_Floating);
UART3_INTCfg(ENABLE, RB_IER_RECV_RDY | RB_IER_THR_EMPTY);
NVIC_SetPriority(UART3_IRQn, 0x80);
NVIC_EnableIRQ(UART3_IRQn);
memset(&g_uart[UART_3],0,sizeof(UART_t));
Set_Uart_recvTimeout(&g_uart[UART_3],buad);
g_uart[UART_3].RX_Buffer_ReadAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].TX_Buffer_ReadAddr = SRAM_UART3_SendBuffer_Start_Addr;
g_uart[UART_3].TX_Buffer_WriteAddr = SRAM_UART3_SendBuffer_Start_Addr;
break;
}
@@ -241,13 +265,21 @@ __attribute__((section(".non_0_wait"))) void UART0_RECEIVE(void)
{
g_uart[UART_0].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_0 Len %d ",g_uart[UART_0].RecvLen);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_0 Buff:", g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen);
g_uart[UART_0].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_0].RX_Buffer_WriteAddr < SRAM_UART0_RecvBuffer_Start_Addr) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_0].RecvLen & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_0].RecvLen >> 8) & 0xFF),g_uart[UART_0].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_0].RecvBuffer,g_uart[UART_0].RecvLen,g_uart[UART_0].RX_Buffer_WriteAddr+2);
g_uart[UART_0].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if( g_uart[UART_0].RX_Buffer_WriteAddr > SRAM_UART0_RecvBuffer_End_Addr ) g_uart[UART_0].RX_Buffer_WriteAddr = SRAM_UART0_RecvBuffer_Start_Addr;
g_uart[UART_0].RecvLen = 0;
g_uart[UART_0].Receiving = 0;
}
}
}
@@ -267,13 +299,21 @@ __attribute__((section(".non_0_wait"))) void UART1_RECEIVE(void)
{
g_uart[UART_1].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_1 Len %d ",g_uart[UART_1].RecvLen);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_1 Buff:", g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen);
g_uart[UART_1].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_1].RX_Buffer_WriteAddr < SRAM_UART1_RecvBuffer_Start_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_1].RecvLen & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_1].RecvLen >> 8) & 0xFF),g_uart[UART_1].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_1].RecvBuffer,g_uart[UART_1].RecvLen,g_uart[UART_1].RX_Buffer_WriteAddr+2);
g_uart[UART_1].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_1].RX_Buffer_WriteAddr > SRAM_UART1_RecvBuffer_End_Addr) g_uart[UART_1].RX_Buffer_WriteAddr = SRAM_UART1_RecvBuffer_Start_Addr;
g_uart[UART_1].RecvLen = 0;
g_uart[UART_1].Receiving = 0;
}
}
}
@@ -295,13 +335,22 @@ __attribute__((section(".non_0_wait"))) void UART2_RECEIVE(void)
{
g_uart[UART_2].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_2 Len %d ",g_uart[UART_2].RecvLen);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_2 Buff:", g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen);
g_uart[UART_2].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_2].RX_Buffer_WriteAddr < SRAM_UART2_RecvBuffer_Start_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_2].RecvLen & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_2].RecvLen >> 8) & 0xFF),g_uart[UART_2].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_2].RecvBuffer,g_uart[UART_2].RecvLen,g_uart[UART_2].RX_Buffer_WriteAddr+2);
g_uart[UART_2].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_2].RX_Buffer_WriteAddr > SRAM_UART2_RecvBuffer_End_Addr) g_uart[UART_2].RX_Buffer_WriteAddr = SRAM_UART2_RecvBuffer_Start_Addr;
g_uart[UART_2].RecvLen = 0;
g_uart[UART_2].Receiving = 0;
}
}
}
@@ -323,13 +372,21 @@ __attribute__((section(".non_0_wait"))) void UART3_RECEIVE(void)
{
g_uart[UART_3].RecvIdleTiming = SysTick_1ms;
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"UART_3 Len %d ",g_uart[UART_3].RecvLen);
// Dbg_Print_Buff(DBG_BIT_SYS_STATUS_bit,"UART_3 Buff:", g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen);
g_uart[UART_3].Receiving = 0;
//<2F><><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD>SRAM<41><4D><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD>ݽ<EFBFBD><DDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷд<CDB7><D0B4><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
if( g_uart[UART_3].RX_Buffer_WriteAddr < SRAM_UART3_RecvBuffer_Start_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
SRAM_Write_Byte((uint8_t)(g_uart[UART_3].RecvLen & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr);
SRAM_Write_Byte((uint8_t)((g_uart[UART_3].RecvLen >> 8) & 0xFF),g_uart[UART_3].RX_Buffer_WriteAddr+1);
SRAM_DMA_Write_Buff(g_uart[UART_3].RecvBuffer,g_uart[UART_3].RecvLen,g_uart[UART_3].RX_Buffer_WriteAddr+2);
g_uart[UART_3].RX_Buffer_WriteAddr += SRAM_Uart_Buffer_Size;
if(g_uart[UART_3].RX_Buffer_WriteAddr > SRAM_UART3_RecvBuffer_End_Addr) g_uart[UART_3].RX_Buffer_WriteAddr = SRAM_UART3_RecvBuffer_Start_Addr;
g_uart[UART_3].RecvLen = 0;
g_uart[UART_3].Receiving = 0;
}
}
}
@@ -398,7 +455,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART1_ChangeBaud(uint32_t baudra
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
if( UART1_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
@@ -446,7 +503,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART2_ChangeBaud(uint32_t baudra
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
if( UART2_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
@@ -494,7 +551,7 @@ __attribute__((section(".non_0_wait"))) uint8_t UART3_ChangeBaud(uint32_t baudra
while(1)
{
if( UART0_GetLinSTA() & RB_LSR_TX_ALL_EMP )
if( UART3_GetLinSTA() & RB_LSR_TX_ALL_EMP )
{
/*<2A><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>*/
__disable_irq();
@@ -644,26 +701,26 @@ __attribute__((section(".non_0_wait"))) void Uart_SendString(uint8_t uart_id,uin
}
/*******************************************************************************
* Function Name : MCU485_SendString_1
* Description : 485_1 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
* Function Name : MCU485_SendString_0
* Description : 485_0 <20><><EFBFBD>ͺ<EFBFBD><CDBA><EFBFBD>
* Input :
buf - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
l - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void MCU485_SendString_1(uint8_t *buf, uint16_t len)
__attribute__((section(".non_0_wait"))) void MCU485_SendString_0(uint8_t *buf, uint16_t len)
{
uint16_t delay_num = 0;
MCU485_EN1_H;
UART1_SendString(buf,len);
UART0_SendString(buf,len);
//<2F>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 50ms
while(1)
{
WDT_Feed();
if( (R8_UART1_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
if( (R8_UART0_LSR & RB_LSR_TX_ALL_EMP) != 0x00 ) break; //<2F>жϷ<D0B6><CFB7><EFBFBD>FIFOΪ<4F><CEAA>,ͬʱFIFO<46><4F><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>
Delay_Us(100);
delay_num++;
if(delay_num > 500) break;
@@ -740,23 +797,24 @@ __attribute__((section(".non_0_wait"))) void MCU485_SendString_3(uint8_t *buf, u
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void MCU485_SendString(uint8_t uart_id,uint8_t* buff,uint16_t len)
{
//Dbg_Println(DBG_BIT_SYS_STATUS_bit,"%s:%d - %d",__func__,uart_id,len);
switch(uart_id)
{
case UART_1:
case Polling_Port:
if(Poll485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Polling_Port,Poll485_Info.baud,buff,len);
}
MCU485_SendString_1(buff,len);
MCU485_SendString_0(buff,len);
break;
case UART_2:
case Active_Port:
if(Act485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Active_Port,Act485_Info.baud,buff,len);
}
MCU485_SendString_2(buff,len);
break;
case UART_3:
case Bus_port:
if(BUS485_Info.port_mode == Port_Monitoring_mode ) //<2F><>ѯ<EFBFBD>˿<EFBFBD>
{
//Udp_Internal_SeriaNet_Uploading2(Bus_port,BUS485_Info.baud,buff,len);

15
MCU_Driver/watchdog.c
View File

@@ -8,14 +8,14 @@
/*******************************************************************************
* Function Name : WDT_Init
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>Ϊ4ms<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* Description : <20><><EFBFBD>Ź<EFBFBD><C5B9><EFBFBD>ʼ<EFBFBD><CABC> <20><><EFBFBD><EFBFBD>100MHz <20><>ƵԼΪ84ms
* Input : None
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Init(void)
{
// WWDG_ResetCfg(ENABLE);
// WWDG_SetCounter(WDT_NUM);
FEED_DOG();
WDOG_ENABLE();
}
/*******************************************************************************
@@ -26,17 +26,14 @@ __attribute__((section(".non_0_wait"))) void WDT_Init(void)
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Feed(void)
{
//WWDG_ClearFlag();
// WWDG_SetCounter(WDT_NUM);
FEED_DOG();
}
/*******************************************************************************
* Function Name : WDT_Reinit
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC> <20><><EFBFBD>Ź<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ϊ4ms<6D><73><EFBFBD><EFBFBD>
* Input : None
* Return : None
* Description : <20><><EFBFBD>Ź<EFBFBD>ȥ<EFBFBD><C8A5>ʼ<EFBFBD><CABC>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WDT_Reinit(void)
{
WDOG_DISABLE();
}

2
NetLib/net_config.h
View File

@@ -31,7 +31,7 @@ extern "C" {
/* The number of sockets, the maximum is 31 */
#define WCHNET_MAX_SOCKET_NUM (WCHNET_NUM_IPRAW+WCHNET_NUM_UDP+WCHNET_NUM_TCP+WCHNET_NUM_TCP_LISTEN)
#define WCHNET_TCP_MSS 768 /* Size of TCP MSS Ĭ<><C4AC>:1460*/
#define WCHNET_TCP_MSS 1460 /* Size of TCP MSS Ĭ<><C4AC>:1460*/
#define WCHNET_NUM_POOL_BUF (WCHNET_NUM_TCP*2+2) /* The number of POOL BUFs, the number of receive queues */

37
NetLib/net_function.c
View File

@@ -18,7 +18,7 @@ uint16_t srcport = 1000; //source port
uint8_t SocketId;
uint8_t socket[WCHNET_MAX_SOCKET_NUM]; //Save the currently connected socket
uint8_t SocketRecvBuf[WCHNET_MAX_SOCKET_NUM][RECE_BUF_LEN]; //socket receive buffer
uint8_t SocketRecvBuf[WCHNET_MAX_SOCKET_NUM][1472]; //socket receive buffer
//<2F>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
WCHNET_INFO_T g_netinfo = {
@@ -94,7 +94,7 @@ void TIM2_IRQHandler(void)
* cb - socket<65>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
* Return : None
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void WCHNET_CreateUdpSocket(uint8_t* S, uint16_t SourPort, pSockRecv cb)
void WCHNET_CreateUdpSocket(uint8_t *S, uint16_t SourPort, pSockRecv cb)
{
uint8_t i;
SOCK_INF TmpSocketInf; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱsocket<65><74><EFBFBD><EFBFBD> */
@@ -112,7 +112,7 @@ __attribute__((section(".non_0_wait"))) void WCHNET_CreateUdpSocket(uint8_t* S,
i = WCHNET_SocketCreat(S, &TmpSocketInf); /* <20><><EFBFBD><EFBFBD>socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>socket<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SocketId<49><64> */
mStopIfError(i);
WCHNET_ModifyRecvBuf(SocketId, (uint32_t) SocketRecvBuf[SocketId], RECE_BUF_LEN);
WCHNET_ModifyRecvBuf(*S, (uint32_t) SocketRecvBuf[*S], RECE_BUF_LEN);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s - %d",__func__, *S);
}
@@ -152,9 +152,9 @@ void UDPSocket1_AppCallBack( struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16
ip[3] = ipaddr>>24;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",ip[0], ip[1], ip[2], ip[3], port);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"Socket1 len:%ld",len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"Socket1 len:%d",len);
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit,"Recv data:",buff,len);
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit,"data :",buff,len);
//Udp_Internal_Analysis(buff, len, ip, port);
if(buff[0] == 0xAA)
@@ -162,7 +162,7 @@ void UDPSocket1_AppCallBack( struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16
switch(buff[1])
{
case 0x55: //<2F>ɵķ<C9B5><C4B7><EFBFBD><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
//Udp_Internal_Analysis(buff, len, ip, port);
Udp_Internal_Analysis(buff, len, ip, port);
break;
case 0x66: //UDP<44><50><EFBFBD><EFBFBD>Э<EFBFBD><D0AD> - 2022-05-31
//UDP_NetServer_Data_Analysis(buff, len, ip, port);
@@ -601,12 +601,12 @@ __attribute__((section(".non_0_wait"))) void NetWork_Parameter_Get(void)
//MCU<43><55>ʼ<EFBFBD><CABC>IP
g_netinfo.device_ip[0] = 192;
g_netinfo.device_ip[1] = 168;
g_netinfo.device_ip[2] = MACAddr[4];
g_netinfo.device_ip[3] = MACAddr[5];
g_netinfo.device_ip[2] = g_netinfo.mac_addr[4];
g_netinfo.device_ip[3] = g_netinfo.mac_addr[5];
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>
g_netinfo.gateway[0] = 192;
g_netinfo.gateway[1] = 168;
g_netinfo.gateway[2] = MACAddr[4];
g_netinfo.gateway[2] = g_netinfo.mac_addr[4];
g_netinfo.gateway[3] = 1;
//MCU<43><55>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
g_netinfo.subnet[0] = 255;
@@ -775,9 +775,16 @@ __attribute__((section(".non_0_wait"))) uint8_t WCHNET_LIB_Init(void)
Dbg_Println(DBG_BIT_NET_STATUS_bit,"version error.\n");
}
/*<2A><>ȡMAC <20><>ַ*/
g_netinfo.mac_addr[2] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET );
g_netinfo.mac_addr[3] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 1);
g_netinfo.mac_addr[4] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 2);
g_netinfo.mac_addr[5] = SRAM_Read_Byte(SRAM_Register_Start_ADDRESS + Register_NETMACKADDR_OFFSET + 3);
//<2F><>ȡоƬ<D0BE>Դ<EFBFBD><D4B4><EFBFBD>MAC <20><>ַ
// GetMACAddress(MACAddr);
// Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit, "NET MAC:", MACAddr, 6);
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit, "NET MAC:", g_netinfo.mac_addr, 6);
NetWork_Parameter_Get();
@@ -814,6 +821,8 @@ __attribute__((section(".non_0_wait"))) uint8_t WCHNET_LIB_Init(void)
server_info.net_sta = NET_PHY_WAIT;
SRAM_Write_Byte(0x00,SRAM_IAP_UPGRADE_Reply_NUM_ADDRESS);
return 0;
}
@@ -1055,13 +1064,6 @@ __attribute__((section(".non_0_wait"))) void NetWork_Task(void)
//Udp_Internal_Task(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD>
if(SysTick_1s - server_info.con_tick > 10)
{
//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
server_info.con_tick = SysTick_1s;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>紦<EFBFBD><EFBFBD><EFBFBD><EFBFBD>...\n");
}
/* -<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* -<2D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD><D6B1>״̬<D7B4>£<EFBFBD>PC<50><43><EFBFBD>߻<EFBFBD><DFBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڷ<EFBFBD><DAB7>Ͳ<EFBFBD>ѯ<EFBFBD><D1AF><EFBFBD><EFBFBD>
* */
@@ -1087,7 +1089,6 @@ __attribute__((section(".non_0_wait"))) void NetWork_Task(void)
/*<2A>ͷ<EFBFBD><CDB7>׽<EFBFBD><D7BD><EFBFBD>*/
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ͷ<EFBFBD><EFBFBD>׽<EFBFBD><EFBFBD><EFBFBD>");
WCHNET_SocketClose(g_netinfo.SocketId[SocketIdnex_BLVSeriver],0x00);
}
break;

3
NetLib/net_function.h
View File

@@ -118,7 +118,8 @@ typedef struct
uint16_t goal_port; //Ŀ<><C4BF>port
uint16_t dis_port; //<2F>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
uint16_t frame_no; //<2F><><EFBFBD>͵<EFBFBD>֡<EFBFBD><D6A1>
uint16_t ack_frame; //ACK֡<4B><D6A1>
uint16_t ack_frame; //ACK֡<4B><D6A1> - <20><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD>֡<EFBFBD><D6A1>
uint16_t udp_frame; //UDPͨѶ<CDA8><D1B6><EFBFBD>յ<EFBFBD>֡<EFBFBD><D6A1>
uint16_t udp_timesync_cnt; //ʱ<><CAB1>ͬ<EFBFBD><CDAC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - 1sһ<73><D2BB>
uint16_t udp_periodic_cnt; //<2F><><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1><EFBFBD><EFBFBD><EFBFBD> - 1sһ<73><D2BB>

170
NetLib/tftp_function.c
View File

@@ -6,6 +6,7 @@
*/
#include "tftp_function.h"
#include "net_function.h"
#include "blv_netcomm_function.h"
#include "sram_mem_addr.h"
#include "flash_mem_addr.h"
#include "spi_flash.h"
@@ -53,9 +54,9 @@ __attribute__((section(".non_0_wait"))) uint16_t TFTP_Pack_Get_Block(uint8_t *bu
{
uint16_t temp = 0x00;
temp = buf[3];
temp = buf[2];
temp <<= 8;
temp |= buf[4];
temp |= buf[3];
return temp;
}
@@ -94,7 +95,7 @@ __attribute__((section(".non_0_wait"))) uint8_t TFTP_send_ack_packet(uint8_t s,
{
uint8_t err = 0;
uint32_t sendlen = TFTP_ACK_PKT_LEN;
char packet[TFTP_ACK_PKT_LEN];
uint8_t packet[24];
/* define the first two bytes of the packet */
if(1 == IAPVarTypeStruct_Ptr.IapErrFlag) TFTP_Pack_Set_Opcode(packet,TFTP_ERROR);
@@ -102,8 +103,10 @@ __attribute__((section(".non_0_wait"))) uint8_t TFTP_send_ack_packet(uint8_t s,
TFTP_Pack_Set_Block(packet, block);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP ACK packet -- SocketId:%d , port:%d ,block:%ld len:%ld , IP:%d.%d.%d.%d",s,to_port,block,sendlen,to_ip[0],to_ip[1],to_ip[2],to_ip[3]);
err = WCHNET_SocketUdpSendTo(s, (uint8_t *)&packet[0], &sendlen, to_ip, to_port);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP ACK packet -- SocketId:%d , port:%d ,block:%d len:%d , IP:%d.%d.%d.%d",s,to_port,block,sendlen,to_ip[0],to_ip[1],to_ip[2],to_ip[3]);
Dbg_Print_Buff(DBG_BIT_NET_STATUS_bit, "Send Data: ", packet, sendlen);
err = WCHNET_SocketUdpSendTo(s, packet, &sendlen, to_ip, to_port);
return err;
}
@@ -123,12 +126,12 @@ __attribute__((section(".non_0_wait"))) uint8_t IAP_tftp_process_write(uint8_t s
memcpy(&tftp_args.to_ip[0],to_ip,4);
tftp_args.to_port = to_port;
tftp_args.block = 0;
tftp_args.tot_bytes = 0;
IAPVarTypeStruct_Ptr.TotalCount =0;
IAPVarTypeStruct_Ptr.Write_Block = 0;
IAPVarTypeStruct_Ptr.TotalCount = 0;
IAPVarTypeStruct_Ptr.IapErrFlag = 0;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",to_ip[0], to_ip[1], to_ip[2], to_ip[3], to_port);
/*BLV_C1 -- <20><><EFBFBD><EFBFBD>Flash<73><68><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>ٲ<EFBFBD><D9B2><EFBFBD>ͬʱ<CDAC><CAB1>SRAM<41>е<EFBFBD><D0B5><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>flash<73><68>*/
if(IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_APP)
{
@@ -145,7 +148,55 @@ __attribute__((section(".non_0_wait"))) uint8_t IAP_tftp_process_write(uint8_t s
return 0x01;
}
TFTP_send_ack_packet(s, to_ip, to_port, tftp_args.block);
TFTP_send_ack_packet(g_netinfo.SocketId[SocketIdnex_TFTPDATA], to_ip, to_port, IAPVarTypeStruct_Ptr.Write_Block); //ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD>
return 0x00;
}
/*******************************************************************************
* Function Name : IAP_tftp_process_read
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD> - <20><><EFBFBD>Ͷ<EFBFBD>ȡ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD>
*******************************************************************************/
uint8_t IAP_tftp_process_read(uint8_t s, uint8_t* to_ip, int to_port)
{
uint8_t data_buffer[150];
uint32_t sendlen = 0;
memset(data_buffer,0,sizeof(data_buffer));
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s",__func__);
IAPVarTypeStruct_Ptr.TotalCount = 0x00;
IAPVarTypeStruct_Ptr.IapErrFlag = 0x00;
if(IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_APP)
{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ");
IAPVarTypeStruct_Ptr.FlashWriteAddress = SRAM_IAP_APP_FILE_ADDRESS; //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ַ - <20><><EFBFBD><EFBFBD><EFBFBD>ȱ<EFBFBD><C8B1><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>
}else if(IAPVarTypeStruct_Ptr.IapFileType == TFTP_IAP_DataType_CONFIG)
{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ");
IAPVarTypeStruct_Ptr.FlashWriteAddress = SRAM_IAP_LOGIC_DataStart_ADDRESS; //<2F><><EFBFBD><EFBFBD>д<EFBFBD><D0B4>ַ - <20><><EFBFBD><EFBFBD><EFBFBD>ȱ<EFBFBD><C8B1><EFBFBD><EFBFBD><EFBFBD>SRAM<41><4D>
}else{
return 1;
}
data_buffer[0] = 0x00;
data_buffer[1] = 0x01;
memcpy(&data_buffer[2], IAPVarTypeStruct_Ptr.FtpFileName, IAPVarTypeStruct_Ptr.FtpFileNameLen); //<2F><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ȥ<EFBFBD><C8A5>ȡ<EFBFBD>ļ<EFBFBD> <20>ܳ<EFBFBD><DCB3><EFBFBD>
sendlen += IAPVarTypeStruct_Ptr.FtpFileNameLen+2;
data_buffer[sendlen++] = 0;
data_buffer[sendlen++] = 'o'; //octet <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׼ʹ<D7BC>ð<EFBFBD>λ<EFBFBD><CEBB>
data_buffer[sendlen++] = 'c';
data_buffer[sendlen++] = 't';
data_buffer[sendlen++] = 'e';
data_buffer[sendlen++] = 't';
data_buffer[sendlen++] = 0;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"FtpFileNameLen:%d , name:%s",IAPVarTypeStruct_Ptr.FtpFileNameLen,IAPVarTypeStruct_Ptr.FtpFileName);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"SocketId:%d , port:%d , len:%d , IP:%d.%d.%d.%d",s,to_port,sendlen,to_ip[0],to_ip[1],to_ip[2],to_ip[3]);
WCHNET_SocketUdpSendTo(s, data_buffer, &sendlen, to_ip, to_port);
return 0x00;
}
@@ -167,7 +218,14 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
IAPVarTypeStruct_Ptr.IapPercent++;
IAPVarTypeStruct_Ptr.processing_tick = SysTick_1ms;
if( (pkt_buf_len > TFTP_DATA_PKT_HDR_LEN) && (TFTP_Pack_Get_Block(pkt_buf) == (IAPVarTypeStruct_Ptr.Write_Block + 1) ) )
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s block:%d - %d",__func__,IAPVarTypeStruct_Ptr.Write_Block,TFTP_Pack_Get_Block(pkt_buf));
if( pkt_buf_len > TFTP_DATA_LEN_MAX ) {
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s Data_len:%d Error",__func__,pkt_buf_len);
return ;
}
if( (pkt_buf_len > TFTP_DATA_PKT_HDR_LEN) && ( TFTP_Pack_Get_Block(pkt_buf) == (IAPVarTypeStruct_Ptr.Write_Block + 1) ) )
{
pkt_buf_len = pkt_buf_len - TFTP_DATA_PKT_HDR_LEN;
memset(data_buffer,0,TFTP_DATA_LEN_MAX);
@@ -185,7 +243,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
if( IAPVarTypeStruct_Ptr.Write_Block == 0x00 )
{
temp_val = data_buffer[0] + (data_buffer[1]<<8) + (data_buffer[2]<<16) + (data_buffer[3]<<24);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"temp_var : %08X ,block :%d",temp_val,IAPVarTypeStruct_Ptr.Write_Block);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"temp_var : %X ,block :%d",temp_val,IAPVarTypeStruct_Ptr.Write_Block);
if( (temp_val & 0x2FFE0000) != 0x20000000 )
{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD>ڴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><EFBFBD>");
@@ -204,7 +262,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
// break;
// }
IAPVarTypeStruct_Ptr.IapErrFlag = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
//IAPVarTypeStruct_Ptr.IapErrFlag = 1; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE>һ
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD> data_buffer[0] & 0x2FFE0000 = %X; data_buffer[1]=%X\n", (data_buffer[0] & 0x2FFE0000), data_buffer[1]);
}else if( IAPVarTypeStruct_Ptr.Write_Block > APP_BLOCK_MAX ){
@@ -249,7 +307,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
{
IAPVarTypeStruct_Ptr.Write_Block++;
SRAM_DMA_Write_Buff(data_buffer,pkt_buf_len,IAPVarTypeStruct_Ptr.FlashWriteAddress); //д<><D0B4>SRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
Dbg_Println(DBG_BIT_NET_STATUS_bit,"д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>%08X,д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: byte<74><65>%d", IAPVarTypeStruct_Ptr.FlashWriteAddress, pkt_buf_len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"д<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD>%X,д<><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: byte<74><65>%d", IAPVarTypeStruct_Ptr.FlashWriteAddress, pkt_buf_len);
/*<2A>Գ<EFBFBD><D4B3>Ƚ<EFBFBD><C8BD><EFBFBD>4Byte<74><65><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ڵ<EFBFBD>ַƫ<D6B7><C6AB>ʹ<EFBFBD><CAB9> <20><><EFBFBD>費<EFBFBD><E8B2BB>Ҫ<EFBFBD>ֽڶ<D6BD><DAB6>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̫<EFBFBD><CCAB>Ҫ*/
// pkt_buf_len = (pkt_buf_len + 3) / 4;
@@ -264,7 +322,16 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
TFTP_send_ack_packet(s, ip_addr, Port, IAPVarTypeStruct_Ptr.Write_Block); //<2F><>ÿ<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD>ݰ<EFBFBD><DDB0>Ļظ<C4BB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD> <20><>ַ <20>˿ںͿ<DABA><CDBF><EFBFBD>
if( IAPVarTypeStruct_Ptr.Write_Block == IAPVarTypeStruct_Ptr.BlockSize )
if( (IAPVarTypeStruct_Ptr.BLVIapFlag != 0x01)
&& (IAPVarTypeStruct_Ptr.Write_Block != 0x00)
&& (IAPVarTypeStruct_Ptr.Write_Block % 50 == 0x00)
&& (IAPVarTypeStruct_Ptr.BlockSize != IAPVarTypeStruct_Ptr.Write_Block) )
{
/* <20><><EFBFBD>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϱ<EFBFBD><CFB1>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_Underway); //<2F><><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD>
}
if( (IAPVarTypeStruct_Ptr.BLVIapFlag != 0x01) && (IAPVarTypeStruct_Ptr.Write_Block == IAPVarTypeStruct_Ptr.BlockSize) )
{
uint8_t md5[16] = {0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0};
uint16_t crc_data_len = 0;
@@ -279,23 +346,17 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
{
//<2F>ļ<EFBFBD>MD5У<35><D0A3><EFBFBD>ɹ<EFBFBD>
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><EFBFBD><EFBFBD>Md5<EFBFBD><EFBFBD>ȷ");
//Ϊɶ<CEAA><C9B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƶ˻ظ<CBBB><D8B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>һ<EFBFBD><D2BB>
// switch(IAPVarTypeStruct_Ptr->IapType)
// {
// case IAPTFTPWRITE: //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>״̬Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
// SRAM_Write_Byte(IAP_STATE_COMPLETE, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
// LOG_LogicInfo_DebugRecord("<22><>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
// break;
// case IAPTFTPREAD: //<2F>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// Dbg_Println(DBG_BIT_NET_STATUS_bit,"<22><>¼<EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
// LOG_LogicInfo_DebugRecord("<22><>¼<EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
// SRAM_Write_Byte(CLOUD_IAP_TFTP_STATE_COMPLETE, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
// break;
// }
if( IAPVarTypeStruct_Ptr.FunType == TFTP_FUNTYPE_CloudIAP )
{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>¼<EFBFBD>ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD>¼<EFBFBD>ƶ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD>״̬..");
SRAM_Write_Byte(TFTP_FUNTYPE_CloudIAP, SRAM_IAP_NET_UPGRADE_Flag_ADDRESS);
}
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD>APPд<EFBFBD><EFBFBD>Flash<EFBFBD><EFBFBD>..");
//Cloud_IAP_Plan_SendPack(args,IAPVarTypeStruct_Ptr,IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD>IAP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SPI_FLASH_APP_Data_Erase();
for(uint32_t i = 0;i < IAPVarTypeStruct_Ptr.BlockSize; i++ )
@@ -354,6 +415,8 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD>̼<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ!");
//ֱ<>ӿ<EFBFBD><D3BF>Ź<EFBFBD><C5B9><EFBFBD>λ
NVIC_SystemReset();
while(1);
}else{
//MD5У<35><D0A3>ʧ<EFBFBD><CAA7>
@@ -368,9 +431,9 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
// }
IAPVarTypeStruct_Ptr.IapErrFlag = 1;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X%02X,%02X,%02X,%02X,%02X,%02X", \
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X", \
md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X", \
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X", \
IAPVarTypeStruct_Ptr.Md5[0],IAPVarTypeStruct_Ptr.Md5[1], \
IAPVarTypeStruct_Ptr.Md5[2],IAPVarTypeStruct_Ptr.Md5[3], \
IAPVarTypeStruct_Ptr.Md5[4],IAPVarTypeStruct_Ptr.Md5[5], \
@@ -397,7 +460,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
// break;
// }
//Cloud_IAP_Plan_SendPack(args,IAPVarTypeStruct_Ptr,IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD>У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_CheckSucc); //<2F><><EFBFBD><EFBFBD>IAP<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - У<EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
SPI_FLASH_Logic_File_Erase(); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -422,8 +485,8 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
memcpy(&data_buffer[8],IAPVarTypeStruct_Ptr.Md5,16);
Flash_Write(data_buffer,24,SPIFLASH_LOGIC_DataFlag_ADDRESS);
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ");
Dbg_Println(DBG_BIT_DEVICE_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>");
LOG_LogicInfo_DebugRecord("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD> <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ");
}else{
// switch(IAPVarTypeStruct_Ptr->IapType)
// {
@@ -436,9 +499,9 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
// }
IAPVarTypeStruct_Ptr.IapErrFlag = 1;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X%02X,%02X,%02X,%02X,%02X,%02X",\
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD>ܣ<EFBFBD>Md5<EFBFBD><EFBFBD><EFBFBD><EFBFBD>:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
md5[0],md5[1],md5[2],md5[3],md5[4],md5[5],md5[6],md5[7],md5[8],md5[9],md5[10],md5[11],md5[12],md5[13],md5[14],md5[15]);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X,%02X",\
Dbg_Println(DBG_BIT_NET_STATUS_bit,"UDP Md5:%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X,%X",\
IAPVarTypeStruct_Ptr.Md5[0],IAPVarTypeStruct_Ptr.Md5[1],\
IAPVarTypeStruct_Ptr.Md5[2],IAPVarTypeStruct_Ptr.Md5[3],\
IAPVarTypeStruct_Ptr.Md5[4],IAPVarTypeStruct_Ptr.Md5[5],\
@@ -461,7 +524,7 @@ __attribute__((section(".non_0_wait"))) void TFTP_IAP_Data_Processing(uint8_t s,
* Function Name : UDPSocket_TFTP_CMD_AppCallBack
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD> - <20><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_CMD_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16_t port,uint8_t *buff,uint32_t len)
void UDPSocket_TFTP_CMD_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16_t port,uint8_t *buff,uint32_t len)
{
uint8_t ip_addr[4];
ip_addr[0] = ipaddr & 0xFF;
@@ -469,7 +532,7 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_CMD_AppCallBack(stru
ip_addr[2] = (ipaddr >> 16) & 0xFF ;
ip_addr[3] = (ipaddr >> 24) & 0xFF ;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s len:%ld",__func__,len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s len:%d",__func__,len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3], port);
/*TFTP <20><><EFBFBD><EFBFBD><EEB4A6>*/
@@ -483,7 +546,7 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_CMD_AppCallBack(stru
IAP_tftp_process_write(g_netinfo.SocketId[SocketIdnex_TFTPCMD], ip_addr, port); //<2F>ظ<EFBFBD><D8B8><EFBFBD><EFBFBD><EFBFBD> д<>ļ<EFBFBD>ָ<EFBFBD><D6B8>
}else{
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP Type:%d",IAPVarTypeStruct_Ptr.FunType);
}
}else if( TFTP_Pack_Get_Opcode(buff) == TFTP_OPTION )
@@ -491,6 +554,11 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_CMD_AppCallBack(stru
/*TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>ϴ<EFBFBD><CFB4><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
}else if( TFTP_Pack_Get_Opcode(buff) == TFTP_DATA )
{
/*TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>ƶ<EFBFBD><C6B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><D0A3>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
}else {
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD>*/
@@ -501,7 +569,7 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_CMD_AppCallBack(stru
* Function Name : UDPSocket_TFTP_DATA_AppCallBack
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD>׽<EFBFBD><D7BD><EFBFBD> - <20><><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
*******************************************************************************/
__attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_DATA_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16_t port,uint8_t *buff,uint32_t len)
void UDPSocket_TFTP_DATA_AppCallBack(struct _SOCK_INF * SocketInf,uint32_t ipaddr,uint16_t port,uint8_t *buff,uint32_t len)
{
uint8_t ip_addr[4];
ip_addr[0] = ipaddr & 0xFF;
@@ -509,7 +577,7 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_DATA_AppCallBack(str
ip_addr[2] = (ipaddr >> 16) & 0xFF ;
ip_addr[3] = (ipaddr >> 24) & 0xFF ;
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s len:%ld",__func__,len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"%s len:%d",__func__,len);
Dbg_Println(DBG_BIT_NET_STATUS_bit,"ip:%d.%d.%d.%d, port:%d",ip_addr[0], ip_addr[1], ip_addr[2], ip_addr[3], port);
if( TFTP_Pack_Get_Opcode(buff) == TFTP_DATA ) //TFTP IAP<41>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
@@ -523,6 +591,8 @@ __attribute__((section(".non_0_wait"))) void UDPSocket_TFTP_DATA_AppCallBack(str
// }
}
/*******************************************************************************
* Function Name : Internal_TFTP_Task
* Description : TFTP<54><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -559,14 +629,25 @@ __attribute__((section(".non_0_wait"))) void Internal_TFTP_Task(void)
{
IAPVarTypeStruct_Ptr.processing_tick = SysTick_1ms;
IAPVarTypeStruct_Ptr.status = STA_INIT_IDLE;
if(IAPVarTypeStruct_Ptr.FunType == TFTP_FUNTYPE_CloudIAP)
{
//<2F><><EFBFBD>ƶ˷<C6B6><CBB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
//TFTP_CMD_ACK(server_info.goal_ip, server_info.goal_port); //<2F>ظ<EFBFBD>TFTP<54><50><EFBFBD><EFBFBD>
Dbg_Println(DBG_BIT_NET_STATUS_bit,"<EFBFBD><EFBFBD><EFBFBD>ƶ˷<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>...");
IAP_tftp_process_read(g_netinfo.SocketId[SocketIdnex_TFTPDATA], server_info.goal_ip, IAPVarTypeStruct_Ptr.TFTP_Port);
}
}
break;
case STA_INIT_IDLE:
//<2F><><EFBFBD>ƶ˷<C6B6><CBB7>Ͷ<EFBFBD>ȡ<EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
if( SysTick_1ms - IAPVarTypeStruct_Ptr.processing_tick > TFTP_IAP_Timeout) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ͷ<EFBFBD><CDB7>׽<EFBFBD><D7BD><EFBFBD>
if( SysTick_1ms - IAPVarTypeStruct_Ptr.processing_tick > 60000 ) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ͷ<EFBFBD><CDB7>׽<EFBFBD><D7BD><EFBFBD>
{
//Cloud_IAP_Plan_SendPack(tftp_args,IAPVarTypeStruct_Ptr,IAPPlan_State_IAPTimeout); //<2F><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
UDP_BLVIAPPlan_Cmd_SendPack(IAPPlan_State_IAPTimeout); //<2F><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ
Dbg_Println(DBG_BIT_NET_STATUS_bit,"TFTP <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ");
IAPVarTypeStruct_Ptr.status = STA_END;
@@ -587,7 +668,7 @@ __attribute__((section(".non_0_wait"))) void Internal_TFTP_Task(void)
IAPVarTypeStruct_Ptr.enable = 0x00;
break;
default:
IAPVarTypeStruct_Ptr.status = STA_END; //<2F>ͷ<EFBFBD><CDB7>׽<EFBFBD><D7BD><EFBFBD>
IAPVarTypeStruct_Ptr.status = STA_INIT_WAIT; //<2F>ͷ<EFBFBD><CDB7>׽<EFBFBD><D7BD><EFBFBD>
break;
}
@@ -622,6 +703,7 @@ __attribute__((section(".non_0_wait"))) void Internal_TFTP_Task(void)
}
break;
case STA_INIT_CONNECT: //
break;
}
}

13
NetLib/tftp_function.h
View File

@@ -38,6 +38,13 @@
#define TFTP_IAP_DataType_APP 0x01 //IAP<41><50><EFBFBD><EFBFBD> - APP<50>̼<EFBFBD>
#define TFTP_IAP_DataType_CONFIG 0x02 //IAP<41><50><EFBFBD><EFBFBD> - <20><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD>
#define TFTP_IAP_Status_Ready 0x00 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define TFTP_IAP_Status_Finish 0x01 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define TFTP_IAP_Status_Error 0x02 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define TFTP_IAP_Status_Error_Block 0x03 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define TFTP_IAP_Status_Error_File 0x04 //<2F><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>
#define TFTP_IAP_Status_Error_Md5 0x05 //<2F><><EFBFBD><EFBFBD>MD5ֵ<35><D6B5><EFBFBD><EFBFBD>
typedef enum {
TFTP_RRQ = 1,
@@ -54,7 +61,8 @@ typedef struct
uint8_t enable; //TFTP <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>״̬ 0X01:ʹ<>ܣ<EFBFBD>0x00:ûʹ<C3BB><CAB9>
uint8_t FunType; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0x01:<3A><><EFBFBD><EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x02:<3A>ƶ<EFBFBD>IAP<41><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x03:LOG<4F><47>־<EFBFBD>ϴ<EFBFBD>
uint8_t NewIapFlag; //<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̱<EFBFBD>־λ - 2022-01-05
uint8_t BLVIapFlag; //BLV<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̱<EFBFBD>־λ
uint8_t BLVIapResult; //BLV<4C><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
uint8_t IapErrFlag; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݴ<EFBFBD><DDB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־
@@ -97,7 +105,10 @@ typedef struct
uint32_t last_time;
}tftp_connection_args;
extern IAPVarTypeStruct IAPVarTypeStruct_Ptr;
extern tftp_connection_args tftp_args;
uint8_t bytes_cmp(uint8_t *src,uint8_t *dat,uint32_t len);
void Internal_TFTP_Task(void);
#endif /* NETLIB_TFTP_FUNCTION_H_ */

2
Peripheral/inc/ch564_rcc.h
View File

@@ -100,7 +100,7 @@ extern "C"
}
#define RCC_GET_GLOB_RST_KEEP() (R8_GLOB_RESET_KEEP)
#define RCC_SET_GLOB_RST_KEEP(val) (R8_GLOB_RESET_KEEP = (val);)
#define RCC_SET_GLOB_RST_KEEP(val) {R8_GLOB_RESET_KEEP = (val);}
#define RCC_SET_PLL_SYS_OUT_DIV(val) \
({ \
RCC_UNLOCK_SAFE_ACCESS(); \

98
Readme.md
View File

@@ -1,8 +1,94 @@
#### 2025-12-06
1. 动作执行函数初步实现完毕 - 待测试
2. 开始移植TFTP功能
1. TFTP升级
2. TFTP日志文件传输
​
```C
待完成事项：
​ 1、Launcher 第一次跳转失败问题，待解决。
​ 2、RS485主动端口增加避障功能，RS485轮询端口与BUS端口是轮询机制，不需要增加。
​ 3、BLV-C1P 无启动原因，需另辟须经实现启动原因。
​ 4、Launcher流程修改，MCU Flash只在升级后写入，其他原因启动不写入MCU Flash。
​ 5、在每个设备驱动中增加读取软件版本号，
​ 6、APP固件中串口升级 - 搜索命令、跳转命令
​ 7、TFTP日志上传机制修改
待测试事项：
​ 1、配置功能 - 睡眠功能
​ 2、配置功能 - 多联开关
​ 3、配置功能 - 无卡取电
​ 4、配置功能 - 空调提示音
```
### 2026-02-10
```C
修改人：曹聪
修改点：
1、局域网升级流程 - 初步测试OK
2、云端升级流程 - 初步测试OK
3、云端升级上报升级进度 - 初步测试OK
```
### 2026-01-08
```C
修改人：曹聪
修改点：
1、场景动作延时执行 - 初步测试OK
2、场景反馈灯控制 - 初步测试OK
3、开关、插卡取电、温控器设备模型 - 初步测试OK
```
### 2026-01-06
```C
修改人：曹聪
修改点：
1、场景动作执行初步测试OK
```
### 2026-01-05
```C
修改人：曹聪
修改点：
1、CSIO 继电器单独一个设备存放在BUS设备列表中，应该将这个设备存放到虚拟设备上 - 不合理的地方，待修改
2、调试BUS总线通讯 - OK
3、动作执行 - 网络控制继电器 OK
4、增加C5继电器设备
```
### 2025-12-25
```C
修改人：曹聪
修改点：
1、TFTP升级 - 配置文件初步测试没问题
2、配置文件内容解析移植完毕，调试中
3、TFTP升级 - 是否一个套接字搞定，不需要使用两个套接字
```
### 2025-12-10
```C
修改人：曹聪
修改点：
1、TFTP IAP升级功能移植完毕，待测试
2、优化代码编译的空间问题，目前零等待区的空间已满，需将除了库函数以外的代码及相关变量全部放置非零等待区中，否则项目编译不成功
```
### 2025-12-06
```C
修改人：曹聪
修改点：
1、动作执行函数初步实现完毕 - 待测试
2、开始移植TFTP功能
-> TFTP升级
-> TFTP日志文件传输
```

9
User/includes.h
View File

@@ -8,6 +8,7 @@
#ifndef USER_INCLUDES_H_
#define USER_INCLUDES_H_
#include <blv_nor_dev_virtualcard.h>
#include "ch564.h"
#include "system_ch564.h"
@@ -46,9 +47,12 @@
#include "blv_rs485_dev_c12dimming.h"
#include "blv_rs485_dev_touchswitch.h"
#include "blv_rs485_dev_touchtempt1.h"
#include "blv_nor_dec_virtualcard.h"
#include "blv_nor_dev_hvoutfun.h"
#include "blv_nor_dev_c5relay.h"
#include "blv_nor_dev_lvinput.h"
#include "blv_nor_dev_lvoutput.h"
#include "blv_nor_dev_serviceinfo.h"
#include "blv_rs485_dev_energymonitor.h"
#include "blv_rs485_dev_switchctrl.h"
#include "blv_rs485_dev_tempctrl.h"
@@ -61,7 +65,8 @@
#define MCU_TYPE "BLV-C1F" //<2F><><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD>
#define APP_NAME "App_L4_C1F_42" //APP<50><50><EFBFBD><EFBFBD> 16Byte
#define SoftwareVer "C1P_A_L4_01_251107" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte
#define SoftwareVer "C1P_A_L4_01_251109" //<2F><><EFBFBD><EFBFBD><EFBFBD>汾 20Byte

35
User/main.c
View File

@@ -14,6 +14,8 @@
#include <stdio.h>
#include <string.h>
uint32_t test_tick = 0;
uint8_t test_buff[10] = {0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A};
@@ -30,10 +32,11 @@ int main(void)
SystemCoreClockUpdate();
Systick_Init();
UARTx_Init(UART_0,512000);
UARTx_Init(UART_1,512000);
UARTx_Init(UART_2,512000);
UARTx_Init(UART_3,512000);
WDT_Reinit();
UARTx_Init(UART_0,9600); //RS485<38><35>ѯ<EFBFBD>˿<EFBFBD>
UARTx_Init(UART_1,512000); //<2F><><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
UARTx_Init(UART_2,9600); //RS485<38><35><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
UARTx_Init(UART_3,115200); //BUS<55><53><EFBFBD><EFBFBD>
SYS_LED_Init();
@@ -41,11 +44,20 @@ int main(void)
SPI_FLASH_Init();
Read_Flash_Register_Data();
WCHNET_LIB_Init();
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! 2025-11-03-10:42\r\n");
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"MCU Start!! \r\n");
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"SystemClk:%d\r\n", SystemCoreClock);
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"DEV_ACTION_INFO Size:%d \r\n",sizeof(DEV_ACTION_INFO));
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Dev_Action_U64Cond Size:%d \r\n",sizeof(Dev_Action_U64Cond));
// Dbg_Println(DBG_BIT_SYS_STATUS_bit,"Struct_Dev_Dly Size:%d \r\n",sizeof(Struct_Dev_Dly));
BLV_DevAction_AllData_Init();
while (1)
{
SYS_LED_Task();
@@ -55,12 +67,17 @@ int main(void)
UART2_RECEIVE();
UART3_RECEIVE();
if(SysTick_1ms - test_tick >= 10000){
test_tick = SysTick_1ms;
BLV_BUS485Port_ModeTask();
Dbg_Println(DBG_BIT_SYS_STATUS_bit,"RUN PYH:%x...\r\n",ETH_ReadPHYRegister(PHY_ADDRESS, PHY_BSR));
BLV_PollPort_ModeTask();
}
BLV_ActivePort_ModeTask();
BLV_Nor_Dev_ModeTask();
BLV_DevAction_Task();
BLV_DevDly_Task();
NetWork_Task();

325
User/system_ch564.c
View File

@@ -12,7 +12,6 @@
#include "ch564.h"
#include "debug.h"
/*
* Uncomment the line corresponding to the desired System clock (SYSCLK)
* frequency (after reset the HSI is used as SYSCLK source).
@@ -88,38 +87,23 @@ static void SetSysClockTo25_HSE(void);
*/
void SystemInit(void)
{
if ( SystemCoreClock >= 60000000 )
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
else
{
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , DISABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE );
RCC_LOCK_SAFE_ACCESS();
}
SystemCoreClockUpdate();
//Delay_Init();
HSI_ON();
SystemCoreClockUpdate();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
HSI_ON();
/* Close ETH PHY */
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , DISABLE );
Delay_Us( PLL_STARTUP_TIME );
ETH->PHY_CR |= ( 1 << 31 );
ETH->PHY_CR &= ~( 1 << 30 );
ETH->PHY_CR |= ( 1 << 30 );
Delay_Us( HSI_STARTUP_TIME );
RCC_SlpWakeCtrl( RB_SLP_ETH_PWR_DN , ENABLE );
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_HSI_HSE );
USB_PLL_OFF();
SetSysClock();
}
/*********************************************************************
@@ -131,55 +115,55 @@ void SystemInit(void)
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0;
uint32_t tmp = 0;
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
if ( R32_EXTEN_CTLR0 & RB_SW )
{
if ( R32_EXTEN_CTLR1 & RB_CLKSEL )
{
tmp = HSE_Value;
}
else
{
tmp = HSI_Value;
}
}
else
{
switch ( R32_EXTEN_CTLR0 & RB_USBPLLSRC )
{
case 0x60:
tmp = HSI_Value;
break;
case 0x20:
tmp = HSE_Value;
break;
default:
tmp = HSE_Value * 20 / 25;
break;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
switch ( R32_EXTEN_CTLR0 & RB_USBPLLCLK )
{
case 0x0:
tmp *= 24;
break;
case 0x4000:
tmp *= 20;
break;
case 0x8000:
tmp *= 16;
break;
case 0xC000:
tmp *= 15;
break;
default:
break;
}
tmp /= ( R8_PLL_OUT_DIV >> 4 ) + 1;
}
SystemCoreClock = tmp;
SystemCoreClock = tmp;
}
/*********************************************************************
@@ -191,29 +175,30 @@ void SystemCoreClockUpdate(void)
*/
static void SetSysClock(void)
{
SystemCoreClockUpdate();
GPIO_IPD_Unused();
SystemCoreClockUpdate();
//Delay_Init();
GPIO_IPD_Unused();
#ifdef SYSCLK_FREQ_120MHz_HSI
SetSysClockTo120_HSI();
SetSysClockTo120_HSI();
#elif defined SYSCLK_FREQ_80MHz_HSI
SetSysClockTo80_HSI();
SetSysClockTo80_HSI();
#elif defined SYSCLK_FREQ_60MHz_HSI
SetSysClockTo60_HSI();
SetSysClockTo60_HSI();
#elif defined SYSCLK_FREQ_40MHz_HSI
SetSysClockTo40_HSI();
SetSysClockTo40_HSI();
#elif defined SYSCLK_FREQ_20MHz_HSI
SetSysClockTo20_HSI();
SetSysClockTo20_HSI();
#elif defined SYSCLK_FREQ_120MHz_HSE
SetSysClockTo120_HSE();
SetSysClockTo120_HSE();
#elif defined SYSCLK_FREQ_80MHz_HSE
SetSysClockTo80_HSE();
SetSysClockTo80_HSE();
#elif defined SYSCLK_FREQ_60MHz_HSE
SetSysClockTo60_HSE();
SetSysClockTo60_HSE();
#elif defined SYSCLK_FREQ_40MHz_HSE
SetSysClockTo40_HSE();
SetSysClockTo40_HSE();
#elif defined SYSCLK_FREQ_25MHz_HSE
SetSysClockTo25_HSE();
SetSysClockTo25_HSE();
#endif
}
@@ -228,12 +213,16 @@ static void SetSysClock(void)
*/
static void SetSysClockTo120_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0x3 );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_80MHz_HSI
@@ -247,12 +236,16 @@ static void SetSysClockTo120_HSI(void)
*/
static void SetSysClockTo80_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSI
@@ -266,12 +259,16 @@ static void SetSysClockTo80_HSI(void)
*/
static void SetSysClockTo60_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_HSI);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSI
@@ -285,12 +282,12 @@ static void SetSysClockTo60_HSI(void)
*/
static void SetSysClockTo40_HSI(void)
{
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
RCC_SET_PLL_SYS_OUT_DIV( 0xB );
USB_PLL_MUL_SELECT( USB_PLL_MUL_24 );
USB_PLL_SOURCE_SELECT( USB_PLL_SOURCE_HSI );
USB_PLL_ON();
Delay_Us( PLL_STARTUP_TIME );
SYSCLK_SOURCE_SELECT( SYSCLK_SOURCE_USBPLL );
}
#elif defined SYSCLK_FREQ_20MHz_HSI
@@ -304,8 +301,8 @@ static void SetSysClockTo40_HSI(void)
*/
static void SetSysClockTo20_HSI(void)
{
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
CLKSEL_HSI();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}
#elif defined SYSCLK_FREQ_120MHz_HSE
@@ -319,15 +316,19 @@ static void SetSysClockTo20_HSI(void)
*/
static void SetSysClockTo120_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x3);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_80MHz_HSE
@@ -341,15 +342,19 @@ static void SetSysClockTo120_HSE(void)
*/
static void SetSysClockTo80_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x5);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_60MHz_HSE
@@ -363,15 +368,19 @@ static void SetSysClockTo80_HSE(void)
*/
static void SetSysClockTo60_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0x7);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
RCC_UNLOCK_SAFE_ACCESS();
BITS_CFG( R32_EXTEN_CTLR0 , RB_FLASH_PRE_EN , ENABLE );
BITS_CFG( R32_EXTEN_CTLR0 , RB_SW_CFG , DISABLE ); //<2F>ر<EFBFBD>SW<53><57><EFBFBD>Կ<EFBFBD>
RCC_LOCK_SAFE_ACCESS();
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_40MHz_HSE
@@ -385,15 +394,15 @@ static void SetSysClockTo60_HSE(void)
*/
static void SetSysClockTo40_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
RCC_SlpWakeCtrl(RB_SLP_ETH_PWR_DN, DISABLE);
RCC_SET_PLL_SYS_OUT_DIV(0xB);
USB_PLL_SOURCE_SELECT(USB_PLL_SOURCE_ETH_PLL_OUT);
USB_PLL_MUL_SELECT(USB_PLL_MUL_24);
USB_PLL_ON();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_USBPLL);
}
#elif defined SYSCLK_FREQ_25MHz_HSE
@@ -407,13 +416,13 @@ static void SetSysClockTo40_HSE(void)
*/
static void SetSysClockTo25_HSE(void)
{
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
HSE_ON();
Delay_Us(HSE_STARTUP_TIME);
CLKSEL_HSE();
SystemCoreClock = HSE_VALUE;
Delay_Init();
Delay_Us(PLL_STARTUP_TIME);
SYSCLK_SOURCE_SELECT(SYSCLK_SOURCE_HSI_HSE);
}