232 lines
13 KiB
C
232 lines
13 KiB
C
/********************************** (C) COPYRIGHT *******************************
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* File Name : ch564_tim.h
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* Author : WCH
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* Version : V1.0.0
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* Date : 2024/05/05
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* Description : This file contains all the functions prototypes for the
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* TIM firmware library.
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#ifndef __CH564_TIM_H
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#define __CH564_TIM_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "ch564.h"
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/**
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* @brief Pulse Width Modulation Effective Output Words
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*/
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typedef enum
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{
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PWM_Times_1 = 0, // PWM effective output repeats 1 times
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PWM_Times_4 = 1, // PWM effective output repeats 4 times
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PWM_Times_8 = 2, // PWM effective output repeats 8 times
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PWM_Times_16 = 3, // PWM effective output repeats 16 times
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} PWM_RepeatTsTypeDef;
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/**
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* @brief Input Capture Edge Mode
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*/
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typedef enum
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{
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CAP_NULL = 0, // not capture
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Edge_To_Edge = 1, // between any edge
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FallEdge_To_FallEdge = 2, // falling edge to falling edge
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RiseEdge_To_RiseEdge = 3, // rising edge to rising edge
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} CapModeTypeDef;
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/**
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* @brief Input Capture Edge Mode
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*/
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typedef enum
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{
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clock16 = 0,
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clock8
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} CapWidthTypedef;
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/**
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* @brief Direct access memory loop mode
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*/
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typedef enum
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{
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Mode_Single = 0, // single mode
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Mode_LOOP = 1, // cycle mode
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Mode_Burst = 2,
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Mode_Burst_Loop = 3
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} DMAModeTypeDef;
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/**
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* @brief PWM output polarity
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*/
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typedef enum
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{
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high_on_low = 0, // Default low level, high level is active
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low_on_high = 1, // Default high level, low level active
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} PWM_PolarTypeDef;
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/****************** TMR0 */
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// Timing and counting
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void TMR0_TimerInit(uint32_t arr); /* Timing function initialization */
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#define TMR0_DeInit() (R8_TMR0_CTRL_MOD = 0)
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#define TMR0_GetCurrentCount() R32_TMR0_COUNT /* Get the current count value, 67108864 */
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#define TMR0_ClrCurrentCount() {R8_TMR0_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR0_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
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#define TMR0_SET_CNT_END(cnt_end) ({R32_TMR0_CNT_END = (cnt_end);})
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// Pulse Width Modulation Function
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#define TMR0_PWMCycleCfg(cyc) \
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(R32_TMR0_CNT_END = (cyc)) /* PWM0 channel output waveform period configuration, maximum 67108864 */
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void TMR0_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM0 output initialization */
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#define TMR0_PWMActDataWidth(d) (R32_TMR0_FIFO = (d)) /* PWM0 effective data pulse width, maximum 67108864 */
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// Catch pulse width
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#define TMR0_CAPTimeoutCfg(cyc) \
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(R32_TMR0_CNT_END = (cyc)) /* CAP0 capture level timeout configuration, maximum 33554432 */
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void TMR0_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
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#define TMR0_CAPGetData() R32_TMR0_FIFO /* Get pulse data */
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#define TMR0_CAPDataCounter() R8_TMR0_FIFO_COUNT /* Get the number of currently captured data */
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void TMR0_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
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#define TMR0_Disable() (R8_TMR0_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR0 */
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#define TMR0_Enable() (R8_TMR0_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR0 */
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// refer to TMR0 interrupt bit define
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#define TMR0_ITCfg(cfglist, en) \
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BITS_CFG(R8_TMR0_INTER_EN, (cfglist), (en)) /* TMR0 corresponding interrupt bit on and off */
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// refer to TMR0 interrupt bit define
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#define TMR0_ClearITFlag(f) (R8_TMR0_INT_FLAG = (f)) /* Clear interrupt flag */
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#define TMR0_GetITFlag(f) (R8_TMR0_INT_FLAG & (f)) /* Query interrupt flag status */
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#define TMR0_DMA_SET_RANGE(start, end) \
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({ \
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R32_TMR0_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
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R32_TMR0_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
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})
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#define TMR0_DMA_GET_BEG() (R32_TMR0_DMA_BEG)
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#define TMR0_DMA_GET_END() (R32_TMR0_DMA_END)
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#define TMR0_DMA_GET_NOW() (R32_TMR0_DMA_NOW)
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/****************** TMR1 */
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// Timing and counting
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void TMR1_TimerInit(uint32_t arr); /* Timing function initialization */
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#define TMR1_DeInit() (R8_TMR1_CTRL_MOD = 0)
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#define TMR1_GetCurrentCount() R32_TMR1_COUNT /* Get the current count value, 67108864 */
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#define TMR1_ClrCurrentCount() {R8_TMR1_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR1_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
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#define TMR1_SET_CNT_END(cnt_end) ({R32_TMR1_CNT_END = (cnt_end);})
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// Pulse Width Modulation Function
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#define TMR1_PWMCycleCfg(cyc) \
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(R32_TMR1_CNT_END = (cyc)) /* PWM1 channel output waveform period configuration, maximum 67108864 */
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void TMR1_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM1 output initialization */
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#define TMR1_PWMActDataWidth(d) (R32_TMR1_FIFO = (d)) /* PWM1 effective data pulse width, maximum 67108864 */
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// Catch pulse width
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#define TMR1_CAPTimeoutCfg(cyc) \
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(R32_TMR1_CNT_END = (cyc)) /* CAP1 capture level timeout configuration, maximum 33554432 */
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void TMR1_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
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#define TMR1_CAPGetData() R32_TMR1_FIFO /* Get pulse data */
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#define TMR1_CAPDataCounter() R8_TMR1_FIFO_COUNT /* Get the number of currently captured data */
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void TMR1_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
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#define TMR1_Disable() (R8_TMR1_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR1 */
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#define TMR1_Enable() (R8_TMR1_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR1 */
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// refer to TMR1 interrupt bit define
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#define TMR1_ITCfg(cfglist, en) \
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BITS_CFG(R8_TMR1_INTER_EN, (cfglist), (en)) /* TMR1 corresponding interrupt bit on and off */
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// refer to TMR1 interrupt bit define
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#define TMR1_ClearITFlag(f) (R8_TMR1_INT_FLAG = (f)) /* Clear interrupt flag */
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#define TMR1_GetITFlag(f) (R8_TMR1_INT_FLAG & (f)) /* Query interrupt flag status */
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#define TMR1_DMA_SET_RANGE(start, end) \
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({ \
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R32_TMR1_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
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R32_TMR1_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
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})
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#define TMR1_DMA_GET_BEG() (R32_TMR1_DMA_BEG)
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#define TMR1_DMA_GET_END() (R32_TMR1_DMA_END)
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#define TMR1_DMA_GET_NOW() (R32_TMR1_DMA_NOW)
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/****************** TMR2 */
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// Timing and counting
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void TMR2_TimerInit(uint32_t arr); /* Timing function initialization */
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#define TMR2_DeInit() (R8_TMR2_CTRL_MOD = 0)
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#define TMR2_GetCurrentCount() R32_TMR2_COUNT /* Get the current count value, 67108864 */
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#define TMR2_ClrCurrentCount() {R8_TMR2_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR2_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
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#define TMR2_SET_CNT_END(cnt_end) ({R32_TMR2_CNT_END = (cnt_end);})
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// Pulse Width Modulation Function
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#define TMR2_PWMCycleCfg(cyc) \
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(R32_TMR2_CNT_END = (cyc)) /* PWM2 channel output waveform period configuration, maximum 67108864 */
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void TMR2_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM2 output initialization */
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#define TMR2_PWMActDataWidth(d) (R32_TMR2_FIFO = (d)) /* PWM2 effective data pulse width, maximum 67108864 */
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// Catch pulse width
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#define TMR2_CAPTimeoutCfg(cyc) \
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(R32_TMR2_CNT_END = (cyc)) /* CAP2 capture level timeout configuration, maximum 33554432 */
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void TMR2_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
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#define TMR2_CAPGetData() R32_TMR2_FIFO /* Get pulse data */
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#define TMR2_CAPDataCounter() R8_TMR2_FIFO_COUNT /* Get the number of currently captured data */
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void TMR2_DMACfg(FunctionalState NewSTA, uint32_t startAddr, uint32_t endAddr, DMAModeTypeDef DMAMode); /* DMA configuration */
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#define TMR2_Disable() (R8_TMR2_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR2 */
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#define TMR2_Enable() (R8_TMR2_CTRL_MOD |= RB_TMR_COUNT_EN) /* Open TMR2 */
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// refer to TMR2 interrupt bit define
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#define TMR2_ITCfg(cfglist, en) \
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BITS_CFG(R8_TMR2_INTER_EN, (cfglist), (en)) /* TMR2 corresponding interrupt bit on and off */
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// refer to TMR2 interrupt bit define
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#define TMR2_ClearITFlag(f) (R8_TMR2_INT_FLAG = (f)) /* Clear interrupt flag */
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#define TMR2_GetITFlag(f) (R8_TMR2_INT_FLAG & (f)) /* Query interrupt flag status */
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#define TMR2_DMA_SET_RANGE(start, end) \
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({ \
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R32_TMR2_DMA_BEG = (start)&MASK_TMR_DMA_ADDR; \
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R32_TMR2_DMA_END = (end)&MASK_TMR_DMA_ADDR; \
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})
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#define TMR2_DMA_GET_BEG() (R32_TMR2_DMA_BEG)
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#define TMR2_DMA_GET_END() (R32_TMR2_DMA_END)
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#define TMR2_DMA_GET_NOW() (R32_TMR2_DMA_NOW)
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/****************** TMR3 */
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// Timing and counting
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void TMR3_TimerInit(uint32_t arr); /* Timing function initialization */
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#define TMR3_DeInit() (R8_TMR3_CTRL_MOD = 0)
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void TMR3_EXTSignalCounterInit(uint32_t arr, CapModeTypeDef capedge,
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CapWidthTypedef capwidth); /* External signal counting function initialization */
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#define TMR3_GetCurrentCount() R32_TMR3_COUNT /* Get the current count value, 67108864 */
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#define TMR3_ClrCurrentCount() {R8_TMR3_CTRL_MOD |= RB_TMR_ALL_CLEAR;R8_TMR3_CTRL_MOD &= ~RB_TMR_ALL_CLEAR;}
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#define TMR3_SET_CNT_END(cnt_end) ({R32_TMR3_CNT_END = (cnt_end);})
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// Pulse Width Modulation Function
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#define TMR3_PWMCycleCfg(cyc) \
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(R32_TMR3_CNT_END = (cyc)) /* PWM2 channel output waveform period configuration, maximum 67108864 */
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void TMR3_PWMInit(PWM_PolarTypeDef polarities, PWM_RepeatTsTypeDef repeattime); /* PWM2 output initialization */
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#define TMR3_PWMActDataWidth(d) (R32_TMR3_FIFO = (d)) /* PWM2 effective data pulse width, maximum 67108864 */
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// Catch pulse width
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#define TMR3_CAPTimeoutCfg(cyc) \
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(R32_TMR3_CNT_END = (cyc)) /* CAP2 capture level timeout configuration, maximum 33554432 */
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void TMR3_CapInit(CapModeTypeDef capedge,CapWidthTypedef widt); /* External signal capture function initialization */
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#define TMR3_CAPGetData() R32_TMR3_FIFO /* Get pulse data */
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#define TMR3_CAPDataCounter() R8_TMR3_FIFO_COUNT /* Get the number of currently captured data */
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#define TMR3_Disable() (R8_TMR3_CTRL_MOD &= ~RB_TMR_COUNT_EN) /* Close TMR3 */
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#define TMR3_Enable() (R8_TMR3_CTRL_MOD |= RB_TMR_COUNT_EN) /* Close TMR3 */
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// refer to TMR3 interrupt bit define
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#define TMR3_ITCfg(cfglist, en) \
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BITS_CFG(R8_TMR3_INTER_EN, (cfglist), (en)) /* TMR3 corresponding interrupt bit on and off */
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// refer to TMR3 interrupt bit define
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#define TMR3_ClearITFlag(f) (R8_TMR3_INT_FLAG = (f)) /* Clear interrupt flag */
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#define TMR3_GetITFlag(f) (R8_TMR3_INT_FLAG & (f)) /* Query interrupt flag status */
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#ifdef __cplusplus
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}
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#endif
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#endif
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